LT1943_1 [Linear]
High Current Quad Output Regulator for TFT LCD Panels; 高电流四路输出稳压器，用于TFT LCD面板
| 型号： | LT1943_1 |
| 厂家： | 
Linear |
| 描述： | High Current Quad Output Regulator for TFT LCD Panels |
| 文件： | 总20页 (文件大小：268K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1943
High Current Quad Output
Regulator for TFT LCD Panels
U
FEATURES
DESCRIPTIO
The LT®1943 quad output adjustable switching regulator
provides power for large TFT LCD panels. The device,
housed in a low profile 28 pin thermally enhanced TSSOP
package, cangeneratea3.3Vor5Vlogicsupplyalongwith
the triple output supply required for the TFT LCD panel.
Operatingfromaninputrangeof4.5Vto22V, astep-down
regulator provides a low voltage output VLOGIC with up to
2A current. A high-power step-up converter, a lower-
power step-up converter and an inverting converter pro-
vide the three independent output voltages AVDD, VON and
■
4 Integrated Switches: 2.4A Buck, 2.6A Boost,
0.35A Boost, 0.35A Inverter (Guaranteed Minimum
Current Limit)
■
Fixed Frequency, Low Noise Outputs
■
Soft-Start for all Outputs
■
Externally Programmable VON Delay
■
Integrated Schottky Diode for VON Output
■
PGOOD Pin for AVDD Output Disconnect
■
4.5V to 22V Input Voltage Range
PanelProtectTM Circuitry Disables VON Upon Fault
■
V
OFF required by the LCD panel. A high-side PNP provides
■
Available in Thermally Enhanced 28-Lead TSSOP
delayed turn-on of the VON signal and can handle up to
30mA. Protection circuitry ensures that VON is disabled if
any of the four outputs are more than 10% below the
programmed voltage.
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APPLICATIO S
■
Large TFT-LCD Desktop Monitors
Flat Panel Televisions
■
All switchers are synchronized to an internal 1.2MHz
clock, allowing the use of low profile inductors and ce-
ramic capacitors throughout. A current mode architecture
provides excellent transient response. For best flexibility,
all outputs are adjustable. Soft-start is included in all four
channels. A PGOOD pin can drive an optional PMOS pass
device to provide output disconnect for the AVDD output.
, LTC and LT are registered trademarks of Linear Technology Corporation.
PanelProtect is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
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TYPICAL APPLICATIO
V
8V TO 20V
IN,
10µH
V
AV
DD
12.2V
OFF
–5.5V
50mA
500mA
1µF
10µF
0.47µF
33µH
10µH
88.7k
10.0k
10µF
2.2µF
Startup Waveforms
44.2k
V
SW3
IN
SW4
SW2
FB2
RUN-SS
2V/DIV
NFB4
0.015µF
0.015µF
0.047µF
V
RUN-SS
SS-234
LOGIC
10.0k
10pF
10µH
5V/DIV
AV
DD
LT1943
FB4
C
T
10V/DIV
BIAS
BOOST
PGOOD
PGOOD
V
ON
V
OFF
V
35V
ON
E3
10V/DIV
30mA
0.22µF
SW1
FB1
274k
V
E3
4.7µH
20V/DIV
16.2k
FB3
V
LOGIC
3.3V
2A
V
ON
GND
SGND
10.0k
2.2µF
50V/DIV
V
C1
10.0k
22µF
I
IN(AVG)
1A/DIV
V
V
V
C2
C3
C4
5ms/DIV
0.47µF
18k
100pF
2.2nF
13k
6.8k
27k
100pF
680pF
100pF
2.2nF
100pF
2.2nF
1943 TA01
Quad Output TFT-LCD Power Supply
1943fa
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LT1943
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ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
ORDER PART
TOP VIEW
VIN Voltage .............................................................. 25V
BOOST Voltage ........................................................ 36V
BOOST Voltage Above SW1..................................... 25V
BIAS Pin Voltage ..................................................... 18V
SW2, SW4 Pin Voltages .......................................... 40V
SW3 Voltage ............................................................ 40V
FB1, FB2, FB3, FB4 Voltages...................................... 4V
NFB4 Voltage ................................................ +6V, –0.6V
VC1, VC2, VC3, VC4 Pin Voltages.............................. 6V
RUN-SS, SS-234 Pin Voltages................................... 6V
PGOOD Pin Voltage ................................................. 36V
E3 Pin Voltage ......................................................... 38V
NUMBER
GND
VC1
1
2
SW2
SW2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LT1943EFE
VC2
3
V
ON
FB1
4
C
T
FB2
5
E3
FB3
6
PGOOD
BIAS
NFB4
FB4
7
29
8
SW3
VC3
9
GND
VC4
10
11
12
13
14
SW4
SGND
BOOST
SW1
SW1
RUN-SS
SS-234
FE PART MARKING
1943E
V
IN
V
IN
FE PACKAGE
28-LEAD PLASTIC TSSOP
EXPOSED PAD (PIN 29) IS GROUND
(MUST BE SOLDERED TO PCB)
V
ON Voltage ............................................................. 38V
CT Pin Voltage ........................................................... 6V
Junction Temperature........................................... 125°C
Operating Temperature Range (Note 2) ...–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TJMAX = 125°C, θJA = 25°C/W, θJC = 7.5°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN-SS, SS-234 = 2.5V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
4.5
UNITS
Minimum Input Voltage
Maximum Input Voltage
Quiescent Current
●
V
V
22
Not Switching
RUN-SS = SS-234 = 0V
10
35
14
45
mA
µA
RUN-SS, SS-234 Pin Current
RUN-SS, SS-234 Threshold
BIAS Pin Voltage to Begin SS-234 Charge
BIAS Pin Current
RUN-SS, SS-234 = 0.4V
1.7
0.8
2.8
10.5
125
20
µA
V
●
2.4
3.15
15
V
BIAS = 3.1V, All Switches Off
(Note 3)
mA
mV
µA
V
FB Threshold Offset to Begin C Charge
90
16
160
25
T
C Pin Current Source
T
All FB Pins = 1.5V
All FB Pins = 1.5V
C Threshold to Power V
T
1.0
1.1
180
60
1.2
240
ON
V
Switch Drop
V
V
Current = 30mA
= 30V
mV
mA
mV
µA
µA
ON
ON
E3
Maximum V Current
●
30
90
ON
PGOOD Threshold Offset
PGOOD Sink Current
PGOOD Pin Leakage
125
160
1
200
V
= 36V
PGOOD
Master Oscillator Frequency
1.1
1.0
1.2
1.35
1.46
MHz
MHz
●
Foldback Switching Frequency
Frequency Shift Threshold on FB
All FB Pins = 0V
250
0.5
kHz
V
∆200kHz
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LT1943
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN-SS, SS-234 = 2.5V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SWITCH 1 (2.4A BUCK)
FB1 Voltage
1.23
1.22
1.25
1.27
1.27
V
V
●
●
FB1 Voltage Line Regulation
FB1 Pin Bias Current
4.5V < V < 22V
0.01
100
200
450
3.2
310
0.1
1.8
30
0.03
600
%/V
nA
IN
(Note 4)
Error Amplifier 1 Voltage Gain
Error Amplifier 1 Transconductance
Switch 1 Current Limit
V/V
µmhos
A
∆I = 5µA
Duty Cycle = 35% (Note 6)
●
2.4
82
4.3
470
10
Switch 1 V
I
= 2A
SW
mV
µA
CESAT
Switch 1 Leakage Current
Minimum BOOST Voltage Above SW1 Pin
BOOST Pin Current
FB1 = 1.5V
I
I
= 1.5A (Note 7)
= 1.5A
2.5
50
V
SW
SW
mA
%
Maximum Duty Cycle (SW1)
SWITCH 2 (2.6A BOOST)
FB2 Voltage
●
92
1.23
1.22
1.25
1.27
1.27
V
V
●
●
FB2 Voltage Line Regulation
FB2 Pin Bias Current
4.5V < V < 22V
0.01
220
200
450
3.8
360
0.1
45
0.03
%/V
nA
IN
(Note 4)
1000
Error Amplifier 2 Voltage Gain
Error Amplifier 2 Transconductance
Switch 2 Current Limit
V/V
µmhos
A
∆I = 5µA
●
●
2.6
85
4.9
540
1
Switch 2 V
I
= 2A
SW2
mV
µA
CESAT
Switch 2 Leakage Current
BIAS Pin Current
FB2 = 1.5V
= 2A
I
mA
%
SW2
Maximum Duty Cycle (SW2)
SWITCH 3 (350mA BOOST)
FB3 Voltage
92
1.23
1.22
1.25
1.27
1.27
V
V
●
●
FB3 Voltage Line Regulation
FB3 Pin Bias Current
4.5V < V < 22V
0.01
100
200
450
0.5
180
0.1
14
0.03
600
%/V
nA
IN
(Note 4)
Error Amplifier 3 Voltage Gain
Error Amplifier 3 Transconductance
Switch 3 Current Limit
V/V
µmhos
A
∆I = 5µA
●
●
0.35
0.7
280
1
Switch 3 V
I
= 0.2A
SW3
mV
CESAT
Switch 3 Leakage Current
BIAS Pin Current
FB3 = 1.5V
= 0.2A
µA
I
mA
SW3
Maximum Duty Cycle (SW3)
84
83
88
%
%
Schottky Diode Drop
I = 170mA
700
mV
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LT1943
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. RUN-SS, SS-234 = 2.5V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SWITCH 4 (350mA INVERTER)
FB4 Voltage
1.23
1.22
1.25
1.27
1.27
V
V
●
FB4 Voltage Line Regulation
FB4 Pin Bias Current
4.5V < V < 22V
0.01
100
0.03
600
%/V
nA
IN
(Note 4)
●
●
NFB4 Voltage (V -V
)
1.215
1.205
1.245
1.275
1.275
V
V
FB4 NFB4
NFB4 Voltage Line Regulation
NFB4 Pin Bias Current
4.5V < V < 22V
0.01
100
200
450
0.5
260
0.1
15
0.03
600
%/V
nA
IN
(Note 5)
Error Amplifier 4 Voltage Gain
Error Amplifier 4 Transconductance
Switch 4 Current Limit
V/V
µmhos
A
∆I = 5µA
●
0.35
0.7
390
1
Switch 4 V
I
= 0.3A
SW4
mV
CESAT
Switch 4 Leakage Current
BIAS Pin Current due to SW4
Maximum Duty Cycle (SW4)
FB4 = 1.5V
= 0.3A
µA
I
mA
SW4
84
83
88
%
%
●
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 4: Current flows into FB1, FB2, FB3 and FB4 pins.
Note 5: Current flows out of NFB4 pin.
Note 2: The LT1943E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization, and correlation
with statistical process controls.
Note 6: Current limit is guaranteed by design and/or correlation to static
test. Slope compensation reduces current limit at high duty cycle.
Note 7: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 3: The C pin is held low until FB1, FB2, FB3 and FB4 all ramp above
T
the FB threshold offset.
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TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Output Current
for VLOGIC = 3.3V
SW1 Current Limit vs Duty Cycle
SW1 Current Limit
5
4
3
2
1
0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
4.5
4.0
3.5
3.0
2.5
T
= 25°C
T
= 25°C
A
A
L1 = 4.7µH
L1 = 3.3µH
TYPICAL
MINIMUM
10
0
5
15
20
0
20
40
60
80
100
–50
0
25
50
75 100 125
–25
DUTY CYCLE (%)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
1943 G01
1943 G02
1943 G03
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LT1943
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TYPICAL PERFOR A CE CHARACTERISTICS
MINIMUM Input Voltage to Start,
VLOGIC = 3.3V
BOOST Pin Current
SW2 Current Limit
5.0
4.5
4.0
3.5
3.0
2.5
100
80
60
40
20
0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
T
A
= 25°C
T
A
= 25°C
0
1.0
1.5
2.0
2.5
3.0
50
0.5
–50
0
25
75 100 125
–25
0
20
40
60
80
100
SW1 CURRENT (A)
TEMPERATURE (°C)
LOAD CURRENT (mA)
1943 G05
1943 G06
1943 G04
SW3 Current Limit
SW4 Current Limit
SW1 VCESAT
600
500
400
300
200
100
0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.8
0.7
0.6
0.5
0.4
0.3
0.2
T
A
= 25°C
0
1.0
1.5
2.0
2.5
3.0
0.5
50
TEMPERATURE (°C)
100 125
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50 –25
0
25
75
SW1 CURRENT (A)
1943 G09
1943 G07
1943 G08
SW3 VCESAT
SW4 VCESAT
SW2 VCESAT
500
400
300
200
100
0
500
400
300
200
100
0
600
500
400
300
200
100
0
T
A
= 25°C
T
A
= 25°C
T = 25°C
A
0.1
0.2
0.3
0
0.1
0.2
0.3
0
0.4
0.4
0
1.0
1.5
2.0
2.5
3.0
0.5
SW3 CURRENT (A)
SW4 CURRENT (A)
SW2 CURRENT (A)
1943 G11
1943 G12
1943 G10
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LT1943
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TYPICAL PERFOR A CE CHARACTERISTICS
VON Current Limit
Frequency Foldback
Oscillator Frequency
100
90
80
70
60
50
40
30
1.4
1.3
1.2
1.1
1.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
T
= 25°C
T
= 25°C
A
A
25
35
40
5
10
15
20
V
30
–50
0
25
50
75
100 125
0
0.4
0.6
0.8
1.0
1.2
–25
0.2
TEMPERATURE (°C)
FEEDBACK VOLTAGE (V)
(V)
ON
1943 G13
1943 G14
1943 G15
Reference Voltage
Bias Pin Current
1.27
1.26
1.25
1.24
1.23
1.22
100
80
60
40
20
0
I
I
I
= 1.5A
= 0.2A
= 0.3A
SW2
SW3
SW4
I
= I
= I
= 0A
50
SW2 SW3 SW4
50
100 125
100 125
–50 –25
0
25
75
–50 –25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
1943 G16
1943 G17
Efficiency, VLOGIC = 3.3V
Efficiency, AVDD = 13V
100
90
80
70
60
50
100
90
80
70
60
50
V
A
= 5V
V
= 5V
IN
IN
T
= 25°C
T
= 25°C
A
0
0.50 0.75 1.00
LOAD CURRENT (A)
1.25 1.50
0.25
0
0.1
0.2
0.3
0.4
0.5
LOAD CURRENT (A)
1943 G19
1943 G18
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LT1943
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PI FU CTIO S
GND (Pins 1, 20, Exposed Pad Pin 29): Ground. Tie both
GND pins and the exposed pad directly to a local ground
plane. The ground metal to the exposed pad should be as
wide as possible for better heat dissipation. Multiple vias
(to ground plane under the ground backplane) placed
close to the exposed pad can further aid in reducing
thermal resistance.
VC4 (Pin 10): Switching Regulator 4 Error Amplifier
Compensation. Connect a resistor/capacitor network in
series with this pin.
SGND (Pin 11): Signal Ground. Return ground trace from
theFBresistornetworksandVC pincompensationcompo-
nents directly to this pin and then tie to ground.
BOOST (Pin 12): The BOOST pin is used to provide a drive
voltage, higher than VIN, to the switch 1 drive circuit.
VC1 (Pin 2): Switching Regulator 1 Error Amplifier Com-
pensation. Connect a resistor/capacitor network in series
with this pin.
SW1 (Pins 13, 14): The SW1 pins are the emitter of the
internal NPN bipolar power transistor for switching regu-
lator 1. These pins must be tied together for proper
operation. Connect these pins to the inductor, catch diode
and boost capacitor.
VC2(Pin3):ErrorAmplifierCompensationforSwitcher 2.
Connect a resistor/capacitor network in series with this
pin.
FB1 (Pin 4): Switching Regulator 1 Feedback. Tie the
resistor divider tap to this pin and set VLOGIC according to
VLOGIC = 1.25 • (1 + R2/R1). Reference designators refer
to Figure 1.
VIN (Pins 15, 16): The VIN pins supply current to the
LT1943’s internal regulator and to the internal power
transistor for switch 1. These pins must be tied together
and locally bypassed.
FB2 (Pin 5): Feedback for Switch 2. Tie the resistor divider
tap to this pin and set AVDD according to AVDD = 1.25 •
(1 + R6/R5).
SS-234 (Pin 17): This is the soft-start pin for switching
regulators 2, 3 and 4. Place a soft-start capacitor here to
limit start-up inrush current and output voltage ramp rate.
When the BIAS pin reaches 2.8V, a 1.7µA current source
beginschargingthecapacitor. Whenthecapacitorvoltage
reaches 0.8V, switches 2, 3 and 4 turn on and begin
switching. For slower start-up, use a larger capacitor.
When this pin is pulled to ground, switches 2, 3 and 4 are
disabled. For complete shutdown, tie RUN-SS to ground.
FB3 (Pin 6): Switching Regulator 3 Feedback. Tie the
resistor divider tap to this pin and set VON according to
VON = 1.25 • (1 + R9/R8) – 150mV.
NFB4 (Pin 7): Switching Regulator 4 Negative Feedback.
Switcher 4 can be used to generate a positive or negative
output. When regulating a negative output, tie the resistor
divider tap to this pin. Negative output voltage can be set
bytheequationVOFF =–1.245•(R3/R4)withR4setto10k.
Tie the NFB4 pin to FB4 for positive output voltages.
RUN-SS (Pin 18): This is the soft-start pin for switching
regulator 1. Place a soft-start capacitor here to limit start-
up inrush current and output voltage ramp rate. When
power is applied to the VIN pin, a 1.7µA current source
chargesthecapacitor.Whenthevoltageatthispinreaches
0.8V, switch 1 turns on and begins switching. For slower
start-up, use a larger capacitor. For complete shutdown,
tie RUN-SS to ground.
FB4 (Pin 8): Feedback for Switch 4. When generating a
positive voltage from switch 4, tie the resistor divider tap
to this pin. When generating a negative voltage, tie a 10k
resistor between FB4 and NFB4 (R4).
VC3 (Pin 9): Switching Regulator 3 Error Amplifier Com-
pensation. Connect a resistor/capacitor network in series
with this pin.
SW4 (Pin 19): This is the collector of the internal NPN
bipolar power transistor for switching regulator 4. Mini-
mize metal trace area at this pin to keep EMI down.
1943fa
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LT1943
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PI FU CTIO S
resistor between the source and gate of the P-channel
MOSFET keeps it off when switcher 2’s output is low.
SW3 (Pin 21): This is the collector of the internal NPN
bipolar power transistor for switching regulator 3. Mini-
mize metal trace area at this pin to keep EMI down.
E3 (Pin 24): This is switching regulator 3’s output and the
emitter of the output disconnect PNP. Tie the output
capacitor and resistor divider here.
BIAS (Pin 22): The BIAS pin is used to improve efficiency
when operating at higher input voltages. Connecting this
pin to the output of switching regulator 1 forces most of
the internal circuitry to draw its operating current from
VLOGIC rather than VIN. The drivers of switches 2, 3 and 4
are supplied by BIAS. Switches 2, 3 and 4 will not switch
until the BIAS pin reaches approximately 2.8V. BIAS must
CT (Pin 25): Timing Capacitor Pin. This is the input to the
VON timer and programs the time delay from all four
feedback pins reaching 1.125V to VON turning on. The CT
capacitor value can be set using the equation C = (20µA •
tDELAY)/1.1V.
be tied to VLOGIC
.
VON (Pin 26): This is the delayed output for switching
regulator 3. VON reaches its programmed voltage after the
internal CT timer times out. Protection circuitry ensures
VON is disabled if any of the four outputs are more than
10% below normal voltage.
PGOOD (Pin 23): Power Good Comparator Output. This is
the open collector output of the power good comparator
andcanbeusedinconjunctionwithanexternalP-Channel
MOSFET to provide output disconnect for AVDD as shown
in the 5V Input, Quad Output TFT-LCD Power Supply on
the last page of the data sheet. When switcher 2’s output
reaches approximately 90% of its programmed voltage,
PGOOD will be pulled to ground. This will pull down on the
gate of the MOSFET, connecting AVDD. A 100k pull-up
SW2 (Pins 27, 28): The SW2 pins are the collector of the
internal NPN bipolar power transistor for switching regu-
lator 2. These pins must be tied together. Minimize trace
area at these pins to keep EMI down.
1943fa
8
LT1943
W
BLOCK DIAGRA
V
IN
V
IN
15
16
C1
BOOST
12
D2
MASTER
OSCILLATOR
1.2MHz
SLOPE
V
FOLDBACK
OSCILLATOR
COMPENSATION
LOGIC
+
Σ
C3
V
LOGIC
2.4A
R2
DRIVER
FB1
SW1
14
SWITCH
L1
4
13
–
R1
R
Q
D1
C2
PGOOD
S
AV
23
DD
–
R14
–
V
C1
R10
C11
gm
2
3
+
C20
+
1.25V
1.12V
V
C2
R6
R11
C12
FB2
5
–
+
C21
R5
gm
–
+
20µA
BIAS
22
C
T
SW2
1.25V
L2
25
–
–
–
–
V
IN
27 28
C9
R
2.6A
SWITCH
D5
C16
S
Q
DRIVER
FOLDBACK
OSCILLATOR
+
AV
DD
L3
C8
1.125V
Σ
SLOPE
COMPENSATION
FB4
8
7
R4
C24
NFB4
V
–
+
IN
R3
1.7µA
1.7µA
V
C4
10
C23
INTERNAL
REGULATOR
AND
R13
C14
RUN-SS
18
C5
REFERENCE
–
+
–
+
SW4
19
C7
gm
L4
V
LOGIC
SW2
SW3
SS-234
17
D6
R
400mA
SWITCH
1.25V
DRIVER
S
Q
SW4
V
OFF
LOCKOUT
C4
D3
C6
FOLDBACK
OSCILLATOR
BIAS
–
Σ
SLOPE
COMPENSATION
+
2.8V
V
C3
FB3
R12
C13
R9
9
V
E3
6
–
+
C22
gm
R8
–
+
SW3
21
L5
1.25V
V
IN
V
ON
R
400mA
SWITCH
V
ON
26
DRIVER
S
Q
–
FOLDBACK
OSCILLATOR
C15
+
E3
24
Σ
V
E3
SLOPE
1.1V
C10
COMPENSATION
GND
SGND
GND
GND
1
11
20
29
Figure 1. Block Diagram
1943fa
9
LT1943
U
OPERATIO
The LT1943 is a highly integrated power supply IC con-
tainingfourseparateswitchingregulators. Allfourswitch-
ing regulators have their own oscillator with frequency
foldback and use current mode control. Switching regula-
tor 1 consists of a step-down regulator with a switch
current limit of 2.4A. Switching regulator 2 can be config-
ured as a step-up or SEPIC converter and has a 2.6A
switch. Switching regulator 3 consists of a step-up regu-
lator with a 0.35A switch as well as an integrated Schottky
diode. Switching regulator 4 has two feedback pins (FB4
and NFB4) and can directly regulate positive or negative
output voltages. The four regulators share common cir-
cuitry including input source, voltage reference, and mas-
ter oscillator. Operation can be best understood by refer-
ring to the Block Diagram as shown in Figure 1.
RUN-SS
2V/DIV
V
LOGIC
5V/DIV
I
L1
1A/DIV
SS-234
2V/DIV
AV
DD
20V/DIV
I
L2+L3
1A/DIV
PGOOD
20V/DIV
1943 F03a
5ms/DIV
(2a)
V
OFF
10V/DIV
If the RUN/SS pin is pulled to ground, the LT1943 is shut
downanddraws35µAfromtheinputsourcetiedtoVIN.An
internal 1.7µA current source charges the external soft-
start capacitor, generating a voltage ramp at this pin. If the
RUN/SS pin exceeds 0.6V, the internal bias circuits turn
on,includingtheinternalregulator,reference,and1.1MHz
master oscillator. The master oscillator generates four
clock signals, one for each of the switching regulators.
Switching regulator 1 will only begin to operate when the
I
L4
500mA/DIV
V
E3
20V/DIV
I
L5
500mA/DIV
V
CT
2V/DIV
V
ON
50V/DIV
1943 F03b
5ms/DIV
RUN/SS pin reaches 0.8V. Switcher 1 generates VLOGIC
,
which must be tied to the BIAS pin. When BIAS reaches
2.8V, the NPN pulling down on the SS-234 pin turns off,
allowing an internal 1.7µA current source to charge the
externalcapacitortiedtotheSS-234pin.Whenthevoltage
on the SS-234 pin reaches 0.8V, switchers 2, 3 and 4 are
enabled. AVDD and VOFF will then begin rising at a ramp
rate determined by the capacitor tied to the SS-234 pin.
When all the outputs reach 90% of their programmed
voltages, the NPN pulling down on the CT pin will turn off,
and an internal 20µA current source will charge the exter-
nal capacitor tied to the CT pin. When the CT pin reaches
1.1V, the output disconnect PNP turns on, connecting
VON. Intheeventofanyofthefouroutputsdroppingbelow
10% of their programmed voltage, PanelProtect circuitry
pulls the CT pin to GND, disabling VON.
(2b)
Figure 2. LT1943 Power-Up Sequence. (Traces From
Both Photos are Synchronized to the Same Trigger)
The output is an open collector transistor that is off when
the output is out of regulation, allowing an external resis-
tor to pull the pin high. This pin can be used with a
P-channelMOSFETthatfunctionsasanoutputdisconnect
for AVDD.
Thefourswitchersarecurrentmoderegulators.Insteadof
directly modulating the duty cycle of the power switch, the
feedback loop controls the peak current in the switch
during each cycle. Compared to voltage mode control,
current mode control improves loop dynamics and pro-
vides cycle-by-cycle current limit.
A power good comparator monitors AVDD and turns on
when the FB2 pin is at or above 90% of its regulated value.
1943fa
10
LT1943
U
OPERATIO
The control loop for the four switchers is similar. A pulse
from the slave oscillator sets the RS latch and turns on the
internal NPN bipolar power switch. Current in the switch
and the external inductor begins to increase. When this
currentexceedsaleveldeterminedbythevoltageatVC,the
currentcomparatorresetsthelatch,turningofftheswitch.
The current in the inductor flows through the Schottky
diodeandbeginstodecrease.Thecyclebeginsagainatthe
next pulse from the oscillator. In this way, the voltage on
the VC pin controls the current through the inductor to the
output. The internal error amplifier regulates the output
voltage by continually adjusting the VC pin voltage. The
threshold for switching on the VC pin is 0.8V, and an active
clamp of 1.8V limits the output current. The RUN/SS and
SS-234 pins also clamp the VC pin voltage. As the internal
current source charges the external soft-start capacitor,
the current limit increases slowly.
Input Voltage Range
The minimum operating voltage of switcher 1 is deter-
minedeitherbytheLT1943’sundervoltagelockoutof~4V,
orbyitsmaximumdutycycle.Thedutycycleisthefraction
of time that the internal switch is on and is determined by
the input and output voltages:
DC = (VOUT + VF)/(VIN – VSW + VF)
where VF is the forward voltage drop of the catch diode
(~0.4V) and VSW is the voltage drop of the internal switch
(~0.3V at maximum load). This leads to a minimum input
voltage of
VIN(MIN) = (VOUT + VF)/DCMAX – VF + VSW
with DCMAX = 0.82.
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
L = (VOUT + VF)/1.2
Each switcher contains an extra, independent oscillator to
perform frequency foldback during overload conditions.
This slave oscillator is normally synchronized to the mas-
ter oscillator. A comparator senses when VFB is less than
0.5V and switches the regulator from the master oscillator
to a slower slave oscillator. The VFB pin is less than 0.5V
during startup, short-circuit, and overload conditions.
Frequency foldback helps limit switch current and power
dissipation under these conditions.
whereVF isthevoltagedropofthecatchdiode(~0.4V)and
L is in µH. The inductor’s RMS current rating must be
greater than the maximum load current and its saturation
current should be at least 30% higher. For highest effi-
ciency, the series resistance (DCR) should be less than
0.1Ω. Table 1 lists several vendors and types that are
suitable.
TheswitchdriverforSW1operateseitherfromVIN orfrom
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to saturate the
internal bipolar NPN power switch for efficient operation.
The optimum inductor for a given application may differ
from the one indicated by this simple design guide. A
larger value inductor provides a higher maximum load
current, and reduces the output voltage ripple. If your load
is lower than the maximum load current, then you can
relax the value of the inductor and operate with higher
ripple current. This allows you to use a physically smaller
inductor, or one with a lower DCR resulting in higher
efficiency. Be aware that the maximum load current
depends on input voltage. A graph in the Typical Perfor-
mancesectionofthisdatasheetshowsthemaximumload
current as a function of input voltage and inductor value
for VOUT = 3.3V. In addition, low inductance may result in
discontinuous mode operation, which further reduces
STEP-DOWN CONSIDERATIONS
FB Resistor Network
The output voltage for switcher 1 is programmed with a
resistor divider (refer to the Block Diagram) between the
output and the FB pin. Choose the resistors according to:
R2 = R1(VOUT/1.25V – 1)
R1 should be 10kΩ or less to avoid bias current errors.
1943fa
11
LT1943
U
OPERATIO
these equations to check that the LT1943 will be able to
deliver the required output current. Note again that these
equations assume that the inductor current is continuous.
Discontinuous operation occurs when IOUT is less than
∆IL/2.
maximum load current. For details of maximum output
current and discontinuous mode operation, see Linear
Technology’s Application Note AN44. Finally, for duty
cycles greater than 50% (VOUT/VIN > 0.5), a minimum
inductance is required to avoid subharmonic oscillations.
See AN19.
Table 1. Inductors.
Part Number
Sumida
Value (µH)
I
(A) DCR (Ω) Height (mm)
RMS
The current in the inductor is a triangle wave with an
average value equal to the load current. The peak switch
current is equal to the output current plus half the peak-to-
peak inductor ripple current. The LT1943 limits its switch
current in order to protect itself and the system from
overload faults. Therefore, the maximum output current
that the LT1943 will deliver depends on the switch current
limit,theinductorvalue,andtheinputandoutputvoltages.
CR43-1R4
1.4
2.2
3.3
4.7
1.5
2.2
3.3
3.3
4.7
1.0
2.2
2.6
2.52
0.056
0.071
0.086
0.109
0.040
0.050
0.063
0.049
0.072
0.035
0.03
3.5
3.5
3.5
3.5
1.8
1.8
1.8
3.0
3.0
2.0
2.5
3.0
CR43-2R2
1.75
1.44
1.15
1.55
1.20
1.10
1.57
1.32
1.70
2.50
2.60
CR43-3R3
CR43-4R7
CDRH3D16-1R5
CDRH3D16-2R2
CDRH3D16-3R3
CDRH4D28-3R3
CDRH4D28-4R7
CDRH4D18-1R0
CDC5D23-2R2
CDRH5D28-2R6
Coilcraft
When the switch is off, the potential across the inductor is
theoutputvoltageplusthecatchdiodedrop.Thisgivesthe
peak-to-peak ripple current in the inductor:
∆IL = (1 – DC)(VOUT + VF)/(L • f),
where f is the switching frequency of the LT1943 and L is
the value of the inductor. The peak inductor and switch
current is
0.013
DO1606T-152
DO1606T-222
DO1606T-332
DO1606T-472
DO1608C-152
DO1608C-222
DO1608C-332
DO1608C-472
MOS6020-222
MOS6020-332
MOS6020-472
D03314-222
1.5
2.2
3.3
4.7
1.5
2.2
3.3
4.7
2.2
3.3
4.7
2.2
2.7
2.10
1.70
1.30
1.10
2.60
2.30
2.00
1.50
2.15
1.8
0.060
0.070
0.100
0.120
0.050
0.070
0.080
0.090
0.035
0.046
0.050
0.200
0.140
2.0
2.0
2.0
2.0
2.9
2.9
2.9
2.9
2.0
2.0
2.0
1.4
2.7
ISWPK = ILPK = IOUT + ∆IL/2
To maintain output regulation, this peak current must be
less than the LT1943’s switch current limit of ILIM. For
SW1, ILIM is at least 2.4A at DC = 0.35 and decreases
linearly to 1.6A at DC = 0.8, as shown in the Typical
Performance Characteristics section. The maximum out-
put current is a function of the chosen inductor value:
IOUT(MAX) = ILIM – ∆IL/2
= 3A • (1 – 0.57 • DC) – ∆IL/2
1.5
1.6
Choosing an inductor value so that the ripple current is
smallwillallowamaximumoutputcurrentneartheswitch
current limit.
1008PS-272
1.3
Toko
(D62F)847FY-2R4M
(D73LF)817FY-2R2M
2.4
2.2
2.5
2.7
0.037
0.03
2.7
3.0
One approach to choosing the inductor is to start with the
simple rule given above, look at the available inductors,
and choose one to meet cost or space goals. Then use
1943fa
12
LT1943
U
OPERATIO
Output Capacitor Selection
Because loop stability and transient response depend on
the value of COUT, this loss may be unacceptable. Use X7R
and X5R types.
For 5V and 3.3V outputs, a 10µF 6.3V ceramic capacitor
(X5R or X7R) at the output results in very low output
voltage ripple and good transient response. Other types
and values will also work; the following discussion ex-
plores tradeoffs in output ripple and transient perfor-
mance.
Electrolytic capacitors are also an option. The ESRs of
most aluminum electrolytic capacitors are too large to
deliver low output ripple. Tantalum and newer, lower ESR
organic electrolytic capacitors intended for power supply
use are suitable, and the manufacturers will specify the
ESR. Chose a capacitor with a low enough ESR for the
required output ripple. Because the volume of the capaci-
tor determines its ESR, both the size and the value will be
larger than a ceramic capacitor that would give similar
ripple performance. One benefit is that the larger capaci-
tancemaygivebettertransientresponseforlargechanges
in load current. Table 2 lists several capacitor vendors.
The output capacitor filters the inductor current to gener-
ate an output with low voltage ripple. It also stores energy
in order satisfy transient loads and stabilizes the LT1943’s
control loop. Because the LT1943 operates at a high
frequency, minimal output capacitance is necessary. In
addition, the control loop operates well with or without the
presence of output capacitor series resistance (ESR).
Ceramic capacitors, which achieve very low output ripple
and small circuit size, are therefore an option.
Table 2. Low ESR Surface Mount Capacitors
Vendor
Taiyo Yuden
AVX
Type
Series
You can estimate output ripple with the following
equations:
Ceramic
X5R, X7R
Ceramic
Tantalum
X5R, X7R
TPS
V
RIPPLE = ∆IL/(8 • f • COUT) for ceramic capacitors, and
Kemet
Tantalum
Ta Organic
Al Organic
T491, T494, T495
T520
VRIPPLE =∆IL •ESRforelectrolyticcapacitors(tantalum
and aluminum);
A700
Sanyo
Ta or Al Organic
Al Organic
POSCAP
SP CAP
where ∆IL is the peak-to-peak ripple current in the induc-
tor. The RMS content of this ripple is very low so the RMS
current rating of the output capacitor is usually not of
concern. It can be estimated with the formula:
Panasonic
TDK
Ceramic
X5R, X7R
Diode Selection
IC(RMS)= ∆IL/√12
The catch diode (D1 from Figure 1) conducts current only
during switch off time. Average forward current in normal
operation can be calculated from:
Another constraint on the output capacitor is that it must
havegreaterenergystoragethantheinductor;ifthestored
energyintheinductortransferstotheoutput, theresulting
voltage step should be small compared to the regulation
voltage. For a 5% overshoot, this requirement indicates:
ID(AVG) = IOUT (VIN – VOUT)/VIN
The only reason to consider a diode with a larger current
rating than necessary for nominal operation is for the
worst-case condition of shorted output. The diode current
will then increase to the typical peak switch current.
2
C
OUT > 10 • L • (ILIM/VOUT)
The low ESR and small size of ceramic capacitors make
them the preferred type for LT1943 applications. Not all
ceramic capacitors are the same, however. Many of the
higher value capacitors use poor dielectrics with high
temperature and voltage coefficients. In particular, Y5V
and Z5U types lose a large fraction of their capacitance
with applied voltage and at temperature extremes.
Peak reverse voltage is equal to the regulator input volt-
age. Use a diode with a reverse voltage rating greater than
theinputvoltage. Table3listsseveralSchottkydiodesand
their manufacturers.
1943fa
13
LT1943
U
OPERATIO
Table 3. Schottky Diodes
R4 should be 10kΩ or less to avoid bias current errors. If
switcher 4 is used to generate a positive output voltage,
NFB4 should be tied to FB4.
Part Number
On Semiconductor
MBRM120E
MBRM140
Diodes Inc.
B120
V
(V)
I
(A) V at 1A (mV) V at 2A (mV)
AVE F F
R
20
1
530
550
595
V
OUT
40
1
R3
FB4
20
30
20
30
40
1
1
2
2
2
500
500
B130
NFB4
R4
B220
500
500
500
1943 A1
B230
B240
Regulating Negative Output Voltages
International Rectifier
10BQ030
30
30
1
2
420
470
470
The LT1943 contains an inverting op amp with its non-
inverting terminal tied to ground and its output connected
totheFB4pin. UsethisopamptogenerateavoltageatFB4
thatisproportionaltoVOUT4. Choosetheresistorsaccord-
ing to:
20BQ030
Boost Pin Considerations
The minimum operating voltage of an LT1943 application
is limited by the undervoltage lockout ~4V and by the
maximum duty cycle. The boost circuit also limits the
minimum input voltage for proper start-up. If the input
voltage ramps slowly, or the LT1943 turns on when the
outputisalreadyinregulation,theboostcapacitormaynot
be fully charged. Because the boost capacitor charges
with the energy stored in the inductor, the circuit will rely
on some minimum load current to get the boost circuit
runningproperly. Thisminimumloadwilldependoninput
and output voltages. The Typical Performance Character-
istics section shows a plot of the minimum load current to
start as a function of input voltage for a 3.3V output. The
minimum load current generally goes to zero once the
circuit has started. Even without an output load current, in
many cases the discharged output capacitor will present
a load to the switcher that will allow it to start.
R5•|V0UT
1.245V
|
R6 =
–V
OUT
R6
NFB4
C1
10pF
R5
10k
FB4
1943 A2
Use 10k for R5. Tie 10pF in parallel with R5.
Duty Cycle Range
The maximum duty cycle (DC) of the LT1943 switching
regulatoris85%forSW2,and 83%forSW3andSW4.The
duty cycle for a given application using the step-up or
charge pump topology is:
INVERTER/STEP-UP CONSIDERATIONS
Regulating Positive Output Voltages
|VOUT | –V
IN
DC =
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistors
according to:
|VOUT
|
The duty cycle for a given application using the inverter or
SEPIC topology is:
R3 = R4(VOUT/1.25 – 1)
1943fa
14
LT1943
U
OPERATIO
|VOUT
V + |VOUT
IN
|
Output Capacitor Selection
DC =
|
Use low ESR (equivalent series resistance) capacitors at
theoutputtominimizetheoutputripplevoltage.Multilayer
ceramiccapacitorsareanexcellentchoice,astheyhavean
extremely low ESR and are available in very small pack-
ages. X7R dielectrics are preferred, followed by X5R, as
these materials retain their capacitance over wide voltage
and temperature ranges. A 10µF to 22µF output capacitor
is sufficient for most LT1943 applications. Even less
capacitance is required for outputs with |VOUT| > 20V or
|IOUT|< 100mA. Solid tantalum or OS-CON capacitors will
also work, but they will occupy more board area and will
have a higher ESR than a ceramic capacitor. Always use a
capacitor with a sufficient voltage rating.
TheLT1943canstillbeusedinapplicationswheretheduty
cycle, as calculated above, is above the maximum. How-
ever, the part must be operated in discontinuous mode so
that the actual duty cycle is reduced.
Inductor Selection
SeveralinductorsthatworkwellwiththeLT1943regulator
are listed in Table 4. Besides these, many other inductors
willwork.Consulteachmanufacturerfordetailedinforma-
tion and for their entire selection of related parts. Use
ferrite core inductors to obtain the best efficiency, as core
losses at frequencies above 1MHz are much lower for
ferritecoresthanforpowdered-ironunits. A10µHto22µH
inductor will be the best choice for most LT1943 step-up
and charge pump designs. Choose an inductor that can
carry the entire switch current without saturating. For
invertingandSEPICregulators, acoupledinductor, ortwo
separate inductors is an option. When using coupled
inductors, choose one that can handle at least the switch
current without saturating. If using uncoupled inductors,
each inductor need only handle approximately one-half of
thetotalswitchcurrent. A4.7µHto15µHcoupledinductor
or two 10µH to 22µH uncoupled inductors will usually be
the best choice for most LT1943 inverting and SEPIC
designs.
Diode Selection
ASchottkydiodeisrecommendedforusewiththeLT1943
switcher2andswitcher4. TheSchottkydiodeforswitcher
3 is integrated inside the LT1943. Choose diodes for
switcher 2 and switcher 4 rated to handle an average
current greater than the load current and rated to handle
the maximum diode voltage. The average diode current in
the step-up, SEPIC, and inverting configurations is equal
to the load current. Each of the two diodes in the charge
pump configurations carries an average diode current
equal to the load current. The maximum diode voltage in
the step-up and charge pump configurations is equal to
|VOUT|. The maximum diode voltage in the SEPIC and
inverting configurations is VIN + |VOUT|.
Table 4. Inductors.
Part Number
Coiltronics
TP3-4R7
Value (µH)
I
(A)
DCR (Ω) Height (mm)
RMS
Input Capacitor Selection
4.7
10
1.5
0.181
0.146
2.2
3.0
Bypass the input of the LT1943 circuit with a 4.7µF or
higherceramiccapacitorofX7RorX5Rtype.Alowervalue
or a less expensive Y5V type will work if there is additional
bypassingprovidedbybulkelectrolyticcapacitorsorifthe
input source impedance is low. The following paragraphs
describetheinputcapacitorconsiderationsinmoredetail.
TP4-100
1.5
Sumida
CD73-100
10
6.2
10
10
1.44
1.4
1.3
1.0
0.080
0.071
0.048
0.095
3.5
2.0
3.0
3.0
CDRH5D18-6R2
CDRH4D28-100
CDRH4D28-100
Coilcraft
Step-down regulators draw current from the input supply
in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage ripple
attheLT1943inputandtoforcethisswitchingcurrentinto
a tight local loop, minimizing EMI. The input capacitor
DO3314-103
1008PS-103
10
10
0.8
0.520
0.920
1.4
2.8
0.78
1943fa
15
LT1943
U
OPERATIO
solution is to either clamp the input voltage or dampen the
tank circuit by adding a lossy capacitor (an electrolytic) in
parallel with the ceramic capacitor. For details, see Appli-
cation Note 88.
musthavelowimpedanceattheswitchingfrequencytodo
this effectively and it must have an adequate ripple current
rating. The input capacitor RMS current can be calculated
from the step-down output voltage and current, and the
input voltage:
Soft-Start and Shutdown
The RUN/SS (Run/Soft-Start) pin is used to place the
switching regulators and the internal bias circuits in shut-
down mode. It also provides a soft-start function, along
with SS-234. If the RUN/SS is pulled to ground, the
LT1943 enters its shutdown mode with all regulators off
and quiescent current reduced to ~35µA. An internal
1.7µA current source pulls up on the RUN/SS and SS-234
pins. If the RUN/SS pin reaches ~0.8V, the internal bias
circuits start and the quiescent currents increase to their
nominal levels.
VOUT(V – V0UT
)
IOUT
2
IN
CINRMS = IOUT
•
<
V
IN
and is largest when VIN = 2 VOUT (50% duty cycle). The
ripple current contribution from the other channels will be
minimal.Consideringthatthemaximumloadcurrentfrom
switcher 1 is ~2.8A, RMS ripple current will always be less
than 1.4A.
The high frequency of the LT1943 reduces the energy
storage requirements of the input capacitor, so that the
capacitance required is less than 10µF. The combination
of small size and low impedance (low equivalent series
resistance or ESR) of ceramic capacitors makes them the
preferred choice. The low ESR results in very low voltage
ripple. Ceramic capacitors can handle larger magnitudes
of ripple current than other capacitor types of the same
value. Use X5R and X7R types.
If a capacitor is tied from the RUN/SS or SS-234 pins to
ground, then the internal pull-up current will generate a
voltage ramp on these pins. This voltage clamps the VC
pin, limiting the peak switch current and therefore input
current during start-up. The RUN/SS pin clamps VC1, and
the SS-234 pin clamps the VC2, VC3, and VC4 pins. A good
value for the soft-start capacitors is COUT/10,000, where
COUT is the value of the largest output capacitor.
An alternative to a high value ceramic capacitor is a lower
value along with a larger electrolytic capacitor, for ex-
ample a 1µF ceramic capacitor in parallel with a low ESR
tantalum capacitor. For the electrolytic capacitor, a value
larger than 10µF will be required to meet the ESR and
ripple current requirements. Because the input capacitor
is likely to see high surge currents when the input source
is applied, only consider a tantalum capacitor if it has the
appropriate surge current rating. The manufacturer may
also recommend operation below the rated voltage of the
capacitor. Be sure to place the 1µF ceramic as close as
possible to the VIN and GND pins on the IC for optimal
noise immunity.
To shut down SW2, SW3, and SW4, pull the SS-234 pin to
ground with an open drain or collector.
If the shutdown and soft-start features are not used, leave
the RUN/SS and SS-234 pins floating.
VON Pin Considerations
The VON pin is the delayed output for switching regulator
3. When the CT pin reaches 1.1V, the output disconnect
PNPturnson,connectingVON toE3.TheVON piniscurrent
limited, and will protect the LT1943 and input source from
a shorted output. However, if the VON pin is charged to a
high output voltage, and then shorted to ground through
a long wire, unpredictable results can occur. The resonant
tank circuit created by the inductance of the long wire and
the capacitance at the VON pin can ring the VON pin several
volts below ground. This can lead to large and potentially
damaging currents internal to the LT1943. If the VON
output may be shorted after being fully charged, there
A final caution is in order regarding the use of ceramic
capacitors at the input. A ceramic input capacitor can
combine with stray inductance to form a resonant tank
circuit. If power is applied quickly (for example by plug-
gingthecircuitintoalivepowersource),thistankcanring,
doubling the input voltage and damaging the LT1943. The
1943fa
16
LT1943
U
OPERATIO
should be 5Ω of resistance between the VON pin and its
connection to the load, as shown on Figure 3. The resis-
tancewilldampresonanttankcircuitcreatedbytheoutput
short.AsthetransientontheVON pinduringashort-circuit
condition will be highly dependent on the layout and the
type of short, be sure to test the short condition and
examine the voltage at the VON pin to check that it does not
swing below ground.
andinvertingregulators,theswitchedcurrentsflowthrough
the power switch, the switching diode, and the tank
capacitor. The loop formed by the components in the
switched current path should be as small as possible.
Place these components, along with the inductor and
outputcapacitor,onthesamesideofthecircuitboard,and
connectthemonthatlayer.Placealocal,unbrokenground
plane below these components, and tie this ground plane
to system ground at one location, ideally at the ground
terminal of the output capacitor C2. Additionally, keep the
SW and BOOST nodes as small as possible.
V
ON
R1
5Ω
TO LOAD
Thermal Considerations
R1 IS ONLY NECESSARY
C1
0.47µF
IF LOAD MAY HAVE TRANSIENT
SHORT CONDITION. OTHERWISE,
The PCB must provide heat sinking to keep the LT1943
cool. The exposed pad on the bottom of the package must
be soldered to a ground plane. This ground should be tied
to other copper layers below with thermal vias; these
layers will spread the heat dissipated by the LT1943. Place
additional vias near the catch diodes. Adding more copper
to the top and bottom layers and tying this copper to the
internal planes with vias can reduce thermal resistance
further. With these steps, the thermal resistance from die
(or junction) to ambient can be reduced to θJA = 25°C or
less. With 100LFPM airflow, this resistance can fall by
another25%.Furtherincreasesinairflowwillleadtolower
thermal resistance.
CONNECT V PIN DIRECTLY TO LOAD
ON
1943 F03
Figure 3. Transient Short Protection for VON Pin
Printed Circuit Board Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board (PCB) layout. Figure 4
shows the high-current paths in the step down regulator
circuit. Note that in the step-down regulators, large,
switched currents flow in the power switch, the catch
diode, and the input capacitor. In the step-up regulators,
large, switched currents flow through the power switch,
the switching diode, and the output capacitor. In SEPIC
V
SW
V
SW
IN
IN
GND
GND
(a)
(b)
V
SW
L1
V
SW
IN
I
C1
C1
D1
C2
GND
1943 F04
(c)
Figure 4. Subtracting the Current when the Switch is ON (a) From the Current when the Switch is OFF (b) Reveals the Path of
the High Frequency Switching Current (c) Keep this Loop Small. The Voltage on the SW and BOOST Nodes will also be
Switched; Keep these Nodes as Small as Possible. Finally, Make Sure the Circuit is Shielded with a Local Ground Plane
1943fa
17
LT1943
U
OPERATIO
GND
AV
DD
V
IN
PLACE VIAS UNDER
GROUND PAD TO
GROUND PLANE FOR
GOOD THERMAL
CONDUCTIVITY
V
OFF
GND
V
LOGIC
1943 F05
Figure 5. Top Side PCB Layout
U
TYPICAL APPLICATIO S
8V to 20V Input, Quad Output TFT-LCD Power Supply
1µF
25V
X5R
V
IN
8V TO 20V
ZHCS400
B240A
10µH
AV
V
DD
OFF
12.2V
–5.5V
50mA
500mA
10µF
44.2k
0.47µF
16V
10µF
16V
X5R
33µH
10µH
2.2µF
10V
X5R
25V
X5R
ZHCS400
10pF
X5R
88.7k
10.0k
V
SW3
IN
SW4
SW2
FB2
NFB4
0.015µF
0.015µF
0.047µF
RUN-SS
SS-234
10.0k
10µH
LT1943
FB4
C
T
BIAS
BOOST
PGOOD
PGOOD
V
ON
V
35V
ON
E3
0.22µF
10V X5R
30mA
CMDSH-3
SW1
FB1
274k
4.7µH
B230A
16.2k
FB3
V
LOGIC
3.3V
2A
GND
10.0k
SGND
V
C4
V
10.0k
C1
V
V
C2
C3
22µF
6.3V
X5R
2.2µF
50V
X5R
18k
0.47µF
50V
X5R
27k
100pF
680pF
13k
100pF
2.2nF
6.8k
100pF
2.2nF
100pF
2.2nF
1943 TA02
1943fa
18
LT1943
U
PACKAGE DESCRIPTIO
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation EB
9.60 – 9.80*
(.378 – .386)
4.75
(.187)
4.75
(.187)
28 2726 25 24 23 22 21 20 19 18 1716 15
6.60 ±0.10
2.74
(.108)
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
4.50 ±0.10
SEE NOTE 4
6.40
2.74
(.252)
(.108)
BSC
0.45 ±0.05
1.05 ±0.10
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
5
7
1
2
3
4
6
8
9
10 12 13 14
11
1.20
(.047)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE28 (EB) TSSOP 0204
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
2. DIMENSIONS ARE IN
FOR EXPOSED PAD ATTACHMENT
MILLIMETERS
(INCHES)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
3. DRAWING NOT TO SCALE
1943fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1943
U
TYPICAL APPLICATIO
5V Input, Quad Output TFT-LCD Power Supply
0.47µF
16V
X5R
V
IN
4.5V TO 8V
ZHCS400
B240A
4.7µH
V
OFF
–10V
10µH
50mA
10µF
10V
X5R
10µF
16V
80.6k
ZHCS400
68µH
2.2µF
10V
X5R
X5R
100k
95.3k
V
SW3
IN
SW4
SW2
FB2
10.0k
NFB4
Si2343DS
0.015µF
RUN-SS
SS-234
10pF
10.0k
0.015µF
0.047µF
AV
DD
LT1943
13V
500mA
FB4
C
T
BIAS
BOOST
PGOOD
V
ON
V
30V
ON
E3
0.22µF
10V X5R
20mA
CMDSH-3
SW1
232k
4.7µH
B230A
16.5k
FB3
V
LOGIC
3.3V
1.5A
FB1
GND
10.0k
SGND
V
C4
V
C1
10.0k
V
V
C2
C3
22µF
10V
X5R
2.2µF
35V
X5R
7.5k
0.47µF
35V
X5R
30k
100pF
1500pF
13k
100pF
2.2nF
4.7k
100pF
4700pF
100pF
2.7nF
1943 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1615/LT1615-1
300mA/80mA (I ), Constant Off-Time, High Efficiency
Step-Up DC/DC Converters
V : 1.2V to 15V, V
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Dual Output 1.4A (I ), Constant 1.1MHz, High Efficiency
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MS Package
LT1946/LT1946A
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1.5mA (I ), 1.2MHz/2.7MHz, High Efficiency
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V : 2.75V to 16V, V
MS Package
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SW
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OUT(MAX) Q SD
1.1A, 3MHz, TFT-LCD Triple Output Switching Regulator
V : 2.7V to 8V, V
: 34V, I : 9.5mA, I : <1µA,
IN
OUT(MAX) Q SD
MS Package
LT3464
85mA (I ), Constant Off-Time, High Efficiency Step-Up DC/DC V : 2.3V to 10V, V
Converter with Integrated Schottky and Output Disconnect PNP ThinSOT Package
: 34V, I : 25µA, I : <0.5µA,
OUT(MAX) Q SD
SW
IN
ThinSOT is a trademark of Linear Technology Corporation.
1943fa
LT/LT 0405 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2003
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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