LT1948EMS8#TRPBF [Linear]
IC 1.5 A SWITCHING REGULATOR, 3600 kHz SWITCHING FREQ-MAX, PDSO8, PLASTIC, MSOP-8, Switching Regulator or Controller;
| 型号： | LT1948EMS8#TRPBF |
| 厂家： | 
Linear |
| 描述： | IC 1.5 A SWITCHING REGULATOR, 3600 kHz SWITCHING FREQ-MAX, PDSO8, PLASTIC, MSOP-8, Switching Regulator or Controller 开关 光电二极管 |
| 文件： | 总4页 (文件大小：113K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Final Electrical Specifications
LT1948
DC/DC Converter for
TFT-LCD Panels
August 2000
U
FEATURES
DESCRIPTIO
The LT®1948 is a highly integrated multiple output DC/DC
converter designed for use in TFT-LCD panels. The device
contains two independent switching regulators: the main
regulator has an adjustable output voltage with an internal
1.1A switch that can generate a boosted voltage as high as
30V while the second regulator generates 23V at up to
10mA for positive bias. A simple level-shift charge pump
off the main switch node generates the negative bias
voltage. An external capacitor sets the delay time from
AVDD reaching final value to 23V appearing at the VON pin.
The 3MHz switching frequency allows the use of tiny low
profile chip inductors and capacitors throughout, provid-
ingalownoise,lowcosttotalsolutionwithallcomponents
under 1.25mm in height. The device operates from an
input range of 2.6V to 6V and is available in an 8-lead
MSOP package.
■
Complete Solution Under 1.2mm
■
Develops Three Outputs from a 3.3V or 5V Supply
■
Externally Programmable VON Delay
■
Fixed Frequency Low Noise Outputs
■
All Ceramic Capacitors
■
Operates at 3MHz Switching Frequency
■
Fast Transient Response
■
Few External Components Required
■
2.6V to 6V Input Range
Tiny 8-Lead MSOP Package
■
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APPLICATIO S
■
TFT-LCD Notebook Display Panels
■
TFT-LCD Desktop Monitor Display Panels
■
Digital Cameras
Handheld Computers
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
U
TYPICAL APPLICATIO
BAT54S
D3A
D3B
V
OFF
–8V
15mA
C5
1µF
C4
0.22µF
Start-Up Waveforms
L1, 2.2µH
L2, 2.2µH
D1
MBRM120
VIN
5V/DIV
AV
DD
V
IN
8V
2.5V TO
6V
260mA
VON
20V/DIV
R1
53.6k
L3
2.2µH
C1
2.2µF
C2
2.2µF
V
SW1
IN
SW2
FB1
D2
R2
10k
LT1948
AVDD
10V/DIV
CMDSH-3
V
ON
VO2
V
23V
ON
10mA
C
GND
T
C3
0.22µF
C6
22nF
VOFF
10V/DIV
2ms/DIV
1948 TA01a
C1, C2: TAIYO YUDEN LMK212BJ225
C3: TAIYO YUDEN TMK316BJ224
C4: TAIYO YUDEN EMK212BJ224
C5: TAIYO YUDEN LMK212BJ105
L1–L3: TAIYO YUDEN LB2012-2R2
1948 F01
Figure 1. 3.3V Powered TFT-LCD Bias Generator
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
1
LT1948
W W
U W
U
W
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ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
ORDER PART
VIN Voltage ................................................................ 8V
CT Voltage.................................................................. 6V
SW1, SW2 Voltage .................................................. 36V
FB Voltage ................................................................. 3V
VON, VO2 Voltage..................................................... 30V
Operating Temperature Range (Note 2) .. –40°C to 85°C
Lead Temperature (Soldering, 10 sec).................. 300°C
NUMBER
TOP VIEW
FB1
1
2
3
4
8 V
ON
7 VO2
6 SW2
LT1948EMS8
C
T
SW1
GND
5 V
IN
MS8 PART
MARKING
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 200°C/W
LTNR
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.3V unless otherwise specified.
SYMBOL
CONDITIONS
MIN
TYP
7
MAX
UNITS
mA
V
Supply Current
Reference Voltage
Reference Line Reg
Not Switching
13
1.26
0.01
5.5
2.7V < V < 8V
%/V
µA
IN
C Source Current
T
V
= 1.3V
FB1
4.5
1.25
1.17
1.2
6.5
C Voltage to Turn On Q3
T
1.28
1.20
1.5
1.30
1.23
V
FB1 Voltage to Begin C Charge
V
T
SW1 Current Limit
(Note 3)
(Note 3)
A
SW2 Current Limit
0.5
0.8
A
SW1 Saturation Voltage
SW2 Saturation Voltage
Oscillator Frequency
Maximum Duty Cycle
I
I
= 800mA
= 300mA
350
250
3.2
410
300
3.6
90
mV
mV
MHz
SW1
SW2
●
2.4
70
69
67
75
%
%
%
0°C ≤ T ≤ 85°C
–40°C ≤ T ≤ 0°C
●
●
A
A
VO2 Pin Resistance
Measured to Ground
400
100
kΩ
V/V
SW1, SW2 Error Amp Gain
SW1, SW2 Error Amp Gm
FB1 Regulation Voltage
50
µA/V
1.240
1.230
1.260
1.280
1.285
V
V
●
FB1 Line Regulation
2.7V < V < 8V
0.01
23
0.05
24
260
5
IN
VO2 Regulation Voltage
22
V
mV
µA
V
Switch Drop
VO2 = 25V, 7mA Load from V , C Voltage >1.30V
200
0.01
0.01
ON
ON
T
SW1 Leakage Current
SW2 Leakage Current
Switch Off, SW1 Voltage = 3.3V
Switch Off, SW2 Voltage = 3.3V
2
µA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 2: The LT1948 is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
Note 3: Current limit guaranteed by design and/or correlation to static test.
2
LT1948
U
U
U
PI FU CTIO S
FB1 (Pin 1): Feedback Pin for First Switcher. Connect
resistor divider tap here. Set AVDD according to AVDD
1.26V(1 + R1/R2).
V
IN (Pin 5): Input Supply Pin. Must be bypassed with a
=
ceramic capacitor close to the pin.
SW2 (Pin 6): VO2 Switch Node. Connect inductor and D2
here. Minimize trace area at this pin to keep EMI down.
CT (Pin2):TimingCapacitorPin.Connecta22nFcapacitor
from CT to ground to program a 3ms delay from FB1
reaching 1.26V to VON turning on.
VO2 (Pin 7): Sense Pin for 23V Output. Connect to VO2
output capacitor. This node is also internally connected to
theemitterofQ3(seeBlockDiagram),thehighsideswitch
between VO2 and VON.
SW1(Pin3):AVDD SwitchNode. ConnectinductorandD1
here (see Figure 1). Minimize trace area at this pin to keep
EMI down.
VON (Pin 8): This is the Delayed 23V Output. VON becomes
23V after the internal timer times out.
GND (Pin 4): Ground. Connect directly to local ground
plane.
U
OPERATIO
To best understand operation of the LT1948, please refer
to the LT1948 Block Diagram. The device contains two
switchingregulators, atimerandahighsideswitch. Three
outputs can be generated: an adjustable AVDD output, a
When the input voltage is below approximately 2.4V, an
undervoltage lockout circuit disables switching.
When AVDD is less than its final voltage, Q4 is turned on,
holding the CT pin at ground. When AVDD reaches final
value, Q4 lets go of the CT pin, allowing the 5.5µA current
source to charge the external capacitor, CT. When the
voltageontheCT pinreaches1.25V, Q3turnson, connect-
ing VO2 to VON. Capacitor value can be calculated using
the following formula:
charge-pumped inversion of the AVDD output, called VOFF
,
and a 23V/15mA output, called VON. Q3 keeps VON off for
anexternallysettimeinterval,setbyacapacitorconnected
to the CT pin.
The switching frequency of both switchers is 3MHz, set
internally. The switchers are current mode and are inter-
nally compensated. The main AVDD switcher is current
limited at 1.5A, while the second VON switcher is limited to
800mA. They share the same 1.26V reference voltage.
C = (5.5µA • tDELAY)/1.25V
A 22nF capacitor results in approximately 3ms of delay.
AV
DD
V
ON
R1
1
2
3
4
8
7
6
5
R2
D1
D2
C2
C3
L3
L1–L2
V
IN
C1
C4
GND
C6
D3A
1948 F02
D4B
V
OFF
Figure 2. Recommended Component Placement
3
LT1948
W
BLOCK DIAGRA
V
GND
IN
V
IN
OSC
S
SW1
FB1
–
+
–
+
Q1
R
Q
REF
+
0.01Ω
∑
+
SLOPE 1
8µA
28mV
– +
C
T
Q4
1.26V REFERENCE
AND
UNDERVOLTAGE
LOCKOUT
REF
REF
V
ON
OSC
3MHz
OSCILLATOR
SLOPE 1
SLOPE 2
Q3
REF
VO2
OSC
SW2
Q2
–
+
–
+
S
R
Q
REF
+
0.03Ω
∑
+
1948BD
SLOPE 2
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LT1930
1948i LT/TP 0800 4K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
4
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 2000
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