LT1950IGN#TR [Linear]
LT1950 - Single Switch PWM Controller with Auxiliary Boost Converter; Package: SSOP; Pins: 16; Temperature Range: -40°C to 85°C;型号: | LT1950IGN#TR |
厂家: | Linear |
描述: | LT1950 - Single Switch PWM Controller with Auxiliary Boost Converter; Package: SSOP; Pins: 16; Temperature Range: -40°C to 85°C 开关 光电二极管 |
文件: | 总20页 (文件大小:209K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1950
Single Switch PWM
Controller with Auxiliary
Boost Converter
U
FEATURES
DESCRIPTIO
TheLT®1950isawideinputrange, forward,boost,flyback
and SEPIC controller that drives an N-channel power
MOSFET with few external components required.
■
Wide Input Range: 3V to 25V
■
Programmable Volt-Second Clamp
■
Output Power Levels from 25W to 500W
■
Auxiliary Boost Converter Provides 10V Gate Drive
A resistor programmable duty cycle clamp can be used to
generate a volt-second clamp for forward converter appli-
cations. Aninternalboostswitcherisavailableforcreating
a separate supply for the output gate driver, allowing 10V
gate drive from input voltages as low as 3V. The LT1950’s
operating frequency can be set with an external resistor
over a 100kHz to 500kHz range and a SYNC pin allows the
part to be synchronized to an external clock. Additional
programmability exists for leading edge blanking and
slope compensation.
from VIN as Low as 3V
■
Programmable Operating Frequency (100kHz to
500kHz) with One External Resistor
■
Programmable Slope Compensation
■
Programmable Leading Edge Blanking
■
±2% Internal 1.23V Reference
■
Accurate Shutdown Pin Threshold with
Programmable Hysteresis
60ns Current Sense Delay
■
■
2.5V Auxiliary Reference Output
A fast current sense comparator achieves 60ns current
sense delay and the error amplifier is a true voltage mode
error amplifier, allowing a wide range of compensation
networks. An accurate shutdown pin with programmable
hysteresis is available for undervoltage lockout and shut-
down. The LT1950 is available in a small 16-Pin SSOP
package.
■
Synchronizable to an External Clock up to 1.5 • fOSC
■
Current Mode Control
■
Small 16-Pin SSUOP Package
APPLICATIO S
■
Telecom Power Supplies
■
Automotive Power Supplies
■
Portable Electronic Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
Isolated and Nonisolated DC/DC Converters
U
TYPICAL APPLICATIO
36V to 72V DC to 26V/5A (Single Switch) Forward Converter
Efficiency vs Load Current
95
90
85
80
75
70
10V
V
IN
BIAS
47µH
47µF
MBRB20200
V
26V
5A
V
= 36V
OUT
IN
SLOPE
V
IN
V
= 48V
IN
2.5V
0.1µF
470k
V
V
IN2
REF
V
IN
= 72V
BOOST
V
PA0581
SEC
R
SHDN
OSC
1µF
18k
249k
LT1950
Si7450
BLANK
SYNC
GND
FB
GATE
I
SENSE
PGND
0.015Ω
COMP
4.7k
4.99k
0.5
1.5
2.5
3.5
4.5
5.5
100k
0.022µF
LOAD CURRENT (A)
1950 TA01a
1950 TA01b 1950fa
1
LT1950
W W
U W
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
ORDER PART
TOP VIEW
BOOST .......................................................–0.3V to 35V
VIN, VIN2, SHDN .........................................–0.3V to 25V
FB, SYNC, VSEC ........................................... –0.3V to 6V
COMP, BLANK ..........................................–0.3V to 3.5V
SLOPE ......................................................–0.3V to 2.5V
NUMBER
COMP
FB
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
SEC
IN
LT1950EGN
LT1950IGN
R
BOOST
PGND
GATE
OSC
SYNC
SLOPE
V
REF
V
IN2
I
SENSE ......................................................... –0.3V to 1V
SHDN
GND
I
SENSE
ROSC .................................................................... –50µA
GN PART MARKING
BLANK
V
REF .................................................................... –10mA
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
1950E
1950I
Operating Junction Temperature Range
TJMAX = 125°C, θJA = 110°C/W,
θJC (PIN 8) = 30°C/W
LT1950EGN/LT1950IGN (Notes 2, 5) ... –40°C to 125°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF
= 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise
specified.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PWM Controller
Operating Input Voltage
Minimum Start-Up Voltage
I
I
I
= 0µA
●
●
3.0
25
3.0
V
V
VREF
VREF
VREF
= 0µA
2.6
2.3
5
V
V
Quiescent Current
Shutdown Current
= 0µA, FB = 1V, I
= 0.2V
SENSE
3.0
mA
µA
V
IN
IN
SHDN = 0V
3V < V < 25V
20
Shutdown Threshold
●
1.261
–7
1.32
–10
7
1.379
–13
10
IN
Shutdown Pin Current
SHDN = 70mV Above Threshold
SHDN = 100mV Below Threshold
µA
µA
mA
µA
Shutdown Pin Current Hysteresis
4
V
V
V
Quiescent Current
Shutdown Current
(External Output)
I(V ) = 0µA, FB = 1V, I = 0.2V
SENSE
1.7
500
2.5
IN2
IN2
REF
REF
SHDN = 0V, V = 2.7V (Boost Diode from V = 3V)
700
IN2
IN
Output Voltage
Line Regulation
Load Regulation
Oscillator
I
I
= 0µA
●
●
2.425
2.500
2.575
V
mV
mV
VREF
VREF
= 0µA, 3V < V < 25V
1
1
5
5
IN
0µA < I
< 2.5mA
VREF
Frequency: f
R
R
R
= 249k, FB = 1V
= 499k
170
85
200
100
500
20
230
115
560
kHz
kHz
kHz
kΩ
V
OSC
OSC
OSC
OSC
Minimum Programmable f
OSC
Maximum Programmable f
SYNC Input Resistance
= 90.9k
440
OSC
SYNC Switching Threshold
1.5
2.2
1.5
SYNC Frequency/f
(R
= 249k, f =200kHz), FB = 1V (Note 7)
OSC
1.25
0.05
0.05
1
OSC
OSC
f
Line Reg
3V < V < 25V
0.15
0.25
%/V
%/V
OSC
IN
9.5V < V < 25V
IN2
V
V
ROSC
1950fa
2
LT1950
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF
= 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise
specified.
PARAMETER
CONDITIONS
MIN
1.205
65
TYP
MAX
UNITS
Error Amplifier
FB Reference Voltage
FB Input Bias Current
Open Loop Voltage Gain
Unity Gain Bandwidth
COMP Source Current
COMP Sink Current
3V < V < 25V, V + 0.2V < COMP < V – 0.2
●
●
1.230
–75
85
1.254
–200
V
nA
dB
MHz
mA
mA
V
IN
OL
OH
FB = FB Reference Voltage
+ 0.2V < COMP < V – 0.2
V
OL
OH
(Note 6)
3
FB = 1V, COMP = 1.6V
FB = 1.4V, COMP = 1.6V
–0.3
8
–1.1
13
–1.8
COMP High Level: V
FB = 1V, I
= – 250µA
2.5
1.0
0.15
OH
COMP
COMP Active Threshold
Start of GATE Switching (Duty Cycle > 0%)
FB = 1.4V, I = 250µA
V
COMP Low Level: V
V
OL
COMP
Current Sense
I
I
Maximum Threshold
Input Bias Current
Duty Cycle < 10%, COMP = V
90
100
–170
110
110
mV
µA
ns
SENSE
SENSE
OH
COMP = 2.5V, I
= I
Max Threshold
SENSE
–125
–250
SENSE
Default Blanking Time
FB = 1V, COMP = 2V, I
FB = 1V, COMP = 2V, I
= 75mV
= 75mV
SENSE
Adjustable Blanking Time
290
ns
SENSE
BLANK = 75k to Ground
Blanking Override Voltage–
BLANK = Open, COMP = 2.5V (Note 4)
15
25
60
40
mV
ns
I
Maximum Threshold
SENSE
Turn-Off Delay to Gate
COMP = 2V
Slope Compensation (Note 4)
I
Max Threshold (DC < 10%) – (DC = 80%) (Note 4)
SENSE
Default, R
2x Default, R
3x Default, R
= ∞
14
28
42
mV
mV
mV
SLOPE
= 8k
= 3.3k
SLOPE
SLOPE
Internal Switcher
Boost Switch I
V
V
= 8V, 3V < V < 10V
70
250
9.5
125
500
11.0
–1.0
8.2
180
1000
11.75
mA
ns
V
LIMIT
IN2
IN2
IN
Boost Switch Off Time
= 8V, 3V < V < 10V
IN
V
V
V
V
: Boost Disable
3V < V < 10V
●
●
IN2
IN2
IN2
IN2
IN
: Boost Disable Hysteresis
: Gate Enable
3V < V < 10V
V
IN
3V < V < 10V, FB = 1V (Note 4)
7.0
9.27
V
IN
: Gate Enable Hysteresis
3V < V < 10V, FB = 1V (Note 4)
–0.6
V
IN
GATE Driver Output
GATE Rise Time
GATE Fall Time
FB = 1V, V = 12V, C = 1nF (Notes 3, 6)
50
30
13
ns
ns
V
IN2
L
FB = 1V, V = 12V, C = 1nF (Notes 3, 6)
IN2
L
GATE Clamp Voltage
GATE Low Level
I
= 0µA, COMP = 2.5V, FB = 6V
11.5
14.5
GATE
I
I
= 20mA
= 200mA
0.25
1.2
0.4
1.75
V
V
GATE
GATE
GATE High Level
I
I
= –20mA, V = 12V, COMP = 2.5V, FB = 6V
10
9.75
V
V
GATE
GATE
IN2
= –200mA, V = 12V, COMP = 2.5V, FB = 6V
IN2
Maximum Duty Cycle
FB = 1V, f
= 200kHz
90
95
97
%
OSC
1950fa
3
LT1950
The ● denotes the specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF
= 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwise
specified.
PARAMETER
CONDITIONS
= 1.4V, FB = 1V, COMP = V
MIN
TYP
75
MAX
87
UNITS
%
Maximum Duty Cycle Clamp
V
63
SEC
OH
V
Input Bias Current
0V < V
< 2.8V
–0.3
–1.0
µA
SEC
SEC
Note 1: Absolute Maximum Ratings are those values beyond which the life
Note 4: Guaranteed by correlation to static test.
of a device may be impaired.
Note 5: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 6: Guaranteed but not tested.
Note 7: Maximum recommended SYNC frequency = 500kHz.
Note 2: The LT1950EGN is guaranteed to meet performance specifications
from 0°C to 125°C operating junction temperature. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LT1950IGN is guaranteed over the full –40°C to 125°C operating
junction temperature range.
Note 3: Rise and Fall times are between 10% and 90% levels.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Switching Frequency vs
Temperature
FB Voltage vs Temperature
VIN Shutdown IQ vs Temperature
1.26
1.25
1.24
1.23
1.22
1.21
1.20
240
230
220
210
200
190
180
170
160
16
14
12
10
8
SHDN = 0V
6
4
2
0
50
TEMPERATURE (°C)
100 125
50
TEMPERATURE (°C)
–50 –25
0
25
75
–50 –25
25
75
100
50
TEMPERATURE (°C)
0
125
–50 –25
0
25
75
100 125
1950 G01
1950 • G02
1950 • G03
ISENSE Pin Current vs
Temperature
Shutdown Threshold vs
Temperature
Maximum ISENSE Threshold vs
Temperature
125
120
115
110
105
100
95
1.45
1.40
1.35
1.30
1.25
1.20
270
250
230
210
190
170
150
130
110
90
90
85
80
75
–25
25
50
75
100
125
50
TEMPERATURE (°C)
125
–50
–50
0
25
75
0
100
–25
–50
0
25
50
75 100 125
–25
TEMPERATURE (°C)
TEMPERATURE (°C)
1950 • G04
1950 G05
1950 G06
1950fa
4
LT1950
U W
TYPICAL PERFOR A CE CHARACTERISTICS
BLANK Override Threshold –
Minimum VIN Start-Up Voltage vs
Temperature (VIN2 Boosted)
I
SENSE Maximum Threshold vs
VIN IQ vs Temperature
Temperature
40
35
30
25
20
15
10
3.1
2.9
2.7
2.5
2.3
2.1
1.9
1.7
1.5
3.00
2.75
2.50
2.25
2.00
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
75
–25
0
25
50
75
125
–50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
1950 G07
1950 G09
1950 G08
SHDN Input Current *(–1) vs
Temperature
SHDN Current Hysteresis vs
Temperature
GATE Rise/Fall Time vs
GATE Capacitance
125
100
75
50
25
0
14
12
10
8
11
10
9
T
= 25°C
A
SHDN = SHDN THRESHOLD + 70mV
t
r
8
t
f
7
6
6
4
SHDN = SHDN THRESHOLD – 100mV
5
2
4
0
3
–50
–25
0
25
50
75
125
0
1000
2000
3000
4000
5000
100
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
GATE CAPACITANCE (pF)
TEMPERATURE (°C)
1950 G12
1950 G11
1950 G10
VIN2: BOOST Disable
vs Temperature
VIN2: GATE Enable
vs Temperature
BOOST Switch ILIMIT vs
Temperature
9.2
8.7
8.2
7.7
7.2
13.0
12.5
12.0
11.5
11.0
10.5
10.0
9.5
250
200
150
100
50
GATE ENABLE
BOOST DISABLE
HYSTERESIS
HYSTERESIS
BOOST RE-ENABLE
GATE DISABLE
9.0
–25
25
50
75
100
–50
0
125
50
TEMPERATURE (°C)
100 125
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50 –25
0
25
75
TEMPERATURE (°C)
1950 G14
1950 G13
1950 G15
1950fa
5
LT1950
U W
TYPICAL PERFOR A CE CHARACTERISTICS
BOOST Switch Off Time vs
Temperature
Maximum Duty Cycle vs
VSEC Voltage
GATE Clamp Voltage vs
Temperature
100
90
80
70
60
50
40
30
700
600
500
400
300
16
15
14
13
12
11
10
MAX DUTY CYCLE = (105/V )%
SEC
1.25V < V
< 2.8V
SEC
= 25°C
T
A
0.8
1.6
2.0
2.4
2.8
3.2
1.2
50
100 125
–25
0
25
50
75
125
–50 –25
0
25
75
–50
100
V
VOLTAGE (V)
SEC
TEMPERATURE (°C)
TEMPERATURE (°C)
1950 G17
1950 G16
1950 G18
U
U
U
PI FU CTIO S
COMP (Pin 1): The COMP pin is the output of the error SLOPE (Pin 5): The SLOPE pin is used to adjust the
amplifier.Theerroramplifierisatrueopampwhichallows amount of slope compensation. Leaving the pin open
the use of an RC network to be connected between the circuitresultsinadefaultlevelofslopecompensation. The
Comp and FB pins to compensate the feedback loop for amount of slope compensation can be adjusted above this
optimum transient response. The peak switch current in default level by connecting a resistor from the SLOPE pin
the external MOSFET will be proportional to the voltage on to the VREF pin.
the COMP pin. Typical operating voltage range for this pin
is 1V to 2.5V.
VREF (Pin 6): The VREF pin is the output of an internal 2.5V
reference. This pin is capable of sourcing up to 2.5mA for
FB (Pin 2): The FB pin is the inverting input to the error external use. It is recommended that the VREF pin is
amplifier. The output voltage is set with a resistor divider. bypassed to ground with a 0.1µF ceramic capacitor.
The error amplifier adjusts the peak switch current to
SHDN (Pin 7): The SHDN pin is used to put the device into
maintain the FB pin voltage at the value of the internal
a low power shutdown state. In shutdown the VIN supply
reference voltage of 1.23V.
current drops to 5µA. The SHDN pin has an accurate
ROSC (Pin 3): A resistor from the ROSC pin to ground threshold of 1.32V which can be used to program an
programs the operating frequency of the LT1950. Operat- undervoltage lockout threshold. Input current levels on
ingfrequencyrangeis100kHzto500kHz.Nominalvoltage the SHDN pin can be used to program hysteresis into the
on the ROSC pin is 1V.
undervoltage lockout levels.
SYNC (Pin 4): The SYNC pin is used to synchronize the GND (Pin 8): The GND pin is the analog ground for the
internal oscillator to an external clock signal. The pin is internalcircuitryoftheLT1950. Sensitivecircuitrysuchas
directly logic compatible and can be driven with any signal the feedback divider, frequency setting resistor, reference
with a duty cycle of 10% to 90%. If the SYNC function is bypasscapacitorshouldbetieddirectlytothispin. Seethe
not used the pin can be left open circuit or connected to Applications Information section for recommendations
ground.
on ground connections.
1950fa
6
LT1950
U
U
U
PI FU CTIO S
BLANK (Pin 9): The BLANK pin is used to adjust the
leadingedgeblankingperiodofthecurrentsenseamplifier
during FET turn-on. Shorting the BLANK pin to ground
providesadefaultblankingperiodofapproximately110ns.
A resistor from the BLANK pin to ground increases the
blanking period up to 290ns for RBLANK = 75k.
BOOST (Pin 14): The BOOST pin is the NPN collector
output of the internal boost converter which can be used
to generate an 11V supply for the MOSFET gate driver
circuit. The boost converter runs with a fixed off-time of
0.5µs and a current limit of 125mA. The converter runs
until the VIN2 voltage exceeds 11V and then turns off until
the VIN2 voltage drops below 10V. If the VIN2 voltage is
supplied externally, the BOOST pin should be shorted to
ground or left open.
ISENSE (Pin 10): The ISENSE pin is the current sense input
for the control loop. Connect this pin to the sense resistor
in the source of the external power MOSFET.
V
IN (Pin 15): The VIN pin is the main supply pin for the
LT1950. This pin must be closely bypassed to ground. If
IN2 is generated using the BOOST pin then the LT1950
VIN2 (Pin 11): The VIN2 pin is the supply pin for the
MOSFET gate drive circuit. Power can be supplied to this
pin by an external supply such as VIN, and must exceed 8V
(the undervoltage lockout threshold for the gate driver
supply). For low VIN supply voltages an internal boost
regulator can be used to generate as much as 11V at the
VIN2 pin. This allows the LT1950 to run with VIN supply
voltages down to 3V while still supplying enough gate
drive for standard level MOSFETs.
V
will be fully functional, internal VREF will be active and the
gate output will be enabled with a VIN voltage as low as 3V.
An internal undervoltage lockout threshold exists at ap-
proximately 2.6V on the VIN pin. Undervoltage lockout
voltages greater than 3V can be programmed using a
voltage divider on the SHDN pin.
VSEC (Pin 16): The VSEC pin is used to program the
maximum duty cycle of the gate driver circuit. The maxi-
mum duty cycle will be equal to (105/VSEC)% for VSEC
between1.4Vand2.8V.Thisisausefulfunctiontolimitthe
flyback voltage in a forward converter. If the maximum
duty cycle function is not used then the VSEC pin should be
tied to ground.
GATE(PIN12):TheGATEpinistheoutputofahighcurrent
gate drive circuit used to drive an external MOSFET. The
output is actively clamped to a max voltage of 13V if VIN2
is supplied by a high voltage.
PGND (Pin 13): This is the ground connection for the high
current gate driver stage. See the Applications Informa-
tion section for recommendations on ground connec-
tions.
1950fa
7
LT1950
W
BLOCK DIAGRA
V
V
REF
6
V
SEC
16
BOOST
14
V
IN2
11
IN
15
V
IN2
V
REF
=
INTERNAL +
EXTERNAL
SUPPLY
+
–
SWITCHING PREREGULATOR
FIXED OFF TIME
11V
DISABLE
(125mA CURRENT LIMIT)
2.5V
(SOURCE 2.5mA
EXTERNALLY)
PGND
+
–
(V ) (2.6V)
IN
U/V LOCKOUT
(V ) (8V)
IN2
U/V LOCKOUT
8V
1.23V
(105/V )%
SEC
–
–
+
ENABLE
MAX DC
CLAMP
+
1.32V
3µA
–
(TYPICAL 200kHz)
OSC
±1A
DRIVER
SHDN
SYNC
7
4
3
5
S
R
Q
12
GATE
+
(100-500)khz
SLOPE COMP
RAMP
13 PGND
R
OSC
SLOPE
13V
BLANKING
ERROR AMPLIFIER
VOLTAGE GAIN = 85dB
1.23V
+
–
CURRENT
SENSE
CMP
BLANKING
OVERRIDE
CMP
–
+
–
+
0mV – >100mV
10
I
SENSE
125mV
2
1
8
9
1950 BD
FB
COMP
GND
BLANK
Figure 1. LT1950 Block Diagram
U
OPERATIO
The LT1950 is a constant frequency, current mode con-
troller for DC/DC forward, boost, flyback and SEPIC con-
verter applications. The Block Diagram in Figure 1 shows
all of the key functions of the IC.
11V supply at VIN2 using a small surface mount external
inductor, diode and capacitor. Since VIN2 supplies the
output driver of the IC, this architecture achieves high
GATEdriveforanexternalN-channelpowerMOSFETeven
though VIN voltage is very low. High GATE drive capability
reduces MOSFET RDS(ON) for improved efficiency,
1950fa
In normal operation, a VIN voltage as low as 3V allows an
internal switcher at the BOOST pin to generate a separate
8
LT1950
U
OPERATIO
increases the range of MOSFETs that can be selected and
allows applications requiring high gate drive with a large
swing in VIN voltage. When VIN2 exceeds 8V, the GATE
output driver is enabled. The GATE switches between 0V
and VIN2 at a constant frequency set by a resistor from the
ROSC pin to ground. When VIN2 reaches 11V, the internal
switcher at the BOOST pin is disabled to save power and
only re-enabled when VIN2 drops below 10V. The internal
boost switcher runs in burst mode operation, asynchro-
nous to the main oscillator. If low VIN operation with high
GATE drive is not required, the BOOST pin is left open and
the VIN2 pin shorted to VIN. With VIN2 shorted to VIN the
minimum operational VIN voltage will increase from 3V to
8V (required at VIN2 to enable the GATE output driver). For
GATE turn on, a PWM latch is set at the start of each main
oscillator cycle. For GATE turn off, the PWM latch is reset
when either the current sense comparator is tripped, the
maximum duty cycle is reached, or the BLANK override
threshold is exceeded.
compensation. A default level of slope compensation is
achieved with the SLOPE pin open. Increased slope com-
pensation can be programmed by reducing the value of
resistance inserted between the SLOPE pin and VREF pin.
A SYNC pin allows the LT1950 main oscillator to be
synchronized to an external clock . To avoid loss of slope
compensation during synchronization, the free running
main oscillator frequency should be programmed to ap-
proximately 80% of the external clock frequency.
The LT1950 can be placed into shutdown mode when the
SHDN pin drops below an accurate 1.32V threshold. This
threshold can be used to program undervoltage lockout
(UVLO) at VIN for current limited or high source resistance
supplies. SHDN pin current hysteresis also exists to allow
external programming of UVLO voltage hysteresis. When
VIN andVIN2 exceedinternallysetUVLOthresholdsof2.6V
and6.8V,theVREF outputbecomesactive.TheVREF output
is a 2.5V reference supplying the majority of LT1950
control circuitry and capable of sourcing up to 2.5mA for
external use.
A resistor divider from the application’s output voltage
generates a voltage at the FB pin that is compared to the
internal 1.23V reference by the error amplifier. The error
amplifier output (COMP) defines the input threshold
(ISENSE)ofthecurrentsensecomparator.MaximumISENSE
voltage is clamped to 100mV. By connecting ISENSE to a
sense resistor in series with the source of the external
MOSFET, the peak switch current is controlled by COMP.
An increase in output load current causing the output
voltage to fall, will cause COMP to rise, increasing ISENSE
threshold, increasing the current delivered to the output.
To prevent noise in the system causing premature turn off
of the external MOSFET the LT1950 has leading edge
blanking. This means the current sense comparator out-
put is ignored during MOSFET turn on and for an extended
period after turn on. The extended blanking period is
adjusted by inserting a resistor from the BLANK pin to
ground. A short to ground defines a minimum default
blanking period. Increased resistance from the BLANK pin
togroundwillincreaseblankingduration. Faultconditions
causing ISENSE to exceed 125mV will override blanking
and reduce the ISENSE to GATE delay to 60ns.
This current mode technique means that the error ampli-
fier commands current to be delivered to the output rather
than voltage. This makes frequency compensation easier
and provides faster loop response to output load tran-
sients.
For applications requiring maximum duty cycle clamping,
the VSEC pin reduces duty cycle for increased voltage on
the pin. The VSEC pin provides a volt-second clamp critical
in forward converter applications.
The current mode architecture requires slope compensa-
tion to be added to the current sensing loop to prevent
subharmonic oscillations which can occur for duty cycles
above 50%. Unlike most current mode converters which
have a slope compensation ramp that is fixed internally,
placing a constraint on inductor value and operating
frequency, the LT1950 has externally adjustable slope
Maximum duty cycle follows (105/VSEC)% for VSEC volt-
ages between 1.4V to 2.8V. If unused, the VSEC pin should
be shorted to ground, leaving the natural maximum duty
cycle of the part to be typically 95% for 200kHz operation.
1950fa
9
LT1950
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LT1950 Input Supplies, VREF Output and GATE Enable
VIN = VIN2 Operation
VIN is the main input supply for the LT1950. VIN2 is the
input supply for the LT1950 output driver. VIN2 can be
provided by shorting the VIN2 pin to the VIN pin or by
generating VIN2 using the BOOST pin. Waveforms of VIN,
VIN2, VREF and GATE switching are shown in Figures 2 and
3. Figure 2 represents low VIN operation with VIN2 gener-
ated using the B00ST pin. Figure 3 represents VIN = VIN2
operation with the BOOST pin open circuit or shorted to
ground.
If low VIN operation is not required below approximately
8V on VIN the LT1950 can be configured to run without the
use of the BOOST pin by shorting the VIN2 pin to the VIN
pin. Figure 3 shows that both VIN and VIN2 must now
exceed 6.8V to activate the 2.5V VREF output and must
exceed approximately 8V to enable the output driver
(GATE pin).
12
V
IN2
8
4
0
MIN
3V
Low VIN Operation
GATE
The LT1950 can be configured to provide a minimum of
10V GATE drive for an external N-channel MOSFET from
VIN voltages as low as 3V, if the BOOST pin is used to
generate a second supply at the VIN2 pin (see Figure 2 and
Applications Information “ Generating VIN2 Supply Using
BOOSTPin”). The advantage of this configuration is that a
lower RDS(ON) is achieved for the external N-channel
MOSFET, improving efficiency, versus a controller run-
ning at 3V input without boosted gate drive. In addition,
typical controllers running at low input voltages have the
limitation of only being able to use logic level MOSFETs.
The LT1950 allows a greater range of usable MOSFETs.
This versatility allows optimization of the overall power
supply performance and allows applications which would
otherwise not be possible without a more complex topol-
ogy. Figure 2 shows that for VIN above 2V, the internal
switcher at the BOOST pin is enabled. This switch gener-
ates the VIN2 supply. As VIN2 ramps up above the
undervoltage lockout threshold of 6.8V the 2.5V reference
VREF becomes active and powers up internal control
circuitry. When VIN2 exceeds approximately 8V, the gate
driver is enabled. VIN2 is regulated between 10V and 11V,
providing a supply to the LT1950 output driver to ensure
a minimum of 10V drive at the GATE pin.
L1
D1
V
IN
BOOST
LT1950
4
3
2
1
0
V
V
IN
IN2
C1
V
REF
50µs/DIV
1950 F02
Figure 2. Low VIN Operation
10.2
8.5
6.8
5.1
3.4
V
V
= V
IN2
IN
TYPICAL START-UP INPUT
>8.2V
5.0
2.5
0
V
IN
REF
BOOST
*
LT1950
V
IN2
C1
10
5
GATE
*BOOST PIN CAN BE
LEFT OPEN OR
SHORTED TO GROUND
0
10µs/DIV
1950 F03
Figure 3. VIN = VIN2 Operation
1950fa
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Example: switching should not start until the input is
above 11V and is to stop if the input falls below 9V.
Shutdown and Undervoltage Lockout
Figure 4 shows how to program undervoltage lockout
(UVLO) for the VIN supply. Typically, UVLO is used in
situations where the input supply is current limited, or has
a relatively high source resistance. A switching regulator
draws constant power from the source, hence source
current increases as source voltage drops. This looks like
a negative load resistance to the source and can cause the
source to current limit or latch low under low source
voltage conditions. An internally set undervoltage lockout
(UVLO)thresholdpreventstheregulatorfromoperatingat
source voltages where these problems might occur. An
internal comparator will force the part into shutdown
below the minimum VIN of 2.6V. This feature can be used
to prevent excessive discharge of battery-operated sys-
tems. Alternatively, UVLO threshold is adjustable. The
shutdown threshold voltage of the SHDN pin is 1.32V.
Forcing the SHDN pin below this 1.32V threshold causes
VREF to be disabled and stops switching at the GATE pin.
If the SHDN pin is left open circuit, a permanent 3µA flows
out of the pin to ensure that the pin defaults high to allow
normal operation. Voltages above the 1.32V threshold
cause an extra 7µA to be sourced out of the pin, providing
current hysteresis. This can be used to set voltage hyster-
esis of the UVLO threshold using the following equations:
VH = 11V
VL = 9V
11V – 9V
R1=
= 286k
7µA
1.32V
(11V – 1.32V)
286k
R2 =
= 36k
+ 3µA
Keep the connections from the resistors to the SHDN pin
short and make sure that the interplane or surface capaci-
tance to the switching nodes are minimized. If high resis-
tance values are used, the SHDN pin should be bypassed
with a 1nF capacitor to prevent coupling problems from
the switch node.
LT1950
V
IN
1.32V
V
REF
R1
R2
3µA
7µA
+
C1
GND
VH – VL
7µA
1950 F04
R1=
Figure 4. Undervoltage Lockout
1.32V
(VH – 1.32V)
R2 =
Generating VIN2 Supply Using BOOST Pin
+ 3µA
The LT1950’s BOOST pin is used to provide a “boosted”
11V supply at the VIN2 pin for VIN voltages as low as 3V.
Since VIN2 supplies the output driver for the GATE pin of
the IC, it is advantageous to generate a boosted VIN2. This
architecture achieves high GATE drive for an external
R1
VH = Turn on threshold
VL = Turn off threshold
1950fa
11
LT1950
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APPLICATIO S I FOR ATIO
11V. This hysteretic (burst mode) operation for the inter-
nal switcher minimizes power dissipation from VIN.
N-channel power MOSFET even though VIN voltage is very
low. High GATE drive voltage reduces MOSFET RDS(ON)
,
improves efficiency and increases the range of MOSFETs
that can be selected. A small switching regulator at the
BOOST pin, with fixed current limit and fixed off time,
generates the VIN2 supply. With an external inductor
connected between the BOOST pin and VIN (see Figure 5),
the BOOST pin will draw current until approximately
125mAisreached,turnofffor0.5µsandthenturnbackon.
Thecycleisrepeatedforaslongastheswitcherisenabled.
By using a diode connected from BOOST to VIN2 and a
capacitor from VIN2 to ground, energy from the external
inductor is transferred to the VIN2 capacitor during the off-
time of the internal switcher. An auxiliary boost converter
is realized providing a supply to the VIN2 pin. The typical
inductor current, VIN2 voltage and BOOST pin voltage
waveformsareshowninFigure5.WhenVIN2 reaches11V,
the internal switcher is disabled. Since VIN2 supplies the
output driver of the LT1950, switching at the GATE pin will
eventually discharge the VIN2 capacitor until VIN2 reaches
alowerlevelofapproximately10V.Atthisleveltheinternal
switcher is re-enabled and switches until VIN2 returns to
The VREF output is a 2.5V reference supplying most of the
LT1950 control circuitry. It is available for external use
withmaximumcurrentcapabilityof2.5mA.Thepinshould
be bypassed to ground using a 0.1µF capacitor. Internal
undervoltage lockout thresholds for VIN and VIN2 of ap-
proximately 2.6V and 6.8V respectively must be exceeded
before VREF becomes active.
Programming Oscillator Frequency
The oscillator frequency of the LT1950 is programmed
usinganexternalresistorconnectedbetweentheROSC pin
and ground. Figure 6 shows typical fOSC vs ROSC resistor
values. The LT1950 is programmable for a free-running
oscillator frequency in the range of 100kHz to 500kHz.
Stray capacitance and potential noise pickup on the ROSC
pin should be minimized by placing the ROSC resistor as
close as possible to the ROSC pin and keeping the area of
the ROSC node as small as possible. The ground side of the
ROSC resistor should be returned directly to the GND
(analog ground) pin.
500
450
400
350
300
250
200
150
12
(V)
V
IN2
MIN
3V
10
0.25
I
D1
L1
L1
D1
(A)
V
IN
BOOST
LT1950
0
0.25
I
(A)
V
IN2
C1
0
15
BOOST
(V)
100
0
50 100 150 200 250 300 350 400 450 500
5µs/DIV
1950 F05
R
(kΩ)
OSC
1950 F06
Figure 5. VIN2 Generation Using the BOOST Pin
Figure 6. Oscillator Frequency (fOSC) vs ROSC
1950fa
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Synchronizing
Electrical Characteristics for 1X, 2X and 3X default slope
compensation vs RSLOPE
.
The SYNC pin is used to synchronize the LT1950 main
oscillator to an external clock. The SYNC pin can be driven
directly from a logic level output, requiring less
than 0.8V for a logic level low and greater than 2.2V for a
logic level high. Duty cycle must be between 10% and
90%. When synchronizing the part, slope compensation
will be reduced by approximately SYNC f/fOSC. If the
reduction of slope compensation affects performance,
RSLOPE can be reduced to increase slope compensation
and reestablish correct operation. If unused, the pin is left
open or shorted to ground. If left open, be aware that the
internal pin resistance is 20k and board layout should be
checked to avoid noise coupling to the pin.
Requirement in Current Mode Converters/Advantage
of Adjustability
The LT1950 uses a current mode architecture to provide
fast response to load transients and to ease frequency
compensationrequirements.Currentmodeswitchingregu-
latorswhichoperatewithdutycyclesabove50%andhave
continuous inductor current, must add slope compensa-
tion to their current sensing loop to prevent subharmonic
oscillations. (For more information on slope compensa-
tionseeApplicationNote19).Typicalcurrentmodeswitch-
ing regulators have a fixed internal slope compensation.
This can place constraints on the value of the inductor. If
too large an inductor is used, the fixed internal slope
compensation will be greater than needed, causing opera-
tion to approach voltage mode. If too small an inductor is
used, the fixed internal slope compensation will be too
small, resulting in subharmonic oscillations. The LT1950
increases the range of usable inductor values by allowing
slope compensation to be adjusted externally.
SLOPE COMPENSATION
Programmability
The LT1950 allows its default level of slope compensation
tobeeasilyincreasedbyuseofasingleresistorconnected
between the SLOPE pin and the VREF pin. The ability to
adjustslopecompensationallowsthedesignertotailorhis
application for a wider inductor value range as well as to
optimize the loop bandwidth. A resistor, RSLOPE, con-
nected between the SLOPE pin and VREF increases the
LT1950 slope compensation from its default level to as
high as 3X of default. The curves in Figure 7 show the
typical ISENSE maximum threshold vs duty cycle for vari-
ous values of RSLOPE. It can be seen that slope compensa-
tionsubtractsfromthemaximumISENSE thresholdasduty
cycle increases from 0%. For example, with RSLOPE open,
ISENSE max threshold is 100mV at low duty cycle, but falls
to approximately 86mV at 80% duty cycle. This must be
accountedforwhendesigningaconvertertooperateupto
amaximumloadcurrentandoveragivendutycyclerange.
The application and inductor value will define the
minimum amount of slope compensation. Refer to the
100
R
= OPEN
SLOPE
90
80
70
60
50
40
30
20
R
= 8k
SLOPE
R
= 3.3k
SLOPE
40
60
80
0
20
100
DUTY CYCLE (%)
1950 F07
Figure 7. ISENSE Maximum Threshold vs Duty Cycle
1950fa
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Programming Leading Edge Blank Time
Programming Volt-Second Clamp
ForPWMcontrollersdrivingexternalMOSFETs, noisecan
be generated during GATE rise time due to various para-
sitic effects. This noise can disturb the input to the current
sense comparator (ISENSE) and cause premature turn-off
of the external MOSFET. The LT1950 provides program-
mable leading edge blanking of the current sense com-
parator to avoid this effect.
TheVSEC pinisusedtoprovideanadaptivemaximumduty
cycle clamp for sophisticated control of the simplest
forward converter topology (single primary-side switch).
Thisadaptivemaximumdutycycleclampallowstheuseof
the smallest transformers, MOSFETs and output rectifiers
by addressing the biggest concern in single switch for-
ward converter topologies - transformer reset. The sec-
tion“ApplicationCircuits-ForwardConverterApplications”
covers transformer reset requirements and highlights the
advantages of the LT1950 adaptive maximum duty cycle
clamp. The programmable maximum duty cycle clamp is
controlledbythevoltageontheVSEC pin. Asvoltageonthe
VSEC pin increases within a specified range, maximum
duty cycle decreases. By deriving VSEC pin voltage from
the system input supply, a volt-second clamp is realized.
Maximum GATE output duty cycle follows a 1/X relation-
ship given by (105/VSEC)%. (see Maximum Duty Cycle vs
VSEC Voltage graph in the Typical Performance Character-
istics section). For example, if the minimum input supply
foraforwardconverterapplicationis36V,theVSEC pincan
be programmed with a maximum duty cycle of 75% at
1.4V. A movement of input voltage to 72V will lift the VSEC
pin to 2.8V, resulting in a maximum duty cycle of 37.5%.
As the section on Forward Converter Applications will
show, transformer reset requirements are met with the
Blanking is provided in 2 phases: The first phase is during
GATE rise time. GATE rise times vary depending on
MOSFET type. For this reason the LT1950 automatically
blanks the current comparator output until the “leading
edge” of the GATE is detected. This occurs when the GATE
voltage has risen within 0.5V of the output driver supply
(VIN2) or has reached its clamp level of 13V. The second
phase of blanking starts immediately after “leading edge”
has been detected. This phase is programmable using a
resistor (RBLANK) from the BLANK pin to ground. Typical
values for this portion of the blanking period are 110ns at
R
BLANK = 0Ω up to 290ns at RBLANK = 75k. Figure 8 shows
blanking vs RBLANK. Blanking duration can be approxi-
mated as:
⎛
⎞
RBLANK
25k
BLANKING (EXTENDED) = 110 + 60•
ns
⎜
⎟
⎝
⎠
(AUTOMATIC) (DEFAULT)
LEADING
(PROGRAMMABLE)
CURRENT
EDGE
EXTENDED
EXTENDED
BLANKING
SENSE
DELAY
BLANKING BLANKING
GATE
R
BLANK
= 0Ω
0Ω < R
BLANK
< = 75k
60ns
BLANKING
0
Xns
[X + 110 + (60 • R /25k)]ns
BLANK
1950 F04
(X + 110)ns
Figure 8. Blanking Timing Diagram
1950fa
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94% Efficient 3.3V, 20A Synchronous Forward
Converter
ability of the VSEC pin to follow input voltage and control
maximum switch duty cycle.
The synchronous forward converter in Figure 11 is based
on the LT1950 and uses MOSFETs as synchronous output
rectifiers to provide an efficient 3.3V, 20A isolated output
from 48V input. The output rectifiers are driven by the
LTC1698 which also serves as an error amplifier and
optocoupler driver. Efficiency and transient response
are shown in Figures 9 and 10. Peak efficiencies of 94%
and ultra-fast transient response are superior to presently
availablepowermodules.Inaddition,thecircuitin Figure 11
is an all-ceramic capacitor solution providing low output
ripple voltage and improved reliability. The LT1950-based
convertercanbeusedtoreplacepowermoduleconverters
at a much lower cost. The LT1950 solution benefits from
thermal conduction of the system board resulting in
higher efficiencies and lower rise in component tempera-
tures. The 7mm height allows dense packaging and the
circuit can be easily adjusted to provide an output voltage
from1.23Vto15V. Inaddition, highercurrentsareachiev-
ablebysimplescalingofpowercomponents.TheLT1950-
based solution in Figure 11 is a powerful topology for
replacement of a wide range of power modules.
Forward Converter Applications
TheLT1950providessophisticatedcontrolofthesimplest
forwardconvertertopology(singleprimaryswitch,seeQ1
Figure 11). A significant problem in a single switch for-
ward converter topology is transformer reset. Optimum
transformer utilization requires maximum duty cycles.
Unfortunately as duty cycles increase the transformer
reset time decreases and reset voltages increase. This
increases the voltage requirements and stress on both
transformer and switch. The LT1950 incorporates an
adaptivemaximumdutycycleclampwhichcontrolsmaxi-
mum switch duty cycle based on system input voltage.
The adaptive clamp allows the converter to operate at up
to 75% duty cycle, allowing 25% of the switching period
for resetting the transformer. This results in greater
utilization of MOSFET, transformer and output rectifier
components. The VSEC pin can be programmed from
system input to adaptively control maximum duty cycle
(see Applications Information “Programming Volt-Sec-
ond Clamp” and the Maximum Duty Cycle vs VSEC Voltage
graphintheTypicalPerformanceCharacteristicssection).
100
95
90
85
80
LT1950
OUT
(100mV/DIV)
V
POWER
MODULE
V
OUT
(100mV/DIV)
V
V
= 48V
IN
75
70
= 3.3V
OUT
OSC
f
= 235kHz
1950 F10
0
5
10
LOAD CURRENT (A)
15
20
500µs/DIV
1950 F09
Figure 10. Output Voltage Transient Response
to Load Steps (0A to 3.3A) LT1950 (Trace1)
vs Power Module (Trace 2)
Figure 9. LT1950-Based Synchronous Forward
Converter Efficiency vs Load Current
1950fa
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+V
–V
IN
C
IN
36V
TO 72V
INPUT
2.2µF
100V
X5R
L1
T1
C.PI-1365-1R2
+V
3.3V
20A
STG-0313W
01
IN
10V
+V
BIAS
IN
COMP
10V
8
BIAS
C
R5
470k
16
01
U2A
R7
R1
100µF
R6
LTC1693-1
LT1950
COMP
Q2
Si7380
2×
Q3
255Ω
4.7k
X5R
4×
18k
1
1
2
7
Q1
Si4490
Si7380
2×
CG
FG
V
SEC
15
14
D1
BAS516
2
FB
R
V
IN
D2
BAT760
R17, 210k
3
4
5
6
7
8
C
1µF
U1
UV
BOOST
PGND
GATE
OSC
47Ω
13
12
11
10
9
R
S
SYNC
C4
1000pF
C1
0.1µF
0.015Ω
C
S
SLOPE
7V
BIAS
C3
10nF
LTC1698
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
REF
V
IN2
V
DD
FG
FG
10V
6
BIAS
SHDN
GND
I
SENSE
1µF
X5R
SYNC
CG
CG
SYNC
U2B
LTC1693-1
5
R4, 18k
BLANK
PGND
GND
OPTO
V
T2
AUX
3
R18
27k
0.1µF
R9
470k
SYNC
R13
270Ω
I
COMP
4
560Ω
220pF
+I
SNS
–I
SNS
+V
IN
C
S
C9, 33nF
V
COMP
R2
U4
4.7k
R14
1.2k
HCPL-M453
MARG
P OK
WT
10V
BIAS
6
1
2
3
V
FB
=1.233V
OVP
R3
4.7k
100k
Q4
BC847BF
100k
UV
+V
5
4
01
R15
4.7k
R16
2.8k
C6
4.7µF
D3
BAT760
0.1µF
COMP
Figure 11. 36V to 72V Input to 3.3V at 20A Synchronous Forward Converter
1950fa
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U
94
93
92
91
90
89
88
87
86
85
84
High Efficiency, Isolated 26V 5A Output,
Nonsynchronous Forward Converter
Figure 13 illustrates a nonsynchronous forward converter
based on the LT1950 to provide a highly efficient, 26V 5A
isolated output from 48V input. The LT1950-based con-
verter using a single switch topology and utilizing the
LT1950s adaptive maximum duty cycle clamp is a simple
and highly optimized solution. Peak efficiencies of 92.8%
(Figure 12) are achievable. Transformer and inductor are
standard components. The quarter brick sized DC/DC
converter (2.3" by 1.45") delivers over 125W and is only
0.4" high. The 26V converter can be used as a “front line”
(isolating) converter in telecom systems with multiple
outputs.
V
V
= 48V
IN
= 26V
OUT
OSC
f
= 235kHz
1
2
3
4
5
LOAD CURRENT (A)
1950 F12
Figure 12. LT1950-Based Nonsynchronous
Forward Converter Efficiency vs Load
Current (Figure 13 Circuit)
+V
IN
IN
C
IN
36V
TO 72V
INPUT
2.2µF
100V
X5R
T1
PA0581
MBR20200CT
+V
OUT
–V
47µH
232k
10V
BIAS
+V
IN
47µF
LT1950
SLOPE
6.8k
5
6
15
11
16
7
24.9k
V
IN
V
V
470k
REF
IN2
470pF
0.1µF
18k
V
SEC
3
9
4
2
1
18k
R
SHDN
GATE
OSC
210k
27k
12
10
8
–
4
3
5
2
Si7450
0.015
U3
LT1797
BLANK
SYNC
FB
1
47k
330R
OC1
FMMT625
22k
8.2V
+
I
SENSE
GND
1µF
1µF
13
COMP
PGND
1950 F13
U2
LT1009
Figure 13. 36V to 72V Input to 26V at 5A Nonsynchronous Forward Converter
1950fa
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3.3V BIAS
+V
OUT
V
IN
4V TO 36V
C1
C3
4.7µF
16V
C
IN
R3
2200pF
R1
10.5k
LT1950
COMP
10µF
50V
18k
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
L1
4.7µH
V
SEC
TDK
C5
FB
R
V
L2*
IN
10µF
D1
MBRD660CT
50V
BOOST
PGND
GATE
OSC
+V
OUT
12V, 1.5A
D2
R4
133k
R5
16.2k
SYNC
BAS516
Q1
Si7456
R2
1.21k
SLOPE
C
OUT
V
V
47µF, 16V
REF
IN2
R9, 47Ω
L3*
X5R, TDK
×4
C2
0.1µF
SHDN
GND
I
SENSE
C4
4.7µF
16V
R10
0.010Ω
C6
0.01µF
BLANK
R6
35.7k
R7
R8
47k
71.5k
*L2, L3 (COUPLED INDUCTORS)
VP5-0155
V
IN
Figure 14. 4V to 36V Input, 12V/1.5A Automotive SEPIC Converter
1950fa
18
LT1950
U
PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ±.005
.009
(0.229)
REF
16 15 14 13 12 11 10 9
.254 MIN
.150 – .165
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165 ±.0015
.0250 TYP
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
7
8
.015 ± .004
(0.38 ± 0.10)
× 45°
.053 – .068
(1.351 – 1.727)
.004 – .0098
(0.102 – 0.249)
.007 – .0098
(0.178 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.0250
(0.635)
BSC
.008 – .012
(0.203 – 0.305)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
GN16 (SSOP) 0502
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1950fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1950
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1534
Ultralow Noise 2A Switching Regulator
Reduces Conducted and Radiated EMI, Low Switching Harmonics,
20kHz to 250kHz Switching Frequency
LT1619
Low Voltage Current Mode Controller
Dual Transistor Synchronous Forward Controller
High Speed MOSFET Driver
1.9V ≤ V ≤ 18V, 300kHz Operation, Boost, Flyback, SEPIC
IN
LT1681/LT3781
LTC1693
Operation Up to 72V Maximum
1.5A Peak Output Current, 16ns Rise/Fall Time at V = 12V, C = 1nF
CC
L
LTC1698
Secondary Synchronous Rectifier Controller
Use with the LT1950 or LT1681, Isolated Power Supplies,
Contains Voltage Margining, Optocoupler Driver, Synchronization
Circuit with the Primary Side
LT1725
General Purpose Isolated Flyback Controller
No Optoisolator Required, Accurate Regulation Without User Trims,
50kHz to 250kHz Switching Frequency, SSOP-16 Package
LTC1871
LT1910
Wide Input Range, No R
TM Controller
Operation as Low as 2.5V Input, Boost, Flyback, SEPIC
8V to 48V Supply Range, Protected –15V to 60V Supply Transient
Synchronous, Single Inductor, No Schottky Diode Required
SENSE
Protected High Side MOSFET Driver
Micropower Buck-Boost DC/DC Converter
Positive-to-Negative DC/DC Controller
LTC3440
LTC3704
2.5V ≤ V ≤ 36V, No R
Current Mode Operation,
SENSE
IN
Excellent Transient Response
No RSENSE is a trademark of Linear Technology Corporation.
1950fa
LT/TP 0504 1K REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2003
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号:
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