LT1959IS8 [Linear]
4.5A, 500kHz Step-Down Switching Regulator; 4.5A ， 500kHz的降压型开关稳压器
| 型号： | LT1959IS8 |
| 厂家： | 
Linear |
| 描述： | 4.5A, 500kHz Step-Down Switching Regulator |
| 文件： | 总24页 (文件大小：295K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1959
4.5A, 500kHz Step-Down
Switching Regulator
U
FEATURES
DESCRIPTIO
TheLT®1959isa500kHzmonolithicbuckmodeswitching
regulatorfunctionallyidenticaltotheLT1506butoptimized
for lower output voltage applications. It will operate down
to1.21Voutputcomparedto2.42VfortheLT1506. A4.5A
switch is included on the die along with all the necessary
oscillator, control and logic circuitry. High switching fre-
quency allows a considerable reduction in the size of ex-
ternal components. The topology is current mode for fast
transient response and good loop stability.
■
Operates with Input as Low as 4V
■
Output Range Down to 1.21V
■
Constant 500kHz Switching Frequency
■
Uses All Surface Mount Components
■
Inductor Size Reduced to 1.8µH
■
■
■
■
■
■
Saturating Switch Design: 0.07Ω
Shutdown Current: 20µA
Easily Synchronizable
Cycle-by-Cycle Current Limiting
4.5A Switch
Current Mode Control
Aspecialhighspeedbipolarprocessandnewdesigntech-
niquesachievehighefficiencyathighswitchingfrequency.
Efficiency is maintained over a wide output current range
by keeping quiescent supply current to 4mA and by utiliz-
ing a supply boost capacitor to saturate the power switch.
U
APPLICATIO S
■
Portable Computers
■
The LT1959 fits into standard 7-pin DD and fused lead
SO-8packages.Fullcycle-by-cycleshort-circuitprotection
and thermal shutdown are provided. Standard surface
mount external parts are used, including the inductor and
capacitors. There is the optional function of shutdown or
synchronization.Ashutdownsignalreducessupplycurrent
to20µA.Synchronizationallowsanexternallogiclevelsig-
naltoincreasetheinternaloscillatorfrom580kHzto1MHz.
Battery-Powered Systems
■
Battery Chargers
Distributed Power
■
■
5V to 3.3V Conversion
■
5V to 2.5V Conversion
■
5V to 1.8V Conversion
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATION
Efficiency vs Load Current
5V to 1.8V Down Converter
D2
1N914
90
V
V
= 3.3V
OUT
IN
= 5V
L = 10µH
85
80
75
70
C2
0.68µF
L1
5µH
OUTPUT
1.8V
BOOST
LT1959
INPUT
5V
V
IN
V
SW
FB
4A
C3
R1
OPEN
+
10µF TO
50µF
CERAMIC
1.21k
OR
HIGH
= ON
SHDN
GND
V
C1
C
+
R2
2.49k
100µF, 10V
SOLID
C
1.5nF
D1
C
MBRS330T3
TANTALUM
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
1959 TA01
LOAD CURRENT (A)
1959 TA02
1
LT1959
ABSOLUTE MAXIMUM RATINGS
W W
U W
(Note 1)
Input Voltage .......................................................... 16V
BOOST Voltage ........................................................ 30V
BOOST Pin Above Input Voltage ............................. 15V
SHDN Pin Voltage..................................................... 7V
FB Pin Voltage ....................................................... 3.5V
FB Pin Current ....................................................... 1mA
SYNC Pin Voltage ..................................................... 7V
Operating Junction Temperature Range
LT1959C................................................ 0°C to 125°C
LT1959I ........................................... –40°C to 125°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
U
W U
PACKAGE/ORDER INFORMATION
ORDER PART
ORDER PART
FRONT VIEW
TOP VIEW
NUMBER
NUMBER
7
6
5
4
3
2
1
FB
BOOST
1
2
3
4
8
7
6
5
V
V
SW
IN
V
TAB
IS
GND
IN
LT1959CR
LT1959IR
LT1959CS8
LT1959IS8
GND
BOOST
FB
SYNC
SHDN
V
SW
SHDN
V
C
GND**
V
C
R PACKAGE
7-LEAD PLASTIC DD
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX = 150°C, θJA = 30°C/W
S8 PART MARKING
WITH PACKAGE SOLDERED TO 0.5 SQUARE INCH
COPPER AREA OVER BACKSIDE GROUND PLANE OR
INTERNAL POWER PLANE. θJA CAN VARY FROM 20°C/W
TO >40°C/W DEPENDING ON MOUNTING TECHNIQUES
TJMAX = 150°C, θJA = 80°C/W
**WITH (FUSED GND) GROUND PIN
CONNECTED TO GROUND PLANE OR
LARGE LANDS
1959
1959I
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, TJ = 25°C, VIN = 5V, VC = 1.5V, Boost = VIN + 5V, switch open, unless
otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
1.21
0.01
0
400
2000
MAX
1.23
0.03
0.5
UNITS
V
%/V
µA
Feedback Voltage (Adjustable)
Reference Voltage Line Regulation
Feedback Input Bias Current
Error Amplifier Voltage Gain
Error Amplifier Transconductance
All Conditions
●
●
1.19
4.3V ≤ V ≤ 15V
IN
–0.5
200
1500
1000
(Note 2)
∆I (V ) = ±10µA
2700
3100
µMho
µMho
C
●
V Pin to Switch Current Transconductance
Error Amplifier Source Current
Error Amplifier Sink Current
5.3
225
225
0.9
2.1
6
A/V
µA
µA
V
V
A
C
V
V
= 1.05V
= 1.35V
●
●
140
140
320
320
FB
FB
V Pin Switching Threshold
Duty Cycle = 0
C
V Pin High Clamp
C
Switch Current Limit
Slope Compensation
V Open, V = 1.05V, DC ≤ 50%
DC = 80%
●
4.5
8.5
C
FB
0.8
A
2
LT1959
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, TJ = 25°C, VIN = 5V, VC = 1.5V, Boost = VIN + 5V, switch open, unless
otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Switch On Resistance (Note 7)
I
= 4.5A
0.07
0.1
0.13
Ω
Ω
SW
●
●
Maximum Switch Duty Cycle
Switch Frequency
V
= 1.05V
90
86
460
440
93
93
500
%
%
kHz
kHz
%/V
V
V
V
mA
mA
mA
FB
V Set to Give 50% Duty Cycle
540
560
0.15
1.0
4.3
3.0
35
140
5.4
50
75
C
●
●
●
●
●
Switch Frequency Line Regulation
Frequency Shifting Threshold on FB Pin
Minimum Input Voltage (Note 3)
Minimum Boost Voltage (Note 4)
Boost Current (Note 5)
4.3V ≤ V ≤ 15V
∆f = 10kHz
0
IN
0.5
2.3
0.7
4.0
2.3
20
90
I
I
I
≤ 4.5A
= 1A
= 4.5A
SW
●
●
SW
SW
Input Supply Current (Note 6)
Shutdown Supply Current
●
3.8
15
V
= 0V, V = 0V, V Open
µA
µA
V
SHDN
SW
C
●
●
Lockout Threshold
V Open
2.38
2.46
C
Shutdown Thresholds
V Open Device Shutting Down
Device Starting Up
●
●
0.13
0.25
0.37
0.45
0.60
0.7
V
V
C
Synchronization Threshold
Synchronizing Range
SYNC Pin Input Resistance
●
1.5
2.2
1000
V
kHz
kΩ
580
40
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 4: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 5: Boost current is the current flowing into the boost pin with the pin
held 5V above input voltage. It flows only during switch on time.
Note 2: Gain is measured with a V swing equal to 200mV above the
C
switching threshold level to 200mV below the upper clamp level.
Note 6: Input supply current is the bias current drawn by the input pin
Note 3: Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defined as the voltage where internal bias lines are still
regulated so that the reference voltage and oscillator frequency remain
constant. Actual minimum input voltage to maintain a regulated output will
depend on output voltage and load current. See Applications Information.
with switching disabled.
Note 7: Switch on resistance is calculated by dividing V to V voltage
IN
SW
by the forced current (4.5A). See Typical Performance Characteristics for
the graph of switch voltage at other currents.
3
LT1959
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input Voltage
with 3.3V Output
Switch Peak Current Limit
Feedback Pin Voltage
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
4.7
4.5
4.3
4.1
3.9
3.7
3.5
3.3
1.215
1.210
1.205
TYPICAL
MINIMUM
0
20
40
60
80
100
1
10
100
1000
–50 –25
0
25
50
75
100 125
DUTY CYCLE (%)
LOAD CURRENT (mA)
TEMPERATURE (°C)
1959 G01
1959 G02
1959 G03
Lockout and Shutdown
Thresholds
Shutdown Supply Current
Shutdown Pin Bias Current
25
20
–500
–400
–300
–200
–8
2.40
2.36
2.32
0.8
V
= 0V
SHDN
AT 0.37V SHUTDOWN THRESHOLD.
AFTER SHUTDOWN, CURRENT
DROPS TO A FEW µA
LOCKOUT
15
10
5
START-UP
AT 2.38V LOCKOUT THRESHOLD
0.4
–4
SHUTDOWN
0
0
0
0
5
10
15
50
TEMPERATURE (°C)
100 125
50
100 125
–50 –25
0
25
75
–50 –25
0
25
75
INPUT VOLTAGE (V)
JUNCTION TEMPERATURE (°C)
1959 G06
1959 G04
1959 G05
Shutdown Supply Current
Error Amplifier Transconductance
Error Amplifier Transconductance
2500
2000
1500
1000
500
70
60
50
40
30
20
10
0
3000
2500
2000
1500
1000
500
200
150
100
50
V
IN
= 10V
PHASE
GAIN
V
C
C
OUT
12pF
R
OUT
200k
–3
V
2 × 10
(
)
FB
ERROR AMPLIFIER EQUIVALENT CIRCUIT
= 50Ω
0
R
LOAD
0
–50
–50
0
25
50
75 100 125
–25
0
0.1
0.2
0.3
0.4
100
1k
10k
100k
1M
10M
JUNCTION TEMPERATURE (°C)
SHUTDOWN VOLTAGE (V)
FREQUENCY (Hz)
1959 G09
1959 G08
1959 G07
4
LT1959
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Load Current
at VOUT = 5V
Frequency Foldback
Switching Frequency
500
400
300
200
100
0
550
540
530
520
510
500
490
480
470
460
450
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
2.8
L= 10µH
L= 5µH
SWITCHING
FREQUENCY
L= 3µH
L= 1.8µH
FEEDBACK
PIN CURRENT
2.6
0
0.4
0.6
0.8
1.0
1.2
0.2
–25
0
25
50
75
125
–50
100
5
13
15
7
9
11
FEEDBACK PIN VOLTAGE (V)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
1959 • G10
1959 G11
1959 G13
Maximum Load Current
at VOUT = 3.3V
BOOST Pin Current
Current Limit Foldback
100
90
80
70
60
50
40
30
20
10
0
4.4
4.2
7
6
5
4
3
2
1
0
DUTY CYCLE = 100%
FOLDBACK
CHARACTERISTICS
L= 10µH
POSSIBLE UNDESIRED
STABLE POINT FOR
CURRENT SOURCE
LOAD*
CURRENT
SOURCE
LOAD
L= 5µH
L= 3µH
4.0
3.8
3.6
3.4
3.2
3.0
RESISTOR
LOAD
MOS LOAD
L= 1.8µH
3
0
1
2
4
5
6
8
10
14
4
12
20
40
60
100
0
80
SWITCH CURRENT (A)
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (%)
1959 G15
1959 G14
1959 G16
VC Pin Shutdown Threshold
Switch Voltage Drop
1.4
1.2
1.0
0.8
0.6
0.4
500
450
400
350
300
250
200
150
100
50
SHUTDOWN
125°C
25°C
–40°C
0
–25
0
25
50
75
125
2
–50
100
0
1
3
4
5
JUNCTION TEMPERATURE (°C)
SWITCH CURRENT (A)
1959 G17
1959 G18
*See “More Than Just Voltage Feedback” in the Applications Information section.
5
LT1959
U
U
U
PIN FUNCTIONS
FB:Thefeedbackpinisusedtosetoutputvoltageusingan
external voltage divider that generates 1.21V at the pin
withthedesiredoutputvoltage. Threeadditionalfunctions
are performed by the FB pin. When the pin voltage drops
below 0.8V, switch current limit is reduced. Below 0.7V
the external sync function is disabled and switching fre-
quency is reduced. See Feedback Pin Function section in
Applications Information for details.
radiate excess EMI. Keep the path between the input
bypass and the GND pin short. The GND pin of the SO-8
package is directly attached to the internal tab. This pin
should be attached to a large copper area to improve
thermal resistance.
V
SW: The switch pin is the emitter of the on-chip power
NPN switch. This pin is driven up to the input pin voltage
during switch on time. Inductor current drives the switch
pin negative during switch off time. Negative voltage is
clampedwiththeexternalcatchdiode. Maximumnegative
switch voltage allowed is –0.8V.
BOOST: The BOOST pin is used to provide a drive voltage,
higher than the input voltage, to the internal bipolar NPN
power switch. Without this added voltage, the typical
switch voltage loss would be about 1.5V. The additional
boost voltage allows the switch to saturate and voltage
loss approximates that of a 0.07Ω FET structure, but with
much smaller die area. Efficiency improves from 75% for
conventionalbipolardesignsto>89%forthesenewparts.
SYNC: (S08 Package Only) The sync pin is used to
synchronize the internal oscillator to an external signal. It
is directly logic compatible and can be driven with any
signal between 10% and 90% duty cycle. The synchroniz-
ing range is equal to initial operating frequency, up to
1MHz. See Synchronizing section in Applications Infor-
mation for details. When not in use, this pin should be
grounded.
VIN: This is the collector of the on-chip power NPN switch.
This pin powers the internal circuitry and internal regula-
tor. At NPN switch on and off, high dI/dt edges occur on
this pin. Keep the external bypass and catch diode close to
this pin. All trace inductance on this path will create a
voltage spike at switch off, adding to the VCE voltage
across the internal NPN.
SHDN: The shutdown pin is used to turn off the regulator
and to reduce input drain current to a few microamperes.
Actually, this pin has two separate thresholds, one at
2.38V to disable switching, and a second at 0.4V to force
complete micropower shutdown. The 2.38V threshold
functions as an accurate undervoltage lockout (UVLO).
This is sometimes used to prevent the regulator from
operating until the input votlage has reached a predeter-
mined level.
GND: The GND pin connection needs consideration for
tworeasons. First, itactsasthereferencefortheregulated
output, so load regulation will suffer if the “ground” end of
the load is not at the same voltage as the GND pin of the
IC. This condition will occur when load current or other
currents flow through metal paths between the GND pin
and the load ground point. Keep the ground path short
between the GND pin and the load and use a ground plane
when possible. The second consideration is EMI caused
by GND pin current spikes. Internal capacitance between
the VSW pin and the GND pin creates very narrow (<10ns)
current spikes in the GND pin. If the GND pin is connected
to system ground with a long metal trace, this trace may
VC: The VC pin is the output of the error amplifier and the
input of the peak switch current comparator. It is normally
used for frequency compensation, but can do double duty
as a current clamp or control loop override. This pin sits
at about 1V for very light loads and 2V at maximum load.
It can be driven to ground to shut off the regulator, but if
driven high, current must be limited to 4mA.
6
LT1959
W
BLOCK DIAGRAM
The LT1959 is a constant frequency, current mode buck
converter. This means that there is an internal clock and
twofeedbackloopsthatcontrolthedutycycleofthepower
switch. In addition to the normal error amplifier, there is a
current sense amplifier that monitors switch current on a
cycle-by-cycle basis. A switch cycle starts with an oscilla-
tor pulse which sets the RS flip-flop to turn the switch on.
When switch current reaches a level set by the inverting
input of the comparator, the flip-flop is reset and the
switch turns off. Output voltage control is obtained by
using the output of the error amplifier to set the switch
current trip point. This technique means that the error
amplifier commands current to be delivered to the output
rather than voltage. A voltage fed system will have low
phase shift up to the resonant frequency of the inductor
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
itmucheasiertofrequencycompensatethefeedbackloop
and also gives much quicker transient response.
High switch efficiency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
than the input voltage, allowing switch to be saturated.
This boosted voltage is generated with an external capaci-
tor and diode. Two comparators are connected to the
shutdownpin. Onehasa2.38Vthresholdforundervoltage
lockout and the second has a 0.4V threshold for complete
shutdown.
0.01Ω
INPUT
+
–
CURRENT
SENSE
AMPLIFIER
INTERNAL
CC
2.9V BIAS
REGULATOR
V
VOLTAGE GAIN = 20
SLOPE COMP
BOOST
Σ
0.9V
500kHz
OSCILLATOR
S
R
SYNC
Q1
POWER
SWITCH
R
DRIVER
CIRCUITRY
CURRENT
COMPARATOR
S
FLIP-FLOP
SHUTDOWN
COMPARATOR
+
–
V
SW
0.4V
PARASITIC DIODES
FREQUENCY
SHIFT CIRCUIT
SHDN
DO NOT FORWARD BIAS
3.5µA
FOLDBACK
CURRENT
LIMIT
Q2
CLAMP
–
FB
LOCKOUT
COMPARATOR
+
ERROR
V
C
AMPLIFIER
2.38V
1.21V
g
m
= 2000µMho
GND
1959 BD
Figure 1. Block Diagram
7
LT1959
U
W U U
APPLICATIONS INFORMATION
FEEDBACK PIN FUNCTIONS
More Than Just Voltage Feedback
The feedback (FB) pin on the LT1959 is used to set output
voltage and provide several overload protection features.
The first part of this section deals with selecting resistors
to set output voltage and the remaining part talks about
foldback frequency and current limiting created by the FB
pin. Please read both parts before committing to a final
design.
The feedback pin is used for more than just output voltage
sensing. It also reduces switching frequency and current
limit when output voltage is very low (see the Frequency
Foldback graph in Typical Performance Characteristics).
ThisisdonetocontrolpowerdissipationinboththeICand
in the external diode and inductor during short-circuit
conditions. A shorted output requires the switching regu-
lator to operate at very low duty cycles, and the average
current through the diode and inductor is equal to the
short-circuitcurrentlimitoftheswitch(typically6Aforthe
LT1959, foldingbacktolessthan3A). Minimumswitchon
time limitations would prevent the switcher from attaining
a sufficiently low duty cycle if switching frequency were
maintained at 500kHz, so frequency is reduced by about
5:1 when the feedback pin voltage drops below 0.5V (see
FrequencyFoldbackgraph). Thisdoesnotaffectoperation
with normal load conditions; one simply sees a gear shift
in switching frequency during start-up as the output
voltage rises.
The suggested value for the output divider resistor (see
Figure 2) from FB to ground (R2) is 2.5k or less, and a
formula for R1 is shown below. The output voltage error
caused by ignoring the input bias current on the FB pin is
less than 0.1% with R2 = 2.5k. Please read the following
if divider resistors are increased above the suggested
values.
R2 VOUT −1.21
(
)
R1=
1.21
V
LT1959
SW
TO FREQUENCY
SHIFTING
In addition to lower switching frequency, the LT1959 also
operates at lower switch current limit when the feedback
pin voltage drops below 0.8V. Q2 in Figure 2 performs this
function by clamping the VC pin to a voltage less than its
normal 2.1V upper clamp level. This foldback current limit
greatly reduces power dissipation in the IC, diode and
inductorduringshort-circuitconditions.Externalsynchro-
nization is also disabled to prevent interference with
foldback operation. Again, it is nearly transparent to the
userundernormalloadconditions.Theonlyloadsthatmay
be affected are current source loads which maintain full
loadcurrentwithoutputvoltagelessthan50%offinalvalue.
In these rare situations the feedback pin can be clamped
above 0.75V with an external diode to defeat foldback cur-
rent limit. Caution: clamping the feedback pin means that
frequency shifting will also be defeated, so a combination
of high input voltage and dead shorted output may cause
the LT1959 to lose control of current limit.
OUTPUT
5V
1V
Q1
ERROR
AMPLIFIER
R1
1.21V
+
–
R3
1k
R4
1k
FB
+
R5
5k
Q2
R2
2.5k
TO SYNC CIRCUIT
1959 F02
V
GND
C
Figure 2. Frequency and Current Limit Foldback
8
LT1959
U
W U U
APPLICATIONS INFORMATION
finite inductor size, maximum load current is reduced by
one-half peak-to-peak inductor current. The following
formula assumes continuous mode operation, implying
that the term on the right is less than one-half of IP.
The internal circuitry which forces reduced switching
frequency also causes current to flow out of the feedback
pin when output voltage is low. The equivalent circuitry is
shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 0.7V, Q1 begins to
conduct current and reduces frequency at the rate of
approximately 2kHz/µA. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance must be low enough
to pull 150µA out of the FB pin with 0.3V on the pin (RDIV
≤ 2k). The net result is that reductions in frequency and
current limit are affected by output voltage divider imped-
ance. Although divider impedance is not critical, caution
should be used if resistors are increased beyond the
suggested values and short-circuit conditions will occur
with high input voltage. High frequency pickup will
increase and the protection accorded by frequency and
current foldback will decrease.
V
V − V
IN OUT
(
OUT)(
)
IOUT(MAX)
Continuous Mode
=
IP −
2 L f V
( )( )( )
IN
For the conditions above and L = 3.3µH,
5 8 − 5
( )(
)
IOUT MAX) = 4.3 −
(
2 3.3 •10−6 500•103
8
( )
=4.3 − 0.57= 3.73A
AtVIN =15V, dutycycleis33%, soIP isjustequaltoafixed
4.5A, and IOUT(MAX) is equal to:
MAXIMUM OUTPUT LOAD CURRENT
Maximum load current for a buck converter is limited by
the maximum switch current rating (IP) of the LT1959.
This current rating is 4.5A up to 50% duty cycle (DC),
decreasing to 3.7A at 80% duty cycle. This is shown
graphically in Typical Performance Characteristics and as
shown in the formula below:
5 15 − 5
( )(
)
4.5 −
2 3.3 •10−6 500•103 15
( )
= 4.5 −1.01= 3.49A
Note that there is less load current available at the higher
input voltage because inductor ripple current increases.
This is not always the case. Certain combinations of
inductor value and input voltage range may yield lower
available load current at the lowest input voltage due to
reduced peak switch current at high duty cycles. If load
current is close to the maximum available, please check
maximum available current at both input voltage ex-
tremes. To calculate actual peak switch current with a
given set of conditions, use:
IP = 4.5A for DC ≤ 50%
IP = 3.21 + 5.95(DC) – 6.75(DC)2 for 50% < DC < 90%
DC = Duty cycle = VOUT/VIN
Example: with VOUT = 5V, VIN = 8V; DC = 5/8 = 0.625, and;
ISW(MAX) = 3.21 + 5.95(0.625) – 6.75(0.625)2 = 4.3A
Current rating decreases with duty cycle because the
LT1959 has internal slope compensation to prevent cur-
rent mode subharmonic switching. For more details, read
Application Note 19. The LT1959 is a little unusual in this
regardbecauseithasnonlinearslopecompensationwhich
gives better compensation with less reduction in current
limit.
VOUT V − V
(
)
IN
OUT
ISW PEAK =IOUT
+
(
)
2 L f V
( )( )( )
IN
Maximum load current would be equal to maximum
switch current for an infinitely large inductor, but with
9
LT1959
U
W U U
APPLICATIONS INFORMATION
CHOOSING THE INDUCTOR AND OUTPUT CAPACITOR
saturate abruptly. Other core materials fall in between
somewhere. The following formula assumes continu-
ous mode of operation, but it errs only slightly on the
high side for discontinuous mode, so it can be used for
all conditions.
For most applications the output inductor will fall in the
range of 3µH to 20µH. Lower values are chosen to reduce
physical size of the inductor. Higher values allow more
output current because they reduce peak current seen by
the LT1959 switch, which has a 4.5A limit. Higher values
also reduce output ripple voltage, and reduce core loss.
GraphsintheTypicalPerformanceCharacteristicssection
show maximum output load current versus inductor size
and input voltage.
VOUT V − V
(
)
IN
OUT
IPEAK =IOUT +
2 f L V
( )( )( )
IN
VIN = Maximum input voltage
f = Switching frequency, 500kHz
When choosing an inductor you might have to consider
maximum load current, core and copper losses, allowable
component height, output voltage ripple, EMI, fault cur-
rent in the inductor, saturation, and of course, cost. The
following procedure is suggested as a way of handling
thesesomewhatcomplicatedandconflictingrequirements.
3. Decide if the design can tolerate an “open” core geom-
etry like a rod or barrel, which have high magnetic field
radiation, orwhetheritneedsaclosedcorelikeatoroid
to prevent EMI problems. One would not want an open
core next to a magnetic storage media, for instance!
Thisisatoughdecisionbecausetherodsorbarrelsare
temptingly cheap and small and there are no helpful
guidelines to calculate when the magnetic field radia-
tion will be a problem.
1. Choose a value in microhenries from the graphs of
maximumloadcurrentandcoreloss.Choosingasmall
inductor with lighter loads may result in discontinuous
mode of operation, but the LT1959 is designed to work
well in either mode. Keep in mind that lower core loss
means higher cost, at least for closed core geometries
like toroids. The core loss graphs show absolute loss
for a 3.3V output, so actual percent losses must be
calculated for each situation.
4. Start shopping for an inductor (see representative
surface mount units in Table 2) which meets the
requirements of core shape, peak current (to avoid
saturation),averagecurrent(tolimitheating),andfault
current(iftheinductorgetstoohot, wireinsulationwill
melt and cause turn-to-turn shorts). Keep in mind that
allgoodthingslikehighefficiency,lowprofile,andhigh
temperature operation will increase cost, sometimes
dramatically. Get a quote on the cheapest unit first to
calibrate yourself on price, then ask for what you really
want.
Assume that the average inductor current is equal to
load current and decide whether or not the inductor
must withstand continuous fault conditions. If maxi-
mum load current is 0.5A, for instance, a 0.5A inductor
may not survive a continuous 4.5A overload condition.
Dead shorts will actually be more gentle on the induc-
tor because the LT1959 has foldback current limiting.
5. After making an initial choice, consider the secondary
things like output voltage ripple, second sourcing, etc.
Use the experts in the Linear Technology’s applica-
tions department if you feel uncertain about the final
choice. They have experience with a wide range of
inductor types and can tell you about the latest devel-
opments in low profile, surface mounting, etc.
2. Calculate peak inductor current at full load current to
ensure that the inductor will not saturate. Peak current
can be significantly higher than output current, espe-
cially with smaller inductors and lighter loads, so don’t
omit this step. Powdered iron cores are forgiving
because they saturate softly, whereas ferrite cores
10
LT1959
U
W U U
APPLICATIONS INFORMATION
Table 2
range for typical LT1959 applications is 0.05Ω to 0.2Ω. A
typical output capacitor is an AVX type TPS, 100µF at 10V,
with a guaranteed ESR less than 0.1Ω. This is a “D” size
surface mount solid tantalum capacitor. TPS capacitors
are specially constructed and tested for low ESR, so they
give the lowest ESR for a given volume. The value in
microfarads is not particularly critical, and values from
22µF to greater than 500µF work well, but you cannot
cheat mother nature on ESR. If you find a tiny 22µF solid
tantalumcapacitor, itwillhavehighESR, andoutputripple
voltage will be terrible. Table 3 shows some typical solid
tantalum surface mount capacitors.
SERIES
RESIS-
CORE
MATER- HEIGHT
IAL
VENDOR/
PART NO.
VALUE
DC
CORE
(
µ
H) (Amps) TYPE TANCE(
Ω
)
(mm)
Coiltronics
CTX2-1
2
4.1
4.4
3.5
3.4
4.6
3.3
Tor
Tor
Tor
Tor
Tor
Tor
0.011
KMµ
KMµ
KMµ
52
4.2
6.4
6.4
4.2
4.8
6.4
CTX5-4
5
8
2
2
5
0.019
0.020
0.014
0.012
0.027
CTX8-4
CTX2-1P
CTX2-3P
52
CTX5-4P
52
Sumida
CDRH125
CDRH125
CDRH125
CDRH125
Coilcraft
10
12
15
18
4.0
3.5
3.3
3.0
SC
SC
SC
SC
0.025
0.027
0.030
0.034
Fer
Fer
Fer
Fer
6
6
6
6
Table 3. Surface Mount Solid Tantalum Capacitor ESR
and Ripple Current
E Case Size
ESR (Max.,
Ω
)
Ripple Current (A)
0.7 to 1.1
0.4
AVX TPS, Sprague 593D
AVX TAJ
0.1 to 0.3
0.7 to 0.9
DT3316-222
DT3316-332
DT3316-472
Pulse
2.2
3.3
4.7
5
5
3
SC
SC
SC
0.035
0.040
0.045
Fer
Fer
Fer
5.1
5.1
5.1
D Case Size
AVX TPS, Sprague 593D
C Case Size
0.1 to 0.3
0.2 (typ)
0.7 to 1.1
0.5 (typ)
AVX TPS
PE-53650
PE-53651
PE-53652
PE-53653
Dale
4
5
4.8
5.4
5.5
5.1
Tor
Tor
Tor
Tor
0.017
0.018
0.022
0.032
52
52
52
52
9.1
9.1
10
Many engineers have heard that solid tantalum capacitors
are prone to failure if they undergo high surge currents.
This is historically true, and type TPS capacitors are
speciallytestedforsurgecapability,butsurgeruggedness
is not a critical issue with the output capacitor. Solid
tantalum capacitors fail during very high turn-on surges,
which do not occur at the output of regulators. High
discharge surges, such as when the regulator output is
dead shorted, do not harm the capacitors.
9
16
10
IHSM-4825
IHSM-4825
IHSM-5832
IHSM-5832
IHSM-7832
Tor = Toroid
2.7
4.7
10
5.1
4.0
4.3
3.5
3.8
Open
Open
Open
Open
Open
0.034
0.047
0.053
0.078
0.054
Fer
Fer
Fer
Fer
Fer
5.6
5.6
7.1
7.1
7.1
15
22
Unlike the input capacitor, RMS ripple current in the
output capacitor is normally low enough that ripple cur-
rent rating is not an issue. The current waveform is
triangular with a typical value of 200mARMS. The formula
to calculate this is:
SC = Semiclosed geometry
Fer = Ferrite core material
52 = Type 52 powdered iron core material
KMµ = Kool Mµ®
Output Capacitor
Output Capacitor Ripple Current (RMS):
The output capacitor is normally chosen by its Effective
Series Resistance (ESR), because this is what determines
output ripple voltage. At 500kHz, any polarized capacitor
is essentially resistive. To get low ESR takes volume, so
physically smaller capacitors have high ESR. The ESR
0.29 V
V − V
IN OUT
(
OUT)(
)
IRIPPLE RMS
=
(
)
L f V
( )( )( )
IN
Kool Mµ is a registered trademark of Magnetics, Inc.
11
LT1959
U
W U U
APPLICATIONS INFORMATION
Ceramic Capacitors
5 10 − 5
( )(
)
IP-P
=
= 0.5A
Higher value, lower cost ceramic capacitors are now
available in smaller case sizes. These are ideal for input
bypassingbecauseoftheirhighrippleratingandtolerance
to turn-on surges. As output capacitors, caution must be
used. Solid tantalum capacitor’s ESR generates a loop
“zero” at 5kHz to 50kHz that is beneficial in giving accept-
able loop phase margin. Ceramic capacitors remain ca-
pacitive to beyond 300kHz and usually resonate with their
ESL before ESR becomes effective. When using ceramic
output capacitors, the loop compensation pole frequency
must be reduced by a typical factor of 10.
10 10 •10−6 500 •103
( )
dI
10
Σ
=
= 106
10 •10−6
dt
VRIPPLE = 0.5A 0.1 + 10 •10−9 106
(
)(
)
= 0.05 + 0.01= 60mVP-P
VOUT AT IOUT = 1A
20mV/DIV
OUTPUT RIPPLE VOLTAGE
VOUT AT IOUT = 50mA
Figure 3 shows a typical output ripple voltage waveform
for the LT1959. Ripple voltage is determined by the high
frequency impedance of the output capacitor, and ripple
current through the inductor. Peak-to-peak ripple current
through the inductor into the output capacitor is:
INDUCTOR CURRENT
AT IOUT = 1A
0.5A/DIV
INDUCTOR CURRENT
AT IOUT = 50mA
0.5µs/DIV
1374 F03
Figure 3. LT1959 Ripple Voltage Waveform
V
V − V
IN OUT
(
OUT)(
)
IP-P
=
V
L f
( )( )( )
IN
CATCH DIODE
The suggested catch diode (D1) is a 1N5821 Schottky, or
its Motorola equivalent, MBR330. It is rated at 3A average
forward current and 30V reverse voltage. Typical forward
voltage is 0.5V at 3A. The diode conducts current only
during switch off time. Peak reverse voltage is equal to
regulatorinputvoltage.Averageforwardcurrentinnormal
operation can be calculated from:
For high frequency switchers, the sum of ripple current
slew rates may also be relevant and can be calculated
from:
dI
dt
V
IN
L
Σ
=
Peak-to-peak output ripple voltage is the sum of a triwave
created by peak-to-peak ripple current times ESR, and a
square wave created by parasitic inductance (ESL) and
ripple current slew rate. Capacitive reactance is assumed
to be small compared to ESR or ESL.
IOUT V − V
(
)
IN
OUT
ID(AVG
=
)
V
IN
This formula will not yield values higher than 3A with
maximumloadcurrentof4.25Aunlesstheratioofinputto
output voltage exceeds 3.4:1. The only reason to consider
a larger diode is the worst-case condition of a high input
voltageandoverloaded(notshorted)output. Undershort-
circuit conditions, foldback current limit will reduce diode
current to less than 2.6A, but if the output is overloaded
dI
dt
VRIPPLE = I
ESR + ESL Σ
(
P-P)(
) (
)
Example: withVIN =10V,VOUT =5V,L=10µH,ESR=0.1Ω,
ESL = 10nH:
12
LT1959
U
W U U
APPLICATIONS INFORMATION
anddoesnotfalltolessthan1/3ofnominaloutputvoltage,
foldback will not take effect. With the overloaded condi-
tion, output current will increase to a typical value of 5.7A,
determined by peak switch current limit of 6A. With
VIN = 15V, VOUT = 4V (5V overloaded) and IOUT = 5.7A:
I
/50 V
/ V
(
)(
)
OUT
OUT IN
C
=
MIN
f V
− 2.8V
( )(
)
OUT
f = Switching frequency
OUT = Regulated output voltage
VIN = Minimum input voltage
V
5.7 15 − 4
(
)
I
=
= 4.18A
D AVG
(
)
This formula can yield capacitor values substantially less
than 0.27µF, but it should be used with caution since it
does not take into account secondary factors such as
capacitor series resistance, capacitance shift with tem-
perature and output overload.
15
This is safe for short periods of time, but it would be
prudent to check with the diode manufacturer if continu-
ous operation under these conditions must be tolerated.
BOOST PIN CONSIDERATIONS
SHUTDOWN FUNCTION AND UNDERVOLTAGE
LOCKOUT
Formostapplications, theboostcomponentsarea0.27µF
capacitor and a 1N914 or 1N4148 diode. The anode is
connected to the regulated output voltage and this gener-
ates a voltage across the boost capacitor nearly identical
to the regulated output. In certain applications, the anode
may instead be connected to the unregulated input volt-
age. This could be necessary if the regulated output
voltage is very low (< 3V) or if the input voltage is less than
5V. Efficiencyisnotaffectedbythecapacitorvalue, butthe
capacitor should have an ESR of less than 1Ω to ensure
that it can be recharged fully under the worst-case condi-
tion of minimum input voltage. Almost any type of film or
ceramic capacitor will work fine.
Figure 4 shows how to add undervoltage lockout (UVLO)
to the LT1959. Typically, ULVO is used in situations where
the input supply is current limited, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
loadtothesourceandcancausethesourcetocurrentlimit
or latch low under low source voltage conditions. ULVO
prevents the regulator from operating at source voltages
where these problems might occur.
Threshold voltage for lockout is about 2.38V, slightly less
than the internal 2.42V reference voltage. A 3.5µA bias
current flows out of the pin at threshold. This internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shut-
down current is not an issue, the error due to this current
can be minimized by making RLO 10k or less. If shutdown
currentisanissue, RLO canberaisedto100k, buttheerror
due to initial bias current and changes with temperature
should be considered.
For nearly all applications, a 0.27µF boost capacitor works
just fine, but for the curious, more details are provided
here. The size of the boost capacitor is determined by
switch drive current requirements. During switch on time,
draincurrentonthecapacitorisapproximatelyIOUT/50.At
peakloadcurrentof4.25A,thisgivesatotaldrainof85mA.
Capacitor ripple voltage is equal to the product of on time
and drain current divided by capacitor value;
∆V = (tON)(85mA/C). To keep capacitor ripple voltage to
less than 0.6V (a slightly arbitrary number) at the worst-
case condition of tON = 1.8µs, the capacitor needs to be
0.27µF. Boost capacitor ripple voltage is not a critical
parameter, but if the minimum voltage across the capaci-
tor drops to less than 3V, the power switch may not
saturate fully and efficiency will drop. An approximate
formula for absolute minimum capacitor value is:
RLO = 10k to 100k 25k suggested
(
)
RLO V − 2.38V
(
)
IN
RHI =
2.38V −RLO 3.5µA
(
)
VIN = Minimum input voltage
13
LT1959
U
W U U
APPLICATIONS INFORMATION
R
FB
LT1959
OUTPUT
V
SW
IN
INPUT
2.38V
LOCKOUT
R
HI
3.5µA
+
SHDN
TOTAL
SHUTDOWN
R
LO
C1
0.4V
GND
1959 F04
Figure 4. Undervoltage Lockout
Keep the connections from the resistors to the shutdown
pin short and make sure that interplane or surface capaci-
tance to the switching nodes are minimized. If high
resistor values are used, the shutdown pin should be
bypassed with a 1000pF capacitor to prevent coupling
problems from the switch node. If hysteresis is desired in
the undervoltage lockout point, a resistor RFB can be
added to the output node. Resistor values can be calcu-
lated from:
25k − 2.38 1.5/5 +1 + 1.5
6
(
)
[
]
R
R
=
HI
2.38 − 25k 3.5µA
(
)
25k 5.2
(
)
=
= 48k
2.29
= 48k 5/1.5 =160k
(
)
FB
SWITCH NODE CONSIDERATIONS
RLO V − 2.38 ∆V/V +1 + ∆V
(
)
IN
OUT
[
]
For maximum efficiency, switch rise and fall times are
made as short as possible. To prevent radiation and high
frequency resonance problems, proper layout of the com-
ponents connected to the switch node is essential. B field
(magnetic) radiation is minimized by keeping catch diode,
switch pin, and input bypass capacitor leads as short as
possible. E field radiation is kept low by minimizing the
length and area of all traces connected to the switch pin
and BOOST pin. A ground plane should always be used
under the switcher circuitry to prevent interplane cou-
pling. A suggested layout for the critical components is
shown in Figure 5. Note that the feedback resistors and
compensation components are kept as far as possible
RHI =
2.38 −R2 3.5µA
(
)
R = R
V
/
∆V
(
HI)(
)
FB
OUT
25k suggested for RLO
VIN = Input voltage at which switching stops as input
voltage descends to trip level
∆V = Hysteresis in input voltage level
Example: output voltage is 5V, switching is to stop if input
voltage drops below 6V and should not restart unless
input rises back to 7.5V. ∆V is therefore 1.5V and VIN = 6V.
Let RLO = 25k.
14
LT1959
U
W U U
APPLICATIONS INFORMATION
from the switch node. Also note that the high current
groundpathofthecatchdiodeandinputcapacitorarekept
very short and separate from the analog ground line.
the only one containing nanosecond rise and fall times. If
you follow this path on the PC layout, you will see that it is
irreducibly short. If you move the diode or input capacitor
away from the LT1959, get your resumé in order. The
other paths contain only some combination of DC and
500kHz triwave, so are much less critical.
Thehighspeedswitchingcurrentpathisshownschemati-
cally in Figure 6. Minimum lead length in this path is
essential to ensure clean switching and low EMI. The path
including the switch, catch diode, and input capacitor is
CONNECT TO
GROUND PLANE
MINIMIZE LT1959 C3, D1 LOOP
V
IN
C3
D1
C5
GND
C6
V
OUT
1
TAKE OUTPUT
DIRECTLY FROM
END OF OUTPUT
CAPACITOR
GND
L1
U1
C1
R3
R2
D2
CONNECT TO
GROUND PLANE
PLACE FEEDTHROUGHS
AROUND GND PIN FOR GOOD
THERMAL CONDUCTIVITY
C4
KELVIN SENSE
KEEP FB AND V COMPONENTS
C
AWAY FROM HIGH FREQUENCY,
HIGH CURRENT COMPONENTS
V
OUT
1959 F05
Figure 5. Suggested Layout (Topside Only Shown)
SWITCH NODE
L1
5V
HIGH
FREQUENCY
CIRCULATING
PATH
V
IN
LOAD
1959 F06
Figure 6. High Speed Switching Path
15
LT1959
U
W U U
APPLICATIONS INFORMATION
PARASITIC RESONANCE
mitigates this problem, but negative voltages over 1V
lasting longer than 10ns should be avoided. Note that
100MHz oscilloscopes are barely fast enough to see the
details of the falling edge overshoot in Figure 7.
Resonance or “ringing” may sometimes be seen on the
switch node (see Figure 7). Very high frequency ringing
following switch rise time is caused by switch/diode/input
capacitor lead inductance and diode capacitance. Schot-
tky diodes have very high “Q” junction capacitance that
can ring for many cycles when excited at high frequency.
Iftotalleadlengthfortheinputcapacitor, diodeandswitch
path is 1 inch, the inductance will be approximately 25nH.
At switch off, this will produce a spike across the NPN
output device in addition to the input voltage. At higher
currents this spike can be in the order of 10V to 20V or
higher with a poor layout, potentially exceeding the abso-
lute max switch voltage. The path around switch, catch
diode and input capacitor must be kept as short as
possibletoensurereliableoperation.Whenlookingatthis,
a >100MHz oscilloscope must be used, and waveforms
should be observed on the leads of the package. This
switch off spike will also cause the SW node to go below
ground. The LT1959 has special circuitry inside which
A second, much lower frequency ringing is seen during
switch off time if load current is low enough to allow the
inductor current to fall to zero during part of the switch off
time (see Figure 8). Switch and diode capacitance reso-
nate with the inductor to form damped ringing at 1MHz to
10 MHz. This ringing is not harmful to the regulator and it
hasnotbeenshowntocontributesignificantlytoEMI. Any
attempt to damp it with a resistive snubber will degrade
efficiency.
INPUT BYPASSING AND VOLTAGE RANGE
Input Bypass Capacitor
Step-down converters draw current from the input supply
in pulses. The average height of these pulses is equal to
load current, and the duty cycle is equal to VOUT/VIN. Rise
and fall time of the current is very fast. A local bypass
capacitor across the input supply is necessary to ensure
proper operation of the regulator and minimize the ripple
current fed back into the input supply. The capacitor also
forces switching current to flow in a tight local loop,
minimizing EMI.
RISE AND FALL
WAVEFORMS ARE
SUPERIMPOSED
(PULSE WIDTH IS
NOT 120ns)
5V/DIV
Do not cheat on the ripple current rating of the Input
bypass capacitor, but also don’t get hung up on the value
in microfarads. The input capacitor is intended to absorb
all the switching current ripple, which can have an RMS
value as high as one half of load current. Ripple current
ratings on the capacitor must be observed to ensure
reliable operation. In many cases it is necessary to parallel
two capacitors to obtain the required ripple rating. Both
capacitors must be of the same value and manufacturer to
guaranteepowersharing. Theactualvalueofthecapacitor
in microfarads is not particularly important because at
500kHz, any value above 5µF is essentially resistive. RMS
ripple current rating is the critical parameter. Actual RMS
current can be calculated from:
20ns/DIV
1375/76 F07
Figure 7. Switch Node Resonance
5V/DIV
SWITCH NODE
VOLTAGE
INDUCTOR
CURRENT
100mA/DIV
20ns/DIV
1375/76 F11
2
0.5µs/DIV
1375/76 F08
IRIPPLE RMS =IOUT VOUT V − V
/V
IN
(
)
IN
OUT
(
)
Figure 8. Discontinuous Mode Ringing
16
LT1959
U
W U U
APPLICATIONS INFORMATION
The term inside the radical has a maximum value of 0.5
when input voltage is twice output, and stays near 0.5 for
a relatively wide range of input voltages. It is common
practice therefore to simply use the worst-case value and
assumethatRMSripplecurrentisonehalfofloadcurrent.
At maximum output current of 4.5A for the LT1959, the
input bypass capacitor should be rated at 2.25A ripple
current. Note however, that there are many secondary
considerations in choosing the final ripple current rating.
These include ambient temperature, average versus peak
load current, equipment operating schedule, and required
product lifetime. For more details, see Application Notes
19 and 46, and Design Note 95.
normallyaproblem, butatverylowinputvoltagetheymay
cause erratic operation because the input voltage drops
below the minimum specification. Problems can also
occur if the input-to-output voltage differential is near
minimum. The amplitude of these dips is normally a
function of capacitor ESR and ESL because the capacitive
reactance is small compared to these terms. ESR tends to
be the dominate term and is inversely related to physical
capacitor size within a given capacitor type.
SYNCHRONIZING
The SYNC pin, is used to synchronize the internal oscilla-
tor to an external signal. The SYNC input must pass from
a logic level low, through the maximum synchronization
threshold with a duty cycle between 10% and 90%. The
input can be driven directly from a logic level output. The
synchronizing range is equal to initial operating frequency
up to 1MHz. This means that minimum practical sync
frequency is equal to the worst-case high self-oscillating
frequency(560kHz),notthetypicaloperatingfrequencyof
500kHz. Caution should be used when synchronizing
above 700kHz because at higher sync frequencies the
amplitude of the internal slope compensation used to
prevent subharmonic switching is reduced. This type of
subharmonic switching only occurs at input voltages less
than twice output voltage. Higher inductor values will tend
to eliminate this problem. See Frequency Compensation
section for a discussion of an entirely different cause of
subharmonic switching before assuming that the cause is
insufficient slope compensation. Application Note 19 has
more details on the theory of slope compensation.
Input Capacitor Type
Some caution must be used when selecting the type of
capacitor used at the input to regulators. Aluminum
electrolytics are lowest cost, but are physically large to
achieve adequate ripple current rating, and size con-
straints (especially height), may preclude their use.
Ceramic capacitors are now available in larger values, and
their high ripple current and voltage rating make them
ideal for input bypassing. Cost is fairly high and footprint
may also be somewhat large. Solid tantalum capacitors
would be a good choice, except that they have a history of
occasionalspectacularfailureswhentheyaresubjectedto
large current surges during power-up. The capacitors can
short and then burn with a brilliant white light and lots of
nasty smoke. This phenomenon occurs in only a small
percentage of units, but it has led some OEM companies
to forbid their use in high surge applications. The input
bypass capacitor of regulators can see these high surges
when a battery or high capacitance source is connected.
Several manufacturers have developed a line of solid
tantalum capacitors specially tested for surge capability
(AVX TPS series for instance, see Table 3), but even these
units may fail if the input voltage surge approaches the
maximum voltage rating of the capacitor. AVX recom-
mends derating capacitor voltage by 2:1 for high surge
applications.
At power-up, when VC is being clamped by the FB pin (see
Figure2,Q2),thesyncfunctionisdisabled.Thisallowsthe
frequency foldback to operate in the shorted output con-
dition. During normal operation, switching frequency is
controlledbytheinternaloscillatoruntiltheFBpinreaches
0.7V, after which the SYNC pin becomes operational.
THERMAL CALCULATIONS
Power dissipation in the LT1959 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following
Larger capacitors may be necessary when the input volt-
age is very close to the minimum specified on the data
sheet. Small voltage dips during switch on time are not
17
LT1959
U
W U U
APPLICATIONS INFORMATION
formulas show how to calculate each of these losses.
These formulas assume continuous mode operation, so
they should not be used for calculating efficiency at light
load currents.
TJ = TA + θJA (PTOT)
With the SO-8 package (θJA = 80°C/W), at an ambient
temperature of 50°C,
TJ = 50 + 80 (0.87) = 120°C
Switch loss:
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
2
R
I
V
OUT
(
) (
)
SW OUT
P
=
+ 24ns I
V
f
(
)( )( )
SW
OUT IN
V
IN
Boost current loss:
FREQUENCY COMPENSATION
2
Loop frequency compensation of switching regulators
can be a rather complicated problem because the reactive
components used to achieve high efficiency also
introduce multiple poles into the feedback loop. The
inductor and output capacitor on a conventional step-
down converter actually form a resonant tank circuit that
can exhibit peaking and a rapid 180° phase shift at the
resonant frequency. By contrast, the LT1959 uses a “cur-
rent mode” architecture to help alleviate phase shift cre-
ated by the inductor. The basic connections are shown in
Figure9.Figure10showsaBodeplotofthephaseandgain
of the power section of the LT1959, measured from the VC
pin to the output. Gain is set by the 5.3A/V transconduc-
tance of the LT1959 power section and the effective
complex impedance from output to ground. Gain rolls off
smoothly above the 600Hz pole frequency set by the
100µF output capacitor. Phase drop is limited to about
70°. Phase recovers and gain levels off at the zero fre-
quency (≈16kHz) set by capacitor ESR (0.1Ω).
V
I
/50
(
)
OUT OUT
P
=
BOOST
V
IN
Quiescent current loss:
2
VOUT 0.002
(
)
P =V 0.001 + V
0.005 +
(
(
)
)
Q
IN
OUT
V
IN
RSW = Switch resistance (≈0.07)
24ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with VIN = 10V, VOUT = 5V and IOUT = 3A:
2
0.07 3 5
(
)( ) ( )
PSW
=
+ 24 •10−9 3 10 500•103
( )( )
10
= 0.32 + 0.36 = 0.68W
2
5 3/50
( ) (
)
PBOOST
=
= 0.15W
LT1959
10
CURRENT MODE
POWER STAGE
V
SW
FB
2
OUTPUT
ERROR
5 0.002
g
= 5.3A/V
m
( ) (
)
AMPLIFIER
R1
R2
P =10 0.001 +5 0.005 +
= 0.04W
(
)
(
)
Q
–
+
10
ESR
C1
Total power dissipation is 0.68 + 0.15 + 0.04 = 0.87W.
1.21V
+
V
C
GND
Thermal resistance for LT1959 package is influenced by
the presence of internal or backside planes. With a full
plane under the SO package, thermal resistance will be
about 80°C/W. No plane will increase resistance to about
120°C/W. To calculate die temperature, use the proper
thermal resistance number for the desired package and
add in worst-case ambient temperature:
R
C
C
F
C
C
1959 F09
Figure 9. Model for Loop Response
18
LT1959
U
W U U
APPLICATIONS INFORMATION
40
40
3000
2500
2000
1500
1000
500
200
V
V
I
= 10V
IN
OUT
OUT
= 5V
= 2A
PHASE
GAIN
GAIN
150
100
50
20
0
0
–40
–80
–120
V
C
C
R
OUT
12pF
OUT
200k
V
2 × 10–3
(
)
FB
PHASE
–20
–40
ERROR AMPLIFIER EQUIVALENT CIRCUIT
= 50Ω
0
R
LOAD
1k
–50
10
100
1k
10k
100k
1M
100
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
1959 F10
1595 F11
Figure 10. Response from VC Pin to Output
Figure 11. Error Amplifier Gain and Phase
Erroramplifiertransconductancephaseandgainareshown
in Figure 11. The error amplifier can be modeled as a
transconductance of 2000µMho, with an output imped-
ance of 200kΩ in parallel with 12pF. In all practical
applications, the compensation network from VC pin to
ground has a much lower impedance than the output
impedance of the amplifier at frequencies above 500Hz.
This means that the error amplifier characteristics them-
selvesdonotcontributeexcessphaseshifttotheloop,and
the phase/gain characteristics of the error amplifier sec-
tion are completely controlled by the external compensa-
tion network.
80
60
200
150
100
50
GAIN
40
PHASE
20
V
V
C
C
= 10V
OUT
OUT
IN
0
0
= 5V, I
= 2A
= 100µF, 10V, AVX TPS
= 1.5nF, R = 0, L = 10µH
OUT
C
C
–20
–50
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
1595 F12
In Figure 12, full loop phase/gain characteristics are
shown with a compensation capacitor of 1.5nF, giving the
erroramplifierapoleat530Hz,withphaserollingoffto90°
and staying there. The overall loop has a gain of 74dB at
low frequency, rolling off to unity-gain at 100kHz. Phase
showsatwo-polecharacteristicuntiltheESRoftheoutput
capacitor brings it back above 10kHz. Phase margin is
about 60° at unity-gain.
Figure 12. Overall Loop Characteristics
What About a Resistor in the Compensation Network?
It is common practice in switching regulator design to add
a “zero” to the error amplifier compensation to increase
loop phase margin. This zero is created in the external
network in the form of a resistor (RC) in series with the
compensation capacitor. Increasing the size of this resis-
tor generally creates better and better loop stability, but
there are two limitations on its value. First, the combina-
tion of output capacitor ESR and a large value for RC may
cause loop gain to stop rolling off altogether, creating a
gain margin problem. An approximate formula for RC
where gain margin falls to zero is:
Analog experts will note that around 4.4kHz, phase dips
very close to the zero phase margin line. This is typical of
switching regulators, especially those that operate over a
wide range of loads. This region of low phase is not a
problem as long as it does not occur near unity-gain. In
practice, the variability of output capacitor ESR tends to
dominate all other effects with respect to loop response.
Variations in ESR will cause unity-gain to move around,
but at the same time phase moves with it so that adequate
phase margin is maintained over a very wide range of ESR
(≥ ±3:1).
VOUT
RC Loop Gain =1 =
(
)
GMP GMA ESR 1.21
(
)(
)(
)(
)
19
LT1959
U
W U U
APPLICATIONS INFORMATION
GMP = Transconductance of power stage = 5.3A/V
GMA = Error amplifier transconductance = 2(10–3)
ESR = Output capacitor ESR
cases, the resistor may have to be larger to get acceptable
phaseresponse, andsomemeansmustbeusedtocontrol
ripple voltage at the VC pin. The suggested way to do this
istoaddacapacitor(CF)inparallelwiththeRC/CC network
on the VC pin. Pole frequency for this capacitor is typically
set at one-fifth of switching frequency so that it provides
significant attenuation of switching ripple, but does not
addunacceptablephaseshiftatloopunity-gainfrequency.
With RC = 6k,
1.21 = Reference voltage
With VOUT = 5V and ESR = 0.03Ω, a value of 6.5k for RC
would yield zero gain margin, so this represents an upper
limit. There is a second limitation however which has
nothing to do with theoretical small signal dynamics. This
resistor sets high frequency gain of the error amplifier,
including the gain at the switching frequency. If switching
frequency gain is high enough, output ripple voltage will
appear at the VC pin with enough amplitude to muck up
proper operation of the regulator. In the marginal case,
subharmonic switching occurs, as evidenced by alternat-
ing pulse widths seen at the switch node. In more severe
cases,theregulatorsquealsorhissesaudiblyeventhough
the output voltage is still roughly correct. None of this will
show on a theoretical Bode plot because Bode is an
amplitude insensitive analysis. Tests have shown that if
ripple voltage on the VC is held to less than 100mVP-P, the
LT1959 will be well behaved. The formula below will give
an estimate of VC ripple voltage when RC is added to the
loop, assuming that RC is large compared to the reactance
of CC at 500kHz.
5
5
CF =
=
= 275pF
2π 500 ×103 6k
2π f RC
( )( )(
)
( )
(
)
How Do I Test Loop Stability?
The “standard” compensation for LT1959 is a 1.5nF
capacitor for CC, with RC = 0. While this compensation will
work for most applications, the “optimum” value for loop
compensationcomponentsdepends,tovariousextent,on
parameters which are not well controlled. These include
inductor value (±30% due to production tolerance, load
current and ripple current variations), output capacitance
(±20% to ±50% due to production tolerance, tempera-
ture, aging and changes at the load), output capacitor ESR
(±200% due to production tolerance, temperature and
aging), and finally, DC input voltage and output load
current . This makes it important for the designer to check
outthefinaldesigntoensurethatitis“robust”andtolerant
of all these variations.
RC GMA V − VOUT ESR 1.21
(
)(
)( IN
)(
)(
)
VC(RIPPLE
=
)
V
L f
(
IN)( )( )
GMA = Error amplifier transconductance (2000µMho)
I check switching regulator loop stability by pulse loading
the regulator output while observing transient response at
the output, using the circuit shown in Figure 13. The
regulator loop is “hit” with a small transient AC load
current at a relatively low frequency, 50Hz to 1kHz. This
causes the output to jump a few millivolts, then settle back
totheoriginalvalue,asshowninFigure14. Awellbehaved
loop will settle back cleanly, whereas a loop with poor
phase or gain margin will “ring” as it settles. The number
ofringsindicatesthedegreeofstability, andthefrequency
of the ringing shows the approximate unity-gain fre-
quency of the loop. Amplitude of the signal is not particu-
larlyimportant, aslongastheamplitudeisnotsohighthat
the loop behaves nonlinearly.
If a computer simulation of the LT1959 showed that a
series compensation resistor of 6k gave best overall loop
response, with adequate gain margin, the resulting VC pin
ripple voltage with VIN = 10V, VOUT = 5V, ESR = 0.1Ω,
L = 10µH, would be:
6k 2•10−3 10 − 5 0.1 1.21
( )
(
)
)( )(
)
(
VC(RIPPLE
=
= 0.144V
)
10 10•10−6 500•103
( )
(
)(
)
This ripple voltage is high enough to possibly create
subharmonic switching. In most situations a compromise
value (<2k in this case) for the resistor gives acceptable
phase margin and no subharmonic problems. In other
20
LT1959
U
W U U
APPLICATIONS INFORMATION
RIPPLE FILTER
4.7k
TO X1
OSCILLOSCOPE
PROBE
470Ω
SWITCHING
REGULATOR
+
100µF TO
1000µF
3300pF
330pF
50Ω
ADJUSTABLE
INPUT SUPPLY
ADJUSTABLE
DC LOAD
TO
OSCILLOSCOPE
SYNC
100Hz TO 1kHz
100mV TO 1V
P-P
1595 F13
Figure 13. Loop Stability Test Circuit
Keep in mind that this procedure does not take initial
component tolerance into account. You should see fairly
cleanresponseunderallloadandlineconditionstoensure
that component variations will not cause problems. One
note here: according to Murphy, the component most
likely to be changed in production is the output capacitor,
because that is the component most likely to have manu-
facturer variations (in ESR) large enough to cause prob-
lems. It would be a wise move to lock down the sources of
the output capacitor in production.
VOUT AT IOUT
500mA
=
BEFORE FILTER
VOUT AT IOUT
500mA
AFTER FILTER
=
10mV/DIV
5A/DIV
VOUT AT IOUT = 50mA
AFTER FILTER
LOAD PULSE
THROUGH 50Ω
f ≈ 780Hz
0.2ms/DIV
1375/76 F14
A possible exception to the “clean response” rule is at very
light loads, as evidenced in Figure 14 with ILOAD = 50mA.
Switching regulators tend to have dramatic shifts in loop
response at very light loads, mostly because the inductor
currentbecomesdiscontinuous.Onecommonresultisvery
slow but stable characteristics. A second possibility is low
phase margin, as evidenced by ringing at the output with
transients. The good news is that the low phase margin at
lightloadsisnotparticularlysensitivetocomponentvaria-
tion, so if it looks reasonable under a transient test, it will
probably not be a problem in production. Note that fre-
quency of the light load ringing may vary with component
tolerance but phase margin generally hangs in there.
Figure 14. Loop Stability Check
The output of the regulator contains both the desired low
frequency transient information and a reasonable amount
of high frequency (500kHz) ripple. The ripple makes it
difficult to observe the small transient, so a two-pole,
100kHz filter has been added. This filter is not particularly
critical; even if it attenuated the transient signal slightly,
this wouldn’t matter because amplitude is not critical.
After verifying that the setup is working correctly, I start
varying load current and input voltage to see if I can find
any combination that makes the transient response look
suspiciously “ringy.” This procedure may lead to an
adjustment for best loop stability or faster loop transient
response. Nearly always you will find that loop response
looks better if you add in several kΩ for RC. Do this only
if necessary, because as explained before, RC above 1k
may require the addition of CF to control VC pin ripple. If
everythinglooksOK, Iuseaheatgunandcoldsprayonthe
circuit (especially the output capacitor) to bring out any
temperature-dependent characteristics.
CURRENT SHARING MULTIPHASE SUPPLY
The circuit in Figure 15 uses multiple LT1959s to produce
a2.5V, 12Apowersupply. Thereareseveraladvantagesto
using a multiple switcher approach compared to a single
largerswitcher.Theinductorsizeisconsiderablyreduced.
Three 4A inductors store less energy (LI2/2) than one 12A
coil so are far smaller. In addition, synchronizing three
21
LT1959
U
W U U
APPLICATIONS INFORMATION
converters 120° out of phase with each other reduces
input and output ripple currents. This reduces the ripple
rating, size and cost of filter capacitors.
Synchronized Ripple Currents
A ring counter generates three synchronization signals at
600kHz, 33% duty cycle phased 120° apart. The sync
input will operate over a wide range of duty cycles, so no
further pulse conditioning is needed. Each device’s maxi-
mum input ripple current is a 4A square wave at 600kHz.
When synchronously added together, the ripple remains
at 4A but frequency increases to 1.8MHz. Likewise, the
output ripple current is a 1.8MHz triangular waveform,
with maximum amplitude of 350mA at 5V VIN. Interest-
ingly, at 7.6V and 15V VIN, the theoretical summed output
ripple current cancels completely. To reduce board space
andripplevoltage,C1andC3areceramiccapacitors.Loop
compensation C4 must be adjusted when using ceramic
output capacitors due to the lack of effective series resis-
tance. The typical tantalum compensation of 1.5nF is
increased to 22nF (×3) for the ceramic output capacitor.
If synchronization is not used and the internal oscillators
free run, the circuit will operate correctly, but ripple
cancellation will not occur. Input and output capacitors
must be ripple rated for the total output current.
Current Sharing/Split Input Supplies
Current sharing is accomplished by joining the VC pins to
a common compensation capacitor. The output of the
erroramplifierisagmstage,soanynumberofdevicescan
be connected together. The effective gm of the composite
error amplifier is the multiple of the individual devices. In
Figure 15, the compensation capacitor C4 has been
increased by ×3. Tolerances in the reference voltages
result in small offset currents to flow between the VC pins.
The overall effect is that the loop regulates the output at a
voltage between the minimum and maximum reference of
the devices used. Switch current matching between
devices will be typically better than 300mA. The negative
temperaturecoefficientoftheVCtoswitchcurrenttranscon-
ductance prevents current hogging.
AcommonVC voltageforceseachLT1959tooperateatthe
same switch current, not duty cycle. Each device operates
at the duty cycle defined by its respective input voltage. In
Figure 15, the input could be split and each device oper-
ated at a different voltage. The common VC ensures
loading is shared between inputs.
C1, C3: MARCON THCS50E1E106Z
D1: ROHM RB051L-40
D2: 1N914
3-BIT RING
COUNTER
L1: DO3316P-682
1.8MHz
LT1959
LT1959
LT1959
V
C
SYNC SW GND
V
BOOST FB
V
C
SYNC SW GND
V
BOOST FB
V
SYNC SW GND
V
BOOST FB
IN
IN
IN
C
2.5V
12A
R1
2.67k
1%
+
C1
INPUT
10µF
R2
2.49k
1%
4.3V TO 15V
25V
+
+
+
+
C3A
10µF
25V
C3B
10µF
25V
C4
68nF
25V
C3C
10µF
25V
D2B
D2C
D2A
D1A
D1B
D1C
C2A
330nF
10V
C2B
330nF
10V
C2C
330nF
10V
L1A
6.8µH
L1B
6.8µH
L1C
6.8µH
1959 F15
Figure 15. Current Sharing 12A Supply
22
LT1959
U
W U U
APPLICATIONS INFORMATION
Redundant Operation
outputcurrentisunchanged. Variantsofthiscircuitcanbe
used for sequencing multiple regulator outputs.
The circuit shown in Figure 15 is fault tolerant when
operating at less than 8A of output current. If one device
fails, the output will remain in regulation. The feedback
loop will compensate by raising the voltage on the VC pin,
increasing switch current of the two remaining devices.
Dual Output SEPIC Converter
The circuit in Figure 17 generates both positive and
negative 5V outputs with a single piece of magnetics. The
two inductors shown are actually just two windings on a
standard B H Electronics inductor. The topology for the 5V
output is a standard buck converter. The –5V topology
would be a simple flyback winding coupled to the buck
converter if C4 were not present. C4 creates a SEPIC
(Single-Ended Primary Inductance Converter) topology
whicn improves regulation and reduces ripple current in
L1. Without C4, the voltage swing on L1B compared to
L1A would vary due to relative loading and coupling
losses. C4 provides a low impedance path to maintain an
equal voltage swing in L1B, improving regulation. In a
flybackconverter,duringswitchontime,alltheconverter’s
energyisstroedinL1Aonly, sincenocurrentflowsinL1B.
At switch off, energy is transferred by magnetic coupling
into L1B, powering the –5V rail. C4 pulls L1B positive
duringswitchontime, causingcurrenttoflow, andenergy
to build in L1B and C4. At switch off, the energy stored in
both L1B and C4 supply the –5V rail. This reduces the
current in L1A and changes L1B current waveform from
square to triangular. For details on this circuit see Design
Note 100.
BUCK CONVERTER WITH ADJUSTABLE SOFT START
Large capacitive loads can cause high input currents at
start-up. Figure 16 shows a circuit that limits the dv/dt of
the output at start-up, controlling the capacitor charge
rate. The buck converter is a typical configuration with the
additionofR3, R4, CSS andQ1. Astheoutputstartstorise,
Q1 turns on, regulating switch current via the VC pin to
maintain a constant dv/dt at the output. Output rise time is
controlled by the current through CSS defined by R4 and
Q1’s VBE. Once the output is in regulation, Q1 turns off and
thecircuitoperatesnormally.R3istransientprotectionfor
the base of Q1.
(R4)(C )(V
)
SS OUT
RiseTime =
(V )
BE
Using the values shown in Figure 16,
(47 •103)(15•10–9)(2.5)
RiseTime =
= 2.5ms
0.7
D2
The ramp is linear and rise times in the order of 100ms are
possible. Since the circuit is voltage controlled, the ramp
rate is unaffected by load characteristics and maximum
1N914
C2
0.27µF
L1*
6.8µH
BOOST
LT1959
OUTPUT
5V
INPUT
V
V
D2
1N914
IN
SW
FB
6V TO 15V
SHDN
GND
R1
C2
+
+
C1**
V
7.87k
0.33µF
C
100µF
L1
5µH
C3
10µF
25V
+
OUTPUT
2.5V
4A
10V TANT
BOOST
LT1959
C
INPUT
12V
C
R2
V
IN
V
SW
D1
1.5nF
+
2.49k
C3
10µF
C1
100µF
CERAMIC
D1
R1
2.67k
GND
SHDN
GND
FB
+
C5**
V
C
C4**
4.7µF
100µF
10V TANT
L1*
R2
2.49k
C
SS
15nF
C
R3
2k
C
OUTPUT
Q1
* L1 IS A SINGLE CORE WITH TWO WINDINGS
BH ELECTRONICS #501-0726
1.5nF
†
–5V
D3
1959 F16
** TOKIN IE475ZY5U-C304
1959 F17
R4
47k
†
IF LOAD CAN GO TO ZERO, AN OPTIONAL
PRELOAD OF 1k TO 5k MAY BE USED TO
IMPROVE LOAD REGULATION
D1, D3: MBRD340
Figure 17. Dual Output SEPIC Converter
Figure 16. Buck Converter with Adjustable Soft Start
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
23
LT1959
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
R Package
7-Lead Plastic DD Pak
(LTC DWG # 05-08-1462)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
0.060
(1.524)
0.165 – 0.180
(4.191 – 4.572)
0.256
(6.502)
0.045 – 0.055
(1.143 – 1.397)
15° TYP
+0.008
0.004
–0.004
0.060
(1.524)
0.059
(1.499)
TYP
0.183
(4.648)
0.330 – 0.370
(8.382 – 9.398)
+0.203
–0.102
0.102
(
)
0.095 – 0.115
(2.413 – 2.921)
0.075
(1.905)
0.050
(1.27)
BSC
0.050 ± 0.012
(1.270 ± 0.305)
0.300
(7.620)
0.013 – 0.023
(0.330 – 0.584)
+0.012
0.143
–0.020
0.026 – 0.036
(0.660 – 0.914)
+0.305
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
3.632
(
)
–0.508
R (DD7) 1098
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
(0.254 – 0.508)
7
5
8
6
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
0.008 – 0.010
(0.203 – 0.254)
(0.101 – 0.254)
0.228 – 0.244
0°– 8° TYP
0.150 – 0.157**
(3.810 – 3.988)
0.016 – 0.050
(0.406 – 1.270)
(5.791 – 6.197)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
2
3
4
SO8 1298
RELATED PARTS
PART NUMBER
LT1074/LT1076
LTC®1148/LTC1149
LT1370
DESCRIPTION
COMMENTS
Step-Down Switching Regulators
40V Input, 100kHz, 5A and 2A
External FET Switches
42V, 6A, 500kHz Switch
35V, 3A, 500kHz Switch
Boost Topology
High Efficiency Synchronous Step-Down Switching Regulator
High Efficiency DC/DC Converter
LT1371
High Efficiency DC/DC Converter
LT1372/LT1377
LT1374
500kHz and 1MHz High Efficiency 1.5A Switching Regulators
High Efficiency Step-Down Switching Regulator
High Efficiency Step-Down Switching Regulator
N-Channel Switching Regulator Controller
25V, 4.5A, 500kHz Switch
15V, 4.5A, 500kHz Switch
SO-8 Package
LT1506
LT1624
LT1625
NoR
TM Step Down-Switching Regulator Controller
Step-Down, Synchronous
SENSE
LT1628
2-Phase Synchronous Step-Down Switching Regulator Controller High Efficiency, Low Ripple
High Efficiency Step-Down Converter Drives External MOSFETs
High Power NoR Switching Regulator Controller Step-Down, Synchronous, Current Mode
LTC1735
LT1775
SENSE
No RSENSE is a trademark of Linear Technology Corporation
1959f LT/TP 0500 4K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
LINEAR TECHNOLOGY CORPORATION 2000
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
相关型号：
LT1959IS8#PBF
LT1959 - 4.5A, 500kHz Step-Down Switching Regulator; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LT1959IS8#TRPBF
LT1959 - 4.5A, 500kHz Step-Down Switching Regulator; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LT1961EMS8E#PBF
LT1961 - 1.5A, 1.25MHz Step-Up Switching Regulator; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LT1961EMS8E#TR
LT1961 - 1.5A, 1.25MHz Step-Up Switching Regulator; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LT1961EMS8E#TRPBF
LT1961 - 1.5A, 1.25MHz Step-Up Switching Regulator; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LT1961IMS8E#PBF
LT1961 - 1.5A, 1.25MHz Step-Up Switching Regulator; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明