LT1961IMS8ETR [Linear]
1.5A, 1.25MHz Step-Up Switching Regulator; 1.5A , 1.25MHz的升压型开关稳压器型号: | LT1961IMS8ETR |
厂家: | Linear |
描述: | 1.5A, 1.25MHz Step-Up Switching Regulator |
文件: | 总16页 (文件大小:149K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1961
1.5A, 1.25MHz Step-Up
Switching Regulator
U
FEATURES
DESCRIPTIO
The LT®1961 is a 1.25MHz monolithic boost switching
regulator. A high efficiency 1.5A, 0.2Ω switch is included
on the die together with all the control circuitry required to
complete a high frequency, current-mode switching regu-
lator. Current-mode control provides fast transient re-
sponse and excellent loop stability.
■
1.5A Switch in a Small MSOP Package
■
Constant 1.25MHz Switching Frequency
■
Wide Operating Voltage Range: 3V to 25V
■
High Efficiency 0.2Ω Switch
1.2V Feedback Reference Voltage
■
■
±2% Overall Output Voltage Tolerance
■
Uses Low Profile Surface Mount External
New design techniques achieve high efficiency at high
switchingfrequenciesoverawideoperatingvoltagerange.
A low dropout internal regulator maintains consistent
performance over a wide range of inputs from 24V sys-
tems to Li-Ion batteries. An operating supply current of
1mA maintains high efficiency, especially at lower output
currents. Shutdown reduces quiescent current to 6μA.
Maximum switch current remains constant at all duty
cycles. Synchronization allows an external logic level
signal to increase the internal oscillator from 1.5MHz to
2MHz.
Components
■
Low Shutdown Current: 6μA
■
Synchronizable from 1.5MHz to 2MHz
■
Current-Mode Loop Control
■
Constant Maximum Switch Current Rating at All Duty
Cycles*
■
Thermally Enhanced Exposed Pad 8-Lead Plastic
MSOP Package U
APPLICATIO S
■
DSL Modems
The LT1961 is available in an exposed pad, 8-pin MSOP
package. Full cycle-by-cycle switch current limit protec-
tion and thermal shutdown are provided. High frequency
operationallowsthereductionofinputandoutputfiltering
components and permits the use of chip inductors.
■
Portable Computers
■
Battery-Powered Systems
Distributed Power
■
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. *Patent Pending
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TYPICAL APPLICATIO
Efficiency vs Load Current
5V to 12V Boost Converter
90
6.8μH
85
UPS120
V
OUT
80
75
70
65
60
1
5
2
6
V
IN
12V
V
V
IN
SW
FB
5V
0.5A*
LT1961
2.2μF
90.9k
OPEN
OR
HIGH
= ON
CERAMIC
SHDN
SYNC GND
3,4
V
C
8
7
10μF
CERAMIC
10k
1%
6800pF
6.8k
100pF
V
V
= 5V
OUT
IN
= 12V
0
100
200
300
400
500
*MAXIMUM OUTPUT CURRENT IS SUBJECT TO THERMAL DERATING.
1961 TA01
LOAD CURRENT (mA)
1961 TA01a
1961fa
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LT1961
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ABSOLUTE MAXIMUM RATINGS
PI CO FIGURATIO
(Note 1)
TOP VIEW
Input Voltage .......................................................... 25V
Switch Voltage......................................................... 35V
SHDN Pin ............................................................... 25V
FB Pin Current ....................................................... 1mA
SYNC Pin Current .................................................. 1mA
Operating Junction Temperature Range (Note 2)
LT1961E, LT1961I ........................... –40°C to 125°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
V
1
2
3
4
8 SYNC
IN
SW
GND
GND
7 V
C
6
5
FB
SHDN
MS8E PACKAGE
8-LEAD PLASTIC MSOP
GROUND PAD CONNECTED
TO LARGE COPPER AREA
TJMAX = 125°C, θJA = 50°C/W
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W
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ORDER I FOR ATIO
LEAD FREE FINISH
LT1961EMS8E#PBF
LT1961IMS8E#PBF
LEAD BASED FINISH
LT1961EMS8E
TAPE AND REEL
PART MARKING*
LTQY
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LT1961EMS8E#TRPBF
LT1961IMS8E#TRPBF
TAPE AND REEL
8-Lead Plastic MSOP
8-Lead Plastic MSOP
PACKAGE DESCRIPTION
8-Lead Plastic MSOP
8-Lead Plastic MSOP
LTQY
–40°C to 125°C
PART MARKING*
LTQY
TEMPERATURE RANGE
–40°C to 125°C
LT1961EMS8E#TR
LT1961IMS8E#TR
LT1961IMS8E
LTQY
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The●denotesthespecificationswhichapplyoverthefulloperatingtemperature
range, otherwise specifications are at TA = 25°C. VIN = 15V, VC = 0.8V, SHDN, SYNC and switch open unless otherwise noted.
PARAMETER
CONDITION
MIN
3
TYP
MAX
25
UNITS
V
Recommended Operating Voltage
Maximum Switch Current Limit
Oscillator Frequency
●
●
●
●
●
●
1.5
1
2
3
A
3.3V < V < 25V
1.5
500
2.73
1.3
MHz
mV
V
IN
Switch On Voltage Drop
I
= 1.5A
310
2.6
0.9
27
SW
V
V
V
Undervoltage Lockout
Supply Current
(Note 3)
2.47
IN
IN
IN
I
I
= 0A
mA
mA/A
SW
SW
Supply Current/I
= 1.5A
SW
Shutdown Supply Current
V
= 0V, V = 25V, V = 25V
6
20
45
μA
μA
SHDN
IN
SW
●
●
Feedback Voltage
3V < V < 25V, 0.4V < V < 0.9V
1.182
1.176
1.2
1.218
1.224
V
V
IN
C
1961fa
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LT1961
ELECTRICAL CHARACTERISTICS The●denotesthespecificationswhichapplyoverthefulloperatingtemperature
range, otherwise specifications are at TA = 25°C. VIN = 15V, VC = 0.8V, SHDN, SYNC and switch open unless otherwise noted.
PARAMETER
CONDITION
MIN
0
TYP
–0.2
350
850
–120
110
2.4
MAX
UNITS
FB Input Current
●
–0.4
μA
FB to V Voltage Gain
0.4V < V < 0.9V
150
500
–85
70
C
C
FB to V Transconductance
ΔI = ±10μA
VC
●
●
●
1300
–165
165
μMho
μA
μA
A/V
V
C
V Pin Source Current
C
V
V
= 1V
FB
FB
V Pin Sink Current
C
= 1.4V
V Pin to Switch Current Transconductance
C
V Pin Minimum Switching Threshold
C
Duty Cycle = 0%
0.3
V Pin 1.5A I Threshold
0.9
V
C
SW
Maximum Switch Duty Cycle
V = 1.2V, I = 100mA
●
80
75
70
90
80
75
%
%
%
C
SW
V = 1.2V, I = 1A, 25°C ≤ T ≤ 125°C
C
SW
A
V = 1.2V, I = 1A, T ≤ 25°C
C
SW
A
SHDN Threshold Voltage
●
●
1.28
–7
4
1.35
–10
7
1.42
–13
10
V
μA
SHDN Input Current (Shutting Down)
SHDN Threshold Current Hysteresis
SYNC Threshold Voltage
SHDN = 60mV Above Threshold
SHDN = 100mV Below Threshold
μA
1.5
2.2
2
V
SYNC Input Frequency
1.5
MHz
kΩ
SYNC Pin Resistance
I
= 1mA
20
SYNC
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: Minimum input voltage is defined as the voltage where the
internal regulator enters lockout. Actual minimum input voltage to
maintain a regulated output will depend on output voltage and load
current. See Applications Information.
Note 2: The LT1961E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT1961I is guaranteed over the – 40ºC to 125ºC operating junction
temperature range.
1961fa
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LT1961
TYPICAL PERFORMANCE CHARACTERISTICS
U W
FB vs Temperature
Switch On Voltage Drop
Oscillator Frequency
1.22
1.21
1.20
1.19
1.18
400
350
300
250
200
150
100
50
1.5
1.4
1.3
1.2
1.1
T
= 25°C
A
125°C
25°C
–40°C
0
–50 –25
0
25
50
75 100 125
0
0.5
1
1.5
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
SWITCH CURRENT (A)
TEMPERATURE (°C)
1961 G01
1961 G02
1961 G03
SHDN Threshold vs Temperature
SHDN Supply Current vs VIN
SHDN IP Current vs Temperature
1.40
1.38
1.36
1.34
1.32
1.30
7
6
5
4
3
2
1
0
–12
–10
–8
–6
–4
–2
0
T
= 25°C
A
SHDN = 0V
SHUTTING DOWN
STARTING UP
–50 –25
0
25
50
75 100 125
0
5
10
15
(V)
20
25
30
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
V
TEMPERATURE (°C)
IN
1961 G04
1961 G05
1961G06
SHDN Supply Current
Input Supply Current
Current Limit Foldback
1200
1000
800
600
400
200
0
300
250
200
150
100
50
2.0
1.5
1.0
0.5
0
40
30
20
10
0
T
= 25°C
IN
T
= 25°C
T
= 25°C
A
A
A
V
= 15V
SWITCH CURRENT
MINIMUM
INPUT
VOLTAGE
FB CURRENT
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4
0
0.2
0.4
0.6
0.8
1
1.2
0
5
10
15
20
25
30
SHUTDOWN VOLTAGE (V)
FEEDBACK VOLTAGE (V)
INPUT VOLTAGE (V)
1961 G07
1961 G09
1961 G08
1961fa
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LT1961
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PIN FUNCTIONS
FB:Thefeedbackpinisusedtosetoutputvoltageusingan
external voltage divider that generates 1.2V at the pin with
the desired output voltage. If required, the current limit
can be reduced during start up when the FB pin is below
0.5V (see the Current Limit Foldback graph in the Typical
Performance Characteristics section). An impedance of
less than 5kΩ at the FB pin is needed for this feature to
operate.
VSW: The switch pin is the collector of the on-chip power
NPN switch and has large currents flowing through it.
Keep the traces to the switching components as short as
possible to minimize radiation and voltage spikes.
SYNC: The sync pin is used to synchronize the internal
oscillator to an external signal. It is directly logic compat-
ible and can be driven with any signal between 20% and
80% duty cycle. The synchronizing range is equal to initial
operating frequency, up to 2MHz. See Synchronization
section in Applications Information for details. When not
in use, this pin should be grounded.
VIN: This pin powers the internal circuitry and internal
regulator. Keep the external bypass capacitor close to this
pin.
GND: Short GND pins 3 and 4 and the exposed pad on the
PCB. The GND is the reference for the regulated output, so
load regulation will suffer if the “ground” end of the load
is not at the same voltage as the GND of the IC. This
condition occurs when the load current flows through the
metal path between the GND pins and the load ground
point. Keep the ground path short between the GND pins
and the load and use a ground plane when possible. Keep
thepathbetweentheinputbypassandtheGNDpinsshort.
Theexposedpadshouldbeattachedtoalargecopperarea
to improve thermal resistance.
SHDN: The shutdown pin is used to turn off the regulator
and to reduce input drain current to a few microamperes.
The 1.35V threshold can function as an accurate under-
voltage lockout (UVLO), preventing the regulator from
operating until the input voltage has reached a predeter-
mined level. Float or pull high to put the regulator in the
operating mode.
VC: The VC pin is the output of the error amplifier and the
input of the peak switch current comparator. It is normally
used for frequency compensation, but can do double duty
as a current clamp or control loop override. This pin sits
at about 0.3V for very light loads and 0.9V at maximum
load.
1961fa
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LT1961
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BLOCK DIAGRAM
The LT1961 is a constant frequency, current-mode boost
converter. This means that there is an internal clock and
twofeedbackloopsthatcontrolthedutycycleofthepower
switch. In addition to the normal error amplifier, there is a
current sense amplifier that monitors switch current on a
cycle-by-cycle basis. A switch cycle starts with an oscilla-
tor pulse which sets the RS flip-flop to turn the switch on.
When switch current reaches a level set by the inverting
input of the comparator, the flip-flop is reset and the
switch turns off. Output voltage control is obtained by
using the output of the error amplifier to set the switch
current trip point. This technique means that the error
amplifier commands current to be delivered to the output
rather than voltage. A voltage fed system will have low
phase shift up to the resonant frequency of the inductor
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
itmucheasiertofrequencycompensatethefeedbackloop
and also gives much quicker transient response.
A comparator connected to the shutdown pin disables the
internal regulator, reducing supply current.
V
IN
1
INTERNAL
CC
2.5V BIAS
REGULATOR
V
SLOPE COMP
Σ
0.3V
SW
2
1.25MHz
S
R
8
SYNC
Q1
POWER
SWITCH
OSCILLATOR
R
DRIVER
CURRENT
COMPARATOR
S
FLIP-FLOP
CIRCUITRY
+
–
CURRENT SENSE
SHUTDOWN
COMPARATOR
AMPLIFIER VOLTAGE
GAIN = 40
7μA
–
+
+
–
0.01Ω
1.35V
–
SHDN
5
6
FB
3μA
+
ERROR
3
4
GND
V
C
7
AMPLIFIER
1.2V
g
m
= 850μMho
GND
1767 F01
Figure 1. Block Diagram
1961fa
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LT1961
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APPLICATIONS INFORMATION
FB RESISTOR NETWORK
defines the pole frequency of the output stage, an X7R or
X5R type ceramic, which have good temperature stability,
is recommended.
The suggested resistance (R2) from FB to ground is 10k
1%. This reduces the contribution of FB input bias current
to output voltage to less than 0.2%. The formula for the
resistor (R1) from VOUT to FB is:
Tantalum capacitors are usually chosen for their bulk
capacitance properties, useful in high transient load appli-
cations. ESR rather than absolute value defines output
ripple at 1.25MHz. Values in the 22μF to 100μF range are
generally needed to minimize ESR and meet ripple current
ratings. Care should be taken to ensure the ripple ratings
are not exceeded.
R2 VOUT −1.2
(
)
R1=
1.2 − R2(0.2μA)
Table 1. Surface Mount Solid Tantalum Capacitor ESR and
Ripple Current
V
LT1961
SW
OUTPUT
E Case Size
ESR (Max,
Ω
)
Ripple Current (A)
0.7 to 1.1
0.4
ERROR
AMPLIFIER
AVX TPS, Sprague 593D
AVX TAJ
0.1 to 0.3
0.7 to 0.9
1.2V
+
–
R1
+
FB
D Case Size
AVX TPS, Sprague 593D
C Case Size
0.1 to 0.3
0.2 (typ)
0.7 to 1.1
0.5 (typ)
R2
10k
1961 F02
AVX TPS
V
C
GND
Figure 2. Feedback Network
INPUT CAPACITOR
Unlike the output capacitor, RMS ripple current in the
input capacitor is normally low enough that ripple current
rating is not an issue. The current waveform is triangular,
with an RMS value given by:
OUTPUT CAPACITOR
Step-up regulators supply current to the output in pulses.
The rise and fall times of these pulses are very fast. The
output capacitor is required to reduce the voltage ripple
this causes. The RMS ripple current can be calculated
from:
0.29 V VOUT − V
(
IN)(
IN
)
IRIPPLE RMS
=
(
)
L f VOUT
( )( )(
)
IRIPPLE RMS = IOUT VOUT − V
/
V
IN
(
IN
)
(
)
Athigherswitchingfrequency,theenergystoragerequire-
ment of the input capacitor is reduced so values in the
range of 1μF to 4.7μF are suitable for most applications.
Y5V or similar type ceramics can be used since the
absolute value of capacitance is less important and has no
significant effect on loop stability. If operation is required
close to the minimum input voltage required by either the
output or the LT1961, a larger value may be necessary.
This is to prevent excessive ripple causing dips below the
minimum operating voltage resulting in erratic operation.
The LT1961 will operate with both ceramic and tantalum
output capacitors. Ceramic capacitors are generally cho-
sen for their small size, very low ESR (effective series
resistance), and good high frequency operation, reducing
outputripplevoltage. TheirlowESRremovesausefulzero
in the loop frequency response, common to tantalum
capacitors. To compensate for this, the VC loop compen-
sationpolefrequencymusttypicallybereducedbyafactor
of 10. Typical ceramic output capacitors are in the 1μF to
10μF range. Since the absolute value of capacitance
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LT1961
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APPLICATIONS INFORMATION
INDUCTOR CHOICE AND MAXIMUM OUTPUT
CURRENT
(V )2(VOUT – V )
0.4(VOUT )2(IOUT )(f)
IN
IN
LMIN
=
When choosing an inductor, there are 2 conditions that
limit the minimum inductance; required output current,
and avoidance of subharmonic oscillation. The maximum
output current for the LT1961 in a standard boost con-
verter configuration with an infinitely large inductor is:
The inductor value may need further adjustment for other
factors such as output voltage ripple and filtering require-
ments. Remember also, inductance can drop significantly
with DC current and manufacturing tolerance.
The inductor must have a rating greater than its peak
operating current to prevent saturation resulting in effi-
ciency loss. Peak inductor current is given by:
V • η
VOUT
IN
IOUT(MAX) = 1.5A
Where η = converter efficiency (typically 0.87 at high
current).
(VOUT )(IOUT ) V (VOUT − V )
IN
IN
ILPEAK
=
+
V • η
2VOUT (L)(f)
As the value of inductance is reduced, ripple current
increases and IOUT(MAX) is reduced. The minimum induc-
tance for a required output current is given by:
IN
Also, consideration should be given to the DC resistance
of the inductor. Inductor resistance contributes directly to
the efficiency losses in the overall converter.
V (VOUT – V )
IN
IN
LMIN
=
SuitableinductorsareavailablefromCoilcraft,Coiltronics,
Dale, Sumida, Toko, Murata, Panasonic and other manu-
factures.
⎛
⎞
(VOUT )(IOUT
)
2VOUT (f) 1.5 –
⎜
⎟
V • η
IN
⎝
⎠
Table 2
PART NUMBER VALUE (uH) I
Coiltronics
The second condition, avoidance of subharmonic oscilla-
tion, mustbemetiftheoperatingdutycycleisgreaterthan
50%. The slope compensation circuit within the LT1961
prevents subharmonic oscillation for inductor ripple cur-
rents of up to 0.7AP-P, defining the minimum inductor
value to be:
(Amps) DCR (Ω) HEIGHT (mm)
SAT(DC)
TP1-2R2
2.2
2.2
4.7
10
1.3
0.188
0.111
0.181
0.146
1.8
2.2
2.2
3.0
TP2-2R2
1.5
1.5
1.5
TP3-4R7
TP4- 100
Murata
V (VOUT – V )
IN
IN
LMIN
=
LQH1C1R0M04
LQH3C1R0M24
LQH3C2R2M24
LQH4C1R5M04
Sumida
1.0
1.0
2.2
1.5
0.51
1.0
0.79
1
0.28
0.06
0.1
1.8
2.0
2.0
2.6
0.7VOUT (f)
These conditions define the absolute minimum induc-
tance. However, it is generally recommended that to
prevent excessive output noise, and difficulty in obtaining
stability, the ripple current is no more than 40% of the
average inductor current. Since inductor ripple is:
0.09
CD73- 100
10
2.2
6.2
10
1.44
1.32
1.4
0.080
0.058
0.071
0.048
3.5
1.8
1.8
2.8
CDRH4D18-2R2
CDRH5D18-6R2
CDRH5D28-100
Coilcraft
V (VOUT – V )
IN
IN
1.3
IP−P RIPPLE
=
VOUT (L)(f)
1008PS-272M
LPO1704-222M
LPO1704-332M
2.7
2.2
3.3
1.3
1.6
1.3
0.14
0.12
0.16
2.7
1.0
1.0
The recommended minimum inductance is:
1961fa
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LT1961
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APPLICATIONS INFORMATION
CATCH DIODE
shutdown pin can be used. The threshold voltage of the
shutdown pin comparator is 1.35V. A 3μA internal current
sourcedefaultstheopenpinconditiontobeoperating(see
TypicalPerformanceGraphs). Currenthysteresisisadded
above the SHDN threshold. This can be used to set voltage
hysteresis of the UVLO using the following:
The suggested catch diode (D1) is a UPS120 or 1N5818
Schottky. It is rated at 1A average forward current and
20V/30V reverse voltage. Typical forward voltage is 0.5V
at 1A. The diode conducts current only during switch off
time. Peak reverse voltage is equal to regulator output
voltage. Average forward current in normal operation is
equal to output current.
VH − VL
R1=
7μA
SHUTDOWN AND UNDERVOLTAGE LOCKOUT
1.35V
R2 =
Figure 4 shows how to add undervoltage lockout (UVLO)
to the LT1961. Typically, UVLO is used in situations where
the input supply is current limited, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
loadtothesourceandcancausethesourcetocurrentlimit
or latch low under low source voltage conditions. UVLO
prevents the regulator from operating at source voltages
where these problems might occur.
VH − 1.35V
(
)
+ 3μA
R1
VH – Turn-on threshold
VL – Turn-off threshold
Example: switching should not start until the input is
above 4.75V and is to stop if the input falls below 3.75V.
VH = 4.75V
VL = 3.75V
LT1961
4.75V − 3.75V
7μA
IN
INPUT
R1=
= 143k
1.35V
7μA
1.35V
R1
R2
3μA
V
CC
SHDN
R2 =
= 50.4k
4.75V − 1.35V
(
)
C1
+ 3μA
GND
143k
1961 F04
Keep the connections from the resistors to the SHDN pin
short and make sure that the interplane or surface capaci-
tance to the switching nodes are minimized. If high resis-
torvaluesareused,theSHDNpinshouldbebypassedwith
a 1nF capacitor to prevent coupling problems from the
switch node.
Figure 4. Undervoltage Lockout
An internal comparator will force the part into shutdown
below the minimum VIN of 2.6V. This feature can be used
to prevent excessive discharge of battery-operated sys-
tems. If an adjustable UVLO threshold is required, the
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LT1961
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APPLICATIONS INFORMATION
SYNCHRONIZATION
high speed switching current path, shown in Figure 5,
must be kept as short as possible. This is implemented in
the suggested layout of Figure 6. Shortening this path will
also reduce the parasitic trace inductance of approxi-
mately 25nH/inch. At switch off, this parasitic inductance
produces a flyback spike across the LT1961 switch. When
operating at higher currents and output voltages, with
poor layout, this spike can generate voltages across the
LT1961 that may exceed its absolute maximum rating. A
ground plane should always be used under the switcher
circuitry to prevent interplane coupling and overall noise.
The SYNC pin, is used to synchronize the internal oscilla-
tor to an external signal. The SYNC input must pass from
a logic level low, through the maximum synchronization
threshold with a duty cycle between 20% and 80%. The
input can be driven directly from a logic level output. The
synchronizing range is equal to initial operating frequency
up to 2MHz. This means that minimum practical sync
frequency is equal to the worst-case high self-oscillating
frequency (1.5MHz), not the typical operating frequency
of 1.25MHz. Caution should be used when synchronizing
above 1.7MHz because at higher sync frequencies the
amplitude of the internal slope compensation used to
prevent subharmonic switching is reduced. Higher induc-
tor values will tend to eliminate this problem. See Fre-
quency Compensation section for a discussion of an
entirely different cause of subharmonic switching before
assuming that the cause is insufficient slope compensa-
tion. Application Note 19 has more details on the theory
of slope compensation.
The VC and FB components should be kept as far away as
possible from the switch node. The LT1961 pinout has
been designed to aid in this. The ground for these compo-
nents should be separated from the switch current path.
Failure to do so will result in poor stability or subharmonic
like oscillation.
Board layout also has a significant effect on thermal
resistance. The exposed pad is the copper plate that runs
undertheLT1961die.Thisisthebestthermalpathforheat
out of the package. Soldering the pad onto the board will
reduce die temperature and increase the power capability
of the LT1961. Provide as much copper area as possible
aroundthispad.Addingmultiplesolderfilledfeedthroughs
under and around the pad to the ground plane will also
help. Similar treatment to the catch diode and inductor
terminations will reduce any additional heating effects.
LAYOUT CONSIDERATIONS
As with all high frequency switchers, when considering
layout, care must be taken to achieve optimal electrical,
thermal and noise performance. For maximum efficiency,
switch rise and fall times are typically in the nanosecond
range. To prevent noise both radiated and conducted, the
L1
D1
C3
V
OUT
SW
LT1961
HIGH
FREQUENCY
SWITCHING
PATH
V
IN
C1 LOAD
GND
1961 F05
Figure 5. High Speed Switching Path
1961fa
10
LT1961
U
W U U
APPLICATIONS INFORMATION
L1
6.8μH
D1
UPS120
OUTPUT
12V
0.5A*
INPUT
5V
V
V
IN
SW
FB
C3
OPEN
OR
HIGH
= ON
LT1961
R1
90.9k
2.2μF
CERAMIC
SHDN
SYNC GND
V
C
C1
R2
10k
1%
C2
6800pF
R3
6.8k
10μF
C4
100pF
CERAMIC
*MAXIMUM OUTPUT CURRENT IS SUBJECT TO THERMAL DERATING.
INPUT
GND
R3
L1
C4
C3
LT1961EMS8E
C2
KEEP FB AND V
COMPONENTS
AWAY FROM
C
D1
HIGH FREQUENCY,
HIGH INPUT
COMPONENTS
MINIMIZE
LT1961,
C1, D1 LOOP
U1
C1
R2
R1
GND
V
OUT
SOLDER EXPOSED
GROUND PAD
TO BOARD
KELVIN SENSE
PLACE FEEDTHROUGHS
V
OUT
AROUND GROUND PIN FOR
GOOD THERMAL CONDUCTIVITY
Figure 6. Typical Application and Suggested Layout (Topside Only Shown)
1961fa
11
LT1961
U
W U U
APPLICATIONS INFORMATION
THERMAL CALCULATIONS
with no device power, in an oven. The same measurement
can then be used in operation to indicate the die tempera-
ture.
Power dissipation in the LT1961 chip comes from four
sources:switchDCloss,switchACloss,drivecurrent,and
inputquiescentcurrent.Thefollowingformulasshowhow
to calculate each of these losses. These formulas assume
continuous mode operation, so they should not be used
for calculating efficiency at light load currents.
FREQUENCY COMPENSATION
Loop frequency compensation is performed on the output
of the error amplifier (VC pin) with a series RC network.
The main pole is formed by the series capacitor and the
output impedance (≈500kΩ) of the error amplifier. The
pole falls in the range of 2Hz to 20Hz. The series resistor
creates a “zero” at 1kHz to 5kHz, which improves loop
stability and transient response. A second capacitor, typi-
cally one-tenth the size of the main compensation capaci-
tor, is sometimes used to reduce the switching frequency
ripple on the VC pin. VC pin ripple is caused by output
voltage ripple attenuated by the output divider and multi-
plied by the error amplifier. Without the second capacitor,
VC pin ripple is:
(VOUT − V )
IN
DC, duty cycle =
VOUT
(VOUT )(IOUT
)
ISW
=
V
IN
Switch loss:
P
SW
= (DC)(ISW)2(RSW)+ 17n I
VOUT
f
(
SW )(
)( )
VIN loss:
(V )(ISW)(DC)
IN
PVIN
=
+ 1mA(V )
IN
50
1.2(V
)(g )(R )
m C
RIPPLE
(V
V Pin Ripple =
C
RSW = Switch resistance (≈0.27Ω hot)
)
OUT
V
m
= Output ripple (V
)
RIPPLE
P–P
Example: VIN = 5V, VOUT = 12V and IOUT = 0.5A
g = Error amplifier transconductance
(≈850μmho)
Total power dissipation = 0.23 + 0.31 + 0.07 + 0.005 =
0.62W
R = Series resistor on V pin
C
C
V
OUT
= DC output voltage
Thermal resistance for LT1961 package is influenced by
the presence of internal or backside planes. With a full
plane under the package, thermal resistance will be about
50°C/W. Tocalculatedietemperature, usetheappropriate
thermalresistancenumberandaddinworst-caseambient
temperature:
To prevent irregular switching, VC pin ripple should be
kept below 50mVP–P. Worst-case VC pin ripple occurs at
maximum output load current and will also be increased if
poor quality (high ESR) output capacitors are used. The
addition of a 47pF capacitor on the VC pin reduces switch-
ingfrequencyrippletoonlyafewmillivolts. Alowvaluefor
RC will also reduce VC pin ripple, but loop phase margin
may be inadequate.
TJ = TA + θJA (PTOT
)
If a true die temperature is required, a measurement of the
SYNC to GND pin resistance can be used. The SYNC pin
resistance across temperature must first be calibrated,
1961fa
12
LT1961
U
TYPICAL APPLICATIO S
Dual Output Flyback Converter
R2
10k
1%
R1
115k
1%
UPS140
T1*
V
V
IN
5V TO 10V
OUT
15V
+
2, 3
7
C1
+
+
•
P6KE-20A
C4
4.7μF
47μF
4
10
1N4148
•
•
FB
S/S
V
IN
8, 9
ON
V
SW
OFF
C5
47μF
LT1961
1
–V
OUT
–15V
UPS140
V
C
GND
C2
2.2nF
R3
10k
C3
100pF
*DALE LPE-4841-100MB
LT1961 • TA02
4V-9VIN to 5VOUT SEPIC Converter**
**
4V TO 9V
V
IN
L1A*
10μH
D1
UPS120
V
IN
†
•
V
OUT
ON
V
V
S/S
SW
OFF
5V
R2
31.6k
1%
C2
LT1961
4.7μF
C1
+
FB
C
•
4.7μF
GND
+
C3
20V
L1B*
10μH
47μF
10V
R3
10k
1%
R1
10k
C4
2.2nF
C5
100pF
LT1961 • TA03
†
MAX I
OUT
*
**
BH ELECTRONICS 511-1012
INPUT VOLTAGE MAY BE GREATER OR
LESS THAN OUTPUT VOLTAGE
I
V
IN
OUT
0.59A 4V
0.65A 5V
0.70A 6V
0.74A 7V
0.80A 9V
1961fa
13
LT1961
U
TYPICAL APPLICATIO S
Single Li-Ion Cell to 5V
D1
UPS120
L1
4.7μH
V
OUT
5V
R1
31.6k
1%
V
IN
ON
V
S/S
SW
OFF
LT1961
SINGLE
Li-Ion
CELL
+
+
+
C4
FB
C
C1
10μF
47μF
GND
V
10V
R2
10k
1%
C2
2.2nF
C3
100pF
R3
10k
LT1961 • TA04
I
V
IN
OUT
0.75A 2.7V
0.93A 3.3V
1.0A 3.6V
1961fa
14
LT1961
U
PACKAGE DESCRIPTION
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 ± 0.102
(.081 ± .004)
1
1.83 ± 0.102
(.072 ± .004)
0.889 ± 0.127
(.035 ± .005)
2.794 ± 0.102
(.110 ± .004)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
2.083 ± 0.102
(.082 ± .004)
8
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.52
(.0205)
REF
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
TYP
8
7 6 5
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
0.254
(.010)
GAUGE PLANE
1
2
3
4
0.53 ± 0.152
(.021 ± .006)
1.10
(.043)
MAX
0.86
(.034)
REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ± 0.0508
(.004 ± .002)
0.65
(.0256)
BSC
MSOP (MS8E) 0307 REV D
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
1961fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT1961
U
TYPICAL APPLICATIO
High Voltage Laser Power Supply
0.01μF
5kV
1800pF
10kV
47k
5W
1800pF
10kV
8
11
HV DIODES
L1
3
1
5
4
LASER
2
+
2.2μF
0.47μF
Q1
Q2
150Ω
L2
10μH
MUR405
V
10k
SW
LT1961
GND
10k
V
IN
12V TO 25V
V
FB
IN
V
1N4002
(ALL)
+
V
L1 =
Q1, Q2 =
COILTRONICS CTX02-11128
ZETEX ZTX849
WIMA 3X 0.15μF TYPE MKP-20
SEMTECH-FM-50
HUGHES 3121H-P
0.1μF
IN
190Ω
1%
2.2μF
0.47μF =
C
HV DIODES =
LASER =
+
10μF
LT1961 • TA05
COILTRONICS (407) 241-7876
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1308A
600kHz, 2A, Step-Up Regulator
30V Switch, V = 1V to 6V, Low Battery Comparator,
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LT1370
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V
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IN
OUT
Synchronizable, Oscillator from 100kHz to 3MHz, MS10 Package
LTC3402
Single Cell, High Current (2A), Micropower, Synchronous 3MHz
Step-Up DC/DC Converter
V
IN
= 0.85V to 5V, V to 5.5V, Up to 95% Efficiency
OUT
Synchronizable, Oscillator from 100kHz to 3MHz, MS10 Package
LTC3405/
LTC3405A
1.5MHz High Efficiency, I
Step-Down Regulator
= 300mA, Monolithic Synchronous
V
IN
= 2.5V to 5.5V, V to 0.8V, Up to 95% Efficiency, 100%
OUT
OUT
Duty Cycle, I = 20μA, ThinSOT Package
Q
ThinSOT is a trademark of Linear Technology Corporation.
1961fa
LT 0707 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 2001
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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