LT3013EDE_技术文档

LT3013

250mA, 4V to 80V

Low Dropout Micropower

Linear Regulator with PWRGD

FEATURES

DESCRIPTION

The LT^®3013 is a high voltage, micropower low dropout

linearregulator. Thedeviceiscapableofsupplying250mA

ofoutputcurrentwithadropoutvoltageof400mV.Designed

foruseinbattery-poweredorhighvoltagesystems,thelow

quiescent current (65μA operating and 1μA in shutdown)

makes the LT3013 an ideal choice. Quiescent current is

also well controlled in dropout.

■

Wide Input Voltage Range: 4V to 80V

■

Low Quiescent Current: 65μA

■

Low Dropout Voltage: 400mV

■

Output Current: 250mA

■

No Protection Diodes Needed

■

Adjustable Output from 1.24V to 60V

■

1μA Quiescent Current in Shutdown

■

Stable with 3.3μF Output Capacitor

Other features of the LT3013 include a PWRGD ﬂag to

indicate output regulation. The delay between regulated

output level and ﬂag indication is programmable with a

singlecapacitor. TheLT3013alsohastheabilitytooperate

with very small output capacitors. The regulator is stable

with only 3.3μF on the output while most older devices

require between 10μF and 100μF for stability. Small ce-

ramic capacitors can be used without any need for series

resistance (ESR) as is common with other regulators.

Internal protection circuitry includes reverse-battery

protection, current limiting, thermal limiting and reverse

current protection.

■

Stable with Aluminum, Tantalum or Ceramic

Capacitors

Reverse-Battery Protection

■

No Reverse Current Flow from Output to Input

■

Thermal Limiting

■

Thermally Enhanced 16-Lead TSSOP and

12-Pin (4mm × 3mm) DFN Package

APPLICATIONS

■

Low Current High Voltage Regulators

■

Regulator for Battery-Powered Systems

■

The device is available with an adjustable output with a

1.24Vreferencevoltage.TheLT3013regulator isavailable

in the thermally enhanced 16-lead TSSOP and the low

proﬁle (0.75mm), 12-pin (4mm × 3mm) DFN package,

both providing excellent thermal characteristics.

Telecom Applications

Automotive Applications

■

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Dropout Voltage

TYPICAL APPLICATION

400

350

300

250

200

150

100

50

5V Supply with Shutdown

V

OUT

IN

OUT

ADJ

5V

250mA

V

LT3013

IN

750k

249k

5.4V TO

80V

1.6M

3.3µF

1µF

SHDN

PWRGD

GND

C

T

3013 TA01

V

OUTPUT

1000pF

SHDN

<0.3V

>2.0V

OFF

ON

0

50

100

150

200

250

OUTPUT CURRENT (mA)

3013 TA02

3013fc

1

LT3013

ABSOLUTE MAXIMUM RATINGS

(Note 1)

Output Short-Circuit Duration .......................... Indeﬁnite

Storage Temperature Range

IN Pin Voltage .........................................................±±0V

OUT Pin Voltage......................................................±60V

IN to OUT Differential Voltage .................................±±0V

ADJ Pin Voltage ....................................................... ±7V

SHDN Pin Input Voltage..........................................±±0V

CT Pin Voltage .................................................7V, –0.5V

PWRGD Pin Voltage.......................................±0V, –0.5V

TSSOP Package................................. –65°C to 150°C

DFN Package...................................... –65°C to 125°C

Operating Junction Temperature Range

(Notes 3, 10, 11)

LT3013E............................................. –40°C to 125°C

LT3013HFE ........................................ –40°C to 140°C

Lead Temperature (FE16 Soldering, 10 sec) ......... 300°C

PACKAGE/ORDER INFORMATION

TOP VIEW

GND

NC

1

2

3

4

5

6

7

8

16

15

14

GND

NC

OUT

1

2

3

4

5

6

12 NC

11 IN

10 IN

OUT

IN

OUT

13 IN

17

13

ADJ

12

11

10

9

NC

ADJ

9

8

7

NC

GND

SHDN

GND

SHDN

PWRGD

GND

C

T

PWRGD

C

T

GND

DE PACKAGE

12-LEAD (4mm × 3mm) PLASTIC DFN

FE PACKAGE

16-LEAD PLASTIC TSSOP

= 140°C, θ = 40°C/W, θ = 16°C/W

EXPOSED PAD (PIN 17) IS GND

MUST BE SOLDERED TO PCB

T

= 125°C, θ = 40°C/W, θ = 16°C/W

JA JC

EXPOSED PAD (PIN 13) IS GND

MUST BE SOLDERED TO PCB

JMAX

T

JMAX

JA JC

ORDER PART NUMBER

LT3013EDE

DE PART MARKING

3013

ORDER PART NUMBER

FE PART MARKING*

LT3013EFE

LT3013HFE

3013EFE

3013HFE

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

3013fc

2

LT3013

(LT3013E)

ELECTRICAL CHARACTERISTICS

The

●

denotes the speciﬁcations which apply over the –40°C to 125°C operating temperature range, otherwise speciﬁcations are at T_J= 25°C.

PARAMETER

CONDITIONS

= 250mA

MIN

TYP

MAX

UNITS

●

Minimum Input Voltage

ADJ Pin Voltage (Notes 2,3)

I

4

4.75

V

LOAD

V

= 4V, I

= 1mA

1.225

1.2

1.24

1.255

1.2±

V

IN

LOAD

●

4.75V < V < ±0V, 1mA < I

< 250mA

LOAD

IN

Line Regulation

ΔV = 4V to ±0V, I

IN

= 1mA (Note 2)

0.1

7

5

mV

LOAD

Load Regulation (Note 2)

V

IN

V

IN

= 4.75V, ΔI

= 1mA to 250mA

12

25

mV

LOAD

●

Dropout Voltage

I

= 10mA

160

250

400

230

300

mV

LOAD

V

= V

(Notes 4, 5)

IN

OUT(NOMINAL)

I

= 50mA

340

420

mV

LOAD

I

= 250mA

490

620

mV

LOAD

●

GND Pin Current

I

= 0mA

= 100mA

= 250mA

65

3

10

120

μA

mA

LOAD

V

= 4.75V

IN

●

(Notes 4, 6)

1±

Output Voltage Noise

ADJ Pin Bias Current

Shutdown Threshold

C

= 10μF, I

= 250mA, BW = 10Hz to 100kHz

100

30

μV

RMS

OUT

LOAD

(Note 7 )

100

2

nA

●

V

OUT

V

OUT

= Off to On

= On to Off

1.3

0.±

V

0.3

±5

SHDN Pin Current (Note ±)

V

SHDN

V

SHDN

= 0V

= 6V

0.3

0.1

2

1

μA

Quiescent Current in Shutdown

PWRGD Trip Point

V

IN

= 6V, V

= 0V

SHDN

1

5

μA

%

●

% of Nominal Output Voltage, Output Rising

% of Nominal Output Voltage

90

94

PWRGD Trip Point Hysteresis

PWRGD Output Low Voltage

1.1

140

3.0

1.6

75

%

I

= 50μA

250

6

mV

μA

V

PWRGD

C Pin Charging Current

T

C Pin Voltage Differential

T

V – V

CT(PWRGD High) CT(PWRGD Low)

Ripple Rejection

Current Limit

V

IN

= 7V(Avg), V

= 0.5V , f

= 120Hz, I = 250mA

LOAD

65

dB

RIPPLE

P-P RIPPLE

V

IN

V

IN

= 7V, V

= 0V

OUT

400

●

= 4.75V, ΔV

= –0.1V (Note 2)

250

OUT

Reverse Output Current (Note 9)

V

OUT

= 1.24V, V < 1.24V (Note 2)

12

25

μA

IN

(LT3013H)

ELECTRICAL CHARACTERISTICS

The

●

denotes the speciﬁcations which apply over the –40°C to 140°C operating temperature range, otherwise speciﬁcations are at T_J= 25°C.

PARAMETER

CONDITIONS

= 200mA

MIN

TYP

MAX

UNITS

●

Minimum Input Voltage

ADJ Pin Voltage (Notes 2,3)

I

4

4.75

V

LOAD

V

= 4V, I

= 1mA

1.225

1.2

1.24

1.255

1.2±

V

IN

LOAD

●

4.75V < V < ±0V, 1mA < I

< 200mA

LOAD

IN

Line Regulation

ΔV = 4V to ±0V, I

IN

= 1mA (Note 2)

0.1

6

5

mV

LOAD

Load Regulation (Note 2)

V

IN

V

IN

= 4.75V, ΔI

= 1mA to 200mA

12

30

mV

LOAD

●

3013fc

3

LT3013

(LT3013H)

ELECTRICAL CHARACTERISTICS

The

●

denotes the speciﬁcations which apply over the –40°C to 140°C operating temperature range, otherwise speciﬁcations are at T_J= 25°C.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Dropout Voltage

IN

I

= 10mA

160

230

320

mV

LOAD

●

V

= V

(Notes 4, 5)

OUT(NOMINAL)

I

= 50mA

250

360

340

450

mV

LOAD

I

= 200mA

490

630

mV

LOAD

●

GND Pin Current

I

= 0mA

= 100mA

= 200mA

65

3

7

130

μA

mA

LOAD

V

= 4.75V

IN

●

(Notes 4, 6)

1±

Output Voltage Noise

ADJ Pin Bias Current

Shutdown Threshold

C

= 10μF, I

= 200mA, BW = 10Hz to 100kHz

100

30

μV

RMS

OUT

LOAD

(Note 7)

100

2

nA

●

V

OUT

V

OUT

= Off to On

= On to Off

1.3

0.±

V

0.3

±5

SHDN Pin Current (Note ±)

V

SHDN

V

SHDN

= 0V

= 6V

0.3

0.1

2

1

μA

Quiescent Current in Shutdown

PWRGD Trip Point

V

IN

= 6V, V

= 0V

SHDN

1

5

μA

%

●

% of Nominal Output Voltage, Output Rising

% of Nominal Output Voltage

90

95

PWRGD Trip Point Hysteresis

PWRGD Output Low Voltage

1.1

140

3.0

1.6

75

%

I

= 50μA

250

6

mV

μA

V

PWRGD

C Pin Charging Current

T

C Pin Voltage Differential

T

V – V

CT(PWRGD High) CT(PWRGD Low)

Ripple Rejection

Current Limit

V

IN

= 7V(Avg), V

= 0.5V , f

= 120Hz, I = 200mA

LOAD

65

dB

RIPPLE

P-P RIPPLE

V

IN

V

IN

= 7V, V

= 0V

OUT

400

mA

●

= 4.75V, ΔV

= –0.1V (Note 2)

200

OUT

Reverse Output Current (Note 9)

V

OUT

= 1.24V, V < 1.24V (Note 2)

12

25

μA

IN

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 6: GND pin current is tested with V = 4.75V and a current source

IN

load. This means the device is tested while operating close to its dropout

region. This is the worst-case GND pin current. The GND pin current will

decrease slightly at higher input voltages.

Note 2: The LT3013 is tested and speciﬁed for these conditions with the

ADJ pin connected to the OUT pin.

Note 7: ADJ pin bias current ﬂows into the ADJ pin.

Note 8: SHDN pin current ﬂows out of the SHDN pin.

Note 3: Operating conditions are limited by maximum junction

temperature. The regulated output voltage speciﬁcation will not apply

for all possible combinations of input voltage and output current. When

operating at maximum input voltage, the output current range must be

limited. When operating at maximum output current, the input voltage

range must be limited.

Note 4: To satisfy requirements for minimum input voltage, the LT3013 is

tested and speciﬁed for these conditions with an external resistor divider

(249k bottom, 649k top) for an output voltage of 4.5V. The external

resistor divider will add a 5μA DC load on the output.

Note 9: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the rated output voltage. This current ﬂows into the OUT

pin and out the GND pin.

Note 10: The LT3013E is guaranteed to meet performance speciﬁcations

from 0°C to 125°C operating junction temperature. Speciﬁcations over

the –40°C to 125°C operating junction temperature range are assured by

design, characterization and correlation with statistical process controls.

The LT3013H is tested to the LT3013H Electrical Characteristics table at

140°C operating junction temperature. High junction temperatures degrade

operating lifetimes. Operating lifetime is derated at junction temperatures

greater than 125°C.

Note 11: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C (LT3013E) or 140°C (LT3013H) when

overtemperature protection is active. Continuous operation above the

speciﬁed maximum operating junction temperature may impair device

Note 5: Dropout voltage is the minimum input to output voltage differential

needed to maintain regulation at a speciﬁed output current. In dropout, the

output voltage will be equal to (V – V

).

IN

DROPOUT

reliability.

3013fc

4

LT3013

TYPICAL PERFORMANCE CHARACTERISTICS

Typical Dropout Voltage

Guaranteed Dropout Voltage

Dropout Voltage

600

500

400

300

200

100

0

600

500

400

300

200

100

0

600

500

= TEST POINTS

T

≤ 125°C

J

T

= 125°C

J

I

= 250mA

L

I

L

= 100mA

400

300

T

≤ 25°C

J

T

= 25°C

J

I

= 50mA

L

I

L

= 10mA

= 1mA

200

100

0

I

L

0

50

100

150

200

250

0

50

100

150

200

250

–50

0

25 50 75

125 150

100

–25

OUTPUT CURRENT (mA)

TEMPERATURE (°C)

3013 G01

3013 G02

3013 G03

Quiescent Current

ADJ Pin Voltage

120

100

80

60

40

20

0

1.260

V

= 6V

IN

L

I

= 1mA

L

R

I

= ∞

1.255

1.250

= 0

L

V

= V

IN

SHDN

1.245

1.240

1.235

1.230

1.225

V

= GND

SHDN

1.220

–50

0

25 50 75 100 125 150

TEMPERATURE (°C)

3013 G04

–25

–50

0

25 50 75 100 125 150

TEMPERATURE (°C)

3013 G05

–25

3013fc

5

LT3013

TYPICAL PERFORMANCE CHARACTERISTICS

Quiescent Current

GND Pin Current

250

225

200

175

150

125

100

75

1.2

1.0

0.8

0.6

0.4

0.2

0

80

70

60

50

40

30

20

10

0

T

R

V

= 25°C

T

= 25°C

J

L

T

= 25°C

= ∞

J

L

=

∞

*FOR V

= 1.24V

OUT

R

= 1.24V

OUT

R

I

= 49.6Ω

L

= 25mA*

V

= V

IN

SHDN

R

I

= 124Ω

= 10mA*

V

= V

IN

L

SHDN

V

= GND

R

L

I

L

= 1.24k

= 1mA*

SHDN

50

25

V

= GND

SHDN

0

10 20 30 40 50 60 70 80

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

INPUT VOLTAGE (V)

3013 G06b

3013 G07

3013 G06

GND Pin Current

GND Pin Current vs I

LOAD

10

9

8

7

6

5

4

3

2

1

0

T

= 25°C, *FOR V

= 1.24V

OUT

V

J

= 4.75V

J

IN

9

8

7

6

5

4

3

2

1

0

T

= 25°C

R

L

= 4.96Ω

L

I

= 250mA*

R

= 12.4Ω

= 100mA*

L

I

L

R

= 24.8Ω, I = 50mA*

L

0

1

2

3

4

5

6

7

8

9

10

0

50

100

150

200

250

INPUT VOLTAGE (V)

LOAD CURRENT (mA)

3013 G08

3013 G09

3013fc

6

LT3013

TYPICAL PERFORMANCE CHARACTERISTICS

SHDN Pin Current

SHDN Pin Threshold

SHDN Pin Current

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

0.6

0.5

0.4

0.3

0.2

0.1

0

0.6

0.5

0.4

0.3

0.2

0.1

0

V

= 6V

T

J

= 25°C

IN

SHDN

= 0V

CURRENT FLOWS

OUT OF SHDN PIN

CURRENT FLOWS

OUT OF SHDN PIN

OFF-TO-ON

ON-TO-OFF

–50

0

25 50 75 100 125 150

TEMPERATURE (°C)

–25

–50

0

25 50 75

125 150

100

–25

0

0.5

1.0

1.5

2.0

2.5

3.0

TEMPERATURE (°C)

SHDN PIN VOLTAGE (V)

3013 G10

3013 G12

3013 G11

ADJ Pin Bias Current

PWRGD Trip Point

120

100

80

95

94

93

92

91

90

89

88

87

86

85

OUTPUT RISING

OUTPUT FALLING

60

40

20

0

–50

0

25 50 75 100 125 150

TEMPERATURE (°C)

3013 G13

–50

0

25 50 75

125 150

100

–25

TEMPERATURE (°C)

3013 G25

3013fc

7

LT3013

TYPICAL PERFORMANCE CHARACTERISTICS

PWRGD Output Low Voltage

C Charging Current

PWRGD TRIPPED HIGH

C Comparator Thresholds

T

200

180

160

140

120

100

80

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

I

= 50µA

PWRGD

V

(HIGH)

CT

60

40

V

(LOW)

20

CT

0

–50

0

25 50 75 100 125 150

–50

–25

0

25 50 75 100 125 150

TEMPERATURE (°C)

3013 G28

–25

–50

0

25 50 75 100 125 150

TEMPERATURE (°C)

3013 G27

–25

TEMPERATURE (°C)

3013 G26

Current Limit

700

600

500

400

300

200

100

0

1000

V

= 0V

OUT

900

800

700

600

500

400

300

200

100

0

T

= 25°C

J

T

= 125°C

J

V

= 7V

IN

OUT

= 0V

0

10 20 30 40 50 60 70 80

–50

0

25 50 75 100 125 150

–25

TEMPERATURE (°C)

INPUT VOLTAGE (V)

3013 G15

3013 G14

3013fc

8

LT3013

TYPICAL PERFORMANCE CHARACTERISTICS

Reverse Output Current

Input Ripple Rejection

92

88

84

80

76

72

68

64

60

120

100

80

200

180

160

140

120

100

80

V

= 0V

= V

T

V

= 25°C

IN

OUT

J

= 1.24V

ADJ

= 0V

IN

OUT

= V

ADJ

CURRENT FLOWS

INTO OUTPUT PIN

60

ADJ

PIN CLAMP

(SEE APPLICATIONS

INFORMATION)

40

60

40

V

L

= 4.75V + 0.5V RIPPLE AT f = 120Hz

P-P

IN

20

0

I

= 250mA

20

V

OUT

= 1.24V

0

–50

–25

0

25 50 75 100 125 150

–50

0

25 50 75 100 125 150

TEMPERATURE (°C)

–25

0

1

2

3

4

5

6

7

8

9

10

TEMPERATURE (°C)

OUTPUT VOLTAGE (V)

3013 G18

3013 G17

3013 G16

Input Ripple Rejection

Minimum Input Voltage

100

90

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

V

I

= 4.75V + 50mV

= 250mA

RIPPLE

RMS

IN

LOAD

I

= 250mA

LOAD

80

70

60

50

C

= 10µF

OUT

40

30

20

10

0

C

= 3.3µF

OUT

10

100

1k

10k

100k

1M

–50

0

25 50 75 100 125 150

TEMPERATURE (°C)

3013 G20

–25

FREQUENCY (Hz)

3013 G19

3013fc

9

LT3013

TYPICAL PERFORMANCE CHARACTERISTICS

Load Regulation

Output Noise Spectral Density

10

1

0

C

I

= 3.3µF

= 250mA

∆I = 1mA TO 250mA

L

OUT

–2

–4

LOAD

–6

–8

–10

–12

–14

–16

–18

–20

0.1

0.01

–50

0

25 50 75 100 125 150

TEMPERATURE (°C)

3013 G21

–25

10

100

1k

FREQUENCY (Hz)

10k

100k

3013 G22

10Hz to 100kHz Output Noise

Transient Response

0.15

0.10

0.05

0

V

OUT

–0.05

–0.10

–0.15

300

200

100

0

100µV/DIV

V

C

= 6V

= 5V

= 3.3µF CERAMIC

IN

OUT

IN

= 3.3µF CERAMIC

LOAD

OUT

∆I

= 100mA TO 200mA

3013 G23

C

I

= 10µF

1ms/DIV

OUT

L

OUT

= 250mA

V

= 1.24V

0

100

200

300

400

500

TIME (µs)

3013 G24

3013fc

10

LT3013

PIN FUNCTIONS ^{(DFN Package)/(TSSOP Package)}

NC (Pins 1, 9, 12)/(Pins 2, 12, 15): No Connect. These

pins have no internal connection; connecting NC pins to a

copperareaforheatdissipationprovidesasmallimprove-

ment in thermal performance.

SHDN (Pin 8)/(Pin 11): Shutdown. The SHDN pin is used

to put the LT3013 into a low power shutdown state. The

output will be off when the SHDN pin is pulled low. The

SHDNpincanbedriveneitherby5Vlogicoropen-collector

logic with a pull-up resistor. The pull-up resistor is only

required to supply the pull-up current of the open-collec-

tor gate, normally several microamperes. If unused, the

OUT (Pins 2, 3)/(Pins 3, 4): Output. The output supplies

power to the load. A minimum output capacitor of 3.3μF

is required to prevent oscillations. Larger output capaci-

tors will be required for applications with large transient

loadstolimitpeakvoltagetransients. SeetheApplications

Information section for more information on output ca-

pacitance and reverse output characteristics.

SHDN pin must be tied to a logic high or V .

IN

C (Pin 7)/(Pin 10): Timing Capacitor. The C pin allows

T

the use of a small capacitor to delay the timing between

the point where the output crosses the PWRGD thresh-

old and the PWRGD ﬂag changes to a high impedance

state. Current out of this pin during the charging phase

is 3μA. The voltage difference between the PWRGD low

and PWRGD high states is 1.6V (see the Applications

Information Section).

ADJ (Pin 4)/(Pin 5): Adjust. This is the input to the error

ampliﬁer. This pin is internally clamped to ±7V. It has a

bias current of 30nA which ﬂows into the pin (see curve

of ADJ Pin Bias Current vs Temperature in the Typical

Performance Characteristics). The ADJ pin voltage is

1.24V referenced to ground, and the output voltage range

is 1.24V to 60V.

IN (Pins 10, 11)/(Pins 13,14): Input. Power is supplied

to the device through the IN pin. A bypass capacitor is

required on this pin if the device is more than six inches

away from the main input ﬁlter capacitor. In general, the

output impedance of a battery rises with frequency, so it is

advisabletoincludeabypasscapacitorinbattery-powered

circuits. A bypass capacitor in the range of 1μF to 10μF

is sufﬁcient. The LT3013 is designed to withstand reverse

voltages on the IN pin with respect to ground and the OUT

pin. In the case of a reversed input, which can happen if

a battery is plugged in backwards, the LT3013 will act as

if there is a diode in series with its input. There will be no

reverse current ﬂow into the LT3013 and no reverse volt-

age will appear at the load. The device will protect both

itself and the load.

GND (Pins 5, 13)/(Pins 1, 6, 8, 9, 16, 17): Ground. The

exposedbacksideofthepackageisanelectricalconnection

forGND.Assuch,toensureoptimumdeviceoperationand

thermalperformance,theexposedpadmustbeconnected

directly to pin 5/pin 6 on the PC board.

PWRGD (Pin 6)/(Pin 7): Power Good. The PWRGD ﬂag is

an open collector ﬂag to indicate that the output voltage

has come up to above 90% of the nominal output voltage.

There is no internal pull-up on this pin; a pull-up resistor

must be used. The PWRGD pin will change state from an

open-collector to high impedance after both the output is

above 90% of the nominal voltage and the capacitor on

the CT pin has charged through a 1.6V differential. The

maximum pull-down current of the PWRGD pin in the

low state is 50μA.

3013fc

11

LT3013

APPLICATIONS INFORMATION

The LT3013 is a 250mA high voltage low dropout regula-

tor with micropower quiescent current and shutdown.

The device is capable of supplying 250mA at a dropout

voltage of 400mV. The low operating quiescent current

(65μA) drops to 1μA in shutdown. In addition to the

low quiescent current, the LT3013 incorporates several

protection features which make it ideal for use in bat-

tery-powered systems. The device is protected against

both reverse input and reverse output voltages. In battery

backup applications where the output can be held up by

a backup battery when the input is pulled to ground, the

LT3013 acts like it has a diode in series with its output

and prevents reverse current ﬂow.

Note that in shutdown the output is turned off and the

divider current will be zero.

The adjustable device is tested and speciﬁed with the

ADJ pin tied to the OUT pin and a 5μA DC load (unless

otherwise speciﬁed) for an output voltage of 1.24V. Speci-

ﬁcations for output voltages greater than 1.24V will be

proportional to the ratio of the desired output voltage to

1.24V; (V /1.24V). For example, load regulation for an

OUT

outputcurrentchangeof1mAto250mAis–7mVtypicalat

V

OUT

= 1.24V. At V

= 12V, load regulation is:

OUT

(12V/1.24V) • (–7mV) = –6±mV

Output Capacitance and Transient Response

Adjustable Operation

The LT3013 is designed to be stable with a wide range of

output capacitors. The ESR of the output capacitor affects

stability, most notably with small capacitors. A minimum

output capacitor of 3.3μF with an ESR of 3Ω or less is

recommended to prevent oscillations. The LT3013 is a

micropower device and output transient response will be

a function of output capacitance. Larger values of output

capacitance decrease the peak deviations and provide

improved transient response for larger load current

changes. Bypass capacitors, used to decouple individual

components powered by the LT3013, will increase the

effective output capacitor value.

The LT3013 has an output voltage range of 1.24V to 60V.

The output voltage is set by the ratio of two external

resistors as shown in Figure 1. The device servos the

output to maintain the voltage at the adjust pin at 1.24V

referenced to ground. The current in R1 is then equal to

1.24V/R1 and the current in R2 is the current in R1 plus

the ADJ pin bias current. The ADJ pin bias current, 30nA

at 25°C, ﬂows through R2 into the ADJ pin. The output

voltagecanbecalculatedusingtheformulainFigure1.The

value of R1 should be less than 250k to minimize errors

in the output voltage caused by the ADJ pin bias current.

V

OUT

IN

OUT

ADJ

R2

V

= 1.24V 1 +

= 1.24V

+ (I )(R2)

ADJ

OUT

+

R1

LT3013

GND

R2

R1

V

IN

V

I

ADJ

= 30nA AT 25°C

OUTPUT RANGE = 1.24V TO 60V

ADJ

3013 F01

Figure 1. Adjustable Operation

3013fc

12

LT3013

APPLICATIONS INFORMATION

Extra consideration must be given to the use of ceramic

capacitors. Ceramic capacitors are manufactured with a

variety of dielectrics, each with different behavior across

temperature and applied voltage. The most common

dielectrics used are speciﬁed with EIA temperature char-

acteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and

Y5V dielectrics are good for providing high capacitances

in a small package, but they tend to have strong voltage

and temperature coefﬁcients as shown in Figures 2 and 3.

When used with a 5V regulator, a 16V 10μF Y5V capacitor

can exhibit an effective value as low as 1μF to 2μF for the

DC bias voltage applied and over the operating tempera-

ture range. The X5R and X7R dielectrics result in more

stable characteristics and are more suitable for use as the

output capacitor. The X7R type has better stability across

temperature, while the X5R is less expensive and is avail-

able in higher values. Care still must be exercised when

using X5R and X7R capacitors; the X5R and X7R codes

only specify operating temperature range and maximum

capacitancechangeovertemperature.Capacitancechange

due to DC bias with X5R and X7R capacitors is better than

Y5VandZ5Ucapacitors,butcanstillbesigniﬁcantenough

to drop capacitor values below appropriate levels. Capaci-

tor DC bias characteristics tend to improve as component

casesizeincreases, butexpectedcapacitanceatoperating

voltage should be veriﬁed.

Voltage and temperature coefﬁcients are not the only

sources of problems. Some ceramic capacitors have a

piezoelectric response. A piezoelectric device generates

voltageacrossitsterminalsduetomechanicalstress,simi-

lartothewayapiezoelectricaccelerometerormicrophone

works. For a ceramic capacitor the stress can be induced

by vibrations in the system or thermal transients.

PWRGD Flag and Timing Capacitor Delay

The PWRGD ﬂag is used to indicate that the ADJ pin volt-

age is within 10% of the regulated voltage. The PWRGD

pin is an open-collector output, capable of sinking 50μA

of current when the ADJ pin voltage is low. There is no

internal pull-up on the PWRGD pin; an external pull-up

resistor must be used. When the ADJ pin rises to within

10% of its ﬁnal reference value, a delay timer is started.

At the end of this delay, programmed by the value of the

capacitor on the C pin, the PWRGD pin switches to a high

T

impedance and is pulled up to a logic level by an external

pull-up resistor.

To calculate the capacitor value on the C pin, use the

T

following formula:

I_CT•t_DELAY

V_CT(HIGH)– V_CT(LOW)

C_TIME

=

40

20

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

0

X5R

0

–20

X5R

Y5V

–20

–40

–60

–80

–40

–60

Y5V

–80

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

–100

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

0

8

12 14

2

4

6

10

16

DC BIAS VOLTAGE (V)

3013 F03

3013 F02

Figure 2. Ceramic Capacitor DC Bias Characteristics

Figure 3. Ceramic Capacitor Temperature Characteristics

3013fc

13

LT3013

APPLICATIONS INFORMATION

Figure 4 shows a block diagram of the PWRGD circuit. At

startup,thetimingcapacitorisdischargedandthePWRGD

pin will be held low. As the output voltage increases and

the ADJ pin crosses the 90% threshold, the JK ﬂip-ﬂop

is reset, and the 3μA current source begins to charge the

Thermal Considerations

The power handling capability of the device will be limited

by the maximum rated junction temperature (125°C for

LT3013E or 140°C for LT3013HFE). The power dissipated

by the device will be made up of two components:

timing capacitor. Once the voltage on the C pin reaches

T

1. Output current multiplied by the input/output voltage

the V

threshold (approximately 1.7V at 25°C), the

CT(HIGH)

differential: I

• (V – V ) and,

capacitor voltage is clamped and the PWRGD pin is set to

a high impedance state.

OUT

IN OUT

2. GND pin current multiplied by the input voltage:

• V .

I

Duringnormaloperation,aninternalglitchﬁlterwillignore

shorttransients(<15μs).Longertransientsbelowthe90%

threshold will reset the JK ﬂip-ﬂop. This ﬂip-ﬂop ensures

GND

IN

The GND pin current can be found by examining the GND

Pin Current curves in the Typical Performance Character-

istics. Power dissipation will be equal to the sum of the

two components listed above.

that the capacitor on the C pin is quickly discharged all

T

the way to the V

threshold before re-starting the

CT(LOW)

time delay. This provides a consistent time delay after the

ADJ pin is within 10% of the regulated voltage before the

PWRGD pin switches to high impedance.

The LT3013 has internal thermal limiting designed to pro-

tectthedeviceduringoverloadconditions. Forcontinuous

normal conditions the maximum junction temperature

rating of 125°C (E-grade) or 140°C (H-grade)must not be

exceeded. It is important to give careful consideration to

all sources of thermal resistance from junction to ambi-

ent. Additional heat sources mounted nearby must also

be considered.

I

CT

3µA

C

T

PWRGD

+

–

ADJ

V

– V

BE

CT(HIGH)

J

Q

(~1.1V)

K

V

REF

• 90%

–

+

V

CT(LOW)

~0.1V

3013 F04

Figure 4. PWRGD Circuit Block Diagram

3013fc

14

LT3013

APPLICATIONS INFORMATION

For surface mount devices, heat sinking is accomplished

by using the heat spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through-holes can also be used to spread the heat gener-

ated by power devices.

Calculating Junction Temperature

Example 1: Given an output voltage of 5V, an input voltage

range of ±V to 12V, an output current range of 0mA to

250mA, and a maximum ambient temperature of 30°C,

what will the maximum junction temperature be?

The following tables list thermal resistance for several

different board sizes and copper areas. All measurements

were taken in still air on 3/32” FR-4 board with one ounce

copper.

The power dissipated by the device will be equal to:

I

• (V

– V ) + (I

• V

)

IN(MAX)

OUT(MAX)

IN(MAX)

OUT

GND

where:

Table 1. TSSOP Measured Thermal Resistance

I

= 250mA

= 12V

OUT(MAX)

COPPER AREA

TOPSIDE

THERMAL RESISTANCE

BOARD AREA

2500 sq mm

(JUNCTION-TO-AMBIENT)

V

IN(MAX)

2500 sq mm

1000 sq mm

225 sq mm

100 sq mm

40°C/W

45°C/W

50°C/W

62°C/W

I

at (I = 250mA, V = 12V) = ±mA

OUT IN

GND

So:

P = 250mA • (12V – 5V) + (±mA • 12V) = 1.±5W

The thermal resistance will be in the range of 40°C/W to

62°C/W depending on the copper area. So the junction

temperature rise above ambient will be approximately

equal to:

Table 2. DFN Measured Thermal Resistance

COPPER AREA

TOPSIDE

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

BOARD AREA

2500 sq mm

1000 sq mm

225 sq mm

100 sq mm

40°C/W

45°C/W

1.±5W • 50°C/W = 92.3°C

50°C/W

The maximum junction temperature will then be equal to

the maximum junction temperature rise above ambient

plus the maximum ambient temperature or:

62°C/W

The thermal resistance junction-to-case (θ ), measured

at the exposed pad on the back of the die, is 16°C/W.

JC

T

= 30°C + 92.3°C = 122.3°C

JMAX

Continuous operation at large input/output voltage dif-

ferentials and maximum load current is not practical

due to thermal limitations. Transient operation at high

input/output differentials is possible. The approximate

thermal time constant for a 2500sq mm 3/32” FR-4 board

with maximum topside and backside area for one ounce

copper is 3 seconds. This time constant will increase as

more thermal mass is added (i.e., vias, larger board, and

other components).

Example 2: Given an output voltage of 5V, an input voltage

of 4±V that rises to 72V for 5ms(max) out of every 100ms,

and a 5mA load that steps to 200mA for 50ms out of ev-

ery 250ms, what is the junction temperature rise above

ambient? Using a 500ms period (well under the time

constant of the board), power dissipation is as follows:

P1(4±V in, 5mA load) = 5mA • (4±V – 5V)

+ (200μA • 4±V) = 0.23W

Foranapplicationwithtransienthighpowerpeaks,average

power dissipation can be used for junction temperature

calculations if the pulse period is signiﬁcantly less than

the thermal time constant of the device and board.

P2(4±V in, 50mA load) = 200mA • (4±V – 5V)

+ (±mA • 4±V) = ±.9±W

P3(72V in, 5mA load) = 5mA • (72V – 5V)

+ (200μA • 72V) = 0.35W

P4(72V in, 50mA load) = 200mA • (72V – 5V)

+ (±mA • 72V) = 13.9±W

3013fc

15

LT3013

APPLICATIONS INFORMATION

Operation at the different power levels is as follows:

Protection Features

76% operation at P1, 19% for P2, 4% for P3, and

1% for P4.

TheLT3013incorporatesseveralprotectionfeatureswhich

make it ideal for use in battery-powered circuits. In ad-

dition to the normal protection features associated with

monolithicregulators,suchascurrentlimitingandthermal

limiting, thedeviceisprotectedagainstreverse-inputvolt-

ages, and reverse voltages from output to input.

P

= 76%(0.23W) + 19%(±.9±W) + 4%(0.35W)

EFF

+ 1%(13.9±W) = 2.03W

With a thermal resistance in the range of 40°C/W to

62°C/W, this translates to a junction temperature rise

above ambient of ±1°C to 125°C.

Current limit protection and thermal overload protection

areintendedtoprotectthedeviceagainstcurrentoverload

conditions at the output of the device. For normal opera-

tion, the junction temperature should not exceed 125°C

(LT3013E) or 140°C (LT3013HFE).

High Temperature Operation

CaremustbetakenwhendesigningLT3013applicationsto

operate at high ambient temperatures. The LT3013 works

at elevated temperatures but erratic operation can occur

duetounforeseenvariationsinexternalcomponents.Some

tantalum capacitors are available for high temperature

operation, but ESR is often several ohms; capacitor ESR

above 3Ω is unsuitable for use with the LT3013. Ceramic

capacitor manufacturers (Murata, AVX, TDK, and Vishay

Vitramonatthiswriting)nowofferceramiccapacitorsthat

areratedto150°CusinganX±Rdielectric.Deviceinstability

will occur if output capacitor value and ESR are outside

design limits at elevated temperature and operating DC

voltage bias (see information on capacitor characteristics

underOutputCapacitanceandTransientResponse).Check

each passive component for absolute value and voltage

ratings over the operating temperature range.

Like many IC power regulators, the LT3013 has safe oper-

ating area protection. The safe area protection decreases

the current limit as input voltage increases and keeps

the power transistor inside a safe operating region for

all values of input voltage. The protection is designed to

provide some output current at all values of input voltage

up to the device breakdown. The SOA protection circuitry

for the LT3013 uses a current generated when the input

voltage exceeds 25V to decrease current limit. This cur-

rent shows up as additional quiescent current for input

voltages above 25V. This increase in quiescent current

occurs both in normal operation and in shutdown (see

curve of Quiescent Current in the Typical Performance

Characteristics).

Leakagesincapacitorsorfromsolderﬂuxleftafterinsuf-

ﬁcient board cleaning adversely affects low quiescent

current operation. The output voltage resistor divider

should use a maximum bottom resistor value of 124k to

compensate for high temperature leakage, setting divider

current to 10μA. Consider junction temperature increase

due to power dissipation in both the junction and nearby

components to ensure maximum speciﬁcations are not

violated for the device or external components.

The input of the device will withstand reverse voltages of

±0V. No negative voltage will appear at the output. The

device will protect both itself and the load. This provides

protection against batteries which can be plugged in

backward.

The ADJ pin of the device can be pulled above or below

ground by as much as 7V without damaging the device.

If the input is left open circuit or grounded, the ADJ pin

will act like an open circuit when pulled below ground,

and like a large resistor (typically 100k) in series with a

diode when pulled above ground. If the input is powered

by a voltage source, pulling the ADJ pin below the refer-

ence voltage will cause the device to current limit. This

will cause the output to go to a unregulated high voltage.

Pulling the ADJ pin above the reference voltage will turn

off all output current.

3013fc

16

LT3013

APPLICATIONS INFORMATION

In situations where the ADJ pin is connected to a resistor

dividerthatwouldpulltheADJpinaboveits7Vclampvolt-

age if the output is pulled high, the ADJ pin input current

must be limited to less than 5mA. For example, a resistor

divider is used to provide a regulated 1.5V output from the

1.24V reference when the output is forced to 60V. The top

resistor of the resistor divider must be chosen to limit the

current into the ADJ pin to less than 5mA when the ADJ

pin is at 7V. The 53V difference between the OUT and ADJ

pins divided by the 5mA maximum current into the ADJ

pin yields a minimum top resistor value of 10.6k.

open circuit. Current ﬂow back into the output will follow

the curve shown in Figure 5. The rise in reverse output

current above 7V occurs from the breakdown of the 7V

clamp on the ADJ pin. With a resistor divider on the

regulator output, this current will be reduced depending

on the size of the resistor divider.

When the IN pin of the LT3013 is forced below the OUT

pin or the OUT pin is pulled above the IN pin, input cur-

rent will typically drop to less than 2μA. This can happen

if the input of the LT3013 is connected to a discharged

(low voltage) battery and the output is held up by either

a backup battery or a second regulator circuit. The state

of the SHDN pin will have no effect on the reverse output

current when the output is pulled above the input.

In circuits where a backup battery is required, several

different input/output conditions can occur. The output

voltage may be held up while the input is either pulled

to ground, pulled to some intermediate voltage, or is left

200

T

V

= 25°C

J

= 0V

180

160

140

120

100

80

IN

OUT

= V

ADJ

CURRENT FLOWS

INTO OUTPUT PIN

ADJ

PIN CLAMP

(SEE ABOVE)

60

40

20

0

1

2

3

4

5

6

7

8

9

10

OUTPUT VOLTAGE (V)

3013 F05

Figure 5. Reverse Output Current

3013fc

17

LT3013

TYPICAL APPLICATIONS

5V Buck Converter with Low Current Keep Alive Backup

D2

D1N914

Buck Converter

6

C2

L1^†

15µH

Efﬁciency vs Load Current

0.33µF

BOOST

V

IN

OUT

4

2

100

90

80

70

60

50

5.5V*

V

SW

5V

IN

V

= 5V

OUT

L = 68µH

TO 60V

C3

4.7µF

100V

D1

1A/250mA

V

= 10V

= 42V

10MQ060N

IN

LT1766

CERAMIC

15

14

10

12

SHDN

BIAS

FB

V

R1

15.4k

C1

+

100µF 10V

SOLID

SYNC

GND

R2

4.99k

TANTALUM

V

C

1, 8, 9, 16 11

C

1nF

14

3

5

3013 TA03

0

0.25

0.50

0.75

1.00

1.25

IN

OUT

LOAD CURRENT (A)

LT3013

*FOR INPUT VOLTAGES BELOW 7.5V,

SOME RESTRICTIONS MAY APPLY

^†INCREASE L1 TO 30µH FOR LOAD

CURRENTS ABOVE 0.6A AND TO

60µH ABOVE 1A

OPERATING

CURRENT

100k

750k

249k

11

7

3013 TA04

SHDN

ADJ

HIGH

LOW

PWRGD

GND

C

T

1

10

1000pF

LT3013 Automotive Application

IN

OUT

ADJ

NO PROTECTION

DIODE NEEDED!

+

V

IN

LT3013

SHDN

750k

249k

3.3µF

12V

1µF

LOAD: CLOCK,

SECURITY SYSTEM

ETC

(LATER 42V)

GND

OFF

ON

LT3013 Telecom Application

V

IN

48V

(72V TRANSIENT)

IN

OUT

+

LT3013

750k

249k

BACKUP

BATTERY

NO PROTECTION

DIODE NEEDED!

3.3µF

1µF

LOAD:

SYSTEM MONITOR

ETC

SHDN

ADJ

–

GND

3013 TA05

OFF

ON

3013fc

18

LT3013

PACKAGE DESCRIPTION

DE Package

12-Lead Plastic DFN (4mm × 3mm)

(Reference LTC DWG # 05-0±-1695)

0.38 0.10

12

4.00 0.10

(2 SIDES)

R = 0.115

TYP

7

0.65 0.05

R = 0.20

TYP

3.50 0.05

2.20 0.05 (2 SIDES)

1.70 0.05

3.00 0.10 1.70 0.10

(2 SIDES)

PIN 1

TOP MARK

(NOTE 6)

PIN 1

NOTCH

PACKAGE OUTLINE

(UE12/DE12) DFN 0603

6

0.25 0.05

1

0.75 0.05

0.200 REF

0.25 0.05

0.50

BSC

0.50

BSC

3.30 0.10

(2 SIDES)

3.30 0.05

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING PROPOSED TO BE A VARIATION OF VERSION

(WGED) IN JEDEC PACKAGE OUTLINE M0-229

2. DRAWING NOT TO SCALE

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

3. ALL DIMENSIONS ARE IN MILLIMETERS

FE Package

16-Lead Plastic TSSOP (4.4mm)

(Reference LTC DWG # 05-0±-1663)

Exposed Pad Variation BB

4.90 – 5.10*

(.193 – .201)

3.58

(.141)

3.58

(.141)

16 1514 13 12 1110

9

6.60 0.10

4.50 0.10

2.94

(.116)

6.40

(.252)

BSC

SEE NOTE 4

2.94

(.116)

0.45 0.05

1.05 0.10

0.65 BSC

5

7

8

1

2

3

4

6

RECOMMENDED SOLDER PAD LAYOUT

1.10

(.0433)

MAX

4.30 – 4.50*

(.169 – .177)

0.25

REF

0° – 8°

0.65

(.0256)

BSC

0.09 – 0.20

(.0035 – .0079)

0.50 – 0.75

(.020 – .030)

0.05 – 0.15

(.002 – .006)

0.195 – 0.30

FE16 (BB) TSSOP 0204

(.0077 – .0118)

TYP

NOTE:

1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE

FOR EXPOSED PAD ATTACHMENT

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.150mm (.006") PER SIDE

MILLIMETERS

(INCHES)

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

3013fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

19

LT3013

TYPICAL APPLICATION

Constant Brightness for Indicator LED over Wide Input Voltage Range

RETURN

IN

OUT

LT3013

1µF

3.3µF

OFF

ON

SHDN

GND

ADJ

R

SET

–48V

–48V CAN VARY

FROM –4V TO –80V

3013 TA06

I

= 1.24V/R

SET

LED

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LT1020

125mA, Micropower Regulator and Comparator V : 4.5V to 36V, V

= 2.5V, V = 0.4V, I = 40μA, I = 40μA,

DO Q SD

IN

OUT(MIN)

Comparator and Reference, Class B Outputs, S16, PDIP14 Packages

LT1120/LT1120A

125mA, Micropower Regulator and Comparator V : 4.5V to 36V, V

= 2.5V, V = 0.4V, I = 40μA, I = 10μA,

DO Q SD

IN

OUT(MIN)

Comparator and Reference, Logic Shutdown, Ref Sources and Sinks 2/4mA,

S±, N± Packages

LT1121/LT1121HV 150mA, Micropower, LDO

V : 4.2V to 30/36V, V

= 3.75V, V = 0.42V, I = 30μA, I = 16μA,

IN

OUT(MIN) DO Q SD

Reverse Battery Protection, SOT-223, S±, Z Packages

LT1129

700mA, Micropower, LDO

V : 4.2V to 30V, V = 3.75V, V = 0.4V, I = 50μA, I = 16μA,

IN

OUT(MIN)

DO

Q

SD

DD, S0T-223, S±,TO220-5, TSSOP20 Packages

LT1676

60V, 440mA (I ), 100kHz, High Efﬁciency

V : 7.4V to 60V, V

= 1.24V, I = 3.2mA, I = 2.5μA, S± Package

Q SD

OUT

IN

OUT(MIN)

Step-Down DC/DC Converter

LT1761

100mA, Low Noise Micropower, LDO

V : 1.±V to 20V, V

= 1.22V, V = 0.3V, I = 20μA, I = <1μA,

DO Q SD

IN

OUT(MIN)

Low Noise < 20μV

, Stable with 1μF Ceramic Capacitors, ThinSOT^TMPackage

RMS

LT1762

150mA, Low Noise Micropower, LDO

500mA, Low Noise Micropower, LDO

3A, Low Noise, Fast Transient Response, LDO

V : 1.±V to 20V, V

= 1.22V, V = 0.3V, I = 25μA, I = <1μA,

IN

OUT(MIN) DO Q SD

Low Noise < 20μV

, MS± Package

RMS

LT1763

V : 1.±V to 20V, V

= 1.22V, V = 0.3V, I = 30μA, I = <1μA,

, S± Package

IN

OUT(MIN) DO Q SD

Low Noise < 20μV

RMS

LT1764/LT1764A

V : 2.7V to 20V, V

= 1.21V, V = 0.34V, I = 1mA, I = <1μA,

, “A” Version Stable with Ceramic Capacitors,

IN

OUT(MIN) DO Q SD

Low Noise < 40μV

RMS

DD, TO220-5 Packages

LT1766

60V, 1.2A (I ), 200kHz, High Efﬁciency

V : 5.5V to 60V, V

= 1.2V, I = 2.5mA, I = 25μA, TSSOP16/E Package

Q SD

OUT

IN

OUT(MIN)

Step-Down DC/DC Converter

LT1776

40V, 550mA (I ), 200kHz, High Efﬁciency

V : 7.4V to 40V, V

IN

= 1.24V, I = 3.2mA, I = 30μA, N±, S± Packages

OUT

Q

SD

Step-Down DC/DC Converter

LT1934/LT1934-1

LT1956

300mA/60mA, (I ), Constant Off-Time, High

90% Efﬁciency, V : 3.2V to 34V, V

= 1.25V, I = 14μA, I = <1μA,

OUT

IN

OUT(MIN) Q SD

Efﬁciency Step-Down DC/DC Converter

ThinSOT Package

60V, 1.2A (I ), 500kHz, High Efﬁciency

V : 5.5V to 60V, V

= 1.2V, I = 2.5mA, I = 25μA, TSSOP16/E Package

Q SD

OUT

IN

OUT(MIN)

Step-Down DC/DC Converter

LT1962

300mA, Low Noise Micropower, LDO

V : 1.±V to 20V, V

= 1.22V, V = 0.27V, I = 30μA, I = <1μA,

DO Q SD

IN

OUT(MIN)

Low Noise < 20μV

, MS± Package

RMS

LT1963/LT1963A

1.5A, Low Noise, Fast Transient Response, LDO V : 2.1V to 20V, V

= 1.21V, V = 0.34V, I = 1mA, I = <1μA,

IN

OUT(MIN) DO Q SD

Low Noise < 40μV

, “A” Version Stable with Ceramic Capacitors,

RMS

DD, TO220-5, S0T-223, S± Packages

LT1964

200mA, Low Noise Micropower, Negative LDO

50mA, 3V to ±0V, Low Noise Micropower LDO

V : –1.9V to –20V, V = –1.21V, V = 0.34V, I = 30μA, I = 3μA,

IN

OUT(MIN)

DO

Q

SD

Low Noise < 30μVRMS, Stable with Ceramic Capacitors, ThinSOT Package

LT3010/LT3010H

LT3012/LT3012H

LT3014/HV

V : 3V to ±V, V = 1.275V, V = 0.3V, I = 30μA, I = 1μA,

IN

OUT(MIN)

DO

Q

SD

Low Noise < 100μV

, MS±E Package, H Grade = +140°C T

RMS

JMAX

250mA, 4V to ±0V, Low Dropout Micropower

Linear Regulator

V : 4V to ±0V, V : 1.24V to 60V, V = 0.4V, I = 40μA, I = <1μA,

IN OUT DO Q SD

TSSOP-16E and 4mm × 3mm DFN-12 Packages, H Grade = +140°C T

JMAX

20mA, 3V to ±0V, Low Dropout Micropower

Linear Regulator

V : 3V to ±0V (100V for 2ms, HV version), V : 1.22V to 60V, V = 0.35V,

IN OUT DO

I = 7μA, I = <1μA, ThinSOT and 3mm × 3mm DFN-± Packages

Q

SD

ThinSOT is a trademark of Linear Technology Corporation.

3013fc

LT 0307 REV C • PRINTED IN USA

20 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(40±) 432-1900 FAX: (40±) 434-0507 www.linear.com


型号：	LT3013EDE
厂家：	Linear
描述：	250mA, 4V to 80V Low Dropout Micropower Linear Regulator with PWRGD 250毫安， 4V至80V低压差微功耗线性稳压器，具有PWRGD 稳压器
文件：	总20页 (文件大小：220K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT3013EDE [Linear]

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LT3013_09