LT4352 [Linear]
High Voltage Surge; 高电压浪涌
| 型号： | LT4352 |
| 厂家： | 
Linear |
| 描述： | High Voltage Surge |
| 文件： | 总24页 (文件大小：285K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT4363
High Voltage Surge
Stopper with Current Limit
FEATURES
DESCRIPTION
TheLT®4363surgestopperprotectsloadsfromhighvoltage
transients. It regulates the output during an overvoltage
event, such as load dump in vehicles, by controlling the
gateofanexternalN-channelMOSFET.Theoutputislimited
to a safe value allowing the loads to continue functioning.
The LT4363 also monitors the voltage drop between the
SNS and OUT pins to protect against overcurrent faults.
An internal amplifier limits the voltage across the current
sense resistor to 50mV. In either fault condition, a timer is
startedinverselyproportionaltoMOSFETstress.Beforethe
timer expires, the FLT pin pulls low to warn of an impend-
ing power down. If the condition persists, the MOSFET is
turned off. The LT4363-1 remains off until reset whereas
the LT4363-2 restarts after a cool down period.
n
Withstands Surges Over 80V with V Clamp
CC
n
Wide Operating Voltage Range: 4V to 80V
n
Adjustable Output Clamp Voltage
n
Fast Overcurrent Limit: Less Than 5µs
n
Reverse Input Protection to –60V
n
Adjustable UV/OV Comparator Thresholds
n
Low 7µA Shutdown Current
n
Shutdown Pin Withstands –60V to 100V
n
Adjustable Fault Timer
Controls N-Channel MOSFET
n
n
Less Than 1% Retry Duty Cycle During Faults,
LT4363-2
n
Available in 12-Pin (4mm × 3mm) DFN, 12-Pin
MSOP or 16-Pin SO Packages
Two precision comparators can monitor the input supply
for overvoltage (OV) and undervoltage (UV) conditions.
When the potential is below the UV threshold, the external
MOSFETiskeptoff. Iftheinputsupplyvoltageisabovethe
OV threshold, the MOSFET is not allowed to turn back on.
Back-to-back MOSFETs can be used in lieu of a Schottky
diode for reverse input protection, reducing voltage drop
and power loss. A shutdown pin reduces the quiescent
current to less than 7µA during shutdown.
APPLICATIONS
n
Automotive/Avionic Surge Protection
n
Hot Swap™/Live Insertion
n
High Side Switch for Battery Powered Systems
Intrinsic Safety Applications
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
No R
, ThinSOT and Hot Swap are trademarks of Linear Technology Corporation. All other
SENSE
trademarks are the property of their respective owners.
TYPICAL APPLICATION
4A, 12V Overvoltage Output Regulator with 150V Surge Protection
Overvoltage Protector Regulates
Output at 27V During Transient
10mΩ
FDB33N25
V
OUTPUT
CLAMP
AT 16V
IN
12V
C
= 6.8µF
= 500mA
80V INPUT SURGE
TMR
22µF
1k
I
LOAD
10Ω
57.6k
4.99k
V
IN
0.1µF
V
GATE SNS
OUT
FB
CC
20V/DIV
127k
SMAJ58A
V
CC
SHDN
12V
12V
27V ADJUSTABLE CLAMP
100ms/DIV
DC/DC
UV
LT4363-2
V
CONVERTER
OUT
20V/DIV
49.9k
ENOUT
SHDN
GND
OV
FLT
FAULT
4363 TA01b
GND
TMR
4363 TA01
0.1µF
4363fa
1
LT4363
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
V , SHDN, UV, OV................................... –60V to 100V
Operating Temperature Range
CC
SNS, OUT................................................. –0.3V to 100V
SNS to OUT................................................. –30V to 30V
GATE (Note 3)..................................–0.3V to SNS + 10V
ENOUT, FLT .............................................. –0.3V to 100V
FB ............................................................. –0.3V to 5.5V
TMR......................................................................0.5mA
LT4363C .................................................. 0°C to 70°C
LT4363I................................................–40°C to 85°C
Storage Temperature Range
DE12 .................................................. –65°C to 125°C
MS, SO .............................................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS, SO .............................................................300°C
PIN CONFIGURATION
LT4363-1
LT4363-1
LT4363-1
TOP VIEW
TOP VIEW
OUT
SNS
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
FB
FB
OUT
1
2
3
4
5
6
12 TMR
11 ENOUT
10 FLT
TOP VIEW
TMR
NC
1
2
3
4
5
6
FB
OUT
SNS
12 TMR
11 ENOUT
10 FLT
SNS
13
GATE
NC
ENOUT
FLT
GND
GATE
9
8
7
GND
UV
GATE
9
8
7
GND
UV
GND
V
CC
V
CC
V
GND
UV
CC
SHDN
SHDN
GND
NC
MS PACKAGE
12-LEAD PLASTIC MSOP
DE PACKAGE
SHDN
GND
12-LEAD (4mm × 3mm) PLASTIC DFN
T
= 125°C, θ = 135°C/W
JMAX
JA
T
= 125°C, θ = 43°C/W
S PACKAGE
16-LEAD PLASTIC SO
= 125°C, θ = 80°C/W
JMAX
JA
EXPOSED PAD (PIN 13) IS GND, CONNECTION TO PCB
OPTIONAL
T
JMAX
JA
LT4363-2
LT4363-2
LT4363-2
TOP VIEW
TOP VIEW
OUT
SNS
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
FB
FB
OUT
1
2
3
4
5
6
12 TMR
11 ENOUT
10 FLT
TOP VIEW
TMR
NC
1
2
3
4
5
6
FB
OUT
SNS
12 TMR
11 ENOUT
10 FLT
SNS
13
GATE
NC
ENOUT
FLT
GND
UV
GND
GATE
9
8
7
GND
UV
GATE
9
8
7
GND
UV
OV
V
CC
V
CC
V
CC
SHDN
SHDN
OV
NC
MS PACKAGE
12-LEAD PLASTIC MSOP
= 125°C, θ = 135°C/W
DE PACKAGE
SHDN
OV
12-LEAD (4mm × 3mm) PLASTIC DFN
T
JMAX
JA
T
= 125°C, θ = 43°C/W
S PACKAGE
16-LEAD PLASTIC SO
= 125°C, θ = 80°C/W
JMAX
JA
EXPOSED PAD (PIN 13) IS GND, CONNECTION TO PCB
OPTIONAL
T
JMAX
JA
4363fa
2
LT4363
ORDER INFORMATION
LEAD FREE FINISH
LT4363CDE-1#PBF
LT4363IDE-1#PBF
LT4363CDE-2#PBF
LT4363IDE-2#PBF
LT4363CMS-1#PBF
LT4363IMS-1#PBF
LT4363CMS-2#PBF
LT4363IMS-2#PBF
LT4363CS-1#PBF
LT4363IS-1#PBF
LT4363CS-2#PBF
LT4363IS-2#PBF
TAPE AND REEL
PART MARKING*
43631
PACKAGE DESCRIPTION
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead Plastic MSOP
TEMPERATURE RANGE
0°C to 70°C
LT4363CDE-1#TRPBF
LT4363IDE-1#TRPBF
LT4363CDE-2#TRPBF
LT4363IDE-2#TRPBF
LT4363CMS-1#TRPBF
LT4363IMS-1#TRPBF
LT4363CMS-2#TRPBF
LT4363IMS-2#TRPBF
LT4363CS-1#TRPBF
LT4363IS-1#TRPBF
LT4363CS-2#TRPBF
LT4363IS-2#TRPBF
43631
–40°C to 85°C
0°C to 70°C
43632
43632
–40°C to 85°C
0°C to 70°C
43631
43631
12-Lead Plastic MSOP
–40°C to 85°C
0°C to 70°C
43632
12-Lead Plastic MSOP
43632
12-Lead Plastic MSOP
–40°C to 85°C
0°C to 70°C
LT4363S-1
LT4363S-1
LT4363S-2
LT4363S-2
16-Lead Plastic SO
16-Lead Plastic SO
–40°C to 85°C
0°C to 70°C
16-Lead Plastic SO
16-Lead Plastic SO
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
l
l
V
CC
Operating Voltage Range
LT4363C
LT4363I
4
4.5
80
80
V
V
l
l
I
I
V
Supply Current
CC
SHDN Open, OUT = SNS = 12V
SHDN = 0V, OUT = SNS = 0V
0.7
7
1.2
20
40
mA
µA
µA
CC
l
l
Reverse Input Current
GATE Drive
V
CC
V
CC
= –60V, SHDN, UV, OV Open
= SHDN = UV = OV = –60V
–0.5
–3
–3
–10
mA
mA
R
ΔV
ΔV
CC
= (GATE – SNS);V = OUT
GATE
GATE CC
l
l
4.5
10
V
V
V
= 4V; I
= –0.5µA, 0µA
GATE
13
16
9V ≤ V ≤ 80V; I
= –1µA, 0µA
GATE
CC
l
l
I
I
GATE Pull-Up Current
V
V
= GATE = OUT = 12V
–10
–10
–20
–25
–35
–40
µA
µA
GATE(UP)
GATE(DN)
CC
CC
= GATE = OUT = 48V
l
l
l
l
GATE Pull-Down Current
Overvoltage: FB = 1.5V, GATE = 12V, OUT = 5V
75
50
150
100
1000
1000
mA
mA
µA
Overcurrent: ΔV
= 150mV, V
= 10V, OUT = 0V
GATE
SNS
Shutdown/UV Mode: SHDN = 0V, GATE = 10V
50
UV = 1V, GATE = 10V
200
µA
l
l
V
FB Servo Voltage
GATE = 12V; OUT = 8V
1.25
1.275
0.2
1.3
1
V
FB
I
FB Input Current
V
FB
= 1.275V
µA
FB
l
l
Current Limit Sense Voltage
SNS
V
CC
V
CC
= 12V, OUT = 3V to 12V
= 48V, OUT = 3V to 48V
43
45
50
52
58
59
mV
mV
ΔV
SNS
ΔV
= (SNS – OUT)
l
l
Current Limit Foldback
V
CC
V
CC
= 12V, OUT = 0V to 1V
= 48V, OUT = 0V to 1V
15
16
25
27
35
36
mV
mV
l
l
I
SNS Input Current
OUT = SNS = 3V to 80V
OUT = SNS = 0V
20
–10
30
–15
µA
µA
SNS
4363fa
3
LT4363
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
l
l
I
TMR Pull-up Current, Overvoltage
–1.7
–42
–4
–50
–6
–58
µA
µA
TMR = 1V, FB = 1.5V, ΔV = 0.5V
TMR
DS
TMR = 1V, FB = 1.5V, ΔV = 75V
DS
l
TMR Pull-up Current, OV Warning
TMR Pull-up Current, Overcurrent
–3
–5
–7
µA
TMR = 1.325V, FB = 1.5V, ΔV = 0.5V
DS
l
l
–5
–190
–9
–250
–13
–310
µA
µA
TMR = 1V, ΔV
TMR = 1V, ΔV
= 100mV, ΔV = 0.5V
DS
SNS
SNS
= 100mV, ΔV = 80V
DS
l
l
TMR Pull-up Current, Cool Down
–1
1
–2.3
2
–3.5
4
µA
µA
TMR = 3V, FB = 1.5V, ΔV
= 0V, ΔV = 0V
DS
SNS
TMR Pin Pull-down Current, Cool Down
V
TMR
= 3V, FB = 1.5V, ΔV
= 0V, ΔV = 0V
SNS DS
l
l
l
V
V
V
TMR Fault Threshold
TMR Gate Off Threshold
TMR Restart Threshold
TMR Rising
1.235 1.275
1.335 1.375
1.31
1.41
0.53
V
V
V
TMR(F)
TMR(G)
TMR(R)
TMR Rising
TMR Falling, LT4363-2
0.47
0.5
100
4.3
l
l
l
Early Warning Window
TMR Cool Down High Threshold
UV Input Threshold
V
V
V
80
120
5
mV
V
ΔV
TMR(G) – TMR(F)
TMR
TMR(H)
UV
V
V
V
V
V
= 7V to 80V, TMR Rising
3.7
CC
UV Rising
1.24
1.275
12
1.31
V
UV Input Hysteresis
mV
V
UV(HYST)
OV
l
OV Input Threshold
OV Rising
1.24
1.275
7.5
1.31
OV Input Hysteresis
mV
OV(HYST)
l
l
I
UV, OV Input Current
UV = 1.275V
UV = –60V
0.2
–1
1
–2
µA
mA
IN
l
I
FLT, ENOUT Leakage Current
FLT, ENOUT Output Low
FLT, ENOUT = 80V
0.5
2.5
µA
LEAK
l
l
V
I
I
= 0.1mA
= 2mA
300
2
800
9
mV
V
OL
SINK
SINK
l
l
OUT High Threshold
OUT Reset Threshold
OUT Input Current
0.25
1.9
0.5
2.7
0.75
3.6
V
V
ΔV
ΔV
ΔV
= V – V , ENOUT From Low to High
OUT(TH)
OUT CC OUT
ENOUT From High to Low
OUT(RST)
l
l
I
V
CC
V
CC
= OUT = 12V, SHDN Open
= OUT = 12V, SHDN = 0V
0.25
0.25
0.5
1
mA
mA
OUT
V
V
SHDN Threshold
V
= 4V to 80V
0.6
0.4
1.4
1.7
2.1
V
V
SHDN
CC
l
l
l
l
l
l
l
l
l
SHDN Open Voltage
V
CC
= 4V to 80V
2.2
–8
100
2
V
µA
µs
%
SHDN(Z)
SHDN
I
t
SHDN Current
SHDN = 0.4V
–1
–4
SHDN Reset Time
SHDN ≤ 0.4V; LT4363-1
RESET
D
Retry Duty Cycle; Overvoltage
Retry Duty Cycle; Output Short
V
CC
V
CC
= 80V, OUT = 16V, FB = 1.5V; LT4363-2
1
0.76
2
= 12V, OUT = 0V, ∆V
= 100mV; LT4363-2
1
%
SNS
t
t
t
Undervoltage Turn Off Propagation Delay UV Steps from 1.5V to 1V
Overvoltage Turn Off Propagation Delay FB Steps from 0V to 1.5V; OUT = 0V
Overcurrent Turn Off Propagation Delay ∆V Steps from 0V to 150mV; OUT = 0V
5
µs
µs
µs
OFF(UV)
OFF(OV)
OFF(OC)
0.25
1
1
2.5
SNS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive all current out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 3: An internal clamp limits the GATE pin to a minimum of 10V above
the OUT pin. Driving this pin to voltages beyond the clamp may damage
the device.
4363fa
4
LT4363
Specifications are at VCC = 12V, TA = 25°C, unless
TYPICAL PERFORMANCE CHARACTERISTICS
otherwise noted.
Supply Current During Shutdown
Supply Current During Shutdown
vs Supply Voltage
Supply Current vs Supply Voltage
vs Temperature
(ICC(SHDN) vs Temperature)
(ICC vs VCC
)
(ICC(SHDN) vs VCC)
1000
800
600
400
200
0
8
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
OUT = SNS = 0V
OUT = SNS = 0V
0
10 20 30 40 50 60 70 80
(V)
–50 –25
0
25
50
75 100 125
0
10 20 30 40 50 60 70 80
V
TEMPERATURE (°C)
V
(V)
CC
CC
4363 G01
4363 G02
4363 G03
GATE Pull-Up Current vs
Temperature
SHDN Current vs Temperature
GATE Pull-Up Current vs VCC
3.0
2.5
2.0
1.5
1.0
0.5
0
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
V
= SNS = OUT = GATE
V
= SNS = OUT
CC
CC
SHDN = 0V
SHDN = 0.4V
0
0
–50 –25
0
25
50
75 100 125
0
10 20 30 40 50 60 70 80
(V)
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
V
TEMPERATURE (°C)
CC
4363 G04
4363 G05
4363 G06
GATE Pull-Down Current vs
Temperature: Overcurrent
GATE Pull-Down Current vs
Temperature: Overvoltage
Gate Drive Voltage vs Gate
Pull-Down Current ΔVGATE vs IGATE
200
175
150
125
100
75
200
175
150
125
100
75
16
14
12
10
8
V
= SNS = OUT
CC
6
50
50
4
∆V
= 150mV
SNS = OUT = 5V
GATE = 12V
FB = 1.5V
SNS
25
25
2
OUT = 0V
GATE = 10V
0
0
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
2
4
6
8
10
TEMPERATURE (°C)
TEMPERATURE (°C)
I
(µA)
GATE
4363 G07
4363 G08
4363 G09
4363fa
5
LT4363
Specifications are at VCC = 12V, TA = 25°C, unless
TYPICAL PERFORMANCE CHARACTERISTICS
otherwise noted.
Gate Drive at Temperature
(ΔVGATE vs Temperature)
Gate Drive vs Supply Voltage
TMR High Threshold vs
(ΔVGATE vs VCC
)
Supply Voltage
14
13
12
11
10
16
14
12
10
8
5
V
= SNS = OUT
CC
I
= 0µA
GATE
I
= 0µA
GATE
4
3
2
1
I
= –1µA
I
= 1µA
GATE
GATE
6
4
2
V
= SNS = OUT
CC
0
–50 –25
0
25
50
75 100 125
0
4
8
12 16 20 60 70 80
(V)
0
10 20 30 40 50 60 70 80
(V)
TEMPERATURE (°C)
V
V
CC
CC
4363 G10
4363 G11
4363 G12
Overvoltage TMR Current vs
Overcurrent TMR Current vs
Warning Period TMR Current
vs VCC
(VCC – VOUT
)
(VCC – VOUT)
50
40
30
20
10
0
260
220
160
120
80
2.5
TMR = 1V
TMR = 1V
∆V = 0.5V
DS
2.0
1.5
1.0
0.5
0
40
0
0
10 20 30 40 50 60 70 80
– V (V)
0
10 20 30 40 50 60 70 80
– V (V)
0
10 20 30 40 50 60 70 80
(V)
V
V
V
CC
CC
OUT
CC
OUT
4363 G13
4363 G14
4363 G15
TMR Pull-Down Current vs
Temperature
TMR Pull-Up Current (Cool Down)
vs Temperature
Output Low Voltage vs Current
2.4
2.0
1.6
1.2
0.8
0.4
0
3.0
2.5
2.0
1.5
1.0
0.5
0
6
TMR = 1V
TMR = 3V
OUT = SNS = 3V
5
4
3
2
1
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
0.5
1.0
1.5
(mA)
2.0
2.5
3.0
TEMPERATURE (°C)
TEMPERATURE (°C)
I
SINK
4363 G16
4363 G17
4363 G18
4363fa
6
LT4363
Specifications are at VCC = 12V, TA = 25°C, unless
TYPICAL PERFORMANCE CHARACTERISTICS
otherwise noted.
Overvoltage Turn-Off Time vs
Temperature
Overcurrent Turn-Off Time vs
Temperature
350
300
250
200
150
100
50
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
OUT = 0V
SNS
∆V
= 150mV
OUT = 3V
= 300mV
∆V
SNS
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
4363 G19
4363 G20
Reverse Current vs Reverse
Voltage
Current Limit at Supply Voltage
(ΔVSNS vs VCC
)
60
55
50
45
40
35
30
–7
–6
–5
–4
–3
–2
–1
0
V
= SHDN
CC
OUT = 3V
OUT = 0V
0
10 20 30 40 50 60 70 80
(V)
0
–10 –20 –30 –40 –50 –60 –70 –80
(V)
V
V
CC
CC
4363 G22
4363 G21
4363fa
7
LT4363
PIN FUNCTIONS
disconnect it to allow the internal current source to turn
the part back on. The leakage current to ground at the pin
should be limited to no more than 1µA if no external pull
up is used to turn the part on. The SHDN pin can be pulled
up to 100V or below GND by 60V without damage.
ENOUT:OpenCollectorEnableOutput.TheENOUTpingoes
high impedance when the voltage at the OUT pin is within
0.5V of V and 3V above GND, indicating the external
CC
MOSFET is fully on. The state of the pin is latched until the
OUT pin voltage drops below 2V, resetting the latch. The
internal NPN is capable of sinking up to 2mA of current.
SNS: Current Sense Input. Connect this pin to the input of
thecurrentsenseresistor.Thecurrentlimitcircuitcontrols
the GATE pin to limit the sense voltage between SNS and
OUT pins to 50mV. This is reduced to 25mV in a severe
fault when OUT is below 2V. When in current limit mode,
a current source charges up the TMR pin. The voltage
difference with the OUT pin must be limited to less than
30V. Connect to OUT pin if unused.
Exposed Pad (DFN Package Only): Exposed pad may be
left open or connected to device ground (GND).
FB: Voltage Regulator Feedback Input. Connect this pin to
the center tap of the resistive divider connected between
the OUT pin and ground. During an overvoltage condition,
the GATE pin is controlled to maintain a 1.275V threshold
at the FB pin. Connect to GND to disable the OV clamp.
TMR: Fault Timer Input. Connect a capacitor between this
pin and ground to set the times for early fault warning,
fault turn-off, and cool down periods. The current charg-
ing up this pin during fault conditions depends on the
FLT: Open Collector Fault Output. This pin pulls low after
the voltage at the TMR pin has reached the fault threshold
of1.275V.Itindicatesthepasstransistorisabouttoturnoff
becauseeitherthesupplyvoltagehasstayedatanelevated
level for an extended period of time (voltage fault) or the
device is in an overcurrent condition (current fault). The
internal NPN is capable of sinking up to 2mA of current.
voltage difference between the V and OUT pins. When
CC
TMR reaches 1.275V, the FLT pin pulls low to indicate the
detection of a fault condition. If the condition persists, the
pass transistor turns off when TMR reaches the threshold
of 1.375V. A 2µA current source then continues to pull
the TMR up. When TMR reaches 4.3V, the 2µA current
reverses direction and starts to pull the TMR pin low.
When TMR reaches the retry threshold of 0.5V, the GATE
pin pulls high turning back on the pass transistor for the
LT4363-2 version. The GATE pin latches low after fault
time out for the LT4363-1.
GATE:N-ChannelMOSFETGateDriveOutput.TheGATEpin
ispulledupbyaninternalchargepumpcurrentsourceand
clamped to 14V above the OUT pin. Both voltage and cur-
rent amplifiers control the GATE pin to regulate the output
voltage and limit the current through the MOSFET.
GND: Device Ground.
OUT: Output Voltage Sense Input. This pin senses the
UV: Undervoltage Comparator Input. When UV falls below
its threshold of 1.275V, the GATE is pulled down with a
1mA current. When UV rises above 1.275V plus the hys-
teresis, the pull down current disappears and the GATE
pin is pulled up by the internal charge pump. If unused,
voltage at the source of the external N-channel MOSFET.
The voltage difference between V and OUT sets the fault
CC
timer current. When this difference drops below 0.5V, the
EN pin goes high impedance.
OV (LT4363-2): Overvoltage Comparator Input. When OV
is above its threshold of 1.275V, the fault retry function
is inhibited even when the TMR pin voltage has reached
its retry threshold. As soon as the voltage at OV pin falls
below its lower threshold the GATE pin is allowed to turn
back on. Connect to GND if unused.
connect to V .
CC
V : Positive Supply Voltage Input. The positive supply
CC
input ranges from 4V to 80V for normal operation. It can
also be pulled below ground by up to 60V during a reverse
battery condition, without damaging the part. Shutting
down the LT4363 by pulling the SHDN pin to ground will
reduce the supply current to 7µA.
SHDN: Shutdown Control Input. The LT4363 can be
shutdown to a low current mode by pulling the SHDN pin
below the threshold of 0.4V. Pull this pin above 2.1V or
4363fa
8
LT4363
BLOCK DIAGRAM
V
GATE
SNS
OUT
CC
13V
CHARGE
PUMP
FB
50mV/
25mV
+
–
+
–
VA
+
–
1.275V
IA
SHDN
FLT
UV
SHDN
–
ENOUT
UV
+
CONTROL
LOGIC
1.275V
+
–
RETRY
GATEOFF FLT
OV
(LT4363-2 ONLY)
1.375V
–
+
V
CC
I
TMR
0.5V
+
–
2µA
1.275V
+
–
4.3V
TMR
GND
4363 BD
4363fa
9
LT4363
OPERATION
Some power systems must cope with high voltage surges
of short duration such as those in vehicles. Load circuitry
mustbeprotectedfromthesetransients,yethighavailability
systems must continue operating during these events.
sufficient time for TMR to discharge to 0.5V and for the
MOSFET to cool before attempting to reset the part. To
reset, pull the SHDN pin low for at least 100µs, then pull
high with a slew rate of at least 10V/ms.
The LT4363 is an overvoltage protection regulator that
drives an external N-channel MOSFET as the pass transis-
tor. It operates from a wide supply voltage range of 4V to
80V. It can also be pulled below ground potential by up
to 60V without damage. The low power supply require-
ment of 4V allows it to operate even during cold cranking
conditionsinautomotiveapplications. Theinternalcharge
pump turns on the N-channel MOSFET to supply current
to the loads with very little power loss. Two MOSFETs can
be connected back to back to replace an inline Schottky
diode for reverse input protection. This improves the ef-
ficiency and increases the available supply voltage level
to the load circuitry during cold crank.
The fault timer allows the load to continue functioning
duringshorttransienteventswhileprotectingtheMOSFET
frombeingdamagedbyalongperiodofsupplyovervoltage,
such as a load dump in vehicles. The timer period varies
with the voltage across the MOSFET. A higher voltage cor-
responds to a shorter fault timer period, helping to keep
the MOSFET within its safe operating area (SOA).
The LT4363 senses an overcurrent condition by monitor-
ing the voltage across an optional sense resistor placed
between the SNS and OUT pins. An active current limit
circuit (IA) controls the GATE pin to limit the sense volt-
age to 50mV, if the OUT pin potential is above 2V. In the
case of a severe output short that brings OUT below 2V,
the servo sense voltage is reduced to 25mV to reduce
the stress on the pass transistor. During current limit, the
current charging the TMR capacitor is about 5 times the
current during an overvoltage event. The FLT pin pulls low
when the TMR voltage reaches 1.275V and the MOSFET
is turned off when it reaches 1.375V. The MOSFET turns
back on and the FLT pin returns to a high impedance state
afterTMRhasreachedthe0.5VthresholdfortheLT4363-2
version.Forthelatch-offversion,LT4363-1,boththeGATE
and FLT pins remain low even after TMR has reached
the 0.5V threshold. Reset the part in the same way as in
overvoltage time-out case.
Normally,thepasstransistorisfullyon,poweringtheloads
withverylittlevoltagedrop.Whenthesupplyvoltagesurges
too high, the voltage amplifier (VA) controls the gate of the
MOSFET and regulates the voltage at the OUT pin to a level
that is set by the external resistive divider from the OUT
pin to ground and the internal 1.275V reference. A current
source starts charging up the capacitor connected at the
TMR pin to ground. If the TMR voltage reaches 1.275V,
the FLT pin pulls low to indicate impending turn-off due
to the overvoltage condition. The pass transistor stays on
until TMR reaches 1.375V, at which point the GATE pin
pulls low turning off the MOSFET.
A current continues to pull the TMR pin up until it reaches
about 4.3V, at which point the current reverses direction
and pulls the TMR pin down. For the LT4363-2 version,
when the voltage at the TMR pin reaches 0.5V the GATE
pin begins rising, turning on the MOSFET. The FLT pin will
then return to a high impedance state. For the latch-off
version, LT4363-1, both the GATE and FLT pins remain
low even after TMR has reached the 0.5V threshold. Allow
An accurate undervoltage comparator keeps the GATE
pin low until the voltage at the UV pin is above the
1.275V threshold. An overvoltage comparator prevents
the MOSFET from turning on after fault time-out while
the voltage at the OV pin is still above 1.275V for the
LT4363-2. The SHDN pin turns off the pass transistor
and all the internal circuitry, reducing the supply current
to a mere 7µA.
4363fa
10
LT4363
APPLICATIONS INFORMATION
conditions.Inthepresenceofafaultthetimerfirstcharges
to 1.275V, and then enters the early warning phase of
operation. At this point the FLT pin pulls low and after
charging to 1.375V, the timer shuts off the MOSFET. The
warning phase is indicated by FLT low and gives time for
the load to perform house-keeping chores such as data
storage in anticipation of impending power loss. After
faulting off, the timer enters the cool down phase. At the
endofthecooldownperiodtheLT4363-1remainsoffuntil
reset, while the LT4363-2 automatically restarts. For the
LT4363-2 retry is inhibited if the OV pin is greater than
1.275V. This prevents motorboating in the event there is
a sustained input overvoltage condition.
The LT4363 limits the voltage and current delivered to the
loadduringsupplytransientoroutputoverloadevents.The
totalfaulttimerperiodissettoridethroughshort-duration
faults, while longer events cause the output to shut off
and protect the MOSFET pass device from damage. The
MOSFET provides a low resistance path from the input to
the load during normal operation, while in fault conditions
it operates as a series regulator.
Overvoltage Fault
The LT4363 limits the voltage at the output during an
overvoltage at the input. An internal amplifier regulates
the GATE pin to maintain 1.275V at the FB pin. During
this interval the MOSFET is on and supplies current to
the load. This allows uninterrupted operation during short
overvoltage events. If the overvoltage condition persists,
the timer causes the MOSFET to turn off.
Fault Timer Operation in Overvoltage
In the presence of an overvoltage condition when the
LT4363 regulates the output voltage, the timer charges
from 0.5V to 1.275V with a current that varies as a func-
Overcurrent Fault
tion of V (see Figure 1). V is inferred from the drop
DS
DS
across V and OUT. The timer current increases linearly
CC
The LT4363 features and adjustable current limit that pro-
tectsagainstoutputshortcircuitsorexcessiveloadcurrent.
During an overcurrent event, the GATE pin is regulated to
limit the current sense voltage across the SNS and OUT
pins to 50mV. In the case of a severe short at the output,
where OUT is less than 2V, the current sense voltage is
reduced to 25mV to further reduce power dissipation in
the MOSFET. If the overcurrent condition persists, the
timer causes the MOSFET to turn off.
from around 4µA with V ≤ 0.5V, to 50µA with V = 75V.
DS
DS
Because V is measured indirectly, clamping or filtering
DS
at the V pin affects the timer current response. A graph
CC
of Overvoltage TMR Current vs (V – V ) is shown in
CC
OUT
the Typical Performance Characteristics.
When TMR reaches 1.275V, the FLT pin is latched low as
an early warning of impending shutdown. The timer cur-
rent is cut to a fixed value of 6µA and continues to run
untilTMRreaches1.375V, producingafixedearlywarning
period given by:
Fault Timer Overview
Overvoltage and overcurrent conditions are limited in
duration by an adjustable timer. A capacitor at the TMR pin
sets the delay time before a fault condition is reported at
the FLT pin as well as the overall delay before the MOSFET
is turned off. The same capacitor also sets the cool down
time before the MOSFET is allowed to turn back on.
6µA
100mV
CTMR = tWARNING
•
When TMR reaches 1.375V, the MOSFET is turned off and
allowed to cool for an extended period. The total elapsed
time between the onset of output regulation and turn-off
is given by:
When either an overvoltage or overcurrent fault condition
occurs, a current source charges the TMR pin capacitor.
The exact current level varies as a function of the type of
0.775V 100mV
tREG = CTMR
•
+
ITMR
6µA
fault and the V voltage drop across the MOSFET. This
DS
scheme takes better advantage of the MOSFET’s available
Because I
is a function of V – V , the exact time in
CC OUT
TMR
SafeOperatingArea(SOA)thanwouldafixedtimercurrent.
regulation depends upon the input waveform and the time
required for the output voltage to come into regulation.
The TMR pin is biased to 0.5V under normal operating
4363fa
11
LT4363
APPLICATIONS INFORMATION
Fault Timer Operation in Overcurrent
When TMR reaches 1.275V, the FLT pin is latched low as
an early warning of impending shutdown. But unlike the
overvoltage case, the timer current is not reduced and
instead continues unabated until TMR reaches 1.375V,
producing an early warning period given by:
TMR pin behavior in overcurrent is substantially the same
as in overvoltage. In the presence of an overcurrent con-
dition when the LT4363 regulates the output current, the
timer charges from 0.5V to 1.275V with a current that
varies as a function of V (see Figure 2). The current is
ITMR
100mV
DS
CTMR = tWARNING
•
about 5 times the value produced in overvoltage, under
similar conditions V , increasing linearly from 8µA with
DS
When TMR reaches 1.375V, the MOSFET is turned off and
allowed to cool for an extended period. The total elapsed
time between the onset of current limiting and turn-off
is given by:
V
< 0.5V to 260µA with V = 80V. V is inferred from
DS
DS DS
the drop across V and OUT. Because V is measured
CC
DS
indirectly, clamping or filtering at the V pin affects the
CC
timer current response. A graph of Overcurrent TMR Cur-
rent vs (V – V ) is shown in the Typical Performance
CC
OUT
0.875V
ITMR
tLIM = CTMR
•
Characteristics.
V
TMR(V)
Because I
is a function of V – V , the exact time
I
= 6µA
I
= 6µA
TMR
TMR
CC
OUT
TMR
1.375
1.275
in current limit depends upon the input waveform and the
timerequiredfortheoutputcurrenttocomeintoregulation.
V
TMR
= 75V
= 50µA)
DS
(I
V
TMR
= 10V
= 8µA)
Cool Down Phase
DS
(I
Cool Down behavior is the same whether initiated by
overvoltage or overcurrent. During the cool down phase,
the timer continues to charge from 1.375V to 4.3V with
2µA, and then discharges back down to 0.5V with 2µA,
for a total equivalent voltage swing of 6.725V. The cool
down time is given by:
0.50
TIME
t
t
WARNING
FLT
= 15.5ms/µF = 16.67ms/µF
t
= 96.9ms/µF
t
FLT
WARNING
= 16.67ms/µF
TOTAL FAULT TIMER = t + t
FLT WARNING
4363 F01
2.925V+ 3.8V
tCOOL = CTMR
•
Figure 1. Overvoltage Fault Timer Current
2µA
V
TMR(V)
UptothispointtheoperationoftheLT4363-1andLT4363-2
is the same. Behavior at the end of the cool down phase
and in response to the SHDN pin is entirely different.
1.375
1.275
V
TMR
= 80V
DS
At the end of the cool down phase the LT4363-1 remains
latched off and FLT remains low. It may be restarted by
pulling the SHDN pin low for at least 100µs or by cycling
power. The cool down phase may be interrupted at any-
V
TMR
= 10V
= 35µA)
(I
= 260µA)
DS
(I
time by pulling SHDN low for at least 1s/µF of C
LT4363-1 will restart when SHDN goes high.
; the
TMR
0.50
TIME
t
WARNING
= 0.38ms/µF
t
FLT
= 2.98ms/µF
The LT4363-2 will automatically retry at the end of the
cool down phase. Retry is inhibited if the OV pin is above
1.275V; this prevents repetitive retries while the input is
held in a sustained overvoltage condition. Retry is auto-
t
= 22.14ms/µF
FLT
t
WARNING
= 2.86ms/µF
4363 F02
TOTAL FAULT TIMER = t + t
FLT WARNING
Figure 2. Overcurrent Fault Timer Current
4363fa
12
LT4363
APPLICATIONS INFORMATION
matically initiated once the OV pin falls below 1.268V. OV
has no effect on initial start-up when power is first applied
and upon exiting shutdown. The cool down phase may
be interrupted in the LT4363-2 by pulling SHDN low for
dissipating very little power. But during either overvoltage
or overcurrent faults, the GATE pin is controlled to regu-
late either the output voltage or the current through the
MOSFET. Large current and high voltage drop across the
MOSFET can coexist in these cases. The SOA curves of
the MOSFET must be considered carefully along with the
selection of the fault timer capacitor.
at least 1s/µF of C
.
TMR
For both the LT4363-1 and LT4363-2 the FLT pin goes
high in shutdown and is cleared high when power is first
applied to V . If FLT is set low, it can be reset during the
CC
Transient Stress in the MOSFET
cool down phase by pulling SHDN low for at least 1s/µF
During an overvoltage event, the LT4363 drives a series
passMOSFETtoregulatetheoutputvoltageatanacceptable
level.Theloadcircuitrymaycontinueoperatingthroughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
of C
.
TMR
Intermittent Fault Conditions
Brief overvoltage or overcurrent conditions interrupt the
operation of the timer. If the TMR pin has not yet reached
1.275V when the input falls below the regulation value
or drops out of current limit, the timer capacitor is dis-
charged back to 0.5V with a 2µA current sink. If the TMR
voltage crosses 1.275V FLT is set low. If the overvoltage
or overcurrent abates before reaching 1.375V, the timer
capacitor discharges with 2µA back to 0.5V, whereupon
FLT resetshigh.Ifseveralshortovervoltageorovercurrent
events occur in rapid succession, the timer capacitor will
integrate the charging and discharging currents.
Most transient event specifications use the prototypi-
cal waveshape shown in Figure 3, comprising a linear
ramp of rise time t , reaching a peak voltage of V and
r
PK
exponentially decaying back to V with a time constant
IN
of τ. A common automotive transient specification has
constants of t = 10µs, V = 80V and τ = 1ms. A surge
r
PK
condition known as load dump commonly has constants
MOSFET Selection
of t = 5ms, V = 60V and τ = 200ms.
r
PK
The LT4363 drives an N-channel MOSFET to conduct the
load current. The important features of the MOSFET are
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heat sink
thermal mass. This is best analyzed by simulation, using
the MOSFET thermal model.
on-resistanceR
,themaximumdrain-sourcevoltage
DS(ON)
V
, the threshold voltage, and the SOA.
(BR)DSS
The maximum allowable drain-source voltage must be
higher than the supply voltage. If the output is shorted
to ground or during an overvoltage event, the full supply
voltage will appear across the MOSFET.
Forshortdurationtransientsoflessthan100ms, MOSFET
survival is increasingly a matter of safe operating area
The gate drive for the MOSFET is guaranteed to be more
V
PK
than10Vandlessthan16VforthoseapplicationswithV
CC
τ
higher than 9V. This allows the use of standard threshold
voltage N-channel MOSFETs. For systems with V less
CC
than 9V, a logic level MOSFET is required since the gate
drive can be as low as 4.5V.
V
IN
The SOA of the MOSFET must encompass all fault condi-
tions. In normal operation the pass transistor is fully on,
t
r
4363 F03
Figure 3. Prototypical Transient Waveform
4363fa
13
LT4363
APPLICATIONS INFORMATION
(SOA), an intrinsic property of the MOSFET. SOA quanti-
Let
a = V
fies the time required at any given condition of V and
DS
– V
REG
IN
I to raise the junction temperature of the MOSFET to its
D
b = V – V
rated maximum. MOSFET SOA is expressed in units of
PK
IN
2
watt-squared-seconds(P t).Thisfigureisessentiallycon-
(V = Nominal Input Voltage)
IN
stant for intervals of less than 100ms for any given device
type, and rises to infinity under DC operating conditions.
Destruction mechanisms other than bulk die temperature
Then
P2t = ILOAD
2
•
distort the lines of an accurately drawn SOA graph so that
2
3
P t is not the same for all combinations of I and V .
D
DS
b–a
b
1
3
1
2
b
a
(
)
tr
+ τ 2a2 ln + 3a2 + b2 − 4ab
2
In particular P t tends to degrade as V approaches the
DS
maximum rating, rendering some devices useless for
absorbing energy above a certain voltage.
Typically V
≈ V and τ » t simplifying the above to
REG
IN
r
When a fast input voltage step occurs, the current through
thepasstransistortosupplytheloadandchargeuptheout-
put capacitor can be high enough to trigger an overcurrent
event. The gate pulls low to 1V above the OUT pin, turning
off the MOSFET momentarily. The internal charge pump
will then start to pull the GATE pin high and turn on the
MOSFET to support the load current and charge up the
OUT pin. The fault timer may not start yet because the
current level is below the overcurrent limit threshold and
the output voltage has not reached the servo voltage. This
extra stress needs to be included in calculating the overall
stress level of the MOSFET.
1
2
P2t = ILOAD V – V
2 τ
[W2s]
2
(
)
PK
REG
For the transient conditions of V = 80V, V = 12V,
PK
IN
V
= 16V, t = 10µs and τ = 1ms, and a load current
REG
r
2
2
of 3A, P t is 18.4W s – easily handled by a MOSFET in
2
a DPAK package. The P t of other transient waveshapes
is evaluated by integrating the square of MOSFET power
over time. LTSpice can be used to simulate timer behavior
for more complex transients and cases where overvoltage
and overcurrent faults coexist.
Calculating Short-Circuit Stress
Calculating Transient Stress
SOAstressmustalsobecalculatedforshort-circuitcondi-
2
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
whichshallnotinterruptoperation.Itisthenasimplematter
to choose a device which has adequate SOA to survive the
maximumcalculatedstress.P tforaprototypicaltransient
waveform is calculated as follows (Figure 4):
tions. Short-circuit P t is given by:
2
ΔVSNS
RSNS
P2t = ΔVDS
•
• tTMR [W2s]
2
Where ∆V is the voltage across the MOSFET, and ∆V
DS
SNS
is the SNS pin threshold, and t
interval.
is the overcurrent timer
TMR
V
PK
τ
For V = 15V, ∆V = 13V (V
= 2V), ∆V
= 50mV,
SNS
IN
DS
OUT
2
2
R
= 12mΩ and C
= 100nF, P t is 6.3W s – less
SNS
TMR
than thetransient SOA calculated in theprevious example.
Nevertheless, to account for circuit tolerances this figure
V
REG
V
IN
t
r
2
should be doubled to 12.6W s.
4363 F04
Figure 4. Safe Operating Area Required to Survive Prototypical
Transient Waveform
4363fa
14
LT4363
APPLICATIONS INFORMATION
Limiting Inrush Current and GATE Pin Compensation
threshold during a fault. The pass transistor is not allowed
toturnbackonevenafterthecooldownperiodhasfinished.
ThispreventsthepasstransistorfromcyclingbetweenON
and OFF states when the input voltage stays at an elevated
level for a long period of time, reducing the stress on the
N-channel MOSFET. For the latch-off version, LT4363-1,
the overvoltage comparator function is not available.
TheLT4363limitstheinrushcurrenttoanyloadcapacitance
by controlling the GATE pin voltage slew rate. An external
capacitorcanbeconnectedfromGATEtogroundtoreduce
the inrush current at the expense of slower turn-off time.
The gate capacitor is set at:
IGATE(UP)
C1=
•CL
Reverse Input Protection
I
INRUSH
A blocking diode is commonly employed to protect the
load when reverse input is possible, such as in automo-
tive applications. This diode causes extra power loss,
generates heat, and reduces the available supply voltage
range. During cold crank, the extra voltage drop across
the diode is particularly undesirable.
The LT4363 does not need extra compensation compo-
nents at the GATE pin for stability during an overvoltage or
overcurrent event. With transient input voltage slew rates
fasterthan5V/µs, agatecapacitor, C1, togroundisneeded
to prevent self enhancement of the N-channel MOSFET.
The extra gate capacitance slows down the turn off time
during fault conditions and may allow excessive current
duringanoutputshortevent.Anextraresistor,R1,inseries
with the gate capacitor can improve the turn off time. A
diode, D1, should be placed across R1 with the cathode
connected to C1 as shown in Figure 5.
The LT4363 is designed to withstand reverse voltage with-
out damage to itself. The V , SHDN, UV, and OV pins can
CC
withstandupto60VofDCvoltagebelowtheGNDpotential.
Back-to-back MOSFETs must be used to block the current
path through Q1’s body diode (Figure 6). Figure 7 shows
the approach with a P-channel MOSFET in place of Q2.
Q1
R
Q2
Q1
SNS
10mΩ
IRLR2908
IRLR2908
V
V
OUT
IN
D1
12V
12V, 3A
CLAMPED
AT 16V
IN4148W
D1*
SMAJ58CA
R3
R4
R3
R5
1M
Q3
10Ω
10Ω
R1
2N3904
R1
57.6k
C1
GATE
D2
1N4148
C1
47nF
R7
10k
LT4363
4
3
2
GATE SNS
OUT
FB
4363 F05
5
1
V
CC
Figure 5. External GATE network
R2
4.99k
Undervoltage/Overvoltage Comparators
LT4363DE-2
6
8
7
The LT4363 has both undervoltage and overvoltage com-
parators that can be used to sense the input supply volt-
age. When the voltage at the UV pin is below the 1.275V
threshold, the GATE pin is held low to keep the external
SHDN
UV
11
10
ENOUT
OV
FLT
4363 F06
GND
TMR
12
9
C
TMR
*DIODES INC.
MOSFET off. The supply voltage at the V pin should be
0.1µF
CC
at least 4V for the UV comparator to function.
Figure 6. Overvoltage Regulator with N-channel MOSFET
Reverse Input Protection
The overvoltage comparator prevents the LT4363-2 from
restarting if the voltage at the OV pin is above the 1.275V
4363fa
15
LT4363
APPLICATIONS INFORMATION
R
R
SNS
Q2
Q1
Q1
SNS
10mΩ
10mΩ
SI7461DP
IRLR2908
FDB33N25
V
V
OUT
IN
V
V
OUT
IN
12V
12V, 3A
CLAMPED
AT 16V
C **
L
22µF
D2
D1*
SMAJ58CA
C1
47nF
1N5245
15V
R3
10Ω
R3
10Ω
R7
1k
R7
10k
R1
57.6k
C1
47nF
R1
100k
4
3
2
5
4
3
2
C2
GATE
SNS
OUT
FB
0.1µF
V
GATE SNS
LT4363DE-2
GND TMR
OUT
FB
CC
5
1
1
V
CC
R2
4.99k
R2
4.99k
D1*
SMAJ58A
6
8
7
V
CC
SHDN
UV
LT4363DE-2
R4
374k
DC/DC
CONVERTER
6
8
7
SHDN
UV
11
10
ENOUT
11
10
R5
90.9k
ENOUT
SHDN
OV
FLT
4363 F07
GND
TMR
12
OV
FLT
4363 F08
TMR
FAULT
GND
9
R6
10k
9
12
C
TMR
C
*DIODES INC.
0.1µF
*DIODES INC.
**SANYO 25CE22GA
47nF
Figure 7. Overvoltage Regulator with P-channel MOSFET
Reverse Input Protection
Figure 8. Overvoltage Regulator with Input Voltage Detection
Another way to limit transients above 100V at the V
CC
Shutdown
pin is to use a Zener diode and a resistor, D1 and R7 in
Figure 8. The Zener diode limits the voltage at the pin
while the resistor limits the current through the diode to
a safe level during the surge. However, D1 can be omitted
The LT4363 can be shut down to a low current mode when
the voltage at the SHDN pin is pulled below the shutdown
threshold of 0.4V. The quiescent current drops down to
7µA with internal circuitry turned off.
if the filtered voltage, due to R7 and C1, at the V pin
CC
is below 100V. The inclusion of R7 in series with the V
CC
The SHDN pin can be pulled up to 100V or below GND by
up to 60V without damage. Leaving the pin open allows
an internal current source to pull it up and turn on the part
while clamping the pin to 2.2V. The leakage current at the
pin should be limited to no more than 1µA if no pull up
device is used to help turn it on.
pin will increase the minimum required voltage at V due
IN
to the extra voltage drop across it. This voltage drop is
due to the supply current of the LT4363 and the leakage
current of D1.
A total bulk capacitance of at least 22µF low ESR electro-
lytic is required close to the source pin of MOSFET Q1. In
addition, the bulk capacitance should be at least 10 times
larger than the total ceramic bypassing capacitor on the
input of the DC/DC converter.
Supply Transient Protection
The LT4363 is tested to operate to 80V and guaranteed to
be safe from damage up to 100V. Nevertheless, voltage
transients above 100V may cause permanent damage.
During a short-circuit condition, the large change in cur-
rent flowing through power supply traces and associated
wiring can cause inductive voltage transients which could
exceed100V.Tominimizethevoltagetransients,thepower
trace parasitic inductance should be minimized by using
Layout Considerations
To achieve accurate current sensing, Kelvin connection
to the current sense resistor (R
in Figure 8) is recom-
SNS
mended. The minimum trace width for 1 oz copper foil is
0.02" per amp to ensure the trace stays at a reasonable
temperature. 0.03" per amp or wider is recommended.
Note that 1oz copper exhibits a sheet resistance of about
530µΩ/square.Smallresistancescancauselargeerrorsin
wide traces. A small RC filter, in Figure 8, at the V pin
will clamp the voltage spikes.
CC
4363fa
16
LT4363
APPLICATIONS INFORMATION
highcurrentapplications.Noiseimmunitywillbeimproved
significantly by locating resistive dividers close to the pins
Choose 4.99kΩ for R2.
27V –1.275V •R2
1.275V
The nearest standard value for R1 is 100kΩ.
(
)
with short V and GND traces.
R1=
= 100.7kΩ
CC
Design Example
As a design example, take an application with the follow-
Next calculate the sense resistor, R , value:
SNS
ing specifications: V = 8V to 14V DC with a transient of
CC
150V and decay time constant (τ) of 400ms, V
≤ 27V,
50mV 50mV
OUT
RSNS
=
=
= 10mΩ
current limit (I ) at 5A, low battery detection of 6V, input
LIM
ILIM
5A
overvoltage level at 60V, and 1ms of overvoltage early
warning (Figure 8).
C
TMR
is then chosen for 1ms of early warning time:
Selection of SMAJ58A for D1 will limit the voltage at the
CC
1ms •6µA
CTMR
=
= 60nF
V
pin to less than 71V during 150V surge. The minimum
100mV
The nearest standard value for C
required voltage at the V pin is 4V when V is at 8V;
CC
IN
is 47nF.
the supply current for LT4363 is 1.5mA. The maximum
TMR
value for R7 to ensure proper operation is:
Finally, calculate R4, R5, and R6 for 6V low battery detec-
tion and 60V input overvoltage level:
8V – 4V
1.5mA
R7=
= 2.67kΩ
R5+ R6
R4+ R5+ R6
6V •
= 1.275V
Select 1kΩ for R7 to accommodate all conditions.
The maximum current through R7 into D1 is then calcu-
lated as:
R6
60V •
= 1.275V
R4+ R5+ R6
Choose 10kΩ for R6.
150V – 64V
ID1 =
= 86mA
1kΩ
60V •10kΩ
1.275V
R4+ R5=
–10kΩ = 460.6kΩ
which is easily handled by the SMAJ58A for more than
500ms.
460.6kΩ + 10kΩ
With 0.1µF of bypass capacitance, C1, along with 1k of
R7, high voltage transients up to 200V with a pulse width
R5= 1.275V •
–10kΩ = 90kΩ
6V
less than 10µs are filtered out at the V pin.
CC
R4 = 460.6kΩ – 90kΩ = 370.6kΩ
Next, calculate the resistive divider value to limit V
27V during an overvoltage event:
to
OUT
Select 90.9kΩ for R5 and 374kΩ for R4.
The pass transistor, Q1, should be chosen to withstand a
1.275V • R1+ R2
(
)
= 27V
short-circuit with V = 14V. In the case of a severe output
CC
VREG
=
R2
short where V
= 0V, the total overcurrent fault time is:
OUT
47nF •0.875V
Set the current through R1 and R2 during the overvoltage
condition to 250µA.
tOC
=
= 0.904ms
45.5µA
1.275V
250µA
R2=
= 5kΩ
4363fa
17
LT4363
APPLICATIONS INFORMATION
The power dissipation in Q1 is:
14V •25mV
The power dissipation in Q1 is:
14V – 2V •50mV
(
)
P =
= 35W
P =
= 60W
10mΩ
10mΩ
During an output overload or soft short, the voltage at the
OUT pin could stay at 2V or higher. The total overcurrent
These conditions are well within the Safe Operating Area
of the FDB33N25.
fault time when V
= 2V is:
OUT
47nF •0.875V
tOC
=
= 1.028ms
40µA
TYPICAL APPLICATIONS
Overvoltage Regulator with Output Keep Alive During Shutdown
R9
1k, 1W
R
Q1
IRLR2908
SNS
10mΩ
V
OUT
12V, 4A
V
IN
C **
L
R7
1k
REGULATED
AT 16V
22µF
R3
10Ω
D1*
SMAJ58A
D2
1N4746A
18V
C1
47nF
1W
R1
5
4
3
2
OUT
FB
287k
V
GATE SNS
LT4363DE-2
GND TMR
CC
1
R2
24.9k
6
8
7
SHDN
UV
R4
147k
11
10
R5
30.1k
ENOUT
UV = 6V
OV = 24V
OV
FLT
4363 TA02
R6
10k
9
12
*DIODES INC.
C
TMR
**SANYO 25CE22GA
0.1µF
4363fa
18
LT4363
TYPICAL APPLICATIONS
2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V
R
Q1
FDB3632
SNS
15mΩ
V
OUT
V
IN
48V, 2.5A
C
R7
1k
L
300µF
R3
10Ω
C1
47nF
R1
4
3
2
OUT
FB
221k
5
GATE SNS
LT4363DE-2
GND TMR
V
CC
1
D1*
SMAT70A
R2
4.02k
6
SHDN
UV
R4
604k
8
7
11
10
R5
13k
ENOUT
OV
FLT
4363 TA03
TMR
R6
10k
9
12
UV = 35V
OV = 80V
C
0.1µF
*DIODES INC.
2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V
R
Q1
IRLR2908
SNS
15mΩ
V
V
IN
OUT
28V
28V, 2.5A
C
R7
1k
L
300µF
R3
10Ω
C1
47nF
R1
4
3
2
OUT
FB
110k
5
GATE SNS
LT4363DE-2
GND TMR
V
CC
1
D1*
SMAJ58A
R2
4.02k
6
SHDN
UV
R4
261k
8
7
11
10
R5
10k
ENOUT
OV
FLT
4363 TA04
TMR
R6
10k
9
12
UV = 18V
OV = 36V
C
0.1µF
*DIODES INC.
4363fa
19
LT4363
TYPICAL APPLICATIONS
Overvoltage Regulator with Reverse Input Protection Up to –80V
R
Q2
IRLR2908
Q1
IRLR2908
SNS
10mΩ
V
V
OUT
IN
12V
12V, 3A
CLAMPED
AT 16V
C **
L
22µF
R4
10Ω
R3
10Ω
Q3
2N3904
R1
D2
1N4148
R5
57.6k
C1
1M
47nF
R7
5
4
3
2
OUT
FB
10k
D1*
SMAJ58CA
V
GATE SNS
LT4363DE-2
GND TMR
CC
D3**
1
1N4148
R2
4.99k
6
SHDN
UV
8
7
11
10
ENOUT
OV
FLT
4363 TA05
TMR
*DIODES INC.
9
12
**SANYO 25CE22GA
C
0.1µF
***OPTIONAL COMPONENT
FOR REDUCED STANDBY CURRENT
Overvoltage Regulator with 250V Surge Protection
Q1
R
SNS
FDB33N25 10mΩ
V
OUTPUT
CLAMP
AT 16V
IN
12V
C
L
R6
22µF
49.9k
Q2
MPS-A42
R3
10Ω
D1*
R1
57.6k
SMAJ58A
C1
47nF
5
4
3
2
OUT
C1
0.1µF
V
GATE SNS
R4
127k
CC
1
FB
6
V
CC
R2
4.99k
SHDN
8
DC/DC
CONVERTER
UV
LT4363DE-2
R5
49.9k
11
10
ENOUT
SHDN
GND
7
OV
FLT
FAULT
GND
TMR
12
4363 TA07
9
0.1µF
*DIODES INC.
4363fa
20
LT4363
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
0.70 ±0.05
3.30 ±0.05
3.60 ±0.05
2.20 ±0.05
1.70 ± 0.05
PACKAGE OUTLINE
0.25 ± 0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.40 ± 0.10
4.00 ±0.10
(2 SIDES)
R = 0.115
TYP
7
12
R = 0.05
TYP
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ± 0.10
PIN 1
TOP MARK
(NOTE 6)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
(UE12/DE12) DFN 0806 REV D
6
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.50 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
4363fa
21
LT4363
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS Package
12-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1668 Rev Ø)
4.039 ± 0.102
(.159 ± .004)
(NOTE 3)
0.406 ± 0.076
(.016 ± .003)
REF
12 11 10 9 8 7
0.889 ± 0.127
(.035 ± .005)
DETAIL “A”
0° – 6° TYP
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
0.254
(.010)
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.53 ± 0.152
(.021 ± .006)
1 2 3 4 5 6
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS12) 1107 REV Ø
RECOMMENDED SOLDER PAD LAYOUT
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.386 – .394
(9.804 – 10.008)
.045 .005
NOTE 3
.050 BSC
16
N
15
14
13
12
11
10
9
N
1
.245
MIN
.160 .005
.150 – .157
.228 – .244
(5.791 – 6.197)
(3.810 – 3.988)
NOTE 3
2
3
N/2
N/2
8
.030 .005
TYP
RECOMMENDED SOLDER PAD LAYOUT
2
3
5
6
7
1
4
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0° – 8° TYP
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
.016 – .050
(0.406 – 1.270)
S16 0502
NOTE:
1. DIMENSIONS IN
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4363fa
22
LT4363
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
03/12 Add 57.6k resistor to Typical Application
24
4363fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT4363
TYPICAL APPLICATION
Overvoltage Regulator with Ideal Diode Reverse Voltage Protection
M1
FDB3632
10mΩ
IRLR2908
V
OUTPUT
CLAMP
AT 16V
IN
12V
22µF
10Ω
IN
GATE
OUT
57.6k
4.99k
47nF
V
GATE SNS
LT4363
OUT
CC
LTC4357
GND
V
DD
FB
D
CLAMP
SMAT70A
V
CC
SHDN
D1
MMBD1205
127k
DC/DC
CONVERTER
UV
–60V TO 75V DC PROTECTION
100V TRANSIENT MAXIMUM
UV = 4.5V
ENOUT
SHDN
49.9k
FLT
4363 TA06
FAULT
GND TMR
GND
0.1µF
RELATED PARTS
PART NUMBER
LTC1696
DESCRIPTION
COMMENTS
ThinSOT™ Package, 2.7V to 28V
Overvoltage Protection Controller
Triple/Dual Inputs UV/OV Negative Monitor
Single/Dual UV/OV Voltage Monitor
Quad UV/OV Monitor
LTC2909
Pin Selectable Input Polarity Allows Negative and OV Monitoring
Ads UV and OV Trip Values, 1.5% Threshold Accuracy
For Positive and Negative Supplies
LTC2912/LTC2913
LTC2914
LTC3827/LTC3827-1 Low I , Dual, Synchronous Controller
4V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V, 80µA Quiescent Current
OUT
Q
IN
LTC3835/LTC3835-1 Low I , Synchronous Step-Down Controller
Single Channel LTC3827/LTC3827-1
4V ≤ V ≤ 60V, 1.23V ≤ V ≤ 36V, 120µA Quiescent Current
Q
LT3845
LT3850
Low I , Synchronous Step-Down Controller
Q
IN
OUT
Dual, 550kHz, 2-Phase Sychronous Step-Down
Controller
Dual 180° Phased Controllers, V 4V to 24V, 97% Duty Cycle, 4mm × 4mm
IN
QFN-28, SSOP-28 Packages
LTC3890
LT4256
Low I , Dual 2-Phase, Synchronous Step-Down 4V ≤ V ≤ 60V, 0.8V ≤ V
≤ 24V, 50µA Quiescent Current
OUT
Q
IN
Controller
Positive 48V Hot Swap Controller with
Open-Circuit Detect
Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V
Supply
LTC4260
Positive High Voltage Hot Swap Controller with
Wide Operating Range 8.5V to 80V
2
8-Bit ADC and I C
LT4352
Ideal MOSFET ORing Diode
External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V
Controls Two N-Channel MOSFETs, 1µs Turn-Off, 80V Operation
Controls Two N-Channel MOSFETs, 0.5µs Turn-Off, 80V Operation
100V Overvoltage and Overcurrent Protection, Latch-Off and Auto-Retry Options
2.5V to 34V Operation, Protects 60V to –40V
LTC4354
LTC4355
LT4356
Negative Voltage Diode-OR Controller
Positive Voltage Diode-OR Controller
High Voltage Surge Stopper
LTC4365
Window Passer - OV, UV and Reverse Supply
Protection Controller
4363fa
LT 0312 REV A • PRINTED IN USA
24 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2011
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LT4356CDE-1#PBF
LT4356-1 and LT4356-2 - Surge Stopper; Package: DFN; Pins: 12; Temperature Range: 0°C to 70°C
Linear
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