LT5537EDDB#TR [Linear]
LT5537 - Wide Dynamic Range RF/IF Log Detector; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C;
| 型号： | LT5537EDDB#TR |
| 厂家： | 
Linear |
| 描述： | LT5537 - Wide Dynamic Range RF/IF Log Detector; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C 射频 微波 |
| 文件： | 总16页 (文件大小：283K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT5537
Wide Dynamic Range
RF/IF Log Detector
U
FEATURES
DESCRIPTIO
The LT®5537 is a wide dynamic range RF/IF detector,
operational from below 10MHz to 1000MHz. The lower
limit of the operating frequency range can be extended to
near DC by the use of an external capacitor. The input
dynamic range at 200MHz with ±3dB nonlinearity is 90dB
(from –76dBm to 14dBm, single-ended 50Ω input). The
detector output voltage slope is nominally 20mV/dB, and
thetypicaltemperaturecoefficientis0.01dB/°Cat200MHz.
■
Low Frequency to 1000MHz Operation
■
83dB Dynamic Range with ±1dB Nonlinearity
at 200MHz
■
Sensitivity –76dBm or Better at 200MHz
■
Log-Linear Transfer Slope of 20mV/dB
■
Supply Voltage Range: 2.7V to 5.25V
■
Supply Current: 13.5mA at 3V
■
Tiny 8-Lead (3mm × 2mm) DFN Package
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
U
APPLICATIO S
■
Linear-to-Log Signal Level Conversion
■
Received Signal Strength Indication (RSSI)
■
RF Power Control
■
RF/IF Power Detection
■
Receiver RF/IF Gain Control
■
Envelope Detection
■
ASK Receiver
U
TYPICAL APPLICATIO
OPTIONAL
4
5
Output Voltage, Linearity Error
vs Input Power at 200MHz
+
–
CAP
CAP
7k
7k
2.4
3
V
CC
OFFSET
CANCELLATION
2.0
2
6
85°C
15nF
15nF
1nF
1µF
+
–
RF IN
IN
IN
25°C
2
3
1.6
1.2
1
0
–40°C
0.8
0.4
0
–1
–2
–3
OUT
7.2k
OUTPUT
BUFFER
8
7
DETECTOR CELLS
V
= ENBL = 3V
CC
V
EE
–80
–60
–40
–20
0
20
ENBL
INPUT POWER (dBm)
BANDGAP REFERENCE
AND BIASING
1
5537 TA01b
EXPOSED PAD
9
5537 TA01a
5537fa
1
LT5537
W W
U W
U W
U
ABSOLUTE AXI U RATI GS
(Note 1)
PACKAGE/ORDER I FOR ATIO
TOP VIEW
Power Supply Voltage ........................................... 5.5V
Enable Voltage ................................... –0.2V, VCC + 0.2V
Input Power (Note 2) ......................................... 22dBm
Operating Ambient Temperature Range.. –40°C to 85°C
Storage Temperature Range ................ –65°C to 125°C
Maximum Junction Temperature ......................... 125°C
ENBL
1
2
3
4
8
7
6
5
OUT
+
IN
V
EE
9
–
IN
V
CC
+
–
CAP
CAP
DDB PACKAGE
8-LEAD (3mm 2mm) PLASTIC DFN
θJA = 76°C/W
EXPOSED PAD (PIN 9) SHOULD BE SOLDERED TO PCB
DDB PART MARKING
LBJR
ORDER PART NUMBER
LT5537EDDB
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
V
= 3V, ENBL = 3V, T = 25°C, unless otherwise specified. (Notes 3, 4)
ELECTRICAL CHARACTERISTICS
CC
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Signal Input
Input Frequency Range
Maximum Input Power for Monotonic Output
(Note 5)
10 to 1000
MHz
50Ω Termination
200MHz
600MHz
14.0
11.6
9.4
dBm
dBm
dBm
1GHz
DC Common Mode Voltage
Small-Signal Impedance
f = 10MHz
V
– 0.4
V
CC
Measured at 200MHz
1.73kΩ //1.45pF
Linear Dynamic Range
±3dB Error
±1dB Error
88.8
72.5
dB
dB
Slope
R1 = 33k (Note 8)
19.6
–97
mV/dB
dBm
Intercept
V
= 0V, Extrapolated
OUT
Sensitivity
(Notes 3, 7)
= –20dBm
–76.7
–0.007
dBm
Temperature Coefficient
f = 50MHz
P
dB/°C
IN
Linear Dynamic Range
±3dB Error
±1dB Error
90.6
81.0
dB
dB
Slope
R1 = 33k (Note 8)
20
mV/dB
dBm
Intercept
V
= 0V, Extrapolated
–96
OUT
Sensitivity
(Notes 3, 7)
= –20dBm
–77.2
–0.005
dBm
Temperature Coefficient
P
dB/°C
IN
5537fa
2
LT5537
V
= 3V, ENBL = 3V, T = 25°C, unless otherwise specified. (Notes 3, 4)
ELECTRICAL CHARACTERISTICS
CC
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
f = 100MHz
Linear Dynamic Range
±3dB Error
±1dB Error
90.5
82.8
dB
dB
Slope
R1 = 33k (Note 8)
= 0V, Extrapolated
20.3
–95
mV/dB
dBm
Intercept
V
OUT
Sensitivity
(Notes 3, 7)
= –20dBm
–77
dBm
Temperature Coefficient
f = 200MHz
P
–0.004
dB/°C
IN
Linear Dynamic Range
±3dB Error
±1dB Error
90.3
83.5
dB
dB
Slope
R1 = 33k (Note 8)
21.2
–94
mV/dB
dBm
Intercept
V
= 0V, Extrapolated
OUT
Sensitivity
(Notes 3, 7)
= –20dBm
–76.4
0.010
dBm
Temperature Coefficient
f = 400MHz
P
dB/°C
IN
Linear Dynamic Range
±3dB Error
±1dB Error
88.2
70.8
dB
dB
Slope
R1 = 33k (Note 8)
23.1
–91
mV/dB
dBm
Intercept
V
= 0V, Extrapolated
OUT
Sensitivity
(Notes 3, 7)
= –20dBm
–75.3
0.019
dBm
Temperature Coefficient
f = 600MHz
P
dB/°C
IN
Linear Dynamic Range
±3dB Error
±1dB Error
85.8
72.5
dB
dB
Slope
R1 = 33k (Note 8)
25.2
–89
mV/dB
dBm
Intercept
V
= 0V, Extrapolated
OUT
Sensitivity
(Notes 3, 7)
= –20dBm
–74.1
0.026
dBm
Temperature Coefficient
f = 1GHz
P
dB/°C
IN
Linear Dynamic Range
±3dB Error
±1dB Error
63.5
51.7
dB
dB
Slope
R1 = 33k (Note 8)
31.4
–80
mV/dB
dBm
Intercept
V
= 0V, Extrapolated
OUT
Sensitivity
(Notes 3, 7)
= –20dBm
–69.2
0.031
dBm
Temperature Coefficient
Output
P
dB/°C
IN
Starting Voltage
Response Time
Baseband Modulation Bandwidth
Shutdown Mode
ENBL = High (On)
ENBL = Low (Off)
ENBL Input Current
No RF Signal Present
0.4
110
6
V
ns
Input from –30dBm to 0dBm, C
= 2.5pF
LOAD
Output Load Capacitance = 2.5pF
MHz
1
V
V
0.3
V
V
= 3V
= 0V
100
0
µA
µA
ENBL
ENBL
Turn-On Time
Turn-Off Time
100
100
µs
µs
5537fa
3
LT5537
V
= 3V, ENBL = 3V, T = 25°C, unless otherwise specified. (Notes 3, 4)
A
ELECTRICAL CHARACTERISTICS
CC
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Power Supply
Supply Voltage
Supply Current
Shutdown Current
(Note 6)
= 3V
2.7
10
5.25
15
V
mA
µA
V
13.5
500
CC
ENBL = Low
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Maximum differential AC input voltage between IN and IN is 4V
peak. Equivalent to 22dBm with 50Ω input impedance or 16dBm with
200Ω input impedance (1:4 transformer used).
Note 6: The maximum output voltage is limited to approximately V
0.6V. Either the output slope should be reduced or input power level
–
CC
should be limited in order to avoid saturating the output circuit when V
3V. See discussion in “Dynamic Range” section.
Note 7: Sensitivity is defined as the minimum input power required for the
output voltage to be within 3dB of the ideal log-linear transfer curve.
Sensitivity can be improved by as much as 10dB by using a narrowband
input impedance transformation network. See discussion in “Input
Matching” section.
<
CC
+
–
Note 3: Tests are performed as shown in the configuration of Figure 13.
Note 4: Specifications over the –40°C to 85°C temperature range are
assured by design, characterization and correlation with statistical process
control.
Note 8: The output slope is adjustable using an external pull-down resistor
(R1). See Applications Information for description of the output circuit.
Note 5: Operation at lower frequency is possible as described in the “Low
Frequency Operation” section in Applications Information.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
ENBL Current vs Supply Voltage
Supply Current vs Supply Voltage
20
18
16
14
250
200
150
100
RF INPUT SIGNAL OFF
RF INPUT SIGNAL OFF
ENBL = V
ENBL = V
CC
CC
T
= 85°C
A
T
= 85°C
A
T
= 25°C
T
= 25°C
A
A
T
= –40°C
A
T
= –40°C
12
10
A
50
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.5
4.0
4.5
5.0
5.5
3.0
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
5537 G03
5537 G02
5537fa
4
LT5537
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output Voltage, Linearity Error
vs Input Power at 10MHz
V
Variation vs Input Power
Output Voltage, Linearity Error
OUT
at 10MHz
vs Input Power at 50MHz
3
2
2.4
2.0
3
2
2.4
2.0
3
2
V
= ENBL = 3V
NORMALIZED AT 25°C
= ENBL = 3V
V
= ENBL = 3V
CC
CC
V
CC
25°C
85°C
85°C
25°C
1
0
1.6
1.2
1
0
1.6
1.2
1
0
–40°C
85°C
–40°C
–40°C
–1
–2
–3
0.8
0.4
0
–1
–2
–3
0.8
0.4
0
–1
–2
–3
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
INPUT POWER (dBm)
INPUT POWER (dBm)
INPUT POWER (dBm)
5537 G05
5537 G04
5537 G06
Output Voltage, Linearity Error
vs Input Power at 100MHz
V
Variation vs Input Power
V
Variation vs Input Power
OUT
OUT
at 50MHz
at 100MHz
3
2.4
2.0
3
2
3
2
NORMALIZED AT 25°C
= ENBL = 3V
V
CC
= ENBL = 3V
NORMALIZED AT 25°C
V
V
= ENBL = 3V
CC
CC
2
85°C
85°C
85°C
25°C
1
0
1.6
1.2
1
0
1
0
–40°C
–40°C
–1
–2
–3
0.8
0.4
0
–1
–2
–3
–1
–2
–3
–40°C
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
INPUT POWER (dBm)
INPUT POWER (dBm)
INPUT POWER (dBm)
5537 G07
5537 G08
5537 G09
Output Voltage, Linearity Error
vs Input Power at 200MHz
V
Variation vs Input Power
OUT
Typical Detector Characteristics
at 200MHz
2.4
2.0
3
2
3
2
2.4
2.0
1.6
1.2
0.8
0.4
0
NORMALIZED AT 25°C
= ENBL = 3V
T
= 25°C
A
V
200MHz
CC
ENBL = V
CC
85°C
25°C
85°C
1.6
1.2
1
0
1
0
5V
3V
–40°C
0.8
0.4
0
–1
–2
–3
–1
–2
–3
–40°C
V
CC
= ENBL = 3V
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
INPUT POWER (dBm)
INPUT POWER (dBm)
INPUT POWER (dBm)
5537 G10
5537 G11
5537 G12
5537fa
5
LT5537
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Output Voltage, Linearity Error
vs Input Power at 600MHz
Output Voltage, Linearity Error
vs Input Power at 400MHz
V
Variation vs Input Power
OUT
at 400MHz
3.0
2.5
3
2
3
2
3.0
2.5
3
2
NORMALIZED AT 25°C
= ENBL = 3V
V
CC
85°C
25°C
85°C
25°C
85°C
2.0
1.5
1
0
1
0
2.0
1.5
1
0
–40°C
–40°C
1.0
0.5
0
–1
–2
–3
–1
–2
–3
1.0
0.5
0
–1
–2
–3
–40°C
V
= ENBL = 3V
V
= ENBL = 3V
CC
CC
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
INPUT POWER (dBm)
INPUT POWER (dBm)
INPUT POWER (dBm)
5537 G13
5537 G15
5537 G11
Output Voltage, Linearity Error
vs Input Power at 1GHz
V
Variation vs Input Power
V
Variation vs Input Power
OUT
OUT
at 600MHz
at 1GHz
3
3
2
3.0
2.5
3
2
NORMALIZED AT 25°C
V
NORMALIZED AT 25°C
V
= ENBL = 3V
= ENBL = 3V
CC
CC
2
85°C
25°C
85°C
85°C
1
0
1
0
2.0
1.5
1
0
–40°C
–1
–2
–3
–1
–2
–3
1.0
0.5
0
–1
–2
–3
–40°C
–40°C
V
= ENBL = 3V
CC
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
–80
–60
–40
–20
0
20
INPUT POWER (dBm)
INPUT POWER (dBm)
INPUT POWER (dBm)
5537 G16
5537 G18
5537 G17
Output Voltage Distribution vs Temperature at –20dBm
Output Voltage Distribution vs Temperature at –50dBm
25
25
20
15
10
5
RF P = –20dBm at 200MHz
IN
RF P = –50dBm at 200MHz
IN
25°C
25°C
V
= ENBL = 3V
V
= ENBL = 3V
CC
CC
–40°C
85°C
–40°C
85°C
20
15
10
5
0
0
1.45 1.475 1.5 1.525 1.55 1.575 1.6 1.625 1.65 1.675 1.7 1.725 1.75
0.8 0.825 0.85 0.875 0.9 0.925 0.95 0.975
OUTPUT VOLTAGE (V)
1
1.025 1.05 1.075 1.1
OUTPUT VOLTAGE (V)
5537 G20
5537 G19
5537fa
6
LT5537
U
U
U
PI FU CTIO S
ENBL (Pin 1): Enable Pin. When the input voltage is higher
than1V, thecircuitisON. Whentheinputvoltageislessthan
0.3V, or this pin is not connected, the chip is disabled (OFF).
IN+, IN– (Pins 2, 3): Differential Signal Input Pins. These
pins are internally biased to VCC – 0.4V. The impedance
between IN+ and IN– is approximately 1.73kΩ//1.45pF at
200MHz. The input pins should be AC coupled.
VCC(Pin6):PowerSupplyPin.Thispinshouldbedecoupled
using 1000pF and 0.1µF capacitors.
VEE (Pin 7): Ground pin.
OUT (Pin 8): Output pin.
ExposedPad(Pin9):ShouldbeconnectedtoPCBground.
CAP+,CAP– (Pins4,5):ExternalFilterCapacitorPins. The
minimum RF input frequency can be lowered by adding an
optional external capacitor between CAP+ and CAP–.
W
BLOCK DIAGRA
4
5
7k
+
–
CAP
CAP
7k
V
CC
OFFSET
CANCELLATION
6
+
–
IN
IN
2
3
OUT
OUTPUT
BUFFER
8
7
DETECTOR CELLS
7.2k
V
EE
ENBL
BANDGAP REFERENCE
AND BIASING
1
EXPOSED PAD
7
5537 BD
5537fa
7
LT5537
W U U
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APPLICATIO S I FOR ATIO
150
The LT5537 provides a log-linear relationship between an
RF/IF input voltage and its output. The input signal is
amplifiedsuccessivelybylimitingamplifierstages. Aseries
of detector cells rectify the signals and produce an output
current which is log-linearly related to the input power with
140
130
120
110
100
90
a coefficient (I
) of 3.4µA/dB at 200MHz (independent
SLOPE
of the input termination impedance). This coefficient is
almost constant below 200MHz, but rises at higher fre-
quency. The normalized slope variation plot in Figure 1 can
be used to determine the log-linear coefficient at any
frequency. The slope of the output voltage curve is deter-
mined by the total load resistance at the output terminal.
80
70
60
50
1
50
100 200 400 600 1000
FREQUENCY (MHz)
5537 F01
Figure 1. Slope Variation over Frequency
VSLOPE = ISLOPE • RLOAD
The on-chip pull-down resistor is 7.2k. The total load
resistance (RLOAD) can be adjusted by adding external
load resistance to change the output slope. For example,
to achieve a log-linear rate of 20mV/dB, a 33k resistor is
connected between the output pin and ground.
V
CC
Slope = 3.4µA/dB • (7.2//33)kΩ = 20.1mV/dB
Additionally, an off-chip capacitor may be used to reduce
the output time domain voltage ripple.
DETECTOR
OUTPUT
8
OUT
7.2k
5537 F02
Figure 2. Simplified Output Circuit
5537fa
8
LT5537
W U U
APPLICATIO S I FOR ATIO
Dynamic Range
U
Input Matching
The LT5537 is capable of detecting and log-converting an The LT5537 has a high impedance input (Figure 3). The
input signal over a wide dynamic range. The range of the differentialinputimpedanceisderivedfromS11measure-
output voltage may be limited, however, and the monoto- mentwithoneoftheinputpinsACgrounded(Figure 4). At
nicity of the output versus input at high input level may be 200MHz,theinputisequivalentto1.73k//1.45pF(Table 1).
affectedifthesupplyvoltageislowandthelog-linearslope
The input dynamic range is constant in voltage terms,
is set too high. The minimum VCC to support 90dB
ranging from approximately –89dBVrms to 1dBVrms at
dynamicrangewith20mV/dBslopeis2.8Vundernominal
200MHz. The dynamic range expressed in power is
conditions at 25°C. The data shown in the Typical Perfor-
dependent on the actual impedance selected in the ap-
plication design.
mance Characteristics plots was taken with VCC = 3V. If
there is difficulty encountered in achieving the desired
Table 1. Parallel Equivalent RC of the LT5537 Input
dynamic range, then the user is advised to increase the
supply voltage or else to decrease the output slope by
connecting a smaller valued resistor between the output
and ground.
FREQUENCY
100MHz
200MHz
400MHz
600MHz
800MHz
1000MHz
R
C
1.85kΩ
1.73kΩ
1.07kΩ
673Ω
435Ω
303Ω
1.51pF
1.45pF
1.48pF
1.52pF
1.65pF
1.78pF
V
CC
+
–
CAP CAP
TO 2ND
STAGE
7k
7k
+
–
IN
IN
The simplest way of input matching the LT5537 is to
terminate the input signal with a 50Ω resistor and AC
couple it to one of the input pins while AC grounding the
other input pin (Figure 13). The sensitivity (defined as the
minimum input power required for the output to be within
3dB of the ideal log-linear response) is –76.4dBm at
200MHz in this case.
5537 F04
V
BIAS
Figure 3. Simplified Input Circuit
To achieve the best sensitivity, the input termination
impedance should be increased and the input pins should
be differentially driven. An example application circuit is
shown in Figure 5 which uses a transformer to step up the
impedance and perform the balun function. The 240Ω
resistor (R2) sets the impedance at the input of the chip to
200Ω. A 1:4 transformer is used to match the 50Ω signal
source impedance to the circuit input impedance. C1 and
C2 are DC blocking capacitors. This application circuit has
a (3dB error) sensitivity of –82.4dBm at 200MHz.
M/A-COM
ETC4-1-2
+
C1
IN
J1
INPUT
2
R2
240Ω
N/C
–
C2
IN
3
(1:4)
5537 F06
Figure 4. Input Admittance
Figure 5. Differential Input Matching to 200Ω
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9
LT5537
W U U
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APPLICATIO S I FOR ATIO
Table 2. Matching Network Component Values for 200MHz
Center Frequency
The 1:4 input transformer can also be replaced with a
narrow band discrete balun circuit using three compo-
nents as shown in Figure 6. Capacitors C11, C12 and
inductor L1 form a tank circuit having a transformer-like
function over a narrow bandwidth. The increased power-
to-voltagetransformationandthenarrowerinputpassband
servetoimprovethesensitivityofthelogarithmicdetector.
10dB
RETURN
SENSITIVITY LOSS BW
EFFECTIVE
C11,
C12
(pF) (Ω)
INPUT
RESISTANCE
(Ω)
L1
(nH)
R2
(dBm)
–82.4
–86.1
(MHz)
Q
55
82
15
330
2k
2.1
3.9
264
828
18
120
7.5
The resonant balun circuit using discrete components can
be custom designed for a range of different input imped-
ance or sensitivity requirements.
TheexamplesgiveninTable2covertwodifferenttransfor-
mation ratios. The first one transforms single-ended 50Ω
to differential 264Ω. The VOUT vs PIN transfer curves in
Figure 7 indicate that the input power range for linear
logarithmic detection is shifted downward by 7dB with a
sensitivity improvement of 6dB compared with a simple
50Ω termination. The input return loss is 30dB at the
design frequency of 200MHz. Bandwidth for better than
10dB return loss is 55MHz. The second example has a
higher Q of 3.9 and a corresponding transformed imped-
ance of 828Ω. The input power range for linear operation
is shifted downward by 12dB with a sensitivity improve-
ment of 10dB compared with a simple 50Ω termination.
The input return loss is 25dB at the design frequency.
Bandwidth for better than 10dB return loss is 18MHz.
+
C11
C1
IN
J1
INPUT
2
R
S
R
IN
L1
R2
C12
C2
–
IN
3
5537 F07
Figure 6. Input Matching Network
2.5
T
= 25°C
A
200MHz
= ENBL = 3V
V
CC
2.0
BALUN
264Ω
1.5
SINGLE ENDED
50Ω
1.0
0.5
0
–100 –80
–60
–40
–20
0
20
INPUT POWER (dBm)
5537 F10
Figure 7. Measured Output with R = 264Ω
IN
5537fa
10
LT5537
W U U
APPLICATIO S I FOR ATIO
U
AGILENT
E4436B
SIGNAL
GENERATOR
J1
J2
J3
POWER
DIVIDER
–30dB
ATTENUATOR
RF OUT
J1
MINICIRCUIT
SPDT
J2
J3
RF1
RF2
POWER
DIVIDER
INPUT
RF IN
ZYSW-2-50DR
LT5537
DEMO
BOARD
TTL
50Ω
OUT
OUTPUT
HP33120A
FUNCTION
GENERATOR
PM8943A
FET PROBE
10:1
–30dB
ATTENUATOR
SYNC
CH3
CH4
HP 83480A
DIGITAL COMMUNICATIONS
ANALYZER WITH
TRIG
–6dB
ATTENUATOR
HP 54751A
ELECTRONIC PLUG-IN
5537 F14
Figure 8. Timing Test Setup
Baseband Response
The unloaded bandwidth of the LT5537 output buffer is
10MHz. With 2.5pF loading, the output bandwidth is
approximately6MHz.ThebasebandresponseoftheLT5537
was characterized with a pulsed RF input using the setup
shown in Figure 8. The input to the LT5537 is a 200MHz
CW RF signal switched between –30dBm and –60dBm at
arateof600kHz. TheoutputwasconnectedtoaFETprobe
(Fluke PM8943A, 10:1 tip) which has a capacitive loading
of2.5pF. The10%to90%riseandfalltimesare109nsand
115ns, respectively. The input signal and output response
are shown in Figure 9.
Figure 9. Response Time (–30dBm to –60dBm)
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11
LT5537
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U
APPLICATIO S I FOR ATIO
Table 3. Application Design Examples
LOWEST
OPERATING
FREQUENCY
DESIGN
NUMBER
INPUT
POLE
INTERNAL
POLE
DC
DC
LOOP PM
C1, C2
15nF
100pF
5pF
C6
REJECTION BW
APPLICATIONS
1
2
3
4
Open
33nF
390pF
2.2µF
8.5kHz
1.3MHz
20MHz
2.8kHz
414kHz
740Hz
50kHz
10Hz
1.13MHz
160kHz
10MHz
2kHz
75°
1.13MHz
1.3MHz
20MHz
2.8kHz
Minimal Component Count
General Purpose
84°
60°
HF, Fast Settling
47nF
57°
Very Low Frequency
Bold = dominant pole
Low Frequency Operation
The optional capacitance (C6) placed between CAP+ (Pin
4) and CAP– (Pin 5) together with the input DC blocking
capacitors C1 and C2 are used to adjust the operating
frequencyrange. TheDCoffsetcancellationloopcontains
twopolesandonezero(inthelowfrequencyregionforthe
purpose of this analysis). The loop filter capacitance (C6
+ CINT) generates one of the two poles, the input AC
coupling capacitors (C1 and C2) determine the other pole
and the input termination resistance leads to the zero.
(The pole associated with the input AC coupling capacitor
also sets the lower corner frequency of the signal path).
The presence of the two poles in the circuit enables two
approaches to the design of the application circuit for a
desired frequency response. But stability margin has to
be ensured in order to avoid ringing in response to any
input transient. Table 3 lists four low frequency loop
designs suitable for different applications.
BecausethelimitingamplifierstagesoftheLT5537areDC
coupled, the high overall gain requires DC offset control.
TheLT5537hasinternalDCoffsetcancellationcircuitry.The
voltage at the output of the limiting amplifier is low-pass
filtered, inverted and fed back to the input of the limiting
amplifier. The DC cancellation also reduces the gain of the
amplifier at low frequency. As a result, the LT5537 has a
bandpassfrequencyresponsewithalowerenddetermined
by the bandwidth of the offset cancellation feedback loop.
The equivalent circuit of the loop filter is shown in Fig-
ure 10. C1 and C2 are the external DC blocking capacitors
of the differential inputs; C6 is an optional external filter
capacitor which is in parallel with an on-chip filter capaci-
tor (CINT = 60pF). For analysis purposes only, the values
for C6 and the on-chip filter capacitor are doubled when a
single-ended equivalent circuit is derived from a differen-
tial implementation.
Design 1 is the simplest application circuit. The external
capacitor C6 is not used. The input pole is set by the AC
coupling capacitors (C1, C2) and is the dominant pole at
8.5kHz.Thezerogeneratedbytheinputcouplingcapacitor
and the termination resistor is at 60 times the input pole
frequency. The second pole set by the on-chip filter
capacitor (CINT) should be at approximately the same
frequency as that of the zero. This design has a stability
phase margin (PM) of 75 degrees.
C1 OR C2
5.5k
7k
2 • C6
2 • C
1.5k
R /2
S
INT
5537 F16
Figure 10. Offset Cancellation Loop Filter
5537fa
12
LT5537
W U U
APPLICATIO S I FOR ATIO
U
Design 2 is the application circuit (Figure 13) used for
characterization in this data sheet. This is a robust general
purpose design which can operate as low as 1.3MHz.
Optional filter capacitor (C6 = 33nF) together with the on-
chip capacitor set the dominant pole at 740Hz. The input
pole associated with the AC coupling capacitors (C1, C2 =
100pF) is at 1.3MHz which is beyond the loop cut-off
frequency of 160kHz. The zero is at an even higher
frequency and can be safely ignored. This design has a
stability phase margin of 84 degrees, resulting in a very
well damped response to any input biasing transients.
Offset Cancellation Loop and the Timing Response
The input of the LT5537 is AC coupled, and the on-chip DC
biasing is automatically regulated as described above. But
if the DC component of the input signal has any transient
stepwithsufficientlyshortriseorfalltime(forexamplethe
output of an active RF switch has a biasing shift between
switching states), a transient voltage pulse is induced by
the displacement current needed to charge the input AC
coupling capacitor. Also, if the pulse frequency or the
repetition rate is within the loop bandwidth of the offset
cancellation circuit, the LT5537 will respond to the in-
ducedvoltagepulseinthesamewayitnullsoutitsinternal
DC offset, even though the chip is DC isolated from the
input signal.
Design 3 features fast settling. This design is appropriate
when fast response in the presence of input biasing
transients is required, and very low frequency operation is
not needed.
If the external capacitor (C6) is used to extend the low
frequency response of the LT5537, then this will also
lengthen the response time of the DC offset cancellation
circuit. In the presence of DC steps or glitches at the input,
the transient response of the slowed offset cancellation
loopwillbesuperimposedonthefasterlogarithmicdetec-
toroutput,degradingtheoverallresponsetimeofthechip.
Design 4 demonstrates the possibility of operating the
LT5537atverylowfrequency(<10kHz)byconfiguringthe
offset cancellation loop for very low bandwidth. The re-
sponse of this circuit at 10kHz is plotted in Figure 11.
2.5
T
= 25°C
CC
A
The sensitivity of the LT5537 is very high. An input biasing
step with amplitude of 0.5mV can generate a output
voltage response of 400mV before the input voltage tran-
sientdissipatesortheoffsetcancellationloopnullsoutthe
transient, whichever occurs first.
V
= ENBL = 3V
2.0
1.5
1.0
One way to prevent the input signal containing a biasing
transient from degrading the timing response is to design
the offset cancellation loop to have a high bandwidth,
allowing faster settling. Design 3 in Table 3 is suitable for
this purpose, but will not operate below 20MHz.
0.5
0
–100
–60
–40
–20
0
20
–80
INPUT POWER (dBm)
5537 F17
Figure 11. 10kHz Operation
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13
LT5537
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U
APPLICATIO S I FOR ATIO
ENBL
Enable Pin Operation
25k
The enable circuit of the LT5537 is shown in a simplified
forminFigure12.WhenthevoltageattheENBLpinis≥1V,
the enable circuit biases the chip up for normal operation.
The current drawn by the ENBL pin is dependent on the
voltage on that pin. At VCC = ENBL = 3V, the ENBL current
is typically 100µA. At VCC = ENBL = 5V, the ENBL current
increases to about 200µA. When the voltage at the ENBL
pin is ≤0.3V, or if the pin is not connected, the chip is
disabled and draws a reduced supply current of about
500µA, with VCC = 3V.
5537 F04
Figure 12. Equivalent ENBL Input Circuit
ENBL
LT5537
C1
100pF
1
2
8
7
INPUT
OUTPUT
ENBL
OUT
R1
+
IN
V
EE
33k
R2
51Ω
3
4
6
5
–
V
IN
V
CC
CC
–
C3
1nF
C4
1µF
+
C2
CAP
CAP
100pF
5537 F19
C6
33nF
Figure 13. Application Board Schematic
Figure 14. Layout of the Evalulation Board
5537fa
14
LT5537
U
PACKAGE DESCRIPTIO
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702)
0.61 ±0.05
(2 SIDES)
R = 0.115
0.38 ± 0.10
3.00 ±0.10
(2 SIDES)
TYP
5
8
0.56 ± 0.05
(2 SIDES)
0.675 ±0.05
2.50 ±0.05
1.15 ±0.05
2.00 ±0.10
(2 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
PIN 1
CHAMFER OF
PACKAGE
OUTLINE
EXPOSED PAD
4
1
(DDB8) DFN 1103
0.25 ± 0.05
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.20 ±0.05
(2 SIDES)
0.50 BSC
2.15 ±0.05
(2 SIDES)
0 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
BOTTOM VIEW—EXPOSED PAD
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
5537fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT5537
RELATED PARTS
PART NUMBER DESCRIPTION
Infrastructure
COMMENTS
LT5511
LT5512
LT5514
High Linearity Upconverting Mixer
RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer
DC-3GHz High Signal Level Downconverting Mixer DC to 3GHz, 17dBm IIP3, Integrated LO Buffer
Ultralow Distortion, IF Amplifier/ADC Driver
with Digitally Controlled Gain
850MHz Bandwidth, 47dBm OIP3 at 100MHz, 10.5dB to 33dB Gain Control Range
LT5515
LT5516
1.5GHz to 2.5GHz Direct Conversion Quadrature
Demodulator
20dBm IIP3, Integrated LO Quadrature Generator
21.5dBm IIP3, Integrated LO Quadrature Generator
21dBm IIP3, Integrated LO Quadrature Generator
0.8GHz to 1.5GHz Direct Conversion Quadrature
Demodulator
LT5517
LT5519
40MHz to 900MHz Quadrature Demodulator
0.7GHz to 1.4GHz High Linearity Upconverting Mixer 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50Ω Matching,
Single-Ended LO and RF Ports Operation
LT5520
LT5521
LT5522
LT5524
1.3GHz to 2.3GHz High Linearity Upconverting Mixer 15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50Ω Matching,
Single-Ended LO and RF Ports Operation
10MHz to 3700MHz High Linearity
Upconverting Mixer
24.2dBm IIP3 at 1.95GHz, NF = 12.5dB, 3.15V to 5.25V Supply, Single-Ended
LO Port Operation
400MHz to 2.7GHz High Signal Level
Downconverting Mixer
4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50Ω Single-Ended RF
and LO Ports
Low Power, Low Distortion ADC Driver with Digitally 450MHz Bandwidth, 40dBm OIP3, 4.5dB to 27dB Gain Control
Programmable Gain
LT5525
LT5526
High Linearity, Low Power Downconverting Mixer
High Linearity, Low Power Downconverting Mixer
Single-Ended 50Ω RF and LO Ports, 17.6dBm IIP3 at 1900MHz, I = 28mA
CC
3V to 5.3V Supply, 16.5dBm IIP3, 100kHz to 2GHz RF, NF = 11dB, I = 28mA,
CC
–65dBm LO-RF Leakage
LT5527
LT5528
400MHz to 3.7GHz High Linearity,
Downconverting Mixer
23.5dBm IIP3, 12.5dB NF at 1.9GHz, 50Ω Single-Ended RF and LO Ports
1.5GHz to 2.4GHz High Linearity Direct I/Q
Modulator
21.8dBm OIP3 at 2GHz, –159dBm/Hz Noise Floor, 50Ω Interface at All Ports
RF Power Detectors
LT5504
800MHz to 2.7GHz RF Measuring Receiver
80dB Dynamic Range, Temperature Compensated, 2.7V to 5.25V Supply
300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply
100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply
44dB Dynamic Range, Temperature Compensated, SC70 Package
36dB Dynamic Range, Low Power Consumption, SC70 Package
LTC®5505
LTC5507
LTC5508
LTC5509
LTC5530
LTC5531
LTC5532
LT5534
RF Power Detectors with >40dB Dynamic Range
100kHz to 1000MHz RF Power Detector
300MHz to 7GHz RF Power Detector
300MHz to 3GHz RF Power Detector
300MHz to 7GHz Precision RF Power Detector
300MHz to 7GHz Precision RF Power Detector
300MHz to 7GHz Precision RF Power Detector
Precision V
Precision V
Precision V
Offset Control, Shutdown, Adjustable Gain
Offset Control, Shutdown, Adjustable Offset
Offset Control, Adjustable Gain and Offset
OUT
OUT
OUT
50MHz to 3GHz RF Power Detector with 60dB
Dynamic Range
±1dB Output Variation over Temperature, 38ns Response Time
LTC5536
Precision 600MHz to 7GHz RF Detector
with Fast Comparator Output
25ns Response Time, Comparator Reference Input, Latch Enable Input,
–26dBm to +12dBm Input Range
Low Voltage RF Building Block
LT5546 500MHz Quadrature Demodulator with VGA and
17MHz Baseband Bandwidth
Wide Bandwidth ADCs
17MHz Baseband Bandwidth, 40MHz to 500MHz IF, 1.8V to 5.25V Supply, –7dB to
56dB Linear Power Gain
LTC1749
LTC1750
12-Bit, 80Msps
500MHz BW S/H, 71.8dB SNR
500MHz BW S/H, 75.5dB SNR
14-Bit, 80Msps
5537fa
LT 0306 REV A • PRINTED IN THE USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
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