LT8490EUKJ#PBF_技术文档

LT8490

High Voltage, High Current

Buck-Boost Battery Charge Controller with

Maximum Power Point Tracking (MPPT)

DescripTion

FeaTures

The LT^®8490 is a buck-boost switching regulator battery

n

V Range: 6V to 80V

IN

BAT

n

V

Range: 1.3V to 80V

charger that implements a constant-current constant-

voltage (CCCV) charging profile used for most battery

types, including sealed lead-acid (SLA), flooded, gel and

lithium-ion. The device operates from input voltages

above, below or equal to the output voltage and can be

powered by a solar panel or a DC power supply. On-chip

logic provides automatic maximum power point tracking

(MPPT) for solar powered applications. The LT8490 can

performautomatictemperaturecompensationbysensing

an external thermistor thermally coupled to the battery.

STATUS and FAULT pins containing charger information

can be used to drive LED indicator lamps. The device is

available in a low profile (0.75mm) 7mm × 11mm 64-lead

QFN package.

n

Single Inductor Allows V Above, Below, or Equal

IN

to V

BAT

n

Automatic MPPT for Solar Powered Charging

Automatic Temperature Compensation

No Software or Firmware Development Required

Operation from Solar Panel or DC Supply

Input and Output Current Monitor Pins

Four Integrated Feedback Loops

Synchronizable Fixed Frequency: 100kHz to 400kHz

64-Lead (7mm × 11mm × 0.75mm) QFN Package

applicaTions

n

Solar Powered Battery Chargers

Multiple Types of Lead-Acid Battery Charging

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot

Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of

their respective owners.

n

Li-Ion Battery Charger

n

Battery Equipped Industrial or Portable Military

Equipment

Typical applicaTion

Simplified Solar Powered Battery Charger Schematic

Maximum Power Point Tracking

FULL PANEL SCAN

GATEV

CC

´

GATEV ´

CC

V

PANEL

6V/DIV

PERTURB &

OBSERVE

PERTURB &

OBSERVE

SOLAR PANEL

LOAD

TG1 BOOST1 SW1 BG1 CSP CSN

BG2 SW2 BOOST2 TG2

I

PANEL

V

BAT

1.36A/DIV

CSNIN

CSPIN

CSPOUT

CSNOUT

+

–

V

EXTV

IN

CC

RECHARGABLE

BATTERY

8490 TA01b

0.5s/DIV

BACK PAGE APPLICATION

LT8490

AV

DD

GATEV

CC

´

THERMISTOR

TEMPSENSE

GND

GATEV

CC

INTV

CC

STATUS

FAULT

AV

DD

8490 TA01a

8490f

1

For more information www.linear.com/LT8490

LT8490

absoluTe MaxiMuM raTings

pin conFiguraTion

(Note 1)

TOP VIEW

V

– V , V

– V

,

CSP

CSN CSPIN

CSNIN

– V

................................... –0.3V to 0.3V

CSPOUT

CSNOUT

SS, CLKOUT, CSP, CSN Voltage .................. –0.3V to 3V

V Voltage (Note 2)................................... –0.3V to 2.2V

C

LDO33, V , AV Voltage .......................... –0.3V to 5V

DD

FBIR 1

FAULT 2

TEMPSENSE 3

52 NC

51 STATUS

50 IOW

49 SWENO

48 ECON

RT, FBOUT Voltage....................................... –0.3V to 5V

IMON_IN, IMON_OUT Voltage .................... –0.3V to 5V

SYNC Voltage............................................ –0.3V to 5.5V

V

DD

4

FBOW 5

FBIW 6

INTV , GATEV Voltage ........................... –0.3V to 7V

CC

BOOST1

CC

INTV

CC

7

46 V

IN

45 CSPIN

44 CSNIN

V

– V , V

– V

................ –0.3V to 7V

SW1 BOOST2

SW2

SWEN 8

MODE 9

IMON_IN 10

SHDN 11

CSN 12

CSP 13

LDO33 14

FBIN 15

FBOUT 16

IMON_OUT 17

SWEN, MODE Voltage ................................. –0.3V to 7V

SRVO_FBIN, SRVO_FBOUT Voltage........... –0.3V to 30V

SRVO_IIN, SRVO_IOUT Voltage................. –0.3V to 30V

FBIN, SHDN Voltage................................... –0.3V to 30V

CSNIN, CSPIN, CSPOUT, CSNOUT Voltage.. –0.3V to 80V

65

GND

42 CSPOUT

41 CSNOUT

40 EXTV

CC

38 SRVO_FBOUT

37 SRVO_IOUT

36 SRVO_IIN

V , EXTV Voltage .................................. –0.3V to 80V

IN

CC

SW1, SW2 Voltage .....................................81V (Note 5)

BOOST1, BOOST2 Voltage ........................ –0.3V to 87V

BG1, BG2, TG1, TG2...........................................(Note 4)

V

18

35 SRVO_FBIN

C

SS 19

CLKOUT 20

33 BOOST1

IOW, ECON, CLKDET Voltage ......... –0.3V to V + 0.5V

DD

SWENO, STATUS Voltage................ –0.3V to V + 0.5V

DD

FBOW, FBIW, FAULT Voltage .......... –0.3V to V + 0.5V

DD

VINR, FBOR, IIR, IOR Voltage ......... –0.3V to V + 0.5V

DD

UKJ PACKAGE

64-LEAD (7mm × 11mm) PLASTIC QFN

TEMPSENSE Voltage....................... –0.3V to V + 0.5V

DD

CHARGECFG2,

T

JMAX

= 125°C, θ = 34°C/W

JA

EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB

CHARGECFG1 Voltage..................... –0.3V to V + 0.5V

DD

Operating Junction Temperature Range

LT8490E (Notes 1, 3) ......................... –40°C to 125°C

LT8490I (Notes 1, 3).......................... –40°C to 125°C

Storage Temperature Range ................. –65°C to 150°C

orDer inForMaTion

LEAD FREE FINISH

LT8490EUKJ#PBF

LT8490IUKJ#PBF

TAPE AND REEL

PART MARKING*

LT8490UKJ

PACKAGE DESCRIPTION

TEMPERATURE RANGE

–40°C to 125°C

LT8490EUKJ#TRPBF

LT8490IUKJ#TRPBF

64-Lead (7mm × 11mm) Plastic QFN

LT8490UKJ

–40°C to 125°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

8490f

2

For more information www.linear.com/LT8490

LT8490

elecTrical characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_IN= 12V, V_DD= AV_DD= 3.3V, SHDN = 3V unless otherwise noted. (Note 3)

PARAMETER

CONDITIONS

MIN

TYP

MAX UNITS

Voltage Supply and Regulators

l

V

Operating Voltage Range (Note 7)

Quiescent Current

6

80

4.2

1

V

mA

µA

mA

V

IN

DD

Not Switching, V

= 0, V = AV = Float

2.65

0

EXTVCC

DD

Quiescent Current in Shutdown

Quiescent Current

V

= 0V

SHDN

l

I

+ I , V = AV = 3.3V

2.5

4

6.5

6.6

AVDD

VDD DD

DD

EXTV Switchover Voltage

= 20mA, V Rising

EXTVCC

6.15

6.4

0.18

CC

INTVCC

EXTV Switchover Hysteresis

V

CC

l

LDO33 Pin Voltage

5mA from LDO33 Pin

= 0.1mA to 5mA

3.23 3.295 3.35

V

LDO33 Pin Load Regulation

LDO33 Pin Current Limit

I

–0.25

17.25

3.04

35

–1

22

%

LDO33

12

mA

V

LDO33 Pin Undervoltage Lockout

LDO33 Pin Undervoltage Lockout Hysteresis

Switching Regulator Control

SHDN Input Voltage High

LDO33 Falling

2.96

3.12

mV

l

SHDN Rising to Enable the Device

1.184 1.234 1.284

V

mV

V

SHDN Input Voltage High Hysteresis

SHDN Input Voltage Low

50

Device Disabled, Low Quiescent Current

0.35

SHDN Pin Bias Current

V

SHDN

V

SHDN

= 3V

= 12V

0

11

1

22

µA

l

SWEN Rising Threshold Voltage

SWEN Threshold Voltage Hysteresis

MODE Pin Thresholds

1.156 1.206 1.256

22

V

mV

l

Discontinuous Mode

Forced Continuous Mode

2.3

V

0.4

l

IMON_OUT Rising threshold for CCM Operation

IMON_OUT Falling threshold for DCM

Voltage Regulation

MODE = 0V

168

95

195

122

224

150

mV

l

Regulation Voltage for FBOUT

Regulation Voltage for FBIN

FBOUT Pin Bias Current

V = 1.2V, EXTV = 0V

1.193 1.207 1.222

V

C

CC

V = 1.2V, EXTV = 0V

1.184 1.205 1.226

C

CC

Current Out of Pin

15

10

nA

FBIN Pin Bias Current

Current Regulation

l

Regulation Voltage for IMON_IN and IMON_OUT

IMON_IN Output Current

V = 1.2V, EXTV = 0V

1.187 1.208 1.229

V

C

CC

V

– V

= 50mV, V

= 0mV, V

= 5.025V

54

53

57

7

60

61

11.5

µA

CSPIN

CSNIN

CSPIN

l

= 5V

2.5

l

IMON_IN Overvoltage Threshold

IMON_OUT Output Current

1.55

1.61

1.67

V

– V

= 50mV, V

= 5.025V

47.5

47

3.25

2.75

50

5

52.5

54.25

6.75

8

µA

CSPOUT

CSNOUT

CSPOUT

l

– V

= 5.025V

= 5mV, V

= 5.0025V

CSPOUT

l

5

IMON_OUT Overvoltage Threshold

1.55

1.61

1.67

V

8490f

3

For more information www.linear.com/LT8490

LT8490

elecTrical characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_IN= 12V, V_DD= AV_DD= 3.3V, SHDN = 3V unless otherwise noted. (Note 3)

PARAMETER

CONDITIONS

MIN

TYP

MAX UNITS

Switching Regulator Oscillator (OSC1)

Switch Frequency Range

Syncing or Free Running

100

400

kHz

l

Switching Frequency, f

R = 365k

102

170

310

120

202

350

142

235

400

kHz

OSC

T

R = 215k

T

R = 124k

T

l

SYNC High Level for Synchronization

SYNC Low Level for Synchronization

SYNC Clock Pulse Duty Cycle

1.3

V

0.5

80

V

= 0V to 2V

20

%

SYNC

Recommended Min SYNC Ratio, f

CLKOUT Output Voltage HIGH

CLKOUT Output Voltage LOW

CLKOUT Duty Cycle

/ f

3/4

2.45

25

SYNC OSC

1mA Out of CLKOUT Pin

1mA into CLKOUT Pin

2.3

2.55

100

V

mV

T = –40°C

22.7

44.1

77

%

J

T = 25°C

J

T = 125°C

J

Charging Control

l

STATUS, FBOW, FBIW, SWENO, IOW,

ECON Output Low Voltage

I

= 5mA

0.22

3.0

0.5

V

OL

OH

STATUS, FBOW, FBIW, SWENO, IOW,

ECON Output High Voltage

= –5mA

2.7

l

FAULT Output Voltage Low

I

= 0.5mA

0.1

2.2

174

29

0.25

V

OL

OH

FAULT Output Voltage High

= –0.1mA

1.7

Power Supply Mode Detection Threshold (Note 6)

Power Supply Mode Detection Threshold Hysteresis (Note 6)

Minimum VINR Voltage for Start-Up (Note 6)

VINR Pin Falling

VINR Pin

155

mV

Not in Power Supply Mode

Low Power Mode Enabled

Low Power Mode Disabled

l

380

213

395

225

410

237

mV

l

High Charging Current Threshold on IOR (Note 6)

Low Charging Current Threshold on IOR (Note 6)

168

95

195

122

95

224

150

96

mV

%

IOR Rising g ECON Rising

IOR Falling g ECON Falling

Minimum CHARGECFG1 % of AV to Disable Stage 3

Temperature Compensation Enabled

94

DD

(Note 6)

l

Maximum CHARGECFG1 % of AV to Disable Stage 3

Temperature Compensation Disabled

Wide Valid Temperature Range

Narrow Valid Temperature Range

4

94

5

95

5

6

96

%

DD

(Note 6)

Minimum CHARGECFG2 % of AV to Disable Time Limits

DD

(Note 6)

Maximum CHARGECFG2 % of AV to Disable Time Limits

4

6

%

DD

(Note 6)

Minimum TEMPSENSE % of AV to Detect Battery Disconnected

94.5

9

96

10

5

97.5

11

%

DD

(Note 6)

V

– V

Threshold for C/5 Detection (Note 6)

Threshold for C/10 Detection (Note 6)

V

Common Mode = 5.0V, R from

TOTAL

mV

CSPOUT

CSNOUT

CSxOUT

IMON_OUT to Ground = 24.3kΩ

– V

V

Common Mode = 5.0V, IOR Falling,

from IMON_OUT to Ground = 24.3kΩ

4.25

5.75

CSxOUT

TOTAL

R

FBIW, FBOW PWM Frequency (OSC2)

FBIW, FBOW PWM Resolution

STATUS UART Bit Rate

31.25

8

kHz

Bits

l

2160 2400 2640

10

Baud

Bits

Internal A/D Resolution

8490f

4

For more information www.linear.com/LT8490

LT8490

elecTrical characTerisTics

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 5: Negative voltages on the SW1 and SW2 pins are limited in the

applications by the body diodes of the external NMOS devices M2 and

M3 or parallel Schottky diodes when present. The SW1 and SW2 pins

are tolerant of these negative voltages in excess of one diode drop below

ground, guaranteed by design.

Note 2: Do not force voltage on the V pin.

C

Note 6: These thresholds are measured by the internal A-D converter. The

Note 3: The LT8490E is guaranteed to meet performance specifications from

0°C to 125°C junction temperature. Specifications over the –40°C to 125°C

operating junction temperature range are assured by design, characterization

and correlation with statistical process controls. The LT8490I is guaranteed

over the full –40°C to 125°C junction temperature range.

A-D reference voltage is AV . AV , V and an additional 2.8mA load are

DD

DD DD

regulated by LDO33 to create the AV reference for these measurements.

DD

The absolute threshold voltages will shift with corresponding changes in

the AV voltage.

DD

Note 7: 10V minimum V required for solar powered start-up if low power

mode is enabled.

IN

Note 4: Do not apply a voltage or current source to these pins. They must

be connected to capacitive loads only, otherwise permanent damage may

occur.

8490f

5

For more information www.linear.com/LT8490

LT8490

T_A= 25°C, unless otherwise noted.

Typical perForMance characTerisTics

Solar Powered Charging Lead

Acid Battery "A”

Solar Powered Charging Lead

Acid Battery "B”

Solar Powered Charging Lithium

Ion Battery

17.5

15.0

12.5

10.0

7.50

5.00

2.50

0

17.5

15.0

12.5

10.0

7.50

5.00

2.50

0

30

28

26

24

20

10

8

PARTLY CLOUDY

STAGE 1

PARTLY CLOUDY

CLOUDY DAY

STAGE 2

V

BAT

V

BAT

SOME TRANSIENTS

FROM FULL PANEL

SCANS REMOVED

FOR CLARITY.

V

BAT

I

BAT

6

SUNSET

SOME TRANSIENTS

FROM FULL PANEL

SCANS REMOVED

FOR CLARITY.

I

SUNSET

BAT

4

SOME TRANSIENTS

FROM FULL PANEL

SCANS REMOVED

FOR CLARITY.

I

BAT

UART AND

STATUS

INDICATE

< C/10

2

3

0

STAGE

0

9AM

6PM

10AM

6PM

1PM

5PM

TIME OF DAY

8490 G01

8490 G02

8490 G03

BACK PAGE APPLICATION

FIGURE 34 APPLICATION

Power Supply Mode Charging

Lead Acid Battery "B”

STATUS V_OHand V_OL

(V_DD= AV_DD= 3.3V)

FAULT V_OHand V_OL

(V_DD= AV_DD= 3.3V)

15.0

12.5

10.0

7.50

5.00

2.50

0

V

3

2

1

0

3

2

1

0

BAT

–40°C

V

OH

V

OH

STAGE 1

STAGE 2

BAT

STAGE 3

25°C

125°C

I

–40°C

25°C

125°C

25°C

125°C

V

OL

V

OL

–40°C

V

= 36V

IN

0

1

2

3

0

12

0

5

10

| (mA)

15

20

|I

FAULT

| (mA)

CHARGING TIME (HOURS)

|I

STATUS

8490 G06

8490 G04

8490 G05

BACK PAGE APPLICATION

LDO33 Load Regulation (Not

FBOUT, FBIN, IMONIN, IMONOUT

Voltage Rise vs Power

Connected to AV_DDand V_DD

)

IMON Output Currents

3.4

3.3

3.2

3.1

3

200

175

150

125

100

75

1.0

0.8

0.6

0.4

0.2

0

INTV REGULATED

CC

FROM V

IMON_IN

IN

25°C

125°C

–40°C

IMON_OUT

50

25

INTV REGULATED

CC

FROM EXTV

CC

0

–25

0

4

8

12

16

20

–100 –50

0

50

100

150

200

0

0.5

1

1.5

2

LOAD CURRENT (mA)

CSxIN-CSxOUT (mV)

INTV REGULATOR POWER (W)

CC

8490 G07

8490 G08

8490 G09

8490f

6

For more information www.linear.com/LT8490

LT8490

T_A= 25°C, unless otherwise noted.

Typical perForMance characTerisTics

Maximum Power Point Tracking

Perturb and Observe

V

PANEL

V

PANEL

5V/DIV

PERTURB & OBSERVE

5V/DIV

V

PANEL

5V/DIV

FULL PANEL

SCANS

I

MON_OUT

200mV/DIV

IMON_OUT

100mV/DIV

IMON_OUT

500mV/DIV

8490 G10

8490 G11

8490 G12

30s/DIV

FIGURE 34 APPLICATION

0.5s/DIV

FIGURE 34 APPLICATION

Full Panel Scan—Partially

Shaded with Dual Power Peaks

Perturb and Observe

Maximum Power Point Tracking

Full Panel Scan Single Power

Peak

V

PANEL

10V/DIV

PANEL

10V/DIV

ROTATE PANEL

TOWARDS THE SUN.

PANEL VOLTAGE

AND CURRENT ARE

AUTOMATICALLY

ADJUSTED TO

LOWER POWER PEAK

MAX POWER PEAK

POWER PEAK

V

IMON_OUT

500mV/DIV

PANEL

IMON_OUT

200mV/DIV

6V/DIV

NEW MAX.

IMON_IN

500mV/DIV

IMON_IN

200mV/DIV

IMON_OUT

100mV/DIV

8490 G14

8490 G15

8490 G13

5s/DIV

0.5s/DIV

FIGURE 34 APPLICATION

Panel Voltage in Low Power

Mode

Panel Voltage in Low Power

Mode

10.6mV

17.6V

10.6mV

IMON_OUT

50mV/DIV

IMON_OUT

50mV/DIV

V

PANEL

5V/DIV

10.1V

3.3V

V

PANEL

5V/DIV

10.4V

3.3V

SWEN

5V/DIV

SWEN

5V/DIV

8490 G16

8490 G17

40ms/DIV

FIGURE 34 APPLICATION

8490f

7

For more information www.linear.com/LT8490

LT8490

pin FuncTions

FBIR (Pin 1): A/D Input Pin. Connects to FBIN pin to

measure input feedback voltage.

CSN (Pin 12): The (–) Input to the Inductor Current Sense

and Reverse Current Detect Amplifier.

FAULT (Pin 2): FAULT Pin. This pin generates an active

high digital output that, when used with an LED, provides

a visual indication of a fault event.

CSP (Pin 13): The (+) Input to the Inductor Current Sense

and Reverse Current Detect Amplifier. The V pin voltage

C

and built-in offsets between the CSP and CSN pins set the

current trip threshold.

TEMPSENSE(Pin3):A/DInputPin.Connectstoathermis-

tor divider network for sensing battery temperature or a

resistor divider if unused. This pin is frequently monitored

fortemperaturecompensationandenforcingtemperature

limits.

LDO33 (Pin 14): 3.3V Regulator Output. This supply

provides power to the V and AV pins. Bypass this

DD

pin to ground with a minimum 4.7µF ceramic capacitor.

FBIN (Pin 15): Input Feedback Pin. This pin is connected

to the input error amplifier input.

V

(Pin 4): Control Logic Power Supply Pin. Connect

DD

this pin to LDO33 and AV .

DD

FBOUT (Pin 16): Output Feedback Pin. This pin connects

the error amplifier input to an external resistor divider

from the output.

FBOW(Pin5):PWM DigitalOutputPin.ConnectstoFBOUT

through an RCR network to temperature compensate the

battery voltage.

IMON_OUT (Pin 17): Output Current Monitor Pin. The

current out of this pin is proportional to the average out-

put current. See the Applications Information section for

more information.

FBIW (Pin 6): PWM Digital Output Pin. Connects to FBIN

through an RCR network to adjust the solar panel volt-

age for MPPT.

INTV (Pin 7): Internal 6.35V Regulator Output Pin. Con-

V (Pin 18): Error Amplifier Output Pin. Tie the external

CC

C

nectstotheGATEV pin. INTV ispoweredfromEXTV

compensation network to this pin.

CC

when the EXTV voltage is higher than 6.4V, otherwise

CC

SS (Pin 19): Soft-Start Pin. Place 100nF of capacitance

from this pin to ground. Upon start-up, this pin will be

charged by an internal resistor to 2.5V.

INTV is powered from V . Bypass this pin to ground

CC

IN

with a minimum 4.7µF ceramic capacitor. See Switching

Configuration - MODE Pin for additional details.

CLKOUT (Pin 20): Switching Regulator Clock Output Pin.

CLKOUT will toggle at the same frequency as the switch-

ing regulator oscillator (OSC1 on the Block Diagram) or

as the SYNC pin, but is approximately 180° out-of-phase.

CLKOUT can also be used as a temperature monitor of the

switching regulator since the CLKOUT duty cycle varies

linearly with the junction temperature of the switching

regulator. It is connected to CLKDET through an RC filter.

The CLKOUT pin can drive capacitive loads up to 200pF.

SWEN (Pin 8): Switch Enable Pin. Tie to the SWENO pin.

MODE (Pin 9): Mode Pin. The voltage applied to this pin

setstheoperatingmodeoftheswitchingregulator.Tiethis

pin to INTV to make discontinuous current mode active.

CC

Tie this pin to ground to operate in discontinuous current

mode for low battery charging currents and continuous

current mode for high battery charging currents. Do not

float this pin. See Switching Configuration - MODE Pin

for additional details.

SYNC (Pin 21): To synchronize the switching frequency

to an outside clock, simply drive this pin with a clock. The

high voltage level of the clock needs to exceed 1.3V, and

the low level should be less than 0.5V. Drive this pin to

less than 0.5V to revert to the internal free-running clock

(OSC1 in the Block Diagram).

IMON_IN (Pin 10): Input Current Monitor Pin. The current

out of this pin is proportional to the input current. See the

Applications Information section for more information.

SHDN (Pin 11): Shutdown Pin. In conjunction with the

UVLO (undervoltage lockout) circuit, this pin is used to

enable/disable the chip. Do not float this pin.

8490f

8

For more information www.linear.com/LT8490

LT8490

pin FuncTions

RT (Pin 22): Timing Resistor Pin. Adjusts the switching

regulator frequency (OSC1) when SYNC is not driven by

a clock. Place a resistor from this pin to ground to set

the free-running frequency of OSC1. Do not float this pin.

EXTV (Pin 40): External V Input. When EXTV ex-

CC CC CC

ceeds6.4V(typical), INTV willbepoweredfromthispin.

CC

When EXTV is lower than 6.22V (typical), INTV will be

CC

powered from V . See Switching Configuration - MODE

IN

Pin for additional details.

BG1, BG2 (Pin 23/Pin 25): Bottom Gate Drive. Drives the

gates of the bottom N-channel MOSFETs between ground

CSNOUT (Pin 41): The (–) Input to the Output Current

Sense Amplifier.

and GATEV .

CC

GATEV (Pin 24): Power Supply for Gate Drivers. Must

CSPOUT (Pin 42): The (+) Input to the Output Current

Sense Amplifier. This pin and the CSNOUT pin measure

the voltage across the sense resistor to provide the output

current signals.

CC

be connected to the INTV pin. Do not power from any

CC

other supply. Locally bypass to ground.

BOOST1,BOOST2(Pin33/Pin27):BoostedFloatingDriver

Supply. The (+) terminal of the bootstrap capacitor con-

nects here. The BOOST1 pin swings from a diode voltage

CSNIN (Pin 44): The (–) Input to the Input Current Sense

Amplifier. This pin and the CSPIN pin measure the voltage

across the sense resistor to provide the instantaneous

input current signals.

below GATEVcc up to V + GATEV . The BOOST2 pin

IN

CC

swings from a diode voltage below GATEV up to V

CC

BAT

+ GATEV .

CC

CSPIN (Pin 45): The (+) Input to the Input Current Sense

Amplifier.

TG1, TG2 (Pin 32/Pin 28): Top Gate Drive. Drives the top

N-channelMOSFETswithvoltageswingsequaltoGATEV

superimposed on the switch node voltages.

CC

V (Pin 46): Main Input Supply Pin. Must be bypassed

IN

to local ground plane.

SW1,SW2(Pin31/Pin29):SwitchNodes.The(–)terminal

of the bootstrap capacitors connect here.

ECON (Pin 48): Digital Output Pin. Optional control output

signal used to disconnect EXTV from the battery when

CC

SRVO_FBIN (Pin 35): Open-Drain Logic Output. This pin

is pulled to ground when the input voltage feedback loop

is active. This pin is unused for most LT8490 applications

and can be floated.

the average charge current drops below a predetermined

threshold.

SWENO (Pin 49): Digital Output Pin. Connect to SWEN.

Enables the switching regulator. A 200kΩ pull-down re-

sistor is required from this pin to ground.

SRVO_IIN (Pin 36): Open-Drain Logic Output. This pin is

pulled to ground when the input current feedback loop is

active. This pin is unused for most LT8490 applications

and can be floated.

IOW (Pin 50): Digital Output Pin. Connects to IMON_OUT

through a resistor. By switching the pin between logic low

and high impedance, the total R

changes, which

IMON_OUT

changes the output current limit.

SRVO_IOUT (Pin 37): Open-Drain Logic Output. This pin

is pulled to ground when the output current feedback loop

is active. This pin is unused for most LT8490 applications

and can be floated.

STATUS (Pin 51): Digital Output Pin. When used with an

LED, this signal provides a visual indication of the pro-

gress of the charging algorithm. In addition, STATUS

transmits two UART bytes (8 bits, no parity, one stop bit,

2400 baud) every 3.5 seconds (typical), which indicates

status and fault information.

SRVO_FBOUT(Pin38):Open-DrainLogicOutput.Thispin

is pulled to ground when the output voltage feedback loop

is active. This pin is unused for most LT8490 applications

and can be floated.

IIR (Pin 53): A/D Input Pin. Connects to IMON_IN to read

input current. Used to manage MPPT.

8490f

9

For more information www.linear.com/LT8490

LT8490

pin FuncTions

VINR (Pin 54): A/D Input Pin. Connects to resistive di-

vider on VIN to measure input voltage. Used to manage

MPPT and start-up.

CHARGECFG1 (Pin 61): A/D Input Pin. Used to configure

the float voltage, temperature compensation and enable

stage 3 charging.

CLKDET (Pin 56): A/D Input Pin. Connects to CLKOUT

through an RC filter to detect the duty cycle of CLKOUT.

Used to manage start-up.

CHARGECFG2 (Pin 63): A/D Input Pin. Used to configure

time limits and the valid battery temperature range.

IOR (Pin 64): A/D Input Pin. Connects to IMON_OUT pin

to read the charger output current. Used to manage the

charging algorithm.

FBOR (Pin 57): A/D Input Pin. Connects to FBOUT pin to

read charger output voltage. Used to manage the charg-

ing algorithm.

GND (Exposed Pad 65 and Pins 55, 59, 62): Ground. Tie

directly to local ground plane.

AV (Pin 58): A/D Positive Reference Pin. Tie this pin to

DD

V

and LDO33.

DD

NC (Pins 52, 60): Not connected.

8490f

10

For more information www.linear.com/LT8490

LT8490

block DiagraM

BOOST1

33

CSP

13

+

–

A5

+

TG1

32

31

A8

CSN

SW1

12

9

MODE

2.5V

GATEV

CC

24

23

UV_INTV

CC

OT

OI_IN

OI_OUT

BG1

V

46

19

IN

BUCK,BOOST

LOGIC

START-UP AND

FAULT LOGIC

SS

BG2

25

UV_V

IN

UV_GATEV

CC

–

+

SW2

TG2

UV_LDO33

1.234V

29

28

SHDN

11

+

–

SYNC

RT

BOOST2

A9

21

22

27

18

V

C

OSC1

+

–

6.4V

CLKOUT

EXTV

CC

20

40

7

V

IN

305k

6.35V REG

REG

6.35V REG

AV

DD

CLKDET

SWEN

INTV

INTERNAL

SUPPLY1

CC

56

8

ADC

3.3V REG

LDO33

INTERNAL

SUPPLY2

14

4

SWENO

49

36

V

DD

SRVO_IIN

CSNIN

NC

10

AV

58

37

DD

44

45

–

A7

+

CSPIN

SRVO_IOUT

NC

IMONIN

IIR

–

EA2

+

10

53

CSPOUT

CSNOUT

1.208V

+

42

41

+

A6

AV

DD

+

–

10

IMONOUT

–

+

ADC

17

EA1

AV

DD

1.208V

10

VINR

FBIN

IOW

54

15

ADC

50

CONTROL,

CHARGING,

MPPT

AV

DD

10

IOR

+

–

64

16

ADC

EA3

LOGIC

1.205V

OSC2

10

FBOUT

–

+

SRVO_FBIN

EA4

–

35

NC

1.207V

AV

DD

FBIR

SRVO_FBOUT

ECON

1

6

ADC

38 NC

48

FBIW

PWM

FBOW

FBOR

5

PWM

AV

DD

AV

DD

AV

DD

10

TEMPSENSE

CHARGECFG1

CHARGECFG2

3

57

ADC

AV

DD

AV

DD

61

63

ADC

AV

DD

ADC

NTC

GND

STATUS

FAULT

55

51

2

8490 BD

AV

DD

Figure 1. Block Diagram

8490f

11

For more information www.linear.com/LT8490

LT8490

operaTion

Overview

TEMPSENSE pin can provide temperature compensated

charging and/or can be used to disable charging when

the battery is outside of safe temperature limits. The

presence of the NTC resistor can also give an indication

to the charger if the battery is connected or not.

The LT8490 is a powerful and easy to use battery charging

controller with automatic maximum power point tracking

(MPPT) and temperature compensation. The LT8490 is

basedontheLT8705buck-boostcontrollerwithadditional

battery charging and MPPT control functions. Refer to the

LT8705datasheetformoredetailedinformationaboutthe

switching regulator portions of the LT8490. Several refer-

enceapplicationsareincludedinthisdatasheettosimplify

systemdesign. Manybatterychargingapplicationscanbe

implemented using one of the reference applications with

little or no modification required. Configuration for the

various charging parameters is implemented in the hard-

ware. No software or firmware development is required.

TheLT8490alsoprovideschargingstatusandfaultindica-

tors through the STATUS and FAULT pins. The behavior

of these pins is described in the STATUS and FAULT

Indicators section.

Battery Charging Algorithm

The LT8490 implements a CCCV charging algorithm. The

idealized charging profile is shown in Figure 2 and as-

sumes constant temperature and adequate input power.

As battery temperature and illumination conditions on the

panel change, the actual current and voltage seen by the

battery will vary accordingly.

The LT8490 includes four different forms of regulation:

output current, input current, input voltage and output

voltage (EA1-EA4 respectively as shown in Figure 1).

Whichever form of regulation requires the lowest voltage

After start-up, the LT8490 frequently measures the bat-

tery voltage and charging current to determine the proper

charging stage.

on the V pin limits the commanded inductor current.

C

When powered by a solar panel, the MPPT function uses

input voltage regulation to locate and track the maximum

power point of the panel. Input current regulation is used

tolimitthemaximumcurrentdrawnfromtheinputsupply.

The output current regulation limits the battery charging

current, and the output voltage regulation is used to set

the maximum battery charging voltage.

STAGE 0 STAGE 1

TRICKLE CONSTANT

CHARGE CURRENT

STAGE 2

CONSTANT

VOLTAGE

STAGE 3

REDUCED

CONSTANT

VOLTAGE

MAXIMUM CHARGING

CURRENT (C)

V

STAGE 2

S2

S3

BATTERY

VOLTAGE

VOLTAGE LIMIT

The LT8490 offers user configurable timers that can

be enabled with the appropriate resistor divider on the

CHARGECFG2 pin. If a timer has been set and expires, the

LT8490 will halt charging and communicate this through

the STATUS and FAULT pins. Options for automatic restart

of the charge cycle are discussed later in the Automatic

Charger Restart and Fault Recovery section.

STAGE 3

VOLTAGE LIMIT

(OPTIONAL)

CHARGING

CURRENT

8490 F01

CHARGING TIME

The LT8490 also includes a TEMPSENSE pin, which can

be connected to an NTC resistor divider network ther-

mally coupled to the battery pack. When connected, the

Figure 2. Typical Battery Charging Cycle

8490f

12

For more information www.linear.com/LT8490

LT8490

operaTion

Table 1. Description of LT8490 Charging Stages

STAGE 0: In Stage 0 (reduced constant-current/trickle

charge) the LT8490 charges the battery with a hardware

configurablereducedconstantcurrent. Thistricklecharge

stage occurs for battery voltages between 35% to 70%

STAGE

NAME

METHOD

DURATION

0

Trickle Constant Current

Until Battery Voltage Rises

Charge

at a Configured

Fraction of Full

Charge Current

Above V (70% of Stage 2

S0

Voltage Limit)

(typical) of the Stage 2 voltage limit (V ).

S2

Optional Max Time Limit

Until Battery Voltage Rises

Above V (98% of Stage 2

STAGE 1: In Stage 1 (full constant-current) the LT8490

chargesthebatterywithahardwareconfigurableconstant

current equal to or higher than in Stage 0. This constant

current stage occurs for battery voltages between 70% to

98% (typical) of the Stage 2 voltage limit. This charging

stage is often referred to as bulk charging. This charg-

ing stage will be called Stage 1 for the remainder of this

document.

1

2

3

Constant

Current

Constant Full

Charge Current

S1

Voltage Limit)

Optional Max Time Limit for

Stage 1 + Stage 2

Constant Constant Voltage Until Charging Current Falls

Voltage

Below C/10 or Optional

Indefinite Charging

Optional Max Time Limit for

Stage 1 + Stage 2

STAGE2:InStage2(constant-voltage)theLT8490charges

thebatterywithahardwareconfigurableconstantvoltage.

This constant voltage stage occurs for battery voltages

above 98% (typical) of the Stage 2 voltage limit. This

charging stage is often referred to as float charging for

lithium-ionbatteriesandabsorptionchargingforlead-acid

batteries. To avoid confusion, this charging stage will be

called Stage 2 for the remainder of this document.

Reduced Constant Voltage

Until Battery Voltage Falls

below 96% of V (Stage 3

Voltage Limit - Configurable)

or Charging Current Rises

Above C/5

(Optional) Constant at a Configured

S3

Voltage

Fraction of

Stage 2

Constant Voltage

Optional Max Time Limit.

The same duration as the

Stage 1 + Stage 2 Time Limit.

If the optional Stage 3 is enabled, the LT8490 will proceed

from Stage 2 to Stage 3 when the charging current drops

below C/10. Other conditions for exiting Stage 2 depend

on whether time limits are enabled for the charger. See

the Charging Time Limits section for more details about

Stage 2 termination.

Maximum Power Point Tracking

Whenpoweredbyasolarpanel,theLT8490employsapro-

prietary Perturb and Observe algorithm for identifying the

maximum power point. This algorithm provides accurate

MPPT for slow to moderate changes in panel illumination.

The panel is also scanned periodically to avoid settling on

a false maximum power point for long periods of time, in

the case of non-uniform panel illumination.

STAGE 3 (OPTIONAL): Stage 3 is optional as configured

with the CHARGECFG1 pin. In Stage 3 theLT8490 charges

thebatterywithahardwareconfigurablereducedconstant

voltage. This charging stage is often referred to as float

charginginlead-acidbatterycharging.Thischargingstage

will be called Stage 3 for the remainder of this document.

Fault Conditions

The LT8490 can indicate the presence of a fault condi-

tion through the STATUS and FAULT pins. These faults

include: battery undervoltage, battery overtemperature,

battery under temperature and timer expiration. Follow-

ing a fault, the LT8490 will discontinue charging until the

fault condition is removed, at which point it will continue

or restart the charging cycle. See the Automatic Charger

Restart and Fault Recovery section for more information.

Charging will automatically restart if, during Stage 3, the

charging current exceeds C/5 or the battery voltage falls

below 96% (typical) of the Stage 3 voltage limit (V ). In

S3

addition, anoptionaltimelimitcanbeenabledtoterminate

charging in Stage 3. See the Charging Time Limits section

for more details about Stage 3 termination.

8490f

13

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Input Voltage Sensing and Modulation Network

Due to the granularity of standard resistor values, simply

rounding the calculated results to their nearest standard

values may result in unwanted errors. Consider using

multiple resistors in series to more closely match the

calculatedresults.Otherwise,usestandardresistorvalues

and check the final results with the following equations:

The passive component network shown in Figure 3 is re-

quired to properly measure and modulate the input supply

voltage. This network is required whether the supply is a

solar panel or a DC voltage source.

V

IN

⎡

⎢

⎣

⎤

⎛

⎜

⎝

⎞

⎟

⎠

R_FBIN1

_DACI1+R_DACI2

R_FBIN1

LT8490

V = 1.205 •

+

+1

V

⎥

IN

X2

R

⎦

FBIR

FBIN

FBIN2

R

FBIN1

R

DACI1

DACI2

V

indicates the actual V

using the selected resis-

MAX

X2

FBIW

tors. Make sure this result is greater than or equal to the

FBIN2

C

DACI

GND

desired V

for the application.

MAX

8490 F03

⎛

⎜

⎝

⎞

⎟

⎠

R_FBIN1

_DAC1+R_DAC2

V = V −3.3 •

X1

X2

R

Figure 3. Input Feedback Resistor Network

Choosing the components requires knowing the maxi-

V

should be as close to 6V as possible. Iterations may

X1

mum panel open-circuit voltage (V

) as well as the

berequiredtodeterminethebeststandardresistorvalues.

OCMAX

maximum DC input supply voltage (V

) desired

DCMAX

Table 2 shows good sets of standard value components

for maximum input voltages of 20V, 40V, 60V and 80V.

Iterative calculations were required to select these values

that achieve the best overall results.

(see the DC Supply Powered Charging section for more

information).V typicallyoccursatcoldtemperatures

OCMAX

and should be specified in the panel manufacturer’s data

sheet. Use the following equations to determine proper

component values:

Table 2. Input Feedback Network vs Panel Voltage

V

R

C

DACI

MAX

FBIN1

FBIN2

DACI1

DACI2

⎡

⎢

⎣

⎤

⎥

⎛

⎞

4.470V

(V)

20

40

60

80

(kΩ)

95.3

107

105

133

(kΩ)

8.45

4.87

3.24

3.09

(kΩ)

19.1

8.66

5.36

4.87

(nF)

1+

⎜

⎟

3.4

270

V

−6V

⎝

⎠

MAX

R_FBIN1= 100k •

Ω

1.69

1.05

560

⎛

⎜

⎝

⎞

5.593

⎟⎥

1000

V

−6V

⎠

⎦

MAX

⎛

⎜

⎝

⎞

R_FBIN1

As discussed later in DC Supply Powered Charging, ar-

bitrarily setting V to 80V may not result in the best

R_DACI2= 2.75 •

Ω

⎟

V

−6V

⎠

MAX

operation of the LT8490 for all conditions, particularly at

low input voltages. Be sure to give proper consideration

to the required voltage range for each application.

1

R_FBIN2

=

Ω

⎛

⎞

⎛

⎜

⎝

⎞

⎟

⎠

1

−

⎜

⎟

100k −R

R

⎝

⎠

FBIN1

DACI2

Solar Powered Charging

R_DACI1= 0.2 •R_DACI2Ω

VINR DIVIDER NETWORK: The LT8490 can be powered

by a solar panel or a DC power supply. As discussed later

in DC Supply Powered Charging, the VINR pin must be

pulledlowwhenbeingpoweredbyaDCsupply.Otherwise,

VINR must be connected to the resistor divider network

1

C_DACI

=

F

1000 •R_DACI1

where V

is the greater of V

some additional margin. These resistors should have a

1% tolerance or better.

and V

with

MAX

OCMAX

DCMAX

as shown in Figure 4.

8490f

14

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

1. LOW POWER MODE ENABLED: Low power mode al-

lows additional power to be recovered from the solar

panel under very weak lighting conditions. When low

power mode is enabled, the panel voltage must initially

exceed 10V (typical – as measured through the VINR

pin) before the charger will attempt to charge the bat-

tery. Read the Optional Low Power Mode section for

more details.

V

IN

LT8490

V

IN

196k

VINR

8.06k

GND

8490 F04

2. LOW POWER MODE DISABLED: If low power mode is

disabled the charger will attempt to charge the battery

as long as the panel is above 6V. However, if sufficient

panelcurrentisnotdetectedtheLT8490willtemporarily

stopcharging.Thechargerwillcheckforsufficientpanel

current at 30 second intervals (typical) or will check

sooner if the LT8490 detects either a significant rise

in panel voltage or a significant fall in battery voltage.

Figure 4. VINR Resistor Divider Circuit

The LT8490 uses this divider network to measure abso-

lute panel voltage (as part of its maximum power point

calculations) and to check for adequate input voltage to

operate the charger. These resistors should have a 1%

tolerance or better.

TIMER TERMINATION DISABLED: When powered by a

solarpanel,thetimerterminationoption(seetheCharging

Time Limits section for more detail) is automatically dis-

abled. This is due to the inability to guarantee full charging

current during the entire charging cycle in cases where

the panel illumination conditions change. In addition, the

timers can reset if all power to the charger is lost due to

insufficient lighting. This makes the use of timer termina-

tion potentially unreliable in solar powered applications.

3. LOW INPUT VOLTAGE EFFECTS: Figure 5 shows the

minimum input voltage, below which the maximum

chargingcurrentcanbereduced. Thislimitisafunction

of the input V

as discussed previously in the Input

MAX

Voltage and Modulation Network section. Maximum

charging current can reduce as FBIN gets closer to

its regulation voltage of 1.205V (typical). This is not

normally a significant issue unless 1) the charger is

powered by a low voltage DC power supply or 2) a low

voltagepanelisusedwithachargerthatwasconfigured

C/10 DETECTION: When powered by a solar panel, charg-

ing current may drop below C/10 because the battery is

approaching full charge, or because the solar panel has

insufficient lighting. If sufficient panel power is available,

the LT8490 can determine if the charging current has

dropped below C/10 due to the battery approaching full

charge. In this case, the charger will proceed from Stage 2

to the next appropriate stage. If the LT8490 is able to de-

termine that the charging current has dropped below C/10

due to insufficient panel power, the charger will continue

operating in Stage 2.

for a much higher voltage panel. The farther that V

IN

is below the Normal Configuration line in Figure 5 the

more the current can reduce.

25

20

NORMAL CONFIGURATION

15

10

MINIMUM PANEL VOLTAGE REQUIREMENT: A minimum

panel voltage of 6V is required to operate the charger.

However, higher panel voltages are required in various

other cases.

5

DC SUPPLY ONLY WITH FBIN = LDO33

0

10 20 30 40 50 60 70 80

(V)

V

MAX

8490 F05

Figure 5. Minimum Full Charging Current V_INVoltage

8490f

15

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

When V is powered by a DC voltage supply, main-

(1) disconnecting FBIN from FBIR and (2) connecting the

FBIN pin directly to LDO33.

IN

tain V higher than the Normal Configuration line in

IN

Figure 5. Operating V below this line can reduce

IN

INPUT CURRENT LIMITING: Input current limiting should

be considered when using DC power supplies. This is

discussed later in the Input Current Limiting section.

the maximum charging current and the V and V

S2

S3

charging voltages. If V is never going to be supplied

IN

by a solar panel then FBIN can be disconnected from

FBIR (see Figure 3) and reconnected to the LDO33 pin.

In Situ Battery Charging

This allows the charger to operate with V as low as 6V

IN

The LT8490 can be used to charge a battery while the

battery is powering a load. The load should be directly

connected to the battery terminals as shown in Figure

6. The variable nature of some loads can make charg-

ing times unpredictable. Due to this unpredictability it is

recommended that charging time limits be disabled (see

Charger Configuration – CHARGECFG2 Pin section for

more information).

with no charging current or voltage reduction.

Whenusingasolarpanelsupply, chooseapanelhaving

a maximum open-circuit voltage (V ) close to V

OC

MAX

(discussed in the prior Input Voltage Sensing and

Modulation Network section). The maximum power

point voltage is typically well above the voltage limit in

Figure 5 and current limiting is rarely an issue. Avoid

usingsolarpanelsthatoperatedramaticallybelowV

,

MAX

Because a load connected to the battery may draw more

power than provided by the charger, the battery may

discharge while the LT8490 is charging the battery. If

this case occurs and the battery voltage falls below 31%

(typical) of the Stage 2 voltage limit, the undervoltage

fault will become active and the charger will halt until the

battery voltage rises above 35% (typical) of the Stage 2

voltage limit. Consider automatically disabling the load if

the battery depletes below an unacceptably low voltage.

particularly if the maximum power point voltage is typi-

cally below the Normal Configuration line in Figure 5.

DC Supply Powered Charging

SELECTING POWER SUPPLY MODE: When powered by

a DC voltage source, the VINR pin must be pulled below

174mV (typical) to activate power supply mode. This

disablesunnecessarysolarpanelfunctionsandallowsthe

LT8490 to operate properly from a DC voltage source. If

the application is never powered by a solar panel, VINR

can be grounded. If the application is only powered by

a solar panel, then connect VINR as shown in Figure 4.

Otherwise, see the Optional DC Supply Detection Circuit

section for a method to pull down the VINR pin when a

DC supply is detected.

The arrow in Figure 6 shows the proper disconnect point if

removing the battery from the charger in an in situ battery

charging application. This disconnect point is specified

because the LT8490 is not designed to provide power

directly to a load without the presence of a battery.

MINIMUMINPUTVOLTAGEREQUIREMENT:Whenpower

supply mode is enabled, the LT8490 will operate from an

input as low as 6V. However, charging current capability

can become limited at low input voltages depending on

+

LT8490

LOAD

BASED

V

BAT

CHARGER

the V

voltage used to select the input voltage sensing

MAX

CABLE

TO/FROM

CHARGER

network(seepreviousInputVoltageSensingandModula-

tion Network section). Figure 5 shows the minimum input

supplyvoltagerequired,belowwhichchargingcurrentcan

become less than the maximum output current limit. If

the LT8490 is powered by a DC supply only, the minimum

input voltage shown in Figure 5 can be reduced to 6V by

–

8490 F06

Figure 6. Load Connection to Battery in LT8490 Application

8490f

16

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Stage Voltage Limits

R

is often chosen between 4.99kΩ and 49.9kΩ.

FBOUT2

Choosing higher values for R

reduces the amount

FBOUT2

The Stage 2 voltage limit (V ) is the maximum battery

S2

of current draw from the battery through the feedback

network.

charging voltage. The voltage limits for Stages 0, 1 and

3 are all related to the Stage 2 limit as shown in Table 3

and Figure 11. If temperature compensated charging is

⎡

⎤

⎛

⎜

⎝

⎞

1.241

1.211

R

_FBOUT1=R_FBOUT2• V •

−0.128 −1 Ω

⎟

⎢

⎥

S2

enabled, then V will change with temperature as shown

S2

⎠

⎣

⎦

in Figure 13. As such, the limits for the other stages will

R_FBOUT1•R_FBOUT2• 0.833

also change with temperature since they are a constant

R_DACO2

=

Ω

⎛

⎜

⎝

⎞

1.241

proportion of V .

S2

R

_FBOUT2• V_S2•

−R_FBOUT2−R_FBOUT1

⎟

⎠

1.211

Table 3. Typical Charging Stage Voltage Thresholds

R

_DACO1= 0.2 •R_DACO2Ω

V

RISING OR

TYPICAL

BAT S2

TYPICAL

BAT S3

BAT

STAGE TRANSITION

Undervoltage

FALLING

V

/V

V

/V

1

C_DACO

=

F

V

Rising

35%

–

BAT

500 •R_DACO1

Fault → STAGE 0

STAGE 0 → STAGE 1

STAGE 1 → STAGE 2

STAGE 3 → STAGE 0

STAGE 2 → STAGE 1

STAGE 1 → STAGE 0

Rising

Falling

70%

98%

–

For greater charging voltage accuracy, it is recommended

that 0.1% tolerance resistors be used for the output feed-

back resistor network.

96%

–

95%

66%

31%

Due to the granularity of standard resistor values, simply

rounding the calculated results to their nearest standard

values may result in unwanted errors. Consider using

multipleresistorsinseriestomatchthecalculatedresults.

Otherwise,usestandardresistorvaluesandcheckthefinal

results with the following equations.

–

STAGE 0 → V

BAT

Undervoltage Fault

LT8490

V

BAT

FBOUT

FBOR

⎛

⎜

⎝

⎞

⎟

⎠

R_FBOUT1

_DACO1+R_DACO2

R

FBOUT1

FBOUT2

V =

• X −1.89

(

)

X3

R

DACO2

DACO1

R

FBOW

where

R

C

DACO

GND

⎡

⎤

⎞

⎛

⎜

⎝

⎞ ⎛

8490 F07

R

_DACO1+R_DACO2

R_DACO1+R_DACO2

X = 1.211• 1+

+

⎢

⎥

⎟

⎟ ⎜

R_FBOUT2

R_FBOUT1

⎠ ⎝

⎠

⎦

⎣

Figure 7. Output Feedback Resistor Network

V

indicates the actual 25°C V voltage using the se-

S2

X3

SETTING THE STAGE 2 VOLTAGE LIMIT: The resistor

network shown in Figure 7 is used to set the Stage 2 volt-

age limit. Battery manufacturers typically call for a higher

Stage 2 voltage limit than the nominal battery voltage.

For example, a 12V lead-acid battery used in automotive

applications commonly has a Stage 2 charging voltage

limit of 14.2V. If temperature compensated charging will

be used (see Temperature Measurement, Compensation

lected resistors.

X −1.89

N1=

X −3.3

N1 should be as close as possible to 1.22.

1.89

X

N2 = 1−

and Fault section) then use the 25°C value for V in the

S2

N2 should be as close as possible to 0.805. Iterations may

be required to determine best standard resistor values.

equations below.

8490f

17

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Table 4 shows good sets of standard value components

for charging nominal battery voltages of 12V, 24V, 36V,

48V and 60V. Iterative calculations were required to select

these values that achieve the best overall results.

IMON_OUT voltages above 1.208V (typical) cause V to

C

reduce due to EA1, and thus limit the output current. IOW

is either driven to ground or floated depending on charg-

ing conditions. This allows the current limit for Stage 0

(I

) to be set independently of the remaining

OUT(MAXS0)

Stages (I

Table 4. Standard Value Output Feedback Network vs Output

Regulation Voltage

) with proper selection of R

and

OUT(MAX)

IOW

R

. Use the following equations to configure the

IMON_OUT

BATTERY TARGET

R

C

DACO

FBOUT1

FBOUT2

DACO1

DACO2

charging current limits:

VOLTAGE

V

(V)

(kΩ)

26.1

28

(kΩ)

124

107

121

115

80.6

(nF)

S2

12

24

36

48

60

14.2

28.4

42.6

56.8

71.0

274

487

787

1000

866

23.2

20

82

0.0497

I_OUT(MAX)

R_SENSE2

=

Ω

68

21

22.6

13.3

100

150

1208

_OUT(MAXS0)•R_SENSE2

20

R_{IMON_OUT}

=

Ω

13.7

I

SETTING THE STAGE 3 VOLTAGE LIMIT: When enabled,

Stage 3 charging maintains the battery voltage at 85% to

24.3k •R_{IMON_OUT}

R_IOW

=

Ω

R

_{IMON_OUT}−24.3k

_IOR= 3.01kΩ

C_{IMON_OUT}=read below

99%ofV . Thisproportionisadjustableandisdiscussed

S2

R

in the Charger Configuration – CHARGECFG1 Pin section.

BATTERY UNDERVOLTAGE LIMIT: Upon start-up, the

LT8490 checks for battery voltage above 35% (typical)

of the Stage 2 voltage limit. If the battery voltage is less

thanthis,chargingwillnotstartandabatteryundervoltage

faultwillbeindicatedontheFAULTpin.Chargingwillbegin

after the battery voltage rises above 35% (typical) of the

Stage 2 voltage limit. If the battery voltage subsequently

falls below 31% (typical), charging will again stop and

the fault will be indicated on the FAULT and STATUS pins.

whereI

isthemaximumchargingcurrentinAmps,

OUT(MAX)

I

is the maximum trickle charging current in

OUT(MAXS0)

Stage 0 and I

is no greater than I

OUT(MAXS0)

. For

OUT(MAXS0)

OUT(MAX)

, it is OK to exclude

cases where I

= I

OUT(MAX)

R

and float the I pin. I

must be at least

OUT(MAXS0)

IOW

20% of I

OW

.

OUT(MAX)

R

SENSE2

FROM

TO BATTERY

CONTROLLER

Charge Current Limiting

V

OUT1

OUTPUT

CURRENT

The maximum charging current is configured with the

outputcurrentlimitingcircuit.Theoutputcurrentissensed

CSPOUT

CSNOUT

LT8490

+

–

Ω

through R

and converted to a proportional current

g

=1m

A6

SENSE2

m

flowing out of the IMON_OUT pin (see Figure 8).

1.61V 1.208V

+

–

+

FAULT

CONTROL

EA1

IOW

IMON_OUT

IOR

V

C

R

IOR

R

IOW

3.01k

R

IMON_OUT

C

IMON_OUT

8490 F08

Figure 8. Output Current Regulation Loop

8490f

18

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

C

reducesIMON_OUTrippleandstabilizesthecon-

where the efficiency factor η is typically between 0.95

and 0.99.

IMON_OUT

stant charging current control loop. Reducing C

IMON_OUT

improves stability and minimizes inductor current

overshoot that can occur if a discharged battery is quickly

disconnected then reconnected to the charger. However,

this is at the expense of increased IMON_OUT ripple that

can introduce more noise into the ADC measurements.

The higher frequency pole created at IMON_OUT must be

adequately separated from the lower frequency pole at the

When powered by a DC supply, appropriate input cur-

rent limiting is recommended for supplies that might

(1) become overloaded as the supply ramps up or down

through 6V or (2) provide more input current than the

charger components can tolerate.

SETTING THE INPUT CURRENT LIMIT: The input current

is sensed through R

current through R

as shown in Figure 9. The

V pin for proper stability. A C

capacitor in the

SENSE1

C

IMON_OUT

is converted to a voltage on the

range of 4.7nF to 22nF is adequate for most applications.

SENSE1

IMON_IN pin according to the following equation:

Input Current Limiting

⎡

⎤

⎛

⎞

I •R

IN

V

=

^SENSE1+7µA •R

V

⎜

⎟

⎢

⎥

IMON_IN

SOLARPANELSUPPLY:Solarpanelsareinherentlycurrent

limited and may not be able to provide maximum charging

power at the lowest input voltages. The LT8490 uses its

MPPT algorithm to sweep the panel voltage as low as 6V

tofindthemaximumpowerpoint. Makesurethattheinput

current limit is set higher than the maximum panel current

capability, plus at least 20% to 30% margin, in order to

achieve the maximum charging capability of the system.

⎝

⎣

⎠

1000

⎦

IMON_INvoltagesexceeding1.208V(typical)causetheV

C

voltagetoreduce,thuslimitingtheinputcurrent.R

IMON_IN

should be 21kΩ 1% or better. Using this information,

the appropriate value for R

the following equation:

can be calculated using

SENSE1

⎛

⎜

⎝

I

⎞

1.208V

21kΩ

1000 •

−7µA

⎟

In addition, note that the LT8490 uses the same circuit

(showninFigure9)to measuretheinputcurrentastolimit

it. The input current is measured by an A/D conversion of

the IIR pin voltage which is connected to IMON_IN and is

proportionaltoinputcurrent. Thedigitizedinputcurrentis

usedtolocatethemaximumpowerpointofthesolarpanel.

Setting a higher input current limit reduces the resolution

of the digitized reading of the input current. Avoid setting

the input current limit dramatically higher than necessary,

as this may affect the accuracy of the maximum power

point calculations.

0.0505

I

IN(MAX)

⎠

R_SENSE1

whereI

=

Ω

IN(MAX)

isthemaximuminputcurrentlimitinAmps.

valuesgreaterthan25mΩarenotrecommended.

IN(MAX)

R

SENSE1

R

SENSE1

FROM SOLAR PANEL OR

DC POWER SUPPLY

TO REMAINDER

OF SYSTEM

OUTPUT

CURRENT

CSPIN

CSNIN

LT8490

–

7mV

+

DC POWER SUPPLY: When charging a battery at maxi-

mum current, and thus power, a low voltage supply must

provide more current than a high voltage supply. This can

be seen by equating output power to input power, less

some efficiency loss.

–

Ω

g

=1m

A7

m

–

+

1.61V 1.208V

+

–

FAULT

CONTROL

EA2

IIR

IMON_IN

V

C

V • I • η = V • I

IN IN

BAT BAT

or

21k

IMON_IN

C

R

IMON_IN

V

•I_BAT(MAX)

BAT

I

=

IN(MAX)

8490 F09

V

_IN(MIN)• η

Figure 9. Input Current Regulation Loop

8490f

19

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

S3

C

reduces IMON_IN ripple and stabilizes the input

IMON_IN

DISABLED

current limit control loop. Reducing C

improves

IMON_IN

100

95

stabilityandminimizespossibleinductorcurrentovershoot.

However,thisisattheexpenseofincreasedIMON_INripple

thatcanintroducemorenoiseintotheADCmeasurements.

The higher frequency pole created at IMON_IN must be

adequately separated from the lower frequency pole at the

90

NON-TEMPERATURE

COMPENSATED

CHARGING LIMITS

TEMPERATURE

V pin for proper stability. A C

capacitor of 4.7nF

COMPENSATED

C

IMON_IN

CHARGING LIMITS

to 22nF is adequate for most applications.

85

8490 F11

0

5

45 50 55

CHARGECFG1 PIN VOLTAGE (% OF AV

95 100

)

DD

Input and Output Current Sense Filtering

TheC andR currentsensefilteringshowninFigure10

Figure 11. CHARGECFG1 Pin Configuration

SX

can improve the accuracy of the input and output current

Charger Configuration – CHARGECFG1 Pin

measurementsatlowaveragecurrentlevels.AmplifiersA7

and A8 (Figures 8 and 9) can only amplify positive R

SENSE

voltage is always

The CHARGECFG1 pin is a multifunctional pin as shown in

Figure 11. Set this pin using a resistor divider totaling no

voltages. Although the average R

SENSE

positive, the voltage ripple at low average current levels

may contain negative components that are averaged out

less than 100kΩ to the AV pin (see the Typical Applica-

DD

tionssectionforexamples).ThevoltageonCHARGECFG1,

by the filter. Recommended values for R , R and C ,

S1 S2

S1

as a percentage of AV , makes the selections discussed

DD

C

S2

are 10Ω and 470nF.

below. Avoid setting the divider ratio directly at any of

the inflection points on Figure 11 (e.g. 5%, 45%, 50%,

55% or 95%)

C

and C may be required, depending on board layout,

C1

C2

toreducecommonmodenoisethatmayreachtheLT8490

pins. 100nF ceramic capacitors, with the appropriate volt-

age ratings, work well in most cases. Be sure to place all of

ENABLE/DISABLETEMPERATURECOMPENSATEDVOLT-

AGE LIMITS: Setting the CHARGECFG1 pin in the upper

half of the voltage range (> 50%) enables battery voltage

temperature compensation, while using the bottom half

(< 50%) disables the temperature compensation, even if a

thermistor is coupled to the battery pack. The next section

provides more detailed information.

the filter components (C , R , C ) close to the LT8490

for best performance.

SX SX CX

Finally, note that a small voltage drop (typically ~0.25mV

per 10Ω) will occur across R and R due to the input

S1

S2

bias currents of CSNOUT and CSNIN. This represents a

~0.5% reduction in the maximum current limit which typi-

DISABLE STAGE 3: Setting the CHARGECFG1 pin to AV

DD

callyoccurswith~50mVacrossR

.TheC/10threshold

SENSE

or 0V disables Stage 3. When the CHARGECFG1 pin is set

in this manner, the charging algorithm will never proceed

to Stage 3. Stage 3 is commonly used for lead-acid battery

charging but is not typically used for lithium-ion battery

charging.

(typically when 5mV is measured across CSPOUT and

CSNOUT) will also reduce to C/10.5 due to the 0.25mV

drop across R .

S2

R

SENSE2

SENSE1

ENABLE STAGE 3: Setting the CHARGECFG1 pin between

R

S2

S1

5% to 95% of AV enables Stage 3 charging and sets the

C

S2

S1

DD

Stage 3 voltage limit (V ) as a percentage of the Stage

S3

C

C1

C

C2

2 voltage limit (V ) according to the following formulas.

S2

CSPIN CSNIN

LT8490

CSPOUT CSNOUT

LT8490

8490 F10

Figure 10. Recommended Current Sense Filter

8490f

20

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

When temperature compensated charging and Stage 3

are enabled, use:

The LT8490 monitors the voltage on the TEMPSENSE pin

to determine the battery temperature and also to detect if

the thermistor is connected or not. A TEMPSENSE volt-

⎡

⎤

⎥

⎦

⎛

⎞

⎛

⎜

⎝

V_S3

age greater than 96% of AV (typical) indicates that the

DD

⎢

⎜

⎟

CHARGECFG1% = 2.67 •

−0.85 +0.55 •100%

⎟

⎜

⎟

V

⎢

⎝

⎣

⎥

thermistorhasbeendisconnected.Threechargerfunctions

rely on the TEMPSENSE information.

⎠

S2

When temperature compensated charging is disabled and

Stage 3 is enabled, use:

1. INVALID BATTERY TEMPERATURE FAULT: A tempera-

turefaultoccurswhenthebatterytemperatureisoutside

ofthevalidrangeasconfiguredontheCHARGECFG2pin

(–20°C to 50°C or 0°C to 50°C). The temperature fault

condition remains until the temperature returns within

–15°Cto45°Cor5°Cto45°C(5°Cofhysteresis).During

a temperature fault, charging is halted and the STATUS

and FAULT pins follow the pattern described in Table 6.

If timer termination is enabled with the CHARGECFG2

pin, the timer count is paused during the temperature

fault and resumes when the fault state is exited.

⎡

⎢

⎤

⎞

⎛

⎜

⎝

⎞

⎟

⎠

V_S3

⎥

⎟

•100%

⎜

CHARGECFG1% = 2.72− 2.67 •

⎜

⎟

V

⎢

⎝

⎣

⎥

⎦

⎠

S2

where V /V should be between 0.86 to 0.99.

S3 S2

For example, to enable temperature compensated charg-

ing with V set to 93% of V , choose a divider that puts

S3

S2

CHARGECFG1 at 76% of AV . For best accuracy use

DD

resistors that have a 1% tolerance or better.

2. BATTERY VOLTAGE TEMPERATURE COMPENSATION:

Somebatterychemistrieschargebestwhenthevoltage

limit is adjusted with battery temperature. Lead-acid

batteries, in particular, experience a significant change

in the ideal charging voltage as temperature changes. If

enabledwiththeCHARGECFG1pin,thebatterycharging

voltage and all related voltage thresholds are automati-

cally adjusted with battery temperature. As the voltage

on the TEMPSENSE pin changes, the PWM duty cycle

from the FBOW pin changes such that the voltage limits

of the LT8490 follow the curve shown in Figure 13.

Temperature Measurement, Compensation and Fault

The LT8490 can measure the battery temperature using

an NTC (negative temperature coefficient) thermistor

thermally coupled to the battery pack. The temperature

monitoring function is enabled by connecting a 10kΩ,

ß = 3380 NTC thermistor from the TEMPSENSE pin to

ground and an 11.5kΩ (1% tolerance or better) resistor

from AV to TEMPSENSE (as shown in Figure 12). If

DD

battery temperature monitoring is not required, then use a

10kΩ resistor in place of the thermistor. This will indicate

to the LT8490 that the battery is always at 25°C.

112

110

108

106

104

102

100

98

CABLE

TO/FROM

CHARGER

TO CHARGER OUTPUT

AT R

SENSE2

LT8490

AV

DD

11.5k

TEMPSENSE

GND

100nF

10k NTC THERMISTOR

THERMALLY COUPLED

WITH BATTERY PACK

96

–25 –15 –5

5

15 25 35 40 55

BATTERY TEMPERATURE (°C)

8490 F12

8490 F13

Figure 12. Battery Temperature Sensing Circuit

Figure 13. Stage 2 Voltage Limit vs Temperature

When Temperature Compensation Is Enabled

8490f

21

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

ENABLE/DISABLE CHARGING TIME LIMITS: The LT8490

supports charging time limits only when power supply

mode is enabled (see the DC Supply Powered Charging

section). When power supply mode is disabled, any finite

timelimitsettingonCHARGECFG2isinterpretedasnotime

limit. This section discusses how to configure the time

limits using the CHARGECFG2 pin. For more information

about the operation of the time limits see the Charging

Time Limits section.

3. BATTERY DISCONNECT SENSING: The LT8490 detects

if the battery and thermistor have been disconnected

from the charger by monitoring the TEMPSENSE pin

voltage. When the connection to the battery is severed,

as shown by the arrow in Figure 12, the connection to

the thermistor is also severed and the TEMPSENSE

voltage rises up to AV through the 11.5kΩ resis-

DD

tor. During the time when the battery is not present,

the LT8490 halts charging. The charger automatically

restarts the charging at Stage 0 when a battery (along

withintegratedthermistororresistor)issensedthrough

the TEMPSENSE pin.

Setting the CHARGECFG2 pin between 5% to 95% of

AV allows for time limit settings between 0.5 hours to

DD

3 hours for Stage 0, 2 hours to 12 hours for Stage 1 and 2

combined and 2 hours to 12 hours for Stage 3. The

Stage 0 time limit is always 1/4th of the Stage 1 + Stage 2

time limit and the Stage 3 time limit is always the same

length as the Stage 1 + Stage 2 limit. When choosing a

Stage 1 + Stage 2 time limit of 12 hours, choose a divider

ratio very close to 7.5% or 92.5%. When choosing a

Stage 1 + Stage 2 time limit of 2 hours, choose a divider

ratio very close to 47.5% or 52.5%. For time limits in

between, use one of the following formulas.

Charger Configuration – CHARGECFG2 Pin

The CHARGECFG2 pin is a multifunctional pin as shown in

Figure 14. Set this pin using a resistor divider totaling no

less than 100kΩ to the AV pin (see the Typical Applica-

DD

tionssectionforexamples).ThevoltageonCHARGECFG2,

as a percentage of AV , makes the selections discussed

DD

below. Avoid setting the divider ratio directly at any of the

inflection points on Figure 14 (e.g. 5%, 10%, 45%, 50%,

55%, 90% or 95%)

When the wide valid battery temperature range (–20°C to

50°C) is desired use:

TIME LIMITS ONLY AVAILABLE

IN POWER SUPPLY MODE

CHARGECFG2% = 3.5% • (T

– 2) + 55%

S1S2

12

where T

is the desired Stage 1 + Stage 2 time limit in

STAGE 1 AND 2

COMBINED TIMER

AND

STAGE 3

TIMER

S1S2

hours between 2.1 and 11.9.

When the narrow valid battery temperature range (0°C to

50°C) is desired use:

STAGE 0

TIMER

3

2

CHARGECFG2% = 45% – 3.5% • (T

– 2)

S1S2

NARROW VALID

WIDE VALID

BATTERY TEMP. RANGE

0.5

where T

hours between 2.1 and 11.9.

is the desired Stage 1 + Stage 2 time limit in

8490 F1

S1S2

0

5

10

45 50 55

90 95 100

CHARGECFG2 PIN VOLTAGE (% OF AV

)

DD

Figure 14. CHARGECFG2 Pin Voltage Settings

8490f

22

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Setting CHARGECFG2 below 4% (i.e., ground) or above

Table 5. Charger Conditions and Timer Expiration Results

96% of AV (i.e., tie to AV ) disables the time limits,

CHARGING

STAGE WHEN

TIMER EXPIRES

RESULT

OF TIMER

EXPIRATION

DD

STAGE 3

allowing the charging to run indefinitely in lieu of any fault

conditions.

ENABLED?

TIMER USED

Stage 0

0

1

2

3

–

Fault

SELECT THE VALID BATTERY TEMPERATURE RANGE:

Setting the CHARGECFG2 pin in the top half of the voltage

range (> 50%) selects a wider valid battery temperature

range (–20°C to 50°C), while using the bottom half of the

voltage range (< 50%) selects a narrower valid battery

temperature range (0°C to 50°C). Generally, lead-acid

batteries would use the wide range, while lithium-ion bat-

teries would use the narrow range. See the Temperature

Measurement, Compensation and Fault section for more

information about the invalid battery temperature fault.

Stage 1 + Stage 2

Stage 3

–

Fault

Yes

Done Charging

STAGE 2 TERMINATION (TIME LIMITS ENABLED): Timer

expiration in Stage 2 causes a faultand charging stops im-

mediately with a fault indication on the STATUS and FAULT

pins.IftheStage2outputcurrentdropsbelowC/10before

the timer expires and Stage 3 is disabled then charging

stops and done charging is indicated on the STATUS pin.

Charging Time Limits

STAGE2TERMINATION(TIMELIMITSDISABLED):Iftime

limits are disabled, Stage 2 can only terminate if Stage 3

is also enabled. After charging current falls below C/10,

chargingwillproceedtoStage3. IfStage3isalsodisabled

then the charger will operate in Stage 2 indefinitely unless

thebatteryvoltagefallsenoughforchargingtorevertback

to Stage 1. During the indefinite Stage 2 charging, the

STATUS pin will indicate if Stage 2 current is below C/10

or above C/5 (as shown in Tables 6 and 7).

Charging time limits can be enabled only in power supply

mode by properly configuring the CHARGECFG2 pin (see

the Charger Configuration – CHARGECFG2 Pin section).

Charging time limits are not recommended for use when

a load is present on the battery due to the unpredictable

amountoftimethatmayberequiredtoachievefullcharge.

Whenenabled,theappropriatetimersstartatthebeginning

of Stages 0, 1 and 3. If the timer expires while operating

in its respective stage or the LT8490 returns to a charging

stageafteritsrespectivetimerhasexpired, chargingstops

immediately. As shown in Table 5, expiration of a timer is

treated as either a fault or as done charging depending on

thetimerthatexpiredandtheconfigurationofthecharger.

In any case, when charging stops, the fault or done charg-

ing status is indicated on the STATUS and FAULT pins as

described in the STATUS and FAULT Indicators section.

STAGE 3 TERMINATION CONDITIONS: If Stage 3

is enabled and time limits are disabled, the LT8490 will

remaininStage3forcingreducedconstant-voltageindefi-

nitely unless the battery voltage falls below 96% of V or

S3

charging current rises above C/5 causing the charger to

revert back to Stage 0. If Stage 3 is enabled and time limits

are enabled, timer expiration in Stage 3 will stop charging

and communicate the done charging state through the

STATUS pin (as shown in Tables 6 and 7).

8490f

23

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Lithium-Ion Battery Charging

Since this configuration can charge indefinitely, follow-

ing this guideline keeps the lifetime of the batteries from

degrading quickly.

The LT8490 is well suited to charge lithium-ion batteries.

Connecting the CHARGECFG1 and CHARGECFG2 pins to

ground puts the LT8490 into a typical configuration for

lithium-ion battery charging (0°C to 50°C valid battery

temperature,Stage3disabled,notemperaturecompensa-

tion, no time limits). Figure 15 shows a typical lithium-ion

charging cycle in this configuration.

Lead-Acid Battery Charging

The LT8490 can be used to charge lead-acid batteries.

Setting the CHARGECFG1 pin to 87.6% of AV and

DD

CHARGECFG2 pin equal to AV configures the LT8490

DD

for typical lead-acid battery charging (–20°C to 50°C

If no timer termination has been selected, the LT8490 will

charge the lithium-ion battery stack to the desired Stage 2

voltage limit, maintaining that limit indefinitely. When the

charging current is < C/10, the STATUS pin will go high

as described in Table 6.

valid battery temperature, Stage 3 enabled with V /V =

S3 S2

97.2%, temperature compensated voltage limits, no time

limits). Figure16showsatypicallead-acidchargingcycle.

If time limits have been disabled, the LT8490 will charge

the lead-acid battery stack to the desired Stage 3 voltage

limit and restart the charging cycle if 1) the battery voltage

NOTE: When solar charging a Li-Ion battery without time

limits it is recommended that the Stage 2 voltage limit

not exceed 95% of the lithium-ion maximum cell voltage.

falls below 96% of the Stage 3 voltage limit (V ) or 2)

S3

the charging current rises above C/5.

STAGE 0 STAGE 1

TRICKLE CONSTANT

CHARGE CURRENT

STAGE 2

CONSTANT

VOLTAGE

STAGE 3

REDUCED

CONSTANT

VOLTAGE

STAGE 0 STAGE 1

TRICKLE CONSTANT

CHARGE CURRENT

STAGE 2

CONSTANT

VOLTAGE

MAXIMUM CHARGING

CURRENT (C)

MAXIMUM CHARGING

CURRENT (C)

(BULK)

(ABSORPTION)

(FLOAT)

STAGE 2

VOLTAGE LIMIT

STAGE 2

VOLTAGE LIMIT

BATTERY VOLTAGE

STAGE 3

VOLTAGE LIMIT

CHARGING

CURRENT

CHARGING

CURRENT

8490 F15

8490 F16

CHARGING TIME

Figure 15. Lithium-Ion Battery Charging Cycle

Figure 16. Lead-Acid Battery Charging Cycle

8490f

24

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

STATUS and FAULT Indicators

Table 6. STATUS and FAULT LED INDICATORS

LED PULSES/3.5s,

APPROXIMATE ON-TIME PER

The LT8490 reports charger status through two outputs,

the STATUS and FAULT pins. These pins can be used to

drive LEDs for user feedback. In addition, the STATUS pin

doubles as a UART output to send status information to a

peripheral device. Table 6 describes the LED behavior of

these pins in relationship to the charger status.

FOR MORE

INFORMATION SEE

SECTION

PULSE

CHARGER

STATUS

FAULT

Stage 0

1, 10ms

OFF

Battery Charging

Algorithm

Stage 1

1, 250ms

2, 250ms

OFF

Battery Charging

Algorithm

While the LT8490 is operating, the STATUS pin toggles on

a3.5sec(typical)intervalasshowninFigure17. Thethree

pulsesshowninFigure17representthechargeroperating

in Stage 3. The STATUS and FAULT pins pull up to turn the

LEDs on and drive to ground to turn the LEDs off.

Stage 2 and

(Stage 3 Enabled

or Time Limits

Enabled or I

Rising Above C/5)

Battery Charging

Algorithm

and Charger

Configuration

Sections

OUT

Stage 2 and

Stage 3 Disabled

and Time Limits

ON

OFF

Battery Charging

Algorithm

and Charger

Configuration

Sections

Disabled and I

OUT

Falling Below C/10

Stage 3

3, 250ms

ON

OFF

Battery Charging

Algorithm

Done Charging

Charging Time

Limits

Battery Present

Detection Fault

1, 10ms

1, 250ms

Temperature

Measurement,

Compensation and

Fault

Invalid Battery

Temperature Fault

1, 10ms

2, 250ms

Temperature

Measurement,

Compensation and

Fault

Timer Expiration

Fault

1, 10ms

3, 250ms

4, 250ms

Charging Time

Limits

Battery

Undervoltage Fault

Stage Voltage

Limits

3.5s

0.5s

LED ON

LED OFF

A

8490 F17

Figure 17. Example Waveform for STATUS Pin in STAGE 3

8490f

25

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Driving LEDs with the STATUS and FAULT Pins

with careful board evaluation. Transistor Q2 must have a

collector-emitter breakdown voltage greater than INTV .

CC

The STATUS and FAULT pins on the LT8490 can be used

to drive LED indicators. Figure 18 shows the simplest

configuration for driving LEDs from these two pins.

The MMBT3646 has a breakdown voltage of 15V and is

well suited for this application.

The LED current for D is provided by V in this case. Do

S

IN

TheSTATUSpincandriveupto2.5mAintoanLED.Choose

not draw current for D from INTV since this increases

S

CC

R

tolimittheLEDcurrentto2.5mAorlesswhenSTATUS

DSA

power dissipation in the LT8490. Transistor Q1 must

is driven close to 3.3V. Choose R

to conduct a current

DSB

have a collector-emitter breakdown greater than V . The

IN

equivalenttotheLEDcurrentwhenSTATUSisdrivenclose

to ground and R has ~3.3V across the terminals. D , in

MMBT5550L has a breakdown voltage of 140V and is

DSB

S

suitable for most applications.

Figure 18, conducts ~2.5mA when STATUS is driven high.

conducts ~2.5mA when the STATUS is driven low.

R

DSB

To properly set the resistors shown in Figure 19, use the

following equations:

The FAULT pin has a weak pull up in comparison to the

STATUS pin (see the Typical Performance Characteristics

section). The LED current is typically self-limited to less

2.6

I_D

R_E1≅

Ω

than 1mA by the FAULT pin driver. R

in Figure 18 is

DFB

⎛

⎞

⎟

⎠

I_NTVCC− V

typically 3.32kΩ and increases the FAULT LED current.

F

⎜

⎝

R_C1≅

R_B1=

Ω

When configured as shown in Figure 18, the D LED cur-

rent should be limited to less than 1.5mA.

F

I_D

50

I_D

Ω

FordrivinghighercurrentLEDs,thecircuitinFigure19can

beused. NotethattheLEDcurrentforD isprovidedbythe

F

INTV regulator in this case. Excessive LED current can

CC

where INTV is typically 6.35V, V is the forward voltage

CC

F

overload the INTV regulator and/or cause excessive

CC

of the LED (often about 1.7V) and I is the desired bias

D

heating in the LT8490. 7.5mA is a good starting point

current through the LED.

when using this circuit. Higher currents can be possible

LT8490

LDO33

V

DD

R

DSB

STATUS

1.3k

LT8490

V

IN

V

INTV

CC

DD

IN

R

D

DFB

S

R

C1

D

S

FAULT

D

R

F

D

DSA

549Ω

F

R

B1

DFA

549Ω

STATUS

FAULT

Q1

Q2

8490 F19

R

E1

Q1: MMBT5550L

Q2: MMBT3646

D : OSRAM, LGL29KF2J124Z

S

D : OSRAM, LGL29K-H1J2-1-Z

F

8490 F18

Figure 18. Default STATUS/FAULT LED Indicators

Figure 19. Higher Current Drive for STATUS/FAULT LEDs

8490f

26

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

STATUS Pin UART

LP: “0” if in low power mode (see the Low Power Mode

section)

The STATUS pin also provides a UART (transmit only)

communication function. This feature allows for remote

monitoring of the LT8490. Immediately after each initial

pulse described in Table 6 the STATUS pin sends out a

synchronizingbyte(0x55)followedbyastatusbyte.UART

data is transmitted with the LSB first. Figure 20 shows the

zoomed in region labeled (A) from Figure 17.

S2/S1/S0: Stage description (see Table 7)

F2/F1/F0: Fault description (see Table 8)

Table 7. Stage Description

STAGE

Stage 0

Stage 1

Stage 2

CONDITIONS

S2

0

S1

0

S0

0

–

0

1

UART START BIT UART STOP BIT UART START BIT

UART STOP BIT

Stage 3 Enabled

0

1

0

Timers and Stage 3

Disabled, Charging Current

Has Risen Above C/5

Timers and Stage 3

Disabled, Charging Current

Falls Below C/10

1

0

8490 F20

SYNC BYTE 0x55

STATUS 0x14

LSB

MSB

Stage 3

–

0

1

0

1

Done Charging

Figure 20. UART Transmission Waveform from

Figure 17 Label (A)

Table 8. Fault Description

FAULT INFORMATION

No Faults Present

ThestatusbyteshowninFigure20hasinformationregard-

ing the present charging stage as well as fault informa-

tion. The data format for each UART byte is 8 data bits,

no parity, with one stop bit. The baud rate is 2400 baud

10% which may require auto baud rate detection, using

the sync byte, for proper data reception. Figure 21 defines

each bit present in the status byte. The status byte always

contains an MSB of 0. Status bytes containing an MSB of

1 should be disregarded.

F2

0

F1

0

F0

0

Battery Disconnected

(Thermistor Disconnected)

0

1

Invalid Battery Temperature

Timer Fault

0

1

0

1

0

Battery Undervoltage

If multiple faults are present, the fault listed highest in

Table 8 is reported through the STATUS and FAULT pins.

MSB

LSB

0 LP S2 S1 S0 F2 F1 F0

8490 F20

Figure 21. Status Byte Decode

8490f

27

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Automatic Charger Restart and Fault Recovery

The charger will attempt to restart every hour (typically)

after having stopped due to a timeout fault in Stage 0,

Stage 1 or Stage 2. Configuring the charger in any of the

following ways prevents the charger from automatically

restarting every hour:

The LT8490 employs many features and checks that may

cause the charger to stop until favorable operating condi-

tions return. Table 9 summarizes the typical cause for the

LT8490 to stop charging along with the conditions under

whichitwillautomaticallyrestartcharging.Uponautomatic

restart all timers are reset except when resuming from an

invalid battery temperature fault.

1. Stage 3 disabled and narrow battery temperature range

selected and temperature compensated battery voltage

not selected.

2. Not operating in power supply mode.

3. Timer limits disabled.

Table 9. Automatic Restart Conditions

CAUSE FOR

CHARGING TO

STOP

RESTART

OR RESUME

CHARGING

REQUIREMENT FOR RESTART

Stage 3 disabled and V drops

SHDN Pin Connection

Done Charging

Restart

BAT

S2

below 95% of V

The LT8490 requires 1.234V (typical) on the SHDN pin

Stage 3 enabled and V drops

BAT

S3

to start-up. A minimum of 5V on V is also required for

IN

below 96% of V

proper start-up operation; therefore, a resistor divider

Battery

Undervoltage Fault

V rises to 35% of V

BAT S2

from V to the SHDN pin is used to set this threshold.

IN

Connect the SHDN pin as shown in Figure 22 (1% resistor

Stage 0 Timeout

V

rises to 70% of V or every

BAT S2

hour after stopping (read below)

tolerance or better required).

Stage 1 Timeout

V

rises 5% or V rises to 98%

BAT

of V or every hour after stopping

S2

(read below)

V

IN

LT8490

Stage 2 Timeout

V

falls below 66% of V or every

Restart

V

BAT

S2

IN

hour after stopping (read below)

110k

Invalid Battery

Temperature

Battery temperature returns within

the valid temperature range with 5°C

hysteresis

Resume

SHDN

35.7k

Battery

Disconnected Fault

Re-Connect Thermistor

Restart

GND

8490 F22

Figure 22. SHDN Pin Resistor Divider

8490f

28

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Switching Configuration – MODE Pin

ConnectingtheMODEpinlowcanreducetheM4heating

byactivatingthecontinuousconductionthresholdmode

(CCTM). In this mode the average charging current

is monitored by the IMON_OUT pin. The LT8490 will

operateinconventionalDCMwhilethebatterycharging

current, and thus IMON_OUT, is low (below 122mV

typically).Asthechargingcurrentincreases,IMON_OUT

willeventuallyriseabove~195mVsignalingtheLT8490

to enter CCM operation that will turn on M4 and reduce

heating. While the average charging current will be

positive, this mode does allow some negative current

flow within each switching cycle. Use DCM operation

if this behavior is not desired.

The LT8490 has two modes of switching behavior con-

trolled by the state of the MODE pin. Tying MODE to a

voltage above 2.3V (i.e., V or INTV ) configures the

DD

CC

part for discontinuous conduction mode (DCM) which

allows only positive current flow to the battery. More

information about this mode of operation can be found

in the LT8705 data sheet.

Tying the MODE pin below 0.4V (i.e. ground) changes the

configuration as follows:

1. AUTOMATICCCM/DCMMODESWITCHING:Very large

inductor current ripple can lead the LT8490 to operate

at high currents while still in DCM. In this case, the M4

switch(highlightedinFigure23)canbecomehotdueto

the battery charging current flowing through the body

diode of this device.

2. AUTOMATIC EXTV REGULATOR DISCONNECT: As

CC

discussed in more detail in the LT8705 data sheet,

the INTV pin is regulated to 6.35V from one of two

CC

possible input pins, V or EXTV . The EXTV pin is

IN

CC

often connected to the battery allowing INTV to be

CC

regulated from a low voltage supply which minimizes

V

OUT

IN

powerlossandheatingintheLT8490.However,EXTV

CC

M1

M4

SW2

M3

TG1

BG1

TG2

BG2

shouldbedisconnectedfromthebatterywhencharging

L

current is low to avoid discharging the battery.

SW1

M2

When MODE is low, the LT8490 automatically forces

the INTV regulator to use V instead of EXTV

CC

IN

CC

R

for the input supply when charging current becomes

low. Charging current is monitored on the IMON_OUT

pin. When IMON_OUT falls below 122mV (typical) the

SENSE

8490 F23

INTV regulator uses V as the input supply. When

CC

IN

Figure 23. Simplified Diagram of Switches

IMON_OUT rises above ~195mV INTV will regulate

CC

from EXTV if EXTV is also above 6.4V (typical).

CC

This same functionality can be achieved when MODE

is tied high by using the external circuit discussed in

the Optional EXTV Disconnect section.

CC

Finally, a 305kΩ (typical) resistor is connected from

EXTV to ground inside the LT8490. This resistor can

CC

draw current from the battery unless EXTV is discon-

CC

nected. See the Optional EXTV Disconnect section

CC

for a way to automatically disconnect EXTV when

CC

charging current becomes low or charging stops.

8490f

29

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Optional Low Power Mode

250

200

150

100

50

When current from the solar panel is not high enough to

reliably measure the maximum power point, the LT8490

may automatically begin operating in low power mode.

Low power mode is automatically disabled when operat-

ing from a DC supply in power supply mode. Otherwise,

the low power mode feature is enabled by default and

allows the LT8490 to charge a battery under very low

light conditions that would otherwise cause the LT8490

to stop charging. Low power mode can also be disabled

with a method discussed later in this section.

0

10 20 30 40 50 60 70 80

BATTERY VOLTAGE (V)

8490 F24

Inlowpowermode, theLT8490momentarilystopscharg-

ing, allowing the panel voltage to rise. When the panel

has sufficiently charged the input capacitor, the LT8490

transfers energy from the input capacitor to the battery

while drawing down the panel voltage. This behavior re-

peats rapidly, delivering charge to the battery as shown in

the Panel Voltage in Low Power Mode plots in the Typical

Performance Characteristics section.

Figure 24. Minimum Input Capacitor

Required for Low Power Mode

3% of the maximum input current limit to make a valid

power point reading and exit low power mode. The panel

voltage may be adjusted as low as 6V when searching for

the maximum power point.

DISABLING LOW POWER MODE: If the minimum input

capacitance,or10Vminimumstart-upvoltagearenotsuit-

able for the application, low power mode can be disabled

MINIMUMINPUTCAPACITANCEFORLOWPOWERMODE:

A minimum amount of energy must be transferred from

the input capacitor to the battery during each charge

transfer cycle. Otherwise the battery may be drained

instead of being charged. Figure 24 shows the minimum

input capacitance required when the charger is operating

near the 10V minimum input voltage. As the panel volt-

age rises, due to increased illumination, more energy is

storedintheinputcapacitorandacorrespondingincrease

of energy is delivered to the battery. Carefully check the

solar panel voltage for good stability and minimal ripple

when operating with low input capacitance.

byincludingtheresistorR =3.01kΩasshowninFigure

NLP

25. When low power mode is disabled, the LT8490 will

attempt to charge the battery after 6V or more is detected

on the panel. If the input current is too low (typically less

than 1.5% of the maximum input current limit) charging

is temporarily halted. The LT8490 will attempt to charge

the battery on 30 second intervals or when the LT8490

measures a significant rise in the panel voltage. When the

LT8490 determines that there is sufficient panel current,

normal charging operation will automatically resume.

MINIMUMINPUTVOLTAGE:Withlowpowermodeenabled,

the panel voltage must initially exceed 10V (typical – as

measured through the VINR pin) before the charger will

attempt to charge the battery. If adequate charge is not

beingdeliveredtothebattery,thechargermaytemporarily

wait for even more input voltage before transferring the

input charge to the battery.

V

IN

LT8490

V

IN

R

NLP

3.01k

FBIR

FBIN

R

FBIN1

R

DACI2

R

DACI1

FBIW

GND

FBIN2

C

DACI

8490 F25

EXITING LOW POWER MODE: The charger will automati-

cally exit low power mode and resume normal charging

after adequate input current is detected. The charger

typically requires the input current to exceed 2.5% to

Figure 25. Disabling Low Power Mode with Resistor R_NLP

8490f

30

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Optional Output Feedback Resistor Disconnect

SELECTING M5: This PMOS must have a drain to source

breakdown voltage greater than the maximum V . The

BAT

To measure and regulate the battery voltage, the LT8490

usesaresistorfeedbacknetworkconnectedtothebattery.

Unless these resistors are disconnected from the battery,

they will draw current from the battery even when it is not

being charged as seen in Figure 26. This may be undesir-

able when using small capacity batteries.

ZVP3310F is rated for 100V making it suitable for most

applications.

SELECTING Q3: This NPN must have a collector to emitter

breakdown voltage greater than the maximum V . The

BAT

MMBT5550L is also suitable for most applications due to

its 140V breakdown rating.

Ifdesired, theresistorscanbeautomaticallydisconnected

from the battery when charging stops by using the cir-

cuit shown in Figure 27. This circuit is controlled by the

SWENO signal from the LT8490 and connects the resistor

feedback network when charging is taking place. When

charging stops, the network is disconnected and current

draw from the battery becomes negligible.

SELECTINGR

:UsingV

andsettingR

to100kΩ

LIM3

GSon

VGS1

⎡

⎤

⎛

⎞

⎟

⎠

R_VGS1

R_LIM3

=

• 2.6V Ω

⎢

⎥

⎜

V

⎝

⎣

⎦

GSon

where V

is the desired gate to source voltage needed

GSon

to turn on M5. If M5 is not properly selected, the on re-

sistance may be large enough to cause a significant volt-

age drop across the drain-source terminal of this device.

Check this voltage drop to determine if the application

can tolerate this error.

I

LT8490

FBOUT

DRAIN

+

FBOR

FBOW

R

FBOUT1

FBOUT2

R

DACO2

DACO1

V

BAT

SELECTING Z1: Due to the transients that may occur

during hot-plugging of a battery, this Zener diode is rec-

ommended to protect device M5 from excessive gate to

source voltage. If using device Z1, the reverse breakdown

C

DACO

SWEN

–

SWENO

200k

GND

voltage should be selected such that V

< V

GSon

Z1breakdown

8490 F26

< V

where V

is the maximum rated gate to

GSMAX

source voltage specified by the device manufacturer. The

BZT52C13hasareversebreakdownvoltageof13Vmaking

Figure 26. Battery Discharge When Not Charging

it suitable for the R

value shown in Figure 27.

LIM3

ALTERNATE CIRCUIT: For lower battery voltages (< 20V),

Q3 in Figure 27 can saturate. To avoid this, consider con-

necting the emitter of Q3 directly to ground by removing

TO CHARGER OUT

AT R

SENSE2

R

VGS1

100k

Z1

R

and adding resistor R

to the base of Q3 as

(OPT.)

LIM3

LIM4

M5

LT8490

FBOUT

shown in Figure 28. Employing the optional feedback

resistor disconnect at arbitrarily low battery voltages will

be limited by the required gate to source voltage of M5.

+

–

OPTIONAL

R

FBOUT1

FBOUT2

FBOR

FBOW

FEEDBACK

RESISTOR

DISCONNECT

CIRCUIT

R

DACO1

DACO2

C

V

BAT

Use the following equation to properly set R

R_VGS1

:

LIM4

DACO

SWEN

SWENO

Q3

R

_LIM4= 91•

V

BAT

GND

200k

R

LIM3

26.1k

8490 F27

Figure 27. Optional Feedback Resistor Disconnect Circuit

8490f

31

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

TO CHARGER OUT

Optional EXTV Disconnect

CC

AT R

SENSE2

It is often desirable to connect EXTV to the battery to

CC

R

VGS1

100k

reduce power loss (increase efficiency) and heating in

M5

the LT8490. However, the LT8490 draws current into

LT8490

FBOUT

the EXTV pin that can drain the battery when charging

+

–

CC

OPTIONAL

FEEDBACK

RESISTOR

DISCONNECT

CIRCUIT

R

FBOUT1

FBOUT2

FBOR

FBOW

currents are low or when charging stops. Tying the MODE

pin low, as discussed in the Switching Configuration –

MODE Pin section, eliminates most of the current draw

R

DACO1

DACO2

C

V

BAT

DACO

SWEN

from EXTV when the charging current becomes low.

CC

SWENO

Q3

However, there is a 305kΩ (typical) path from EXTV to

R

CC

LIM4

GND

200k

ground through the LT8490 at all times. If MODE is tied

high or if the 305kΩ load is undesirable, EXTV can be

8490 F29

CC

disconnected with the optional circuit shown in Figure 29.

Figure 28. Optional Low Battery Voltage Feedback

Resistor Disconnect Circuit

TheLT8490,viatheECONsignal,disconnectsEXTV from

CC

thebatterywhenchargingcurrentbecomeslow. Charging

current is monitored by measuring the IMON_OUT pin

voltage with the IOR pin’s A/D input. When IMON_OUT

falls below 122mV (typical) the ECON signal goes low and

EXTVccisdisconnectedfromthebattery.WhenIMON_OUT

rises above 195mV (typical) the ECON signal goes high

TO CHARGER OUT

AT R

SENSE2

R

VGS2

Z2

(OPT.)

100k

M6

and EXTV is reconnected to the battery.

CC

+

–

OPTIONAL

EXTV

DISCONNECT

CIRCUIT

LT8490

EXTV

10Ω

Follow the same recommendations and equations from

the previous section for choosing components for the

CC

V

BAT

CC

1µF

optional EXTV disconnect circuit.

CC

ECON

Q4

Optional Remote Battery Voltage Sensing

R

LIM4

26.1k

200k

GND

The LT8490 measures the battery voltage continually

during charging. The apparent battery voltage is sensed

8490 F29

M6: ZVP3310F

Q4: MMBT5550L

Z2: BZT52C13

from ground of the LT8490 to the top of R

. Dur-

CABLE

FBOUT1

+

ing charging, resistance in the battery cables (R

/

–

R

in Figure 30) causes the apparent voltage to be

Figure 29. Optional EXTV_CCDisconnect Circuit

CABLE

higher than the actual battery voltage by 2 • V .

IR

I

CHARGE

The effects of this cable drop are most significant when

charging low voltage batteries at high currents. As an

example, a 4 foot battery cable using 14 AWG wire can

have a voltage drop exceeding 0.5V at 15A of current. Note

however that the voltage drop, along with the charging

current, reduces automatically as the battery approaches

full charge.

TO CHARGER OUT

V

+

–

IR

AT R

SENSE2

LT8490

FBOUT

+

–

+

R

CABLE

FBOR

V

BAT

R

FBOUT1

R

DACO1

R

DACO2

–

R

FBOW

CABLE

C

DACO

FBOUT2

GND

V

IR

–

+

8490 F30

Figure 30. IR Drop Present in Battery Connection

8490f

32

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

The most significant effects from the V voltage drops

using a (–) terminal sensing cable, the LT1636, Q5 and

IR

are as follows:

R5. R´

, R˝

and R5 are determined as follows:

FBOUT

1. When approaching full charge in Stage 2, the V er-

0.5 •R

V_S2−1.211

IR

Rʺ_FBOUT1

=

^FBOUT1Ω

ror causes the charger to reduce the charging current

earlier than otherwise necessary. This increases the

total charging time.

Rʹ_FBOUT1= R_FBOUT1−Rʺ_FBOUT1

Ω

(

)

R5 =Rʺ_FBOUT1

Ω

2. Terminating at C/10 in Stage 2 will occur at a reduced

+

–

batteryvoltageequaltoC/10•(R

+R

)which

CABLE

where V is the room temperature Stage 2 voltage limit

S2

is 10% of the voltage drop at full charging current.

and the solution for R

was discussed previously in

FBOUT1

theStageVoltageLimitssection.Solutionsfordetermining

, R , R and C are also discussed

3. The STATUS pin will indicate a transition from Stage 1

to Stage 2 earlier than would otherwise occur without

the cable drop.

R

DACO1 DACO2 FBOUT2

in the Stage Voltage Limits section.

DACO

Due to its low current draw (< 1mA) Q5 can be a small

signal device with a collector-emitter breakdown voltage

at least as high as the battery voltage. The MMBT3904 is

a good BJT rated to 40V. Alternatively, the MMBT5550L

is rated for 140V.

Again, these effects become less significant at higher

battery voltages because the charging current is typically

lower and the cable drop becomes a smaller percentage

of the total battery voltage. Using thicker and/or shorter

battery cables is the simplest method for reducing these

effects. Otherwise, the remote battery sensing circuit in

Figure 31 can correct for these effects.

R3 is for safety in case the (+) battery sensing cable

becomes disconnected. R3 prevents overcharging the

battery in such an event by creating an alternate path to

+

The R

measurement error is eliminated by includ-

CABLE

pull up the R˝

battery voltage sensing resistor. The

ing an additional (+) terminal sensing cable. The negative

cable error is eliminated by subtracting the R

FBOUT1

–

R3 resistance should be less than 1% of R

. Select-

drop

FBOUT1

CABLE

ing R3 as a 100Ω resistor is often a good choice. During

from the voltage measured at the positive battery terminal

R

CABLE

+

TO CHARGER OUT

AT R

SENSE2

D2A D2B D2C

R3

R˝

FBOUT1

10Ω

+

–

INTV

R´

CC

FBOUT1

LT8490

FBOUT

1µF

V

BAT

FBOR

+

–

LT1636

R

DACO1

R

DACO2

R4

R2

Q5

FBOW

R

C

DACO

FBOUT2

GND

R5

D3A

D3B

R

CABLE

–

8490 F31

Figure 31. Remove (+) and (–) Cable V_IRMeasurement Errors

8490f

33

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

–

normal operation the voltage across R3 is about the same

R2 maintains a negative voltage reference in case R

CABLE

+

as across R

. However, R3 may experience voltage

becomesdisconnected.SelectingR2asa100Ωresistoris

CABLE

up to V -V

+

across its terminals if R

becomes

often a good choice. During normal operation the voltage

S2 BAT

CABLE

–

disconnected. R3 should be selected with an appropriate

power rating, often at least 1W.

across R2 is about the same as across R

. However,

CABLE

R2mayexperiencevoltageinexcessofV -V acrossits

S2 BAT

–

terminalsifR

becomesdisconnected. R2shouldbe

CABLE

D2A-D2Cprotectthechargerifthepositivechargingcable

selectedwithanappropriatepowerrating,oftenatleast1W

due to the case where the (+) and (–) wires of the remote

sense circuit are first connected to the battery to address

hot plugging issues (see the Hot Plugging Considerations

section for more detail).

+

(R

) becomes disconnected while the others remain

CABLE

intact. Without the diodes, the output of the charger may

overvoltage and become damaged. BAV99 diodes are a

good choice and are available in a dual-diode package

to minimize board space. Note that the diodes limit the

+

maximum R

error to 0.3V to 0.5V. If a greater volt-

Figure32showshowtocombinetheremotesensingcircuit

(Figure 31) and the feedback resistor disconnect (Figure

27) for applications that require the most accurate battery

voltagesensingandnegligiblebatterydrainwhencharging

CABLE

age drop is typical in the positive cable then place more

diodes in series. D2D protects the M5 device by limiting

the gate to source voltage when making the remote sense

connection.

completes. The R

resistor can no longer connect to

VGS1

the source of M5 (as in Figure 27) since the R

current

causing an error in the

VGS1

D3A, D3B and R4 protect the input of the LT1636 from

possiblevoltageextremesatthe(–)batteryterminalsens-

ing connection. The dual-diode BAV99 is also suitable in

this case. 4.99kΩ is a good value for R4.

would also flow through R˝

FBOUT1

measured battery voltage. Figure 31 shows that R

VGS1

has been reconnected to the (+) battery sensing terminal.

R

CABLE

+

TO CHARGER OUT

AT R

SENSE2

D2A D2B D2C

D2D

R3

R˝

FBOUT1

R

VGS1

100k

+

–

M5

10Ω

INTV

CC

LT8490

FBOUT

R´

FBOUT1

1µF

V

BAT

FBOR

+

R

C

R

DACO1

DACO2

R

LT1636

R4

R2

FBOW

Q5

–

DACO

FBOUT2

SWEN

SWENO

Q3

R

R5

GND

LIM3

200k

D3A

D3B

26.1k

R

–

CABLE

8490 F32

Figure 32. How to Combine Figure 27 and Figure 30

8490f

34

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

Optional DC Supply Detection Circuit

Board Layout Considerations

A dual input application can be configured where the

charger can be supplied by either a solar panel or a DC

supply. When powered by a DC supply, the VINR pin must

be pulled low to activate power supply mode. In addition,

blockingdiodesshouldbeincorporatedtopreventthesup-

plies from back-feeding into each other. The circuit shown

in Figure 33 shows a way to incorporate those features.

For all power components and board routing associated

with the LT8705 portion of the LT8490, please refer to the

LT8705 documentation for which a circuit board layout

checklist and drawing is provided.

Hot Plugging Considerations

When connecting a battery to an LT8490 charger, there

canbesignificantinrushcurrentduetochargeequalization

betweenthepartiallychargedbatterystackandthecharger

output capacitors. To a lesser extent a similar effect can

occur when connecting an illuminated panel or powered

DCsupplytotheinput.Themagnitudeoftheinrushcurrent

depends on (1) the battery, panel or supply voltage, (2)

ESR of the input or output capacitors, (3) initial voltage of

the capacitors, and (4) cable impedance. Excessive inrush

current can lead to sparking that can compromise con-

nector integrity and/or voltage overshoot that can cause

electrical overstress on LT8490 pins.

As shown in Figure 33, when the DC supply is connected

the Q6 NPN pulls VINR below 174mV (typical) to activate

the Power Supply Mode of the LT8490. Be sure to choose

an NPN that can pull VINR below the power supply mode

threshold before fully saturating. Alternatively, Q6 can be

replaced with an NMOS device with proper care taken to

avoid overvoltage of the NMOS gate.

Depending on the current limit settings, diodes D

PANEL

and D

can incur significant current and heat. Con-

VDC

sider the use of Schottky diodes or an appropriate ideal

diode such as the LTC4358, LTC4412, LTC4352, etc. to

minimize heating.

Excessive inrush current can be mitigated by first con-

necting the battery or supply to the charger through a

resistive path, followed quickly by a short circuit. This can

beaccomplishedusingstaggeredlengthpinsinamulti-pin

connector. Thiscanalsobeaccomplishedthroughtheuse

oftheoptionalcircuitshowninFigure31byfirstconnecting

the (+) and (–) battery remote sense connections, which

allow the charger output capacitors to charge through

resistors R2 and R3. Alternatively, consider the use of a

Hot Swap™ controller such as the LT1641, LT4256, etc.

to make a current limited connection.

D

PANEL

V

PANEL

D

VDC

V

TO R

SENSE1

DC

V

IN

LT8490

196k

VINR

100k

33k

8.06k

Q6

GND

Design Example

8490 F33

In this design example, the LT8490 is paired with a

Q6: 2SD2704K

175W/5.4A panel (V

< 53V) and a 12V flooded lead-

MAX

acid battery. The desired maximum battery charging

current (C) is 10A with a trickle charge current of 2.5A

(C/4). Charger settings are as follows: –20°C to 50°C valid

battery temperature range, temperature compensated

charging limits, no time limits and Stage 3 is enabled with

Figure 33. Optional DC Supply Detection Circuit

V /V =97.2%. Inthisexampleresistorsareroundedto

S3 S2

the nearest standard value. If better accuracy is required

then multiple resistors in series may be required.

8490f

35

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

• With R

set at 20kΩ and a desired Stage 2 voltage

• Usingthestandardvalueresistorscalculatedabove,the

FBOUT2

limitof14.2V,thetopoutputfeedbackresistor,R

,

V , N and N checking equations yield the following:

FBOUT1

X3

1

2

is calculated according to the following equation:

V

= 14.31V

X3

⎡

⎤

⎛

⎜

⎝

⎞

1.241

1.211

N = 1.22

1

R

_FBOUT1=R_FBOUT2• V •

−0.128 −1 Ω

⎟

⎥

⎢

S2

⎠

⎣

⎦

N = 0.804

2

⎡

⎤

⎛

⎜

⎝

⎞

1.241

1.211

• In order to find a resistor combination that yields V

= 20k • 14.2 •

−0.128 −1 Ω

⎟

⎥

X3

⎢

⎠

⎣

⎦

closer to the desired 14.2V, R

is increased to the

FBOUT2

= 234,684Ω

next higher standard value and the above calculations

are repeated.

Choose R

value resistor.

= 237kΩ which is the closest standard

FBOUT1

• Iterations of the previous step are performed that

include adjustments to R

, R

and R

FBOUT1 DACO1 DACO2

• Following the calculation of R

, solve for R

,

DACO1

FBOUT1

until the following standard value feedback resistors

were chosen:

R

and C

according to the following formulas:

DACO2

DACO

R_FBOUT1•R_FBOUT2• 0.833

R

= 274kΩ

= 23.2kΩ

= 26.1kΩ

= 124kΩ

FBOUT1

FBOUT2

DACO1

DACO2

R_DACO2

=

Ω

⎛

⎞

1.241

R

_FBOUT2• V_S2•

−R_FBOUT2−R_FBOUT1

⎟

⎜

⎝

⎠

1.211

234,684 • 20k • 0.833

Ω

⎛

⎜

⎝

⎞

1.241

20k •14.2 •

−20k −234,684

⎟

⎠

1.211

C

where:

V

= 0.082µF

DACO

= 107,556Ω

Choose R = 107kΩ which is the closest standard

= 14.27V

DACO2

X3

value resistor.

N = 1.22

1

R

= (0.2 • R ) Ω

DACO2

DACO1

N = 0.805

2

= 0.2 • 107,556Ω

• With the output feedback network determined, use

= 21,511Ω

V

and solve for the input resistor feedback network

MAX

according to the following formulas:

Choose R

value resistor.

= 21.5kΩ which is the closest standard

DACO1

⎡

⎢

⎣

⎤

⎥

⎛

⎞

4.47V

1+

⎜

⎟

1

500 •R_DACO1

V

−6V

⎝

⎠

MAX

C_DACO

=

F

R

_FBIN1= 100k •

Ω

⎛

⎜

⎝

⎞

5.593V

⎟⎥

1

V

−6V

⎠

⎦

MAX

F

500 • 21,511

⎡

⎢

⎤

⎥

⎛

⎜

⎝

⎛

⎜

⎝

⎞

⎟

⎠

⎞

⎟

⎠

4.47V

53V −6V

5.593V

53V −6V

1+

= 93nF

⎥

= 100k •

Ω

⎢

⎣

⎥

⎦

= 97,865Ω

8490f

36

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

The closest standard value for R

is 97.6kΩ.

• Similar to the output feedback resistors, the final input

FBIN1

feedback resistors were chosen to be standard values

⎛

⎜

⎝

⎞

⎟

⎠

R_FBIN1

using an iterative process. The V and V equations

R_DACI2= 2.75 •

Ω

X1

X2

V

−6V

in the Input Voltage Sensing and Modulation Network

MAX

section were used to validate the selections:

⎛

⎞

⎟

⎠

97,865

53V −6V

= 2.75 •

Ω

⎜

R

FBIN1

R

FBIN2

R

DACI1

R

DACI2

= 93.1kΩ

= 3.24kΩ

= 1.05kΩ

= 5.49kΩ

⎝

= 5,726Ω

Choose R

value.

= 5.76kΩ which is the closest standard

DACI2

1

C

= 1µF

DACI

R_FBIN2

=

Ω

⎛

⎜

⎝

⎞

⎟

⎠

⎛

⎜

⎞

⎟

⎠

1

where:

−

100k −R

R

⎝

FBIN1

DACI2

V

= 6V

X1

X2

1

=

Ω

= 53V

⎛

⎞ ⎛

⎞

1

−

⎜

⎝

⎟ ⎜

⎟

⎠

• The 10A maximum charge current limit and 2.5A trickle

100k −97,865

5,726

⎠ ⎝

charge current limit are set by choosing R

IMON_OUT

,

SENSE2

= 3,404Ω

R

and R

using the following formulas:

IOW

Choose R

value.

= 3.4kΩ which is the closest standard

0.0497

I_OUT(MAX)

0.0497

10

FBIN2

R_SENSE2

=

Ω =

≅ 5mΩ

R

_DACI1= 0.2 •R_DACI2Ω

1208

_OUT(MAXS0)•R_SENSE2

R_{IMON_OUT}

=

Ω

= 0.2 • 5,726Ω

= 1,145Ω

I

1208

2.5 • 5m

=

Ω

Choose R

value.

= 1.1kΩ which is the closest standard

DAC1

= 96.64kΩ

1

where the nearest standard value is 97.6kΩ.

C_DACI

=

F

1000 •R_DACI1

24.3k •R_{IMON_OUT}

R_IOW

=

Ω

1

R_{IMON_OUT}−24.3k

F

1000 •1,145

24.3k • 47.6k

97.6k −24.3k

Ω

= 873nF

= 32,356Ω

where the nearest standard value is also 32.4kΩ.

8490f

37

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

• The input current limit is set by properly choosing

Standardresistorvaluesof90.9kΩ(fromCHARGECFG1

R

. In this example, the panel can deliver up to

toground)and13kΩ(fromAV toCHARGECFG1)can

SENSE1

DD

5.4A. Choosing a margin of 30% yields:

be used to set CHARGECFG1.

0.0505 0.0505

• To set no time limits with a –20°C to 50°C valid battery

R_SENSE1

=

= 7.2mΩ

temperature range requires CHARGECFG2 to be tied to

I

1.3 • 5.4

IN(MAX)

AV .

DD

• To enable temperature compensated charging limits

• For greater charging voltage accuracy, it is recom-

mended that 0.1% tolerance resistors be used for the

output feedback resistor network.

and allow a Stage 3 regulation voltage of 97.2% of

Stage 2, use V / V = 0.972 in the following equation:

S3 S2

⎡

⎤

⎛

⎜

⎝

⎞

• Please reference the LT8705 data sheet for completing

V_S3

CHARGECFG1% = 2.67 •

−0.85 +0.55 •100%

⎢

⎥

⎦

⎟

the remaining power portions of the LT8490.

V

⎠

⎣

S2

CHARGECFG1% = 87.6%

8490f

38

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

8490f

39

For more information www.linear.com/LT8490

LT8490

applicaTions inForMaTion

8490f

40

For more information www.linear.com/LT8490

LT8490

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

UKJ Package

Variation: UKJ64(58)

64(58)-Lead Plastic QFN (7mm × 11mm)

(Reference LTC DWG # 05-08-1922 Rev Ø)

0.70 0.05

1.50 0.05

1.80 0.05

9.38 0.05

3.60 0.05

7.50 0.05

5.50 REF

0.45

3.83

PACKAGE

OUTLINE

0.25 0.05

0.50 BSC

9.50 REF

10.10 0.05

11.50 0.05

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

PIN 1 NOTCH

R = 0.30 TYP OR

0.35 × 45° CHAMFER

0.75 0.05

5.50 REF

7.00 0.10

53

63 64

0.00 – 0.05

PIN 1

1

2

TOP MARK

52

(SEE NOTE 6)

0.325

REF

1.50 0.10

1.20 0.10

44

9.50 REF

11.00 0.10

9.38 0.10

0.45 0.10

40

3.83 0.10

3.60 0.10

35

33

20

0.50 REF

0.40 0.10

31

27

25

21

0.200 REF

0.25 0.05

(UKJ64(58)) QFN 0412 REV Ø

0.50 BSC

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE

2. DRAWING NOT TO SCALE

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

3. ALL DIMENSIONS ARE IN MILLIMETERS

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

8490f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

41

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

For more information www.linear.com/LT8490

LT8490

Typical applicaTion

14.2V Flooded Lead-Acid Battery Charger

L1

15µH

½W

7mΩ

1W

5mΩ

M1

V

BAT

M4

+

C

2.2µF

×2

C

IN3

IN2

C

10µF

×2

C

10µF

×2

OUT3

OUT2

2.2µF

×2

SOLAR

PANEL

< 53V

M2

M3

C

OUT1

150µF

V

OC

GATEV

´

CC

10Ω

GATEV

´

C

CC

IN1

–

10Ω

33µF

×3

D

B1

5mΩ

D

B2

3.3nF

C

OUT4

220nF

1µF

220nF

470nF

3.3nF

2Ω

C

IN4

TG1 BOOST1 SW1 BG1 CSP CSN

GND BG2 SW2 BOOST2 TG2

EXTV

2.2µF

CSNIN

CC

CSPIN

V

IN

CSPOUT

CSNOUT

4Ω

274k

GATEV

´

GATEV

CC

196k

110k

INTV

FBOR

FBOUT

FBOW

CC

4.7µF

×2

8.06k

35.7k

MODE

LOAD

0.082µF

26.1k

124k

SHDN

VINR

FBIR

FBIN

FBIW

23.2k

93.1k

3.24k

TEMPSENSE

AV

DD

LT8490

1µF

11.5k

+

V

1µF

5.49k

1.05k

FLOODED

LEAD

ACID

DD

LDO33

SRVO_IIN

SRVO_FBIN

SRVO_FBOUT

SRVO_IOUT

249k

–

RT

SS

IIR

IMON_IN

10k

AT 25°C

ß = 3380

NTC

32.4k

IOW

4.7µF

3.01k

21k

ECON

IOR

IMON_OUT

100nF

SWEN

SWENO

100nF

8.2nF

V

SYNC

CLKOUT CHARGECFG2 STATUS FAULT CHARGECFG1

CLKDET

C

97.6k

AV

DD

8.45k

10nF

53.6k

AV

DD

1.3k

4.7nF

13k

200k

3.32k

68nF

90.9k

DS

DF

549Ω

470pF

549Ω

8490 TA03

14.27V STAGE 2 (ABSORPTION) CHARGE VOLTAGE (V ) AT 25°C

M1, M2: INFINEON BSC028N06NS

M3, M4: INFINEON BSC042N03LSG

L1: 15µH COILCRAFT SER2915H-153KL

S2

13.87V STAGE 3 (FLOAT) CHARGE VOLTAGE (V ) AT 25°C

S3

10A CHARGING CURRENT LIMIT

2.5A TRICKLE CURRENT LIMIT

7.2A INPUT CURRENT LIMIT

53V MAXIMUM PANEL VOLTAGE (V

NO TIMER LIMITS

D

, D : CENTRAL SEMI CMMR1U-02

B1 B2

C

: 33µF, 63V, SUNCON 63HVH33M

IN1

)

, C , C : 2.2µF, 100V, AVX 12101C225KAT2A

MAX

IN2 IN3 IN4

OUT1

OUT2 OUT3

: 150µF, 35V NICHICON UPJ151MPD6TD

TEMPERATURE COMPENSATION ENABLED

–20°C TO 50°C BATTERY TEMPERATURE RANGE

175kHz SWITCHING FREQUENCY

, C

: 10µF, 35V, MURATA GRM32ER7YA106KA12

: 1µF, 25V AVX 12063C105KAT2A

OUT4

EXAMPLE SOLAR PANEL: SHARP NT-175UC1 175W

relaTeD parTs

PART NUMBER

DESCRIPTION

COMMENTS

LT3652/LT3652HV Power Tracking 2A Battery Charger for Solar Power

V

Range = 4.95V to 32V (LT3652), 4.95V to 34V (HV),

IN

MPPC

LTC4000-1

LTC4020

High Voltage, High Current Controller for Battery Charger with MPPC

55V V /V Buck-Boost Multi-Chemistry Battery Charging Controller

V

and V

Range = 3V to 60V, MPPC

OUT

IN

Li-Ion and Lead-Acid Algorithms, MPPC

IN OUT

8490f

LT 0514 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

42

For more information www.linear.com/LT8490

(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT8490

●

 LINEAR TECHNOLOGY CORPORATION 2014


型号：	LT8490EUKJ#PBF
厂家：	Linear
描述：	LT8490 - High Voltage, High Current Buck-Boost Battery Charge Controller with Maximum Power Point Tracking (MPPT); Package: QFN; Pins: 64; Temperature Range: -40°C to 85°C 电池
文件：	总42页 (文件大小：586K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT8490EUKJ#PBF [Linear]

相关型号：

LT8500ETJ#PBF

LT8500ETJ#TRPBF

LT8500EUHH#PBF

LT8500EUHH#TRPBF

LT8500ITJ#PBF

LT8500ITJ#TRPBF

LT8500IUHH#PBF

LT8500IUHH#TRPBF

LT8570

LT8570-1_15

LT8570_15

LT8580