LTC1255IS8#TRPBF [Linear]
暂无描述;型号: | LTC1255IS8#TRPBF |
厂家: | Linear |
描述: | 暂无描述 驱动器 |
文件: | 总16页 (文件大小:340K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC1255
Dual 24V High-Side
MOSFET Driver
U
DESCRIPTIO
EATURE
S
F
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■
■
■
■
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■
Fully Enhances N-Channel Power MOSFETs
12µA Standby Current
Operates at Supply Voltages from 9V to 24V
Short Circuit Protection
Easily Protected Against Supply Transients
Controlled Switching ON and OFF Times
No External Charge Pump Components
Compatible With Standard Logic Families
Available in 8-Pin SOIC
The LTC1255 dual high-side driver allows using low
cost N-channel FETs for high-side industrial and auto-
motiveswitchingapplications.Aninternalchargepump
boosts the gate drive voltage above the positive rail,
fully enhancing an N-channel MOS switch with no
external components. Low power operation, with 12µA
standby current, allows use in virtually all systems with
maximum efficiency.
Included on-chip is independent overcurrent sensing
toprovideautomaticshutdownincaseofshortcircuits.
A time delay can be added to the current sense to
prevent false triggering on high in-rush current loads.
O U
PPLICATI
S
A
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Solenoid Drivers
DC Motor Drivers
Stepper Motor Drivers
Lamp Drivers/Dimmers
Relay Drivers
Low Frequency H-Bridge
P-Channel Switch Replacement
The LTC1255 operates from 9V to 24V supplies and is
well suited for industrial and automotive applications.
The LTC1255 is available in both an 8-pin DIP and an
8-pin SOIC.
U
O
TYPICAL APPLICATI
Dual 24V High-Side Switch with Overcurrent Protection
Standby Supply Current
24V
50
+
V
A
= V = 0V
IN2
IN1
45
10µF
T
= 25°C
0.036Ω
0.036Ω
40
35
30
V
S
DS1
G1
DS2
G2
IRLR024
IRLR024
LTC1255
GND
25
20
IN1
IN2
12V
12V
15
10
5
FROM
µP, ETC.
FROM
µP, ETC.
24V/0.5A
SOLENOID
24V/0.5A
SOLENOID
1N4001
1N4001
0
0
5
15
20
25
30
10
LTC1255 • TA01
SUPPLY VOLTAGE (V)
LTC1255 • TA02
1
LTC1255
W W W
U
ABSOLUTE AXI U RATI GS
Operating Temperature Range
Supply Voltage ......................................... –0.3V to 30V
Transient Supply Voltage (<10ms) ......................... 40V
Input Voltage ..................... (VS + 0.3V) to (GND – 0.3V)
Gate Voltage ...................... (VS + 20V) to (GND – 0.3V)
Current (Any Pin)................................................. 50mA
LTC1255C............................................... 0°C to 70°C
LTC1255I........................................... –40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
W
U
/O
PACKAGE RDER I FOR ATIO
ORDER PART
ORDER PART
TOP VIEW
TOP VIEW
NUMBER
NUMBER
DS1
GATE 1
GND
1
2
3
4
DS2
8
7
6
5
DS1
GATE 1
GND
1
2
3
4
8
7
6
5
DS2
GATE 2
GATE 2
LTC1255CS8
LTC1255IS8
LTC1255CN8
LTC1255IN8
V
S
V
S
IN1
IN2
IN1
IN2
S8 PART MARKING
N8 PACKAGE
S8 PACKAGE
8-LEAD PLASTIC SOIC
8-LEAD PLASTIC DIP
1255
1255I
TJMAX = 100°C, θJA = 130°C/ W
TJMAX = 100°C, θJA = 150°C/ W
ELECTRICAL CHARACTERISTICS VS = 9V to 24V, TA = 25°C, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Quiescent Current OFF
V = 10V, V = 0V (Note 1)
12
12
12
40
40
40
µA
µA
µA
Q
S
IN
V = 18V, V = 0V (Note 1)
S
IN
V = 24V, V = 0V (Note 1)
S
IN
Quiescent Current ON
V = 10V, V
= 22V, V = 5V (Note 2)
160
350
600
400
800
1200
µA
µA
µA
S
GATE
GATE
GATE
IN
V = 18V, V
= 30V, V = 5V (Note 2)
S
IN
V = 24V, V
S
= 36V, V = 5V (Note 2)
IN
V
V
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
Drain Sense Threshold Voltage
●
●
●
2
V
V
µA
pF
mV
mV
µA
V
µA
µA
INH
INL
0.8
±1
I
0V ≤ V ≤ V
S
IN
IN
C
V
5
100
100
IN
80
75
120
125
±0.1
SEN
●
●
●
I
Drain Sense Input Current
Gate Voltage Above Supply
Gate Output Drive Current
0V ≤ V
≤ V
SEN
SEN
S
V
– V
V = 9V
S
7.5
5
5
10.5
20
23
12
GATE
S
I
V = 18V, V
V = 24V, V
S
= 30V
= 36V
●
●
GATE
S
GATE
GATE
2
LTC1255
ELECTRICAL CHARACTERISTICS
VS = 9V to 24V, TA = 25°C, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
Turn-ON Time
V = 10V, C
Time for V
Time for V
= 1000pF (Note 3)
ON
S
GATE
GATE
GATE
> V + 2V
30
75
100
250
300
750
µs
µs
S
> V + 5V
S
V = 18V, C
Time for V
Time for V
= 1000pF (Note 3)
S
GATE
GATE
GATE
> V + 5V
40
75
120
250
400
750
µs
µs
S
> V + 10V
S
V = 24V, C
Time for V
= 1000pF (Note 3)
S
GATE
GATE
> V + 10V
50
180
500
µs
S
t
t
Turn-OFF Time
V = 10V, C
= 1000pF, (Note 3, 4)
= 1000pF, (Note 3, 4)
= 1000pF, (Note 3, 4)
= 1000pF, (Note 3, 4)
= 1000pF, (Note 3, 4)
= 1000pF, (Note 3, 4)
10
10
10
5
5
5
24
21
19
16
16
16
60
60
60
30
30
30
µs
µs
µs
µs
µs
µs
OFF
SC
S
GATE
GATE
GATE
V = 18V, C
S
V = 24V, C
S
Short-Circuit Turn-OFF Time
V = 10V, C
S
GATE
GATE
GATE
V = 18V, C
S
V = 24V, C
S
The
●
denotes specifications which apply over the full operating
Note 3: Zener diode clamps must be connected across the GATE-SOURCE
temperature range.
of the power MOSFET to limit V . 1N5242A (through hole) or
GS
MMBZ5242A (surface mount) 12V Zener diodes are recommended. All
Turn-ON and Turn-OFF tests are performed with a 12V Zener clamp in
Note 1: Quiescent current OFF is for both channels in OFF condition.
Note 2: Quiescent current ON is per driver and is measured independently.
The gate voltage is clamped to 12V above the rail to simulate the effects of
protection clamps connected across the GATE-SOURCE of the power
MOSFET.
series with a small-signal diode connected between V and the GATE
S
output to simulate the effects of a 12V protection Zener clamp connected
across the GATE-SOURCE of the power MOSFET.
Note 4: Time for V
to drop below 1V.
GATE
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TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
Supply Current per Driver (ON)
Gate Voltage Above Supply
2.0
1.8
50
45
20
18
ONE INPUT = 0N
V
= 12V
V
A
= V = 0V
IN2
CLAMP
IN1
OTHER INPUT = OFF
T
= 25°C
T
= 25°C
A
1.6
1.4
1.2
40
35
30
16
14
12
25
20
1.0
0.8
10
8
15
10
5
0.6
0.4
0.2
0
6
4
2
0
0
0
5
15
20
25
30
0
5
15
20
25
30
0
5
15
20
25
30
10
10
10
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LTC1255 • TPC01
LTC1255 • TPC02
LTC1255 • TPC03
3
LTC1255
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Input Threshold Voltage
Drain Sense Threshold Voltage
Gate Clamp Current
2.4
2.2
125
120
50
45
T
A
= 25°C
V
A
= 12V
CLAMP
= 25°C
T
2.0
1.8
1.6
115
110
105
40
35
30
V
V
ON
1.4
1.2
100
95
25
20
OFF
1.0
0.8
0.6
0.4
90
85
80
75
15
10
5
0
0
5
15
20
25
30
0
5
15
20
25
30
10
10
0
5
15
20
25
30
10
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LTC1255 • TPC04
LTC1255 • TPC05
LTC1255 • TA06
Turn-ON Time
Turn-OFF Time
Short-Circuit Turn-OFF Delay Time
1000
900
50
45
50
45
C
A
= 1000pF
C
= 1000pF
C
= 1000pF
GATE
GATE
GATE
TIME FOR V
T
= 25°C
< 1V
TIME FOR V
< 1V
GATE
GATE
800
700
600
40
35
30
40
35
30
500
400
25
20
25
20
300
200
100
0
15
10
5
15
10
5
V
= 5V
15
GS
V
= 2V
5
GS
0
0
0
20
25
30
0
5
15
20
25
30
0
5
10
15
20
25
30
10
10
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LTC1255 • TA09
LTC1255 • TA07
LTC1255 • TA08
Supply Current per Channel (ON)
Standby Supply Current
Input ON Threshold
50
45
2.0
1.8
2.4
2.2
40
35
30
1.6
1.4
1.2
2.0
1.8
1.6
V
V
= 10V
= 24V
S
25
20
1.0
0.8
1.4
1.2
V
= 24V
S
S
V
V
= 18V
= 24V
S
S
15
10
5
0.6
0.4
0.2
0
1.0
0.8
0.6
0.4
V
V
= 18V
= 10V
S
V
S
= 10V
S
0
–50 –25
25
50
75
100
–50 –25
25
50
75
100
–50 –25
25
50
75
100
0
0
0
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LTC1255 • TA10
LTC1255 • TA11
LTC1255 • TA12
4
LTC1255
U
U
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PI FU CTIO S
Input Pin
The LTC1255 is designed to be continuously powered
so that the gate of the MOSFET is actively driven at all
times. If it is necessary to remove power from the
supply pin and then reapply it, the input pin should be
cycled (low to high) a few milliseconds after the power
is reapplied to reset the input latch and protection
circuitry. Also, theinputpinshouldbeisolatedfromthe
controllinglogicbya10kresistorifthereisapossibility
that the input pin will be held high after the supply has
been removed.
The LTC1255 input pin is active high and activates all of
theprotectionandchargepumpcircuitrywhenswitched
ON. The LTC1255 logic and shutdown inputs are high
impedance CMOS gates with ESD protection diodes to
ground and supply and therefore should not be forced
beyond the power supply rails. The input pin should be
held low during the application of power to properly set
the input latch.
Gate Drive Pin
Drain Sense Pin
The gate drive pin is either driven to ground when the
switch is turned OFF or driven above the supply rail
when the switch is turned ON. This pin is of relatively
high impedance when driven above the rail (the equiva-
lent of a few hundred kΩ). Care should be taken to
minimize any loading of this pin by parasitic resistance
to ground or supply.
The drain sense pin is compared against the supply pin
voltage. If the voltage at this pin is more than 100mV
below the supply pin, the input latch will be reset and
the MOSFET gate will be quickly discharged. Cycle the
inputtoresettheshort-circuitlatchandturntheMOSFET
back on.
This pin is also a high impedance CMOS gate with ESD
protection and therefore should not be forced outside
of the power supply rails. To defeat the overcurrent
protection, short the drain sense pin to the supply pin.
Supply Pin
The supply pin of the LTC1255 serves two vital pur-
poses. The first is obvious; it powers the input, gate
drive, regulation and protection circuitry. The second
purposeislessobvious;itprovidesaKelvinconnection
to the top of the drain sense resistor for the internal
100mV reference.
Some loads, such as large supply capacitors, lamps or
motors require high in-rush currents. An RC time delay
can be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does
not false trigger during startup. This time constant can
be set from a few microseconds to many seconds.
However, very long delays may put the MOSFET at risk
of being destroyed by a short-circuit condition (see
Applications Information section).
The supply pin of the LTC1255 should never be forced
below ground as this may result in permanent damage
to the device. A 100Ω resistor should be inserted in
series with the ground pin if negative supply voltage
transients are anticipated.
U
OPERATIO
The LTC1255 is a dual 24V MOSFET driver with built-in
protection and gate charge pump. The LTC1255 consists
of the following functional blocks:
olds are set at about 1.3V with approximately 100mV of
hysteresis. A low standby current regulator provides
continuous bias for the TTL-to-CMOS converter.
The input/protection latch should be set after initial
power-up, or after reapplication of power, by cycling
the input low to high.
TTL and CMOS Compatible Inputs and Latches
The LTC1255 inputs have been designed to accommo-
date a wide range of logic families. Both input thresh-
5
LTC1255
U
OPERATIO
Internal Voltage Regulation
Drain Current Sense
The output of the TTL-to-CMOS converter drives two
regulated supplies which power the low voltage CMOS
logicandanalogblocks.Theregulatoroutputsareisolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.
The LTC1255 is configured to sense the current flowing
into the drain of the power MOSFET in a high-side applica-
tion. An internal 100mV reference is compared to the drop
across a sense resistor (typically 0.002Ω to 0.10Ω) in
series with the drain lead. If the drop across this resistor
exceeds the internal 100mV threshold, the input latch is
reset and the gate is quickly discharged via a relatively
large N-channel transistor.
Gate Charge Pump
Gate drive for the power MOSFET is produced by an
adaptive charge pump circuit which generates a gate
voltage substantially higher than the power supply volt-
age.Thechargepumpcapacitorsareincludedon-chipand
thereforenoexternalcomponentsarerequiredtogenerate
the gate drive. The charge pump is designed to drive a 12V
Zener diode clamp connected across the gate and source
of the MOSFET switch.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions in normal
operation. If a short circuit or current overload condition
is encountered, the gate is discharged very quickly (typi-
cally a few microseconds) by a large N-channel transistor.
W
BLOCK DIAGRA
(One Channel)
DRAIN
SENSE
ANALOG SECTION
V
S
10µs
DELAY
COMP
LOW STANDBY
CURRENT
REGULATOR
100mV
REFERENCE
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
GATE
ANALOG
DIGITAL
R
S
OSCILLATOR
AND CHARGE
PUMP
FAST/SLOW
GATE CHARGE
LOGIC
TTL-TO-CMOS
CONVERTER
VOLTAGE
REGULATOR
INPUT
LATCH
INPUT
ONE
SHOT
LTC1255 • BD
GND
6
LTC1255
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APPLICATIO S I FOR ATIO
MOSFET AND LOAD PROTECTION
Large inductive loads (>0.1mH) may require diodes con-
nected directly across the inductor to safely divert the
stored energy to ground. Many inductive loads have these
diodes included. Ifnot, adiode ofthe propercurrent rating
should be connected across the load, as shown in
Figure 2, to safely divert the stored energy.
The LTC1255 protects the power MOSFET switch by
removing drive from the gate as soon as an overcurrent
condition is detected. Resistiveandinductiveloadscanbe
protected with no external time delay in series with the
drain sense pin. Lamp loads, however, require that the
overcurrentprotectionbedelayedlongenoughtostartthe
lampbutshortenoughtoensurethesafetyoftheMOSFET.
12V
+
R
100µF
SENSE
0.036Ω
V
S
DS1
1/2 LTC1255
IN1
Resistive Loads
Loads that are primarily resistive should be protected with
asshortadelayaspossibletominimizetheamountoftime
that the MOSFET is subjected to an overload condition.
The drain sense circuitry has a built-in delay of approxi-
mately 10µs to eliminate false triggering by power supply
or load transient conditions. This delay is sufficient to
“mask” short load current transients and the starting of a
small capacitor (<1µF) in parallel with the load. The drain
sense pin can therefore be connected directly to the drain
current sense resistor as shown in Figure 1.
IRFZ24
G1
GND
12V
12V, 1A
SOLENOID
1N5400
LTC1255 • F02
Figure 2. Protecting Inductive Loads
18V
Capacitive Loads
+
R
10µF
SENSE
0.036Ω
Large capacitive loads, such as complex electrical sys-
tems with large bypass capacitors, should be powered
using the circuit shown in Figure 3. The gate drive to the
power MOSFET is passed through an RC delay network,
R1 and C1, which greatly reduces the turn-on ramp rate of
the switch. And since the MOSFET source voltage follows
the gate voltage, the load is powered smoothly and slowly
from ground. This dramatically reduces the startup cur-
rent flowing into the supply capacitor(s) which, in turn,
reduces supply transients and allows for slower activation
V
S
DS1
1/2 LTC1255
IN1
IRFZ24
G1
GND
12V
C
LOAD
R
LOAD
18Ω
≤ 1µF
LTC1255 • F01
Figure 1. Protecting Resistive Loads
15V
+
C
R
DELAY
470µF
SENSE
R
DELAY
0.01µF
0.036Ω
V
S
100k
Inductive Loads
DS1
1/2 LTC1255
IN1
D1
1N4148
Loads that are primarily inductive, such as relays, sole-
noids and stepper motor windings, should be protected
with as short a delay as possible to minimize the amount
of time that the MOSFET is subjected to an overload
condition. The built-in 10µs delay will ensure that the
overcurrent protection is not false triggered by a supply or
load transient. No external delay components are required
as shown in Figure 2.
MTP3055E
G1
GND
R1
100k
R2
100k
12V
+
C1
0.33µF
C
LOAD
100µF
LTC1255 • F03
Figure 3. Powering Large Capacitive Loads
7
LTC1255
APPLICATIO S I FOR ATIO
of sensitive electrical loads. (Resistor R2, and the diode
D1, provide a direct path for the LTC1255 protection
circuitry to quickly discharge the gate in the event of an
overcurrent condition.)
U U
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Selecting RDELAY and CDELAY
Figure5isagraphofnormalizedovercurrentshutdown
time versus normalized MOSFET current. This graph is
used to select the two delay components, R
and
DELAY
The RC network, RDELAY and CDELAY, in series with the
drain sense input should be set to trip based on the
expected characteristics of the load after startup, i.e., with
this circuit, it is possible to power a large capacitive load
and still react quickly to an overcurrent condition. The
ramp rate at the output of the switch as it lifts off ground
is approximately:
C
, which make up a simple RC delay between the
DELAY
drain sense input and the drain sense resistor.
The Y axis of the graph is normalized to one RC time
constant. The X axis is normalized to the set current.
(The set current is defined as the current required to
develop 100mV across the drain sense resistor.)
Note that the shutdown time is shorter for increasing
levels of MOSFET current. This ensures that the total
energy dissipated by the MOSFET is always within the
boundsestablishedbythemanufacturerforsafeopera-
tion. (See MOSFET data sheet for further S.O.A.
information.)
dV/dt = (VGATE – VTH)/(R1 × C1)
Therefore, the current flowing into the capacitor during
startup is approximately:
ISTARTUP = CLOAD × dV/dt
Using the values shown in Figure 3, the startup current is
lessthan100mAanddoesnotfalsetriggerthedrainsense
circuitry which is set at 2.7A with a 1ms delay.
10
1
Lamp Loads
The in-rush current created by a lamp during turn-on can
be 10 to 20 times greater than the rated operating current.
The circuit shown in Figure 4 shifts the current limit
threshold up by a factor of 11:1 (to 30A) for a short period
of time while the bulb is turned on. The current limit then
dropsdownto2.7Aafterthein-rushcurrenthassubsided.
0.1
0.01
0.1
1
10
100
NORMALIZED MOSFET CURRENT (1 = SET CURRENT)
LTC1255 • F05
12V
+
10k
470µF
R
SENSE
0.036Ω
Figure 5. Normalized Delay Time vs MOSFET Current
100k
V
S
DS1
1/2 LTC1255
IN1
Using a Speed-Up Diode
VN2222LL
0.1µF
Another way to reduce the amount of time that the
power MOSFET is in a short-circuit condition is to
“bypass” the delay resistor with a small signal diode as
shown in Figure 6. The diode will engage when the drop
across the drain sense resistor exceeds about 0.7V,
providingadirectpathtothesensepinanddramatically
reducing the amount of time the MOSFET is in an
overload condition. The drain sense resistor value is
selected to limit the maximum DC current to 4A.
MTP3055EL
G1
GND
1M
9.1V
12V/1A
BULB
LTC1255 • F04
Figure 4. Lamp Driver With Delayed Protection
8
LTC1255
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APPLICATIO S I FOR ATIO
The large output capacitors on many switching regula-
tors, on the other hand, may be able to hold the supply
pinoftheLTC1255above3.5Vsufficientlylongthatthis
extra filtering is not required.
18V
+
C
R
DELAY
100µF
SENSE
0.01µF
0.036Ω
R
DELAY
V
S
100k
DS1
1/2 LTC1255
IN1
1N4148
BecausetheLTC1255ismicropowerinboththestandby
and ON state, the voltage drop across the supply filter
is very small (typically <6mV) and does not signifi-
cantly alter the accuracy of the drain sense threshold
voltage which is typically 100mV.
IRF530
G1
GND
12V
LOAD
LTC1255 • F06
AUTOMOTIVE APPLICATIONS
Reverse Battery Protection
Figure 6. Using a Speed-Up Diode
Current Limited Power Supplies
The LTC1255 can be protected against reverse battery
conditions by connecting a resistor in series with the
groundleadasshowninFigure8.Theresistorlimitsthe
supply current to less than 120mA with –12V applied.
Since the LTC1255 draws very little current while in
normal operation, the drop across the ground resistor
is minimal. The 5V µP (or controlling logic) is protected
by the 10k resistors in series with the input.
The LTC1255 requires at least 3.5V at the supply pin to
ensure proper operation. It is therefore necessary that
the supply to the LTC1255 be held higher than 3.5V at
all times, even when the output of the switch is short
circuited to ground. The output voltage of a current
limited regulator may drop very quickly during short
circuit and pull the supply pin of the LTC1255 below
3.5V before the shutdown circuitry has had time to
respond and remove drive from the gate of the power
MOSFET. A supply filter should be added as shown in
Figure 7 which holds the supply pin of the LTC1255
high long enough for the overcurrent shutdown cir-
cuitry to respond and fully discharge the gate.
14V
+
5V
28V
10µF
R
SENSE
0.036Ω
V
S
DS1
1/2 LTC1255
IN1
µp OR
CONTROL
LOGIC
10k
MTP12N06E
G1
Linear regulators with small output capacitors are the
most difficult to protect as they can “switch” from a
voltage mode to a current limited mode very quickly.
GND
12V
LOAD
100Ω
LTC1255 • F08
12V/2A
15V
REGULATOR
+
+
10Ω*
0.01µF
Figure 8. Reverse Battery Protection
10µF
10µF
R
SENSE
0.1Ω
+
V
S
100k
47µF*
Transient Overvoltage Protection
DS1
1/2 LTC1255
IN1
A common scheme used to limit overvoltage transients
on a 14V nominal automotive power bus is to clamp the
supply to the module containing the high-side MOSFET
switches with a large transient suppressor diode, D1 in
Figure 9. This diode limits the supply voltage to 40V
underworsecaseconditions. TheLTC1255isdesigned
to survive short (10ms) 40V transients and return to
normal operation after the transient has passed.
1N4148
MTP12N06E
G1
GND
12V
SHORT
CIRCUIT
*SUPPLY FILTER COMPONENT
LTC1255 • F07
Figure 7. Supply Filter for Current Limited Supplies
9
LTC1255
APPLICATIO S I FOR ATIO
U U
W
U
The switches can either be turned OFF by the controlling
logic during these transients or latched OFF above 30V by
holding the drain sense pin low as shown in Figure 9.
14V
+
D1
1µF
50V
MR2535L
R
SENSE
0.036Ω
V
S
1k*
DS1
1/2 LTC1255
IN1
Switch status can be ascertained by means of an XNOR
gate connected to the input and switch output through
100k current limiting resistors (see Typical Applications
sectionformoredetailonthisscheme).Theswitchisreset
after the overvoltage event by cycling the input low and
then high again.
10k
FROM
µP, ETC.
IRF530
G1
12V
GND
1N5242B
30V*
1N5256B
LOAD
100Ω
LTC1255 • F09
The power MOSFET switch should be selected to have a
breakdown voltage sufficiently higher than the 40V supply
clampvoltagetoensurethatnocurrentisconductedtothe
load during the transient.
*OPTIONAL OVERVOLTAGE (30V) LATCH-OFF COMPONENTS
Figure 9. Overvoltage Transient Protection
U
TYPICAL APPLICATIO S
Dual Automotive High-Side Switch with Overvoltage Protection,
XNOR Status and 12µA Standby Current
14V
+
1µF
MR2535L*
50V
0.036Ω
0.036Ω
V
S
DS1
G1 LTC1255 G2
IN1 IN2
DS2
10k
10k
10k** MTD3055E
MTD3055E
10k**
12V
MMBZ5242B
12V
MMBZ5242B
100k
100k
GND
14V/1A
SOLENOID
14V/1A
SOLENOID
1N5400
1N5400
1/4 74C266†
1/4 74C266†
100Ω
FAULT FROM
TO µP µP, ETC.
FROM FAULT
µP, ETC. TO µP
LTC1255 • TA03
TRUTH TABLE
IN OUT
*LIMITS V TRANSIENTS TO <40V. SEE MANUFACTURER DATA SHEET FOR
S
CONDITION
SWITCH OFF
OVERCURRENT
OPEN LOAD**
SWITCH ON
FAULT
FURTHER DETAIL.
0
1
0
1
0
0
1
1
1
0
0
1
**OPTIONAL OPEN LOAD DETECTION REQUIRES 10k PULL-UP RESISTORS.
(ULTRA LOW STANDBY QUIESCENT CURRENT IS SACRIFICED)
†
POWER FROM 5V LOGIC SUPPLY.
10
LTC1255
U
TYPICAL APPLICATIO S
10 to 12 Cell Battery Switch and 5V Ramped Load Switch with
12µA Standby Current and Optional 3A Overcurrent Shutdown
18V TO 30V
FROM
1N5400
BATTERY
CHARGER
9.1V
0.033Ω*
MMBZ5239BL
IRFR024
IRFR024
SWITCHED
BATTERY
V
10 TO 12
CELL
BATTERY
PACK
IN
100k*
10k
0.22µF*
HIGH†
EFFICIENCY
SWITCHING
REGULATOR
+
V
OUT
12V
MMBZ5242BL
100µF
2N2222
10k
5V/1A
+
V
S
DS1
G1
100µF
V
LOGIC
LTC1255
GND
1N4148
100k
µP OR
CONTROL
LOGIC
IN1
IN2
DS2
G2
100k
1k
MTD3055EL
0.1µF
5V/1A
(SWITCHED)
LTC1255 • TA04
*OPTIONAL 3A OVERCURRENT SHUTDOWN
†SEE LTC1149 DATA SHEET FOR CIRCUIT DETAILS
Automotive Motor Direction and Speed Control with
Stall-Current Shutdown
14V
+
0.1µF
0.1µF
100k
10µF
50V
MR2535L
0.02Ω
V
S
DS1
G1
30k
5V
MTD3055E
12V
MMBZ5242B
LTC1255
GND
DIRECTION
DIRECTION
IN1
IN2
DS2
G2
30k
MOTOR SPEED
AND DIRECTION
CONTROL LOGIC
OR µP
MTD3055E
14V
DC MOTOR
12V
MMBZ5242B
PWM 1
PWM 2
100Ω
MTD3055EL
MTD3055EL
LTC1255 • TA05
11
LTC1255
TYPICAL APPLICATIO S
U
Low Frequency (fO = 100Hz) PWM Motor Speed Control with
Current Limit and 22V Overvoltage Shutdown
14V
+
1N4148
10µF
50V
MR2535L
OFF
0.1µF
50V
0.47µF
0.01Ω
60k
SLOW
MED
FAST
10k
V
9.1k
S
DS1
G1
10k
30k
15k
+
22V
5.6V
LTC1255
GND
1µF
MMBZ5251BL
IN1
IN2
DS2
G2
8
4
100k
6
2
IRFR024
22V
MMBZ5251BL
LMC555
1k
5
3
100Ω
1N4148
14V
MOTOR
1
0.1µF
0.01µF
MR750
LTC1255 • TA06
Dual Automotive Lamp Dimmer with Controlled Rise and Fall Times
and Short-Circuit Protection
14V
+
10µF
50V
MR2535L
1N4148
0.1µF
0.1µF
0.1µF
0.05Ω
0.05Ω
9.1k
+
100k
12V
V
5.6V
S
10µF
PULSE
WIDTH
ADJUST
DS1
G1
30k
MTD3055E
8
4
6
2
100k
LTC1255
GND
100k
MMBZ5242B
IN1
IN2
DS2
G2
LMC555
30k
5
3
MTD3055E
1N4148
12V
MMBZ5242B
1
0.1µF
0.01µF
1k
100Ω
#53
14V
BULBS
LTC1255 • TA06
12
LTC1255
U
TYPICAL APPLICATIO S
18V to 32V Operation with Overcurrent Shutdown and Optional
Overvoltage Shutdown
18V TO 32V
R
SEN
1k
1k
0.10Ω
1W
+
(I
= V /R
BE SEN
)
MAX
24V
1N5252B
1µF
50V
10k
2N3906
V
36V*
1N5258B
S
DS1
2N3904
1/2 LTC1255
10k
FROM
µP, ETC.
IRF530
IN1
G1
GND
12V
1N5242B
*OPTIONAL 36V OVERVOLTAGE SHUTDOWN
18V TO 32V
LOAD
LTC1255 • TA08
Bootstrapped Gate Driver (100Hz < fO < 10kHz)
High-Side Switch with Thermal Shutdown (PTC Thermistor)
9V TO 24V
9V TO 24V
+
+
10µF
1N4148
10µF
PTC*
0.036Ω
THERMISTOR
(100°C)
V
V
S
S
DS1
DS1
100k
0.1µF
1/2 LTC1255
1/2 LTC1255
G1
2N2222
G1
IRF530
FROM
µP, ETC.
FROM
µP, ETC.
IN1
IN1
12V
1N5242B
*
GND
GND
IRFZ44
12V
1N5242B
LOAD
*V = V – 0.6V
GS
*KEYSTONE RL2006-100-100-30-PT
S
(CLAMPED AT 12V)
RISE AND FALL TIMES
ARE BETA TIMES FASTER
LOAD
2N3906
LTC1255 • TA10
LTC1255 • TA09
13
LTC1255
U
TYPICAL APPLICATIO S
H-Bridge DC Motor Driver
(Direction and ON/OFF Control)
9V TO 24V
+
10µF
50V
0.33µF
0.036Ω
100k
V
S
DS1
G1
100k
5V
1N4148
LTC1255
GND
IN1
IN2
DS2
G2
100k
1/4 74C02
1/4 74C02
MTD3055E
MTD3055E
12V
MMBZ5242B
12V
MMBZ5242B
1N4148
DC MOTOR
1/4 74C02
100k
MTD3055EL
1N4148
LTC1255 • TA11
100k
DIRECTION
DISABLE
MTD3055EL
1N4148
High-Side DC Motor Driver With Electronic Braking and
Stalled Motor Shutdown
18V
+
100µF
0.47µF
0.02Ω
100k
5V
1/4 74C02
V
S
DS1
G1
30k
30k
1/4 74C02
IRFZ34
12V
1N5242B
IN1 LTC1255
RUN/COAST
DS2
G2
BRAKE
IN2
1Ω*
GND
18V
DC MOTOR
IRFZ34
1N5400
12V
1N5242B
*SIZE RESISTOR TO DISSIPATE ENERGY
REGENERATED BY MOTOR DURING BRAKING.
LTC1255 • TA12
14
LTC1255
U
TYPICAL APPLICATIO S
Stepper Motor Driver with Overcurrent Protection
12V
+
0.01µF
100k
0.036Ω
100µF
0.036Ω
100k
0.01µF
V
S
V
S
DS1
G1
DS1
5V
IRFR024
IRFR024
12V
G1
A
B
C
D
STEPPER MOTOR WINDINGS
12V
IN1 LTC1255
LTC1255 IN1
A
C
MMBZ5242BL
MMBZ5242BL
DS2
G2
DS2
G2
IRFR024
IRFR024
STEPPER
MOTOR
CONTROL
LOGIC
IN2
IN2
GND
GND
1N4001
B
1N4001
D
12V
MMBZ5242BL
12V
MMBZ5242BL
1N4001
1N4001
LTC1255 • TA13
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC1255
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTIO
N8 Package
8-Lead Plastic DIP
0.400
(10.160)
MAX
8
7
6
5
4
0.250 ± 0.010
(6.350 ± 0.254)
1
2
3
0.130 ± 0.005
0.300 – 0.320
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.128)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.025
0.045 ± 0.015
(1.143 ± 0.381)
0.325
–0.015
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
N8 0393
S8 Package
8-Lead SOIC
0.189 – 0.197
(4.801 – 5.004)
7
5
8
6
0.228 – 0.244
0.150 – 0.157
(5.791 – 6.197)
(3.810 – 3.988)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
SO8 0393
LT/GP 0493 10K REV 0
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
16
●
●
LINEAR TECHNOLOGY CORPORATION 1993
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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