LTC1257CN8#TRPBF [Linear]
IC 12-BIT DAC, Digital to Analog Converter;
| 型号： | LTC1257CN8#TRPBF |
| 厂家： | 
Linear |
| 描述： | IC 12-BIT DAC, Digital to Analog Converter 光电二极管 转换器 |
| 文件： | 总12页 (文件大小：201K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1257
Complete Single Supply
12-Bit Voltage Output
DAC in SO-8
FEATURES
DESCRIPTION
The LTC®1257 is a complete single supply, 12-bit voltage
output D/A converter (DAC) in an SO-8 package. The
LTC1257 includes an output buffer amplifier, 2.048V volt-
age reference and an easy to use 3-wire cascadable serial
interface. An external reference can be used to override
the internal reference and extend the output voltage range
to 12V. The power supply current is a low 350µA when
operating from a 5V supply, making the LTC1257 ideal
for battery-powered applications. The space-saving 8-pin
SO package and operation with no external components
provide the smallest 12-bit D/A system available.
n
8-Pin SO Package
n
Buffered Voltage Output
n
Built-In 2.048V Reference
n
500µV/LSB with 2.048V Full Scale
n
1/2LSB Max DNL Error
n
Guaranteed 12-Bit Monotonic
n
3-Wire Cascadable Serial Interface
n
Wide Single Supply Range: V = 4.75V to 15.75V
CC
n
Low Power: I Typ = 350µA with 5V Supply
CC
APPLICATIONS
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
Digital Offset/Gain Adjustment
n
Industrial Process Control
n
Automatic Test Equipment
TYPICAL APPLICATION
Daisy-Chained Control Outputs
Differential Nonlinearity
vs Input Code
5V
0.5
0.0
0.1µF
V
D
IN
CC
CLK
LTC1257
µP
V
V
CONTROL OUTPUT 1
OUT
LOAD
D
V
GND
OUT
REF
0.1µF
V
D
IN
CC
CLK
LTC1257
CONTROL OUTPUT 2
OUT
LOAD
–0.5
V
D
GND
REF
OUT
0
512 1024 1536 2048 2560 3072 3584 4098
CODE
TO NEXT DAC
1257 TA05
1257 TA01
1257fc
1
LTC1257
ABSOLUTE MAXIMUM RATINGS (Note 1)
V
to GND ............................................. –0.5V to 16.5V
Maximum Junction Temperature
CC
TTL Input Voltage .......................... –0.5V to V + 0.5V
Plastic Package...................................... –65°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
CC
V
................................................ –0.5V to V + 0.5V
OUT
CC
CC
REF ................................................. –0.5V to V + 0.5V
Operating Temperature Range
LTC1257C ................................................ 0°C to 70°C
LTC1257I............................................. –40°C to 85°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
V
V
CLK
CLK
1
2
3
4
8
7
6
5
V
V
1
2
3
4
8
7
6
5
CC
CC
D
D
OUT
IN
IN
OUT
REF
LOAD
LOAD
REF
GND
D
D
GND
OUT
OUT
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
T
= 125°C, θ = 100°C/W
T = 125°C, θ = 150°C/W
JMAX JA
JMAX
JA
ORDER INFORMATION
LEAD FREE FINISH
LTC1257CN8#PBF
LTC1257IN8#PBF
LTC1257CS8#PBF
LTC1257IS8#PBF
TAPE AND REEL
PART MARKING
LTC1257CN8
LTC1257IN8
1257
PACKAGE DESCRIPTION
8-Lead PDIP
TEMPERATURE RANGE
0°C to 70°C
LTC1257CN8#TRPBF
LTC1257IN8#TRPBF
LTC1257CS8#TRPBF
LTC1257IS8#TRPBF
8-Lead PDIP
–40°C to 85°C
0°C to 70°C
8-Lead Plastic SO
8-Lead Plastic SO
1257I
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = TMIN to TMAX. VCC = 4.75V to 15.75V, internal or external reference
(2.475V ≤ VREF ≤ VCC – 2.7V), unless otherwise noted.
SYMBOL
DAC
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
Resolution
12
Bits
LSB
DNL
INL
Differential Nonlinearity
Integral Nonlinearity
Guaranteed Monotonic (Note 4)
0.5
l
l
LTC1257C (Note 4)
LTC1257I (Note 4)
3.5
4.0
LSB
LSB
1257fc
2
LTC1257
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = TMIN to TMAX. VCC = 4.75V to 15.75V, internal or external reference
(2.475V ≤ VREF ≤ VCC – 2.7V), unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
OFF
Offset Error
When Using Internal Reference, LTC1257C
When Using Internal Reference, LTC1257I
8
10
LSB
LSB
l
l
When Using External Reference, LTC1257C
When Using External Reference, LTC1257I
4
5
mV
mV
l
l
OFF
Offset Error Tempco
When Using Internal Reference (Note 2)
When Using External Reference (Note 2)
0.02
15
0.066
30
LSB/°C
µV/°C
TC
l
l
Gain Error
0.5
2
LSB
Gain Error Tempco
(Note 2)
0.01
0.02
LSB/°C
Reference
l
l
Reference Output Voltage
I
I
= 0, LTC1257C
F = 0, LTC1257I
2.028
2.018
2.048
0.06
2.068
2.078
V
V
REF
RE
l
Reference Output Tempco
Reference Line Regulation
I
= 0
LSB/°C
REF
l
l
I
I
= 0, LTC1257C
= 0, LTC1257I
0.4
0.7
LSB/V
LSB/V
REF
REF
l
l
l
Reference Load Regulation
Reference Input Range
0µA ≤ I ≤ 100µA
1
12
18
LSB
V
REF
V
CC
> V + 2.7V
2.475
8
REF
Reference Input Resistance
Reference Input Capacitance
Short-Circuit Current
14
15
kΩ
pF
(Note 2)
Shorted to GND
l
V
90
mA
REF
Power Supply
l
V
Positive Supply Voltage
Supply Current
For Specified Performance
4.75V ≤ V ≤ 5.25V
4.75
15.75
V
CC
l
l
I
CC
350
800
600
1500
µA
µA
CC
4.75V ≤ V ≤ 15.75V
CC
Op Amp DC Performance
Short-Circuit Current Low
l
l
l
V
V
Shorted to GND
60
60
mA
mA
Ω
OUT
Short-Circuit Current High
Output Impedance to GND
Shorted to V
CC
OUT
Input Code = 0
250
500
AC Performance
l
Voltage Output Slew Rate
Voltage Output Settling Time
Digital Feedthrough
5kΩ in Parallel with 100pF
1.0
2.4
V/µs
µs
To 1/2LSB, 5kΩ in Parallel with 100pF, V = 4.75V
6
CC
(Notes 2, 3)
50
nV/s
Digital I/O
l
l
l
l
l
l
V
V
V
V
Digital Input High Voltage
Digital Input Low Voltage
Digital Output High Voltage
Digital Output Low Voltage
Digital Input Leakage
V
V
IH
IL
0.8
I
I
= –1mA, D
Only
V – 1
CC
V
OH
OL
OUT
OUT
OUT
= 1mA, D
Only
0.4
V
OUT
I
V
= GND to V
CC
10
10
µA
pF
LEAK
IN
C
IN
Digital Input Capacitance
(Note 2)
Switching (Note 2)
l
l
l
l
t
1
t
2
t
3
t
4
D
D
Valid to CLK Setup
Valid to CLK Hold
100
25
ns
ns
ns
ns
IN
IN
CLK High Time
CLK Low Time
350
350
1257fc
3
LTC1257
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = TMIN to TMAX. VCC = 4.75V to 15.75V, internal or external reference
(2.475V ≤ VREF ≤ VCC – 2.7V), unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
150
0
TYP
MAX
UNITS
ns
l
l
l
l
t
t
t
t
f
LOAD Pulse Width
LSB CLK to LOAD
LOAD High to CLK
5
ns
6
0
ns
7
D
OUT
Output Delay
C = 15pF
LOAD
35
150
1.4
ns
8
Maximum Clock Frequency
MHz
CLK
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Guaranteed by design; not subject to test.
Note 3: DAC switched from all 1s to all 0s, and all 0s to all 1s code.
Note 4: Guaranteed with internal V or with external V range of
REF
REF
2.475V to 12V. Tested at 10V.
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Supply Voltage
vs Load Current #1
Minimum Supply Voltage
vs Load Current #2
Supply Current vs Temperature
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
15.0
14.5
14.0
13.5
13.0
12.5
12.0
11.5
11.0
0.38
0.37
0.36
0.35
0.34
0.33
0.32
0.31
V
V
T
= INTERNAL
V
V
T
= 10V
REF
OUT
A
REF
OUT
= FULL SCALE
= FULL SCALE
V
= 5.25V
= 25°C
= 25°C
A
CC
V
= 5V
CC
V
= 4.75V
CC
0.01
0.1
1
10
0.01
0.1
1
10
–50 –25
0
25
50
75
100 125
OUTPUT LOAD CURRENT (mA)
OUTPUT LOAD CURRENT (mA)
TEMPERATURE (°C)
1257 G01
1257 G02
1257 G03
Supply Current
vs Logic Input Voltage
Pull-Down Voltage
vs Output Sink Current Capability
Output Swing vs Load Resistance
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1000
100
10
0.59
0.54
0.49
0.44
0.39
0.34
V
A
= 5V
= 25°C
V
= 5V
CC
CC
T
ZERO SCALE
TIED TO V
R
L
CC
FULL SCALE
TIED TO GND
R
HOT
L
COLD
ROOM
1
0.1
1
10
100
1000
0
1
2
3
4
5
10
100
1k
10k
OUTPUT SINK CURRENT (µA)
LOGIC VOLTAGE (V)
LOAD RESISTANCE (Ω)
1257 G05
1257 G06
1257 G04
1257fc
4
LTC1257
TYPICAL PERFORMANCE CHARACTERISTICS
Full-Scale Voltage
vs Temperature
Zero-Scale Voltage
vs Temperature
Integral Nonlinearity (INL)
2.0495
2.0490
2.0485
2.0480
2.0475
2.0470
2.0465
2.0
1.6
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
= 5V
V
= 5V
CC
CC
INTERNAL REFERENCE
INTERNAL REFERENCE
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
–1.6
–2.0
V
= 5V
CC
INTERNAL REFERENCE
= 25°C
T
A
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
0
2048
3072 3584
4096
2560
512 1024 1536
–50 –25
0
25
50
125
75 100
CODE
TEMPERATURE (°C)
1257 G07
1257 G09
1257 G08
Reference Compensation
Resistance vs CL
Differential Nonlinearity (DNL)
Broadband Noise
0.5
0.0
70
60
50
40
30
20
10
0
CODE = FFF
H
BW = 3Hz TO 1MHz
GAIN = 1100×
–0.5
0
512 1024 1536 2048 2560 3072 3584 4098
CODE
TIME = 5ms/DIV
0.01
0.1
1
10
100
1257 G12
C
(µF)
L
1257 TA05
1257 G11
PIN FUNCTIONS
D
(Pin4):Theoutputoftheshiftregisterwhichbecomes
CLK(Pin1):TheTTL levelinputfortheserialinterfaceclock.
OUT
valid on the rising edge of the serial clock. The D
pin
OUT
D
(Pin 2): The TTL level input for the serial interface
IN
is driven from GND to V by an internal CMOS inverter.
CC
data. Data on the D pin is latched into the shift register
IN
Multiple LTC1257s may be cascaded by connecting the
on the rising edge of the serial clock.
D
pin to the D pin of the next chip.
OUT
IN
LOAD (Pin 3): The TTL level input for the serial interface
load control. Data is loaded from the shift register into the
DAC register, thus updating the DAC output when LOAD
is pulled low. The DAC register is transparent as long as
LOAD is held low.
GND (Pin 5): Ground.
REF (Pin 6): The output of the 2.048V reference and the
input to the DAC resistor ladder. An external reference
with voltage from 2.475V to V – 2.7V may be used to
CC
override the internal reference.
1257fc
5
LTC1257
PIN FUNCTIONS
V
(Pin 8): The positive supply input. 4.75V ≤ V
≤
CC
V
(Pin 7): The buffered DAC output is capable of
CC
OUT
15.75V. Requires a bypass capacitor to ground.
sourcing 2mA over temperature while pulling within 2.7V
of V . The output will pull to ground through an internal
CC
250Ω equivalent resistance.
DEFINITIONS
LSB:Theleastsignificantbitortheidealvoltagedifference
between two successive codes.
OUTPUT
VOLTAGE
n
LSB = (V – V )/2 – 1
FS
OS
n
V
V
= The number of digital input bits
0V
NEGATIVE
OFFSET
DAC CODE
= The zero code error or offset of the DAC
= The full-scale output voltage of the DAC
measured when all bits are set to 1
{
OS
FS
1257 F01
Figure 1. Effect of Negative Offset
Resolution: The resolution is the number of DAC output
The offset of the part is measured at the first code that
produces an output voltage 0.5LSB greater than the
previous code:
n
states (2 ) that divide the full-scale range. The resolution
does not imply linearity.
INL:End-pointintegralnonlinearityisthemaximumdevia-
tion from a straight line passing through the end-points of
the DAC transfer curve. Because the part operates from
a single supply and the output cannot go below ground,
the linearity is measured between full-scale and the first
code that guarantees a positive output. The INL error at
a given input code is calculated as follows:
n
V
= V
– [(Code)(V )/(2 – 1)]
OS
OUT
FS
Full-ScaleError:Full-scaleerroristhedifferencebetween
the ideal and measured DAC output voltages with all bits
set to one (Code = 4095). The full-scale error includes the
offset error and is calculated as follows:
FSE = (V
V
V
– V
)/LSB
REF OS
=Thereferencevoltage,eitherinternalorexternal
OUT
IDEAL
–n
= (V )(1 – 2 ) – V
INL = (V
– V
)/LSB
IDEAL
IDEAL
REF
OUT
V
IDEAL
V
OUT
= (Code)(LSB) + V
OS
= The output voltage of the DAC measured at
the given input code
Gain Error: Gain error is the difference between the ideal
and measured slope of the DAC transfer characteristic.
Gain error is equal to full-scale error minus offset error.
DNL: Differential nonlinearity is the difference between
the measured change and the ideal 1LSB change between
any two adjacent codes. The DNL error between any two
codes is calculated as follows:
Digital Feedthrough: The glitch that appears at the analog
outputcausedbyACcouplingfromthedigitalinputswhen
they change state. The area of the glitch is specified in
(nV)(sec).
DNL = (∆V
– LSB)/LSB
OUT
∆V
= The measured voltage difference between two
OUT
adjacent codes
Offset Error: The theoretical voltage at the output when
the DAC is loaded with all zeros. The output amplifier can
have a true negative offset, but because the part is oper-
ated from a single supply, the output cannot go below
ground. If the offset is negative, the output will remain
near 0V resulting in the transfer curve shown in Figure 1.
1257fc
6
LTC1257
BLOCK DIAGRAM
LOGIC
5V REGULATOR
V
D
CC
SUPPLY
CLK
12-BIT
SHIFT REGISTER
OUT
D
IN
12
GND
LOAD
12-BIT LATCH
12
REF
+
–
2.048V REFERENCE
DAC
V
OUT
1257 BD
TIMING DIAGRAM
t
t
t
t
2
1
6
7
CLK
t
t
3
4
B11
MSB
B0
LSB
B10
B1
D
IN
t
5
LOAD
t
8
B11
B11
D
B1
B10
B0
OUT
(PREVIOUS WORD)
CURRENT WORD
1257 TD
1257fc
7
LTC1257
OPERATION
Serial Interface
Reference
The LTC1257 includes an internal 2.048V reference, mak-
ing 1LSB equal to 500µV. The internal reference output
is turned off when the pin is forced above the reference
voltage, allowing an external reference to be connected to
the reference pin. The external reference must be greater
The data on the D input is loaded into the shift register
IN
on the rising edge of the clock. The MSB is loaded first
and the LSB last. The DAC register loads the data from
the shift register when LOAD is pulled low, and remains
transparentuntilLOADispulledhighandthedataislatched.
than 2.475V and less than V – 2.7V, and be capable of
CC
An internal 5V regulator provides the supply for the digital
logic. By limiting the internal digital signal swings to 5V,
digital noise is reduced. The buffered output of the 12-bit
driving the 10k minimum DAC resistor ladder.
If the reference output is driving a large capacitive load, a
series resistor must be added to insure stability. For any
capacitive load greater than 1µF, a 10Ω series resistor
will suffice.
shift register is available on the D
pin which will swing
OUT
from GND to V .
CC
Multiple LTC1257s may be daisy chained together by
connecting the D pin to the D pin of the next chip,
OUT
IN
Voltage Output
while the clock and load signals remain common to all
chips in the daisy chain. The serial data is clocked to all
of the chips, then the LOAD signal is pulled low to update
all of them simultaneously. The maximum clocking rate
is 1.4MHz.
The LTC1257 voltage output is able to pull within 2.7V of
V
CC
while sourcing 2mA. A internal NMOS transistor with
a 200Ω equivalent impedance pulls the output to ground.
The output is protected against short circuits and is able
to drive up to a 500pF capacitive load without oscillation.
If digital noise on the output causes a problem, a simple
100Ω, 0.1µF RC circuit can be used to filter the noise.
TYPICAL APPLICATIONS
DAC with External Reference
Filtering VREF and VOUT
15V
V
CC
IN
0.1µF
LT1021-10
GND
0.1µF
OUT
D
V
IN
CC
100Ω
5%
CLK
V
V
OUT
LTC1257
GND
OUT
V
D
IN
V
CC
LOAD
REF
CLK
0.1µF
D
OUT
V
REF
LTC1257
µP
V
CONTROL OUTPUT
OUT
LOAD
1µF
D
1257 TA06
GND
OUT
10Ω
5%
1257 TA03
1257fc
8
LTC1257
TYPICAL APPLICATIONS
Auto Ranging 8-Channel ADC with Shutdown
22µF
5V
V
CC
CH0
CS
8 ANALOG
INPUT CHANNELS
D
•
•
•
OUT
µP
LTC1296
CLK
D
CH7
IN
COM
REF
+
–
REF
SSO
50k
50k
5V
74HC04
0.1µF
100Ω
V
D
IN
CC
CLK
LTC1257
V
OUT
LOAD
0.1µF
D
V
GND
OUT
REF
V
D
IN
CC
100Ω
0.1µF
CLK
LTC1257
V
OUT
LOAD
1257 TA02
D
GND
V
REF
OUT
12-Bit Single 5V Control System with Shutdown
5V
100k
10k
10µF
2N3906
CB/POWER DOWN
CLK
V
CC
–IN
+IN
CS
D
0.1µF
V
OUT
IN
DATA
µP
J
–
+
CLK
DAC LOAD
LTC1297
ADC
LT1025A
GND COMMON
V
REF
GND
+
–
47k
1µF
10µF
LTC1050
74k
1µF
100k
V
D
IN
V
CC
REF
CLK
CONTROL
OUTPUT
LTC1257
V
OUT
1257 TA04
1k
LOAD
D
GND
OUT
1257fc
9
LTC1257
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
N Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
.400*
(10.160)
MAX
.130 ±.005
.300 – .325
.045 – .065
(3.302 ±0.127)
(1.143 – 1.651)
(7.620 – 8.255)
8
1
7
6
5
.065
(1.651)
TYP
.255 ±.015*
(6.477 ±0.381)
.008 – .015
(0.203 – 0.381)
.120
.020
(0.508)
MIN
(3.048)
MIN
+.035
–.015
2
4
3
.325
.018 ±.003
(0.457 ±0.076)
.100
(2.54)
BSC
N8 REV I 0711
+0.889
8.255
(
)
–0.381
NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.189 – .197
(4.801 – 5.004)
.045 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
SO8 REV G 0212
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10
LTC1257
REVISION HISTORY (Revision history begins at Rev C)
REV
DATE
DESCRIPTION
PAGE NUMBER
C
12/12 Removed MAX Voltage Output Settling Time value in Electrical Characteristics section
3
1257fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1257
TYPICAL APPLICATION
Driving LTC1257 with Opto-Isolators
12V
LT1021-5
V
OUT
V
IN
2k
5%
2k
5%
2k
5%
0.1µF
CLK
V
V
REF
CC
MOC5008
6
D
IN
V
V
OUT
1
2
OUT
LTC1257
GND
CLK
LOAD
4
5
D
OUT
MOC5008
MOC5008
6
4
5
1
2
D
IN
6
4
5
1
2
LOAD
1257 TA07
RELATED PARTS
PART NUMBER
12 Bit
DESCRIPTION
COMMENTS
LTC1446: V = 4.5V to 5.5V, V
LTC1446/LTC1446L Dual 12-Bit V
DACs in SO-8 Package
= 0V to 4.095V
OUT
OUT
OUT
CC
LTC1446L: V = 2.7V to 5.5V, V
= 0V to 2.5V
CC
LTC1448
Dual 12-Bit V
DAC in SO-8 Package, V : 2.7V to 5.5V
Output Swings from GND to REF, REF Input Can Be
Tied to V
OUT
CC
CC
LTC1450/LTC1450L Single 12-Bit V
DACs with Parallel Interface
LTC1450: V = 4.5V to 5.5V, V
= 0V to 4.095V
OUT
OUT
CC
OUT
LTC1450L: V = 2.7V to 5.5V, V
= 0V to 2.5V
CC
LTC1451
LTC1452
LTC1453
Single Rail-to-Rail 12-Bit V
DAC, Full Scale: 4.095V, V : 4.5V to 5.5V, Low Power, Complete V
DAC in SO-8 Package
OUT
OUT
CC
Internal 2.048V Reference Brought Out to Pin
Single Rail-to-Rail 12-Bit V
Multiplying DAC, V : 2.7V to 5.5V
Low Power, Multiplying V
Buffer Amplifier in SO-8 Package
3V, Low Power, Complete V DAC in SO-8 Package
DAC with Rail-to-Rail
OUT
CC
OUT
Single Rail-to-Rail 12-Bit V
DAC, Full Scale: 2.5V, V : 2.7V to 5.5V
OUT
CC
OUT
LTC1454/LTC1454L Dual 12-Bit V
DACs in SO-16 Package with Added Functionality
LTC1454: V = 4.5V to 5.5V, V
= 0V to 4.095V
OUT
OUT
CC
OUT
LTC1454L: V = 2.7V to 5.5V, V
= 0V to 2.5V
CC
LTC1456
Single Rail-to-Rail Output 12-Bit DAC with Clear Pin, Full Scale: 4.095V,
: 4.5V to 5.5V
Low Power, Complete V
DAC in SO-8 Package with
OUT
V
Clear Pin
CC
LTC1458/LTC1458L Quad 12 Bit Rail-to-Rail Output DACs with Added Functionality
LTC1458: V = 4.5V to 5.5V, V
= 0V to 4.095V
OUT
CC
OUT
LTC1458L: V = 2.7V to 5.5V, V
= 0V to 2.5V
CC
LTC1659
Single Rail-to-Rail 12-Bit V
CC
DAC in MSOP-8 Package,
Output Swings from GND to REF, REF Input Can Be
Tied to V
OUT
V
= 2.7V to 5.5V
CC
14 Bit
LTC1658
14-Bit Rail-to-Rail Micropower DAC in MSOP, V = 2.7V to 5.5V
Output Swings from GND to REF, REF Input Can Be
Tied to V
CC
CC
LTC1654
16 Bit
Dual 14-Bit V
DAC
Programmable Speed/Power, SO-8 Footprint
OUT
LTC1655(L)
Single 16-Bit V
DAC with Serial Interface in SO-8
V
V
= 5V (3V), Low Power, Deglitched,
OUT
OUT
CC
= 0V to 4.096V (0V to 2.5V)
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LT 1212 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
LINEAR TECHNOLOGY CORPORATION 1994
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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