LTC1605IG#TRPBF [Linear]
LTC1605 - 16-Bit, 100ksps, Sampling ADC; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C;
| 型号： | LTC1605IG#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC1605 - 16-Bit, 100ksps, Sampling ADC; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C 光电二极管 转换器 |
| 文件： | 总18页 (文件大小：382K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1605
16-Bit, 100ksps,
Sampling ADC
FEATURES
DESCRIPTION
TheLTC®1605isa100ksps,sampling16-bitA/Dconverter
that draws only 55mW (typical) from a single 5V supply.
This easy-to-use device includes sample-and-hold, preci-
sionreference,switchedcapacitorsuccessiveapproxima-
tion A/D and trimmed internal clock.
n
Single 5V Supply
n
Bipolar Input Range: 10V
n
Power Dissipation: 55mW Typ
n
Guaranteed No Missing Codes
n
Sample Rate: 100ksps
n
Integral Nonlinearity: ±±.0LSB Max
The LTC1605’s input range is an industry standard ±10V.
Maximum DC specs include ±±.0LSB INL and 16-bits no
missingcodesovertemperature.Anexternalreferencecan
be used if greater accuracy over temperature is needed.
n
Signal-to-Noise Ratio: 86dB Typ
n
Operates with Internal or External Reference
n
Internal Synchronized Clock
n
Improved ±nd Source to ADS7805 and AD976
n
The ADC has a microprocessor compatible, 16-bit or two-
byte parallel output port. A convert start input and a data
ready signal (BUSY) ease connections to FIFOs, DSPs and
microprocessors.
±8-Lead SSOP and SW Packages
APPLICATIONS
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Industrial Process Control
Technology Corporation. All other trademarks are the property of their respective owners.
n
Multiplexed Data Acquisition Systems
n
High Speed Data Acquisition for PCs
Digital Signal Processing
n
TYPICAL APPLICATION
Typical INL Curve
Low Power, 100kHz, 16-Bit Sampling ADC on 5V Supply
5V
2.0
10μF
0.1μF
1.5
1.0
28
27
V
V
DIG ANA
6 TO 13
15 TO 22
0.5
16-BIT
200Ω
33.2k
20k
V
IN
1
10V
INPUT
16-BIT
OR 2 BYTE
PARALLEL
BUS
0
D15 TO D0
SAMPLING ADC
–0.5
–1.0
–1.5
–2.0
4k
10k
CAP
REF
4
3
26
25
BUSY
CS
2.2μF
2.2μF
BUFFER
4k
DIGITAL
CONTROL
SIGNALS
CONTROL
LOGIC AND
TIMING
32768
CODE
0
16384
49152
65535
R/C 24
REFERENCE
1605 • TA02
BYTE
23
AGND1 AGND2
DGND
14
1605 • TA01
2
5
1605fd
1
For more information www.linear.com/LTC1605
LTC1605
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2)
TOP VIEW
V
V
V
..........................................................................7V
ANA
DIG
DIG
V
1
2
3
4
5
6
7
8
9
28
27
V
V
IN
DIG
to V
............................................................0.3V
ANA
AGND1
REF
ANA
...........................................................................7V
26 BUSY
25 CS
24 R/C
23 BYTE
22 D0
21 D1
20 D2
19 D3
18 D4
17 D5
16 D6
15 D7
Ground Voltage Difference
DGND, AGND1 and AGND±................................±0.3V
Analog Inputs (Note 3)
CAP
AGND2
D15 (MSB)
D14
V
.....................................................................±±5V
IN
CAP............................. V
+ 0.3V to AGND± – 0.3V
ANA
D13
REF ....................................Indefinite Short to AGND±
D12
.......................................... Momentary Short to V
D11 10
D10 11
D9 12
ANA
Digital Input Voltage (Note 4)..........DGND – 0.3V to 10V
Digital Output Voltage........ V
– 0.3V to V + 0.3V
DGND
DIG
D8 13
Power Dissipation.............................................. 500mW
DGND 14
Operating Ambient Temperature Range
LTC1605C ................................................ 0°C to 70°C
LTC1605I .............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
OBSOLETE PACKAGE
N PACKAGE
G PACKAGE
28-LEAD PLASTIC SSOP
SW PACKAGE
28-LEAD PLASTIC SO WIDE
28-LEAD PDIP
T
T
T
= 125°C, θ = 95°C/W (G)
JA
JMAX
JMAX
JMAX
= 125°C, θ = 130°C/W (N)
JA
= 125°C, θ = 130°C/W (SW)
JA
EXPOSED PAD (PIN #) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC1605ACG#PBF
LTC1605AIG#PBF
LTC1605CG#PBF
LTC1605IG#PBF
TAPE AND REEL
PART MARKING
1605ACG
1605AIG
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC1605ACG#TRPBF
LTC1605AIG#TRPBF
LTC1605CG#TRPBF
LTC1605IG#TRPBF
LTC1605ACSW#TRPBF
LTC1605AISW#TRPBF
LTC1605CSW#TRPBF
LTC1605ISW#TRPBF
±8-Lead Plastic SSOP
±8-Lead Plastic SSOP
±8-Lead Plastic SSOP
±8-Lead Plastic SSOP
±8-Lead Plastic SO Wide
±8-Lead Plastic SO Wide
±8-Lead Plastic SO Wide
±8-Lead Plastic SO Wide
0°C to 70°C
–40°C to 85°C
0°C to 70°C
1605CG
1605IG
–40°C to 85°C
0°C to 70°C
LTC1605ACSW#PBF
LTC1605AISW#PBF
LTC1605CSW#PBF
LTC1605ISW#PBF
1605ACSW
1605AISW
1605CSW
1605ISW
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
OBSOLETE PACKAGE
LTC1605CN#PBF
LTC1605IN#PBF
LTC1605CN#TRPBF
LTC1605IN#TRPBF
1605CN
1605IN
±8-Lead PDIP
±8-Lead PDIP
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
1605fd
2
For more information www.linear.com/LTC1605
LTC1605
CONVERTER CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 6)
LTC1605
TYP
LTC1605A
TYP
PARAMETER
CONDITIONS
MIN
16
MAX
MIN
16
MAX
UNITS
Bits
l
l
Resolution
No Missing Codes
Transition Noise
15
16
Bits
1.0
1.0
LSB
l
l
Integral Linearity Error
Bipolar Zero Error
(Note 7)
±3
±±
LSB
mV
Ext. Reference = ±.5V (Note 8)
±10
±10
Bipolar Zero Error Drift
Full-Scale Error Drift
Full-Scale Error
±±
±7
±±
±5
ppm/°C
ppm/°C
%
l
Ext. Reference = ±.5V (Notes 1±, 13)
Ext. Reference = ±.5V
±0.50
±8
±0.±5
±8
Full-Scale Error Drift
±±
±±
ppm/°C
LSB
Power Supply Sensitivity
V
= 5V ±5% (Note 9)
DD
V
= V = V
DIG DD
ANA
The l denotes the specifications which apply over the full operating temperature range, otherwise
ANALOG INPUT
specifications are at TA = 25°C. (Note 5)
CONDITIONS
LTC1605/LTC1605A
SYMBOL
PARAMETER
MIN
TYP
±10
10
MAX
UNITS
V
l
V
IN
C
IN
Analog Input Range (Note 9)
Analog Input Capacitance
Analog Input Impedance
4.75V ≤ V
≤ 5.±5V, 4.75V ≤ V ≤ 5.±5V
ANA DIG
pF
R
IN
±0
kΩ
DYNAMIC ACCURACY (Notes 5, 14)
LTC1605/LTC1605A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
87.5
87
MAX
UNITS
dB
S/(N + D)
Signal-to-(Noise + Distortion) Ratio
1kHz Input Signal (Note 14)
10kHz Input Signal
dB
±0kHz, –60dB Input Signal
1kHz Input Signal, First 5 Harmonics
10kHz Input Signal, First 5 Harmonics
1kHz Input Signal
30
dB
THD
Total Harmonic Distortion
–10±
–94
–10±
–94
±75
40
dB
dB
Peak Harmonic or Spurious Noise
dB
10kHz Input Signal
dB
Full-Power Bandwidth
Aperture Delay
(Note 15)
kHz
ns
Aperture Jitter
Sufficient to Meet AC Specs
Transient Response
Overvoltage Recovery
Full-Scale Step (Note 9)
(Note 16)
±
µs
ns
150
1605fd
3
For more information www.linear.com/LTC1605
LTC1605
INTERNAL REFERENCE CHARACTERISTICS
The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)
LTC1605/LTC1605A
PARAMETER
CONDITIONS
MIN
TYP
±.500
±5
MAX
UNITS
l
V
REF
V
REF
Output Voltage
Output Tempco
I
I
= 0
= 0
±.470
±.5±0
V
OUT
OUT
ppm/°C
Internal Reference Source Current
External Reference Voltage for Specified Linearity
External Reference Current Drain
CAP Output Voltage
1
µA
V
(Notes 9, 10)
±.30
±.50
±.70
100
l
Ext. Reference = ±.5V (Note 9)
µA
V
I
= 0
±.50
OUT
The l denotes the specifications which apply over the full operating
DIGITAL INPUTS AND OUTPUTS
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
LTC1605/LTC1605A
TYP
SYMBOL PARAMETER
CONDITIONS
MIN
MAX
UNITS
V
l
l
l
V
V
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
V
DD
V
DD
V
IN
= 5.±5V
= 4.75V
= 0V to V
±.4
IH
IL
0.8
V
I
±10
µA
pF
V
IN
DD
C
V
Digital Input Capacitance
High Level Output Voltage
5
IN
V
V
V
= 4.75V
= 4.75V
I = –10µA
4.5
OH
DD
O
l
I = –±00µA
O
4.0
V
V
Low Level Output Voltage
I = 160µA
O
0.05
0.10
V
OL
DD
l
l
l
I = 1.6mA
O
0.4
±10
15
V
I
Hi-Z Output Leakage D15 to D0
= 0V to V , CS High
µA
pF
mA
mA
OZ
OUT
DD
C
Hi-Z Output Capacitance D15 to D0 CS High (Note 9)
OZ
I
I
Output Source Current
Output Sink Current
V
OUT
V
OUT
= 0V
–10
10
SOURCE
SINK
= V
DD
1605fd
4
For more information www.linear.com/LTC1605
LTC1605
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
LTC1605/LTC1605A
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
kHz
µs
l
l
l
l
l
l
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Maximum Sampling Frequency
Conversion Time
100
SAMPLE(MAX)
8
±
CONV
Acquisition Time
µs
ACQ
1
Convert Pulse Width
(Note 11)
(Note 9)
40
ns
Data Valid Delay After R/C↓
BUSY Delay from R/C↓
BUSY Low
8
65
8
µs
±
C = 50pF
L
ns
3
µs
4
BUSY Delay After End of Conversion
Aperture Delay
±±0
40
ns
5
ns
6
l
l
Bus Relinquish Time
10
50
35
83
ns
7
BUSY Delay After Data Valid
Previous Data Valid After R/C↓
R/C to CS Setup Time
Time Between Conversions
Bus Access and Byte Delay
±00
7.4
ns
8
µs
9
(Notes 9, 10)
(Notes 9, 10)
10
10
10
ns
10
11
1±
µs
83
ns
The l denotes the specifications which apply over the full operating temperature
POWER REQUIREMENTS
range, otherwise specifications are at TA = 25°C. (Note 5)
LTC1605/LTC1605A
TYP
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
5.±5
16
UNITS
V
V
Positive Supply Voltage
Positive Supply Current
Power Dissipation
(Notes 9, 10)
4.75
DD
l
I
DD
11
55
mA
P
80
mW
DIS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with DGND, AGND1
and AGND± wired together (unless otherwise noted).
Note 8: Bipolar offset is the offset voltage measured from –0.5LSB when the
output code flickers between 0000 0000 0000 0000 and 1111 1111 1111 1111.
Note 9: Guaranteed by design, not subject to test.
Note 10: Recommended operating conditions.
Note 11: With CS low the falling R/C edge starts a conversion. If R/C
returns high at a critical point during the conversion it can create small
errors. For best results ensure that R/C returns high within 3µs after the
start of the conversion.
Note 12: As measured with fixed resistors shown in Figure 4. Adjustable to
zero with external potentiometer.
Note 13: Full-scale error is the worst-case of –FS or +FS untrimmed
deviation from ideal first and last code transitions, divided by the transition
voltage (not divided by the full-scale range) and includes the effect of
offset error.
Note 3: When these pin voltages are taken below ground or above V
ANA
= V = V , they will be clamped by internal diodes. This product can
DIG
DD
handle input currents of greater than 100mA below ground or above V
without latch-up.
DD
Note 4: When these pin voltages are taken below ground, they will be
clamped by internal diodes. This product can handle input currents of
90mA below ground without latchup. These pins are not clamped to V
.
DD
Note 5: V = 5V, f
= 100kHz, t = t = 5ns unless otherwise specified.
r f
DD
SAMPLE
Note 6: Linearity, offset and full-scale specifications apply for a V input
with respect to ground.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual end points of the transfer curve.
The deviation is measured from the center of the quantization band.
IN
Note 14: All specifications in dB are referred to a full-scale ±10V input.
Note 15: Full-power bandwidth is defined as full-scale input frequency at which
a signal-to-(noise + distortion) degrades to 60dB or 10 bits of accuracy.
Note 16: Recovers to specified performance after (± • FS) input
overvoltage.
1605fd
5
For more information www.linear.com/LTC1605
LTC1605
TYPICAL PERFORMANCE CHARACTERISTICS
Change in CAP Voltage
vs Load Current
Supply Current vs Supply Voltage
Supply Current vs Temperature
12.5
12.0
0.05
0.04
0.03
0.02
0.01
12.0
11.5
11.0
10.5
f
= 100kHz
f
= 100kHz
SAMPLE
SAMPLE
0
11.5
11.0
–0.01
–0.02
–0.03
–0.04
–0.05
–0.06
–0.07
–0.08
–0.09
–0.10
10.5
10.0
9.5
10.0
4.50
4.75
5.00
5.25
5.50
–80 –70 –60 –50 –40 –30 –20 –10
LOAD CURRENT (mA)
0
10
–50 –25
0
25
50
75
100
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
1605 • TPC01
1605 • TPC03
1605 • TPC02
Power Supply Feedthrough vs
Ripple Frequency
Typical INL Curve
Typical DNL Curve
2.0
1.5
2.0
1.5
–20
–30
–40
–50
–60
–70
1.0
1.0
0.5
0.5
0
0
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–2.0
32768
CODE
32768
CODE
0
16384
49152
65535
0
16384
49152
65535
1
10
100
1k
10k 100k
1M
RIPPLE FREQUENCY (Hz)
1605 • TPC05
1605 • TPC04
1605 • TPC06
LTC1605 Nonaveraged 4096 Point FFT Plot
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
5
10
15
20
25
30
35
40
45
50
FREQUENCY (kHz)
1605 • TPC07
1605fd
6
For more information www.linear.com/LTC1605
LTC1605
TYPICAL PERFORMANCE CHARACTERISTICS
Total Harmonic Distortion vs
Input Frequency
SINAD vs Input Frequency
90
89
88
87
86
85
84
83
82
81
–70
–80
–90
–100
–110
1
10
100
1
10
100
INPUT FREQUENCY (kHz)
INPUT FREQUENCY (kHz)
1605 • TPC08
1605 • TPC09
PIN FUNCTIONS
V (Pin1):AnalogInput.Connectthrougha±00Ωresis-
R/C (Pin 24): Read/Convert Input. With CS low, a falling
edge on R/C puts the internal sample-and-hold into the
hold state and starts a conversion. With CS low, a rising
edge on R/C enables the output data bits.
IN
tor to the analog input. Full-scale input range is ±10V.
AGND1(Pin 2): Analog Ground.Tie to analog ground plane.
REF(Pin3):±.5VReferenceOutput.Bypasswith±.±µFtan-
talum capacitor. Can be driven with an external reference.
CS(Pin25):ChipSelect.InternallyOR’dwithR/C.WithR/C
low, a falling edge on CS will initiate a conversion. With
R/C high, a falling edge on CS will enable the output data.
CAP(Pin4):ReferenceBufferOutput. Bypasswith±.±µF
tantalum capacitor.
BUSY (Pin 26): Output Shows Converter Status. It is low
when a conversion is in progress. Data valid on the rising
edge of BUSY. CS or R/C must be high when BUSY rises
or another conversion will start without time for signal
acquisition.
AGND2(Pin5):AnalogGround.Tietoanaloggroundplane.
D15 to D8 (Pins 6 to 13): Three-State Data Outputs. Hi-Z
state when CS is high or when R/C is low.
DGND (Pin 14): Digital Ground.
V
(Pin 27): 5V Analog Supply. Bypass to ground with
ANA
D7 to D0 (Pins 15 to 22): Three-State Data Outputs. Hi-Z
state when CS is high or when R/C is low.
a 0.1µF ceramic and a 10µF tantalum capacitor.
V
DIG
(Pin28):5VDigitalSupply.ConnectdirectlytoPin±7.
BYTE (Pin 23): Byte Select. With BYTE low, data will be
output with Pin 6 (D15) being the MSB and Pin ±± (D0)
being the LSB. With BYTE high the upper eight bits and
the lower eight bits will be switched. The MSB is output
on Pin 15 and bit 8 is output on Pin ±±. Bit 7 is output
on Pin 6 and the LSB is output on Pin 13.
1605fd
7
For more information www.linear.com/LTC1605
LTC1605
TEST CIRCUIT
Load Circuit for Access Timing
Load Circuit for Output Float Delay
5V
5V
1k
1k
DBN
DBN
DBN
DBN
1k
C
C
1k
50pF
50pF
L
L
LTC1605 • TC02
LTC1605 • TC01
A. V TO HI-Z
OH
B. V TO HI-Z
OL
A. HI-Z TO V AND V TO V
B. HI-Z TO V AND V TO V
OL OH
OH
OL
OH
OL
FUNCTIONAL BLOCK DIAGRAM
C
SAMPLE
SAMPLE
20k
V
IN
V
V
ANA
DIG
10k
4k
C
ZEROING SWITCHES
4k
REF
2.5V REF
+
REF BUF
COMP
16-BIT CAPACITIVE DAC
–
CAP
(2.5V)
16
D15
D0
SUCCESSIVE APPROXIMATION
REGISTER
•
•
•
OUTPUT LATCHES
AGND1
AGND2
DGND
INTERNAL
CLOCK
CONTROL LOGIC
LTC1605 • BD
CS
R/C
BYTE
BUSY
1605fd
8
For more information www.linear.com/LTC1605
LTC1605
APPLICATIONS INFORMATION
Conversion Details
the end of a conversion, the DAC output balances the V
IN
input charge. The SAR contents (a 16-bit data word) that
The LTC1605 uses a successive approximation algo-
rithm and an internal sample-and-hold circuit to convert
an analog signal to a 16-bit or two byte parallel output.
The ADC is complete with a precision reference and an
internal clock. The control logic provides easy interface
to microprocessors and DSPs. (Please refer to the Digital
Interface section for the data format.)
representstheV areloadedintothe16-bitoutputlatches.
IN
Driving the Analog Inputs
The nominal input range for the LTC1605 is ±10V
or (±4 • V ) and the input is overvoltage protected to
REF
±±5V. The input impedance is typically ±0kΩ, therefore, it
should be driven with a low impedance source. Wideband
noise coupling into the input can be minimized by placing
a 1000pF capacitor at the input as shown in Figure ±. An
NPO-type capacitor gives the lowest distortion. Place the
capacitor as close to the device input pin as possible. If
an amplifier is to be used to drive the input, care should
be taken to select an amplifier with adequate accuracy,
linearity and noise for the application. The following list
is a summary of the op amps that are suitable for driving
the LTC1605. More detailed information is available at
www.linear.com.
Conversion start is controlled by the CS and R/C inputs.
At the start of conversion the successive approximation
register(SAR)isreset. Onceaconversioncyclehasbegun
it cannot be restarted.
During the conversion, the internal 16-bit capacitive DAC
output is sequenced by the SAR from the most significant
bit (MSB) to the least significant bit (LSB). Referring to
Figure1,V isconnectedthroughtheresistordividertothe
IN
sample-and-hold capacitor during the acquire phase and
the comparator offset is nulled by the autozero switches.
In this acquire phase, a minimum delay of ±µs will provide
enough time for the sample-and-hold capacitor to acquire
the analog signal. During the convert phase, the autozero
switches open, putting the comparator into the compare
200Ω
A
IN
V
IN
1000pF
33.2k
CAP
mode. The input switch switches C
to ground,
1605 • F02
SAMPLE
injecting the analog input charge onto the summing junc-
tion. This input charge is successively compared with the
binary-weighted charges supplied by the capacitive DAC.
Bit decisions are made by the high speed comparator. At
Figure 2. Analog Input Filtering
LT®1007: Low noise precision amplifier. ±.7mA supply
current ±5V to ±15V supplies. Gain bandwidth product
8MHz. DC applications.
SAMPLE
LT1097: Low cost, low power precision amplifier. 300µA
supply current. ±5V to ±15V supplies. Gain bandwidth
product 0.7MHz. DC applications.
SI
C
SAMPLE
R
SAMPLE
HOLD
IN1
V
–
+
IN
LT1227: 140MHz video current feedback amplifier. 10mA
supply current. ±5V to ±15V supplies. Low noise and low
distortion.
R
IN2
C
V
DAC
DAC
COMPARATOR
DAC
S
A
R
LT1360: 37MHzvoltagefeedbackamplifier.3.8mAsupply
current. ±5V to ±15V supplies. Good AC/DC specs.
LT1363:50MHzvoltagefeedbackamplifier. 6.3mAsupply
current. Good AC/DC specs.
16-BIT
LATCH
1605 • F01
Figure 1. LTC1605 Simplified Equivalent Circuit
LT1364/LT1365: Dual and quad 50MHz voltage feedback
amplifiers. 6.3mA supply current per amplifier. Good AC/
DC specs.
1605fd
9
For more information www.linear.com/LTC1605
LTC1605
APPLICATIONS INFORMATION
Internal Voltage Reference
is adjusted until the output code is changing between 0111
1111 1111 1110 and 0111 1111 1111 1111. Figure 6 shows
the bipolar transfer characteristic of the LTC1605.
The LTC1605 has an on-chip, temperature compensated,
curvature corrected, bandgap reference, which is factory
trimmed to ±.50V. The full-scale range of the ADC is
1
V
10V INPUT
IN
2
equal to (±4 • V ) or nominally ±10V. The output of the
200Ω
1%
REF
AGND1
reference is connected to the input of a unity-gain buffer
througha4kresistor(seeFigure3). Theinputtothebuffer
or the output of the reference is available at REF (Pin 3).
The internal reference can be overdriven with an external
reference if more accuracy is needed. The buffer output
drives the internal DAC and is available at CAP (Pin 4). The
CAP pin can be used to drive a steady DC load of less than
±mA. Driving an AC load is not recommended because it
can cause the performance of the converter to degrade.
2.2μF
+
LTC1605
33.2k
1%
3
4
REF
CAP
+
2.2μF
5
AGND2
1605 • F04
Figure 4. 10V Input Without Trim
1
V
IN
10V INPUT
2
200Ω
AGND1
1%
2.2μF
+
4k
3
REF
(2.5V)
BANDGAP
REFERENCE
3
33.2k
1%
REF
CAP
5V
LTC1605
V
ANA
2.2μF
576k
+
–
R4
50k
4
5
+
R3
50k
2.2μF
4
AGND2
CAP
(2.5V)
1605 • F05
INTERNAL
CAPACITOR
DAC
2.2μF
Figure 5. 10V Input with Offset and Gain Trim
1605 • F03
011...111
BIPOLAR
ZERO
011...110
Figure 3. Internal or External Reference Source
000...001
000...000
111...111
111...110
For minimum code transition noise the REF pin and the
CAP pin should each be decoupled with a capacitor to
filter wideband noise from the reference and the buffer
(±.±µF tantalum).
100...001
100...000
FS = 20V
1LSB = FS/65536
Offset and Gain Adjustments
–1 0V
1
LSB
–FS/2
FS/2 – 1LSB
The LTC1605 offset and full-scale errors have been trimmed
at the factory with the external resistors shown in Figure 4.
This allows for external adjustment of offset and full scale in
applicationswhereabsoluteaccuracyisimportant.SeeFigure
5 for the offset and gain trim circuit. First adjust the offset
to zero by adjusting resistor R3. Apply an input voltage of
–15±.6mV (–0.5LSB) and adjust R3 so the code is changing
between 1111 1111 1111 1111 and 0000 0000 0000 0000.
The gain error is trimmed by adjusting resistor R4. An input
LSB
INPUT VOLTAGE (V)
1605 • F06
Figure 6. LTC1605 Bipolar Transfer Characteristics
DC Performance
One way of measuring the transition noise associated
with a high resolution ADC is to use a technique where
a DC signal is applied to the input of the ADC and the
resulting output codes are collected over a large number
of conversions. For example in Figure 7 the distribution of
voltage of 9.99954±V (+FS –1.5LSB)is applied to V and R4
IN
1605fd
10
For more information www.linear.com/LTC1605
LTC1605
TYPICAL APPLICATIONS
outputcodeisshownforaDCinputthathasbeendigitized
10000 times. The distribution is Gaussian and the RMS
code transition is about 1LSB.
Timing and Control
Conversion start and data read are controlled by two
digital inputs: CS and R/C. To start a conversion and put
the sample-and-hold into the hold mode bring CS and
R/C low for no less than 40ns. Once initiated it cannot be
restarteduntiltheconversioniscomplete.Converterstatus
is indicated by the BUSY output and this is low while the
conversion is in progress.
4500
4000
3500
3000
2500
2000
1500
1000
500
Therearetwomodesofoperation.Thefirstmodeisshown
in Figure 8. The digital input R/C is used to control the
start of conversion. CS is tied low. When R/C goes low
the sample-and-hold goes into the hold mode and a con-
version is started. BUSY goes low and stays low during
the conversion and will go back high after the conversion
has been completed and the internal output shift registers
havebeenupdated.R/Cshouldremainlowfornolessthan
40ns. During the time R/C is low the digital outputs are in
a Hi-Z state. R/C should be brought back high within 3µs
after the start of the conversion to ensure that no errors
occur in the digitized result. The second mode, shown in
Figure 9, uses the CS signal to control the start of a con-
version and the reading of the digital output. In this mode
the R/C input signal should be brought low no less than
10ns before the falling edge of CS. The minimum pulse
width for CS is 40ns. When CS falls, BUSY goes low and
will stay low until the end of the conversion. BUSY will go
high after the conversion has been completed. The new
data is valid when CS is brought back low again to initiate
0
–5 –4 –3 –2 –1
0
1
2
3
4
5
CODE
1605 • F07
Figure 7. Histogram for 10000 Conversions
DIGITAL INTERFACE
Internal Clock
The ADC has an internal clock that is trimmed to achieve
a typical conversion time of 7µs. No external adjustments
are required and, with the typical acquisition time of 1µs,
throughput performance of 100ksps is assured.
t
1
R/C
t
11
t
2
t
4
t
3
BUSY
t
t
6
5
ACQUIRE
CONVERT
ACQUIRE
CONVERT
HI-Z
MODE
t
t
ACQ
CONV
t
9
PREVIOUS
DATA VALID
PREVIOUS
DATA VALID
DATA
VALID
DATA
VALID
HI-Z
NOT VALID
DATA MODE
1605 • F08
t
t
7
8
Figure 8. Conversion Timing with Outputs Enabled After Conversion (CS Tied Low)
1605fd
11
For more information www.linear.com/LTC1605
LTC1605
APPLICATIONS INFORMATION
t
t
t
t
10
10
10
10
R/C
t
t
1
1
CS
t
3
t
4
BUSY
t
6
MODE
ACQUIRE
CONVERT
ACQUIRE
t
CONV
HI-Z
HI-Z
DATA
VALID
DATA BUS
t
t
7
12
1605 • F09
Figure 9. Using CS to Control Conversion and Read Timing
t
t
10
10
R/C
CS
BYTE
HI-Z
HI-Z
HI-Z
PINS 6 TO 13
PINS 15 TO 22
HIGH BYTE
LOW BYTE
LOW BYTE
HIGH BYTE
t
t
t
7
12
12
HI-Z
1605 • F10
Figure 10. Using CS and BYTE to Control Data Bus Read Timing
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
5
10
15
20
25
30
35
40
45
50
FREQUENCY (kHz)
1605 • F11
Figure 11. LTC1605 Nonaveraged 4096 Point FFT Plot
1605fd
12
For more information www.linear.com/LTC1605
LTC1605
APPLICATIONS INFORMATION
a read. Again it is recommended that both R/C and CS
band between DC and half the sampling frequency. THD
is expressed as:
return high within 3µs after the start of the conversion.
±
V±± +V3± +V4± +...VN
Output Data
THD=±0Log
The output data can be read as a 16-bit word or it can be
read as two 8-bit bytes. The format of the output data is
two’s complement. The digital input pin BYTE is used to
control the two byte read. With the BYTE pin low the first
eight MSBs are output on the D15 to D8 pins and the
eight LSBs are output on the D7 to D0 pins. When the
BYTE pin is taken high the eight LSBs replace the eight
MSBs (Figure 10).
V1
where V1 is the RMS amplitude of the fundamental
frequency and V± through V are the amplitudes of the
N
second through Nth harmonics.
Board Layout, Power Supplies and Decoupling
Wire wrap boards are not recommended for high reso-
lution or high speed A/D converters. To obtain the best
performance from the LTC1605, a printed circuit board
is required. Layout for the printed circuit board should
ensure the digital and analog signal lines are separated
as much as possible. In particular, care should be taken
not to run any digital track alongside an analog signal
track or underneath the ADC. The analog input should be
screened by AGND.
Dynamic Performance
FFT (Fast Fourier Transform) test techniques are used to
test the ADC’s frequency response, distortion and noise
at the rated throughput. By applying a low distortion sine
wave and analyzing the digital output using an FFT algo-
rithm, the ADC’s spectral content can be examined for
frequencies outside the fundamental. Figure 11 shows a
typical LTC1605 FFT plot which yields a SINAD of 87.5dB
and THD of –10±dB.
Figures1±through15showalayoutforasuggestedevalu-
ation circuit which will help obtain the best performance
from the 16-bit ADC. Pay particular attention to the design
of the analog and digital ground planes. The DGND pin
of the LTC1605 can be tied to the analog ground plane.
Placing the bypass capacitor as close as possible to the
power supply, the reference and reference buffer output is
veryimportant.Lowimpedancecommonreturnsforthese
bypass capacitors are essential to low noise operation of
the ADC, and the foil width for these tracks should be as
wide as possible. Also, since any potential difference in
grounds between the signal source and ADC appears as
an error voltage in series with the input signal, attention
should be paid to reducing the ground circuit impedance
as much as possible. The digital output latches and the
onboard sampling clock have been placed on the digital
ground plane. The two ground planes are tied together at
the power supply ground connection.
Signal-to-Noise Ratio
The Signal-to-Noise and Distortion Ratio (SINAD) is the
ratiobetweentheRMSamplitudeofthefundamentalinput
frequency to the RMS amplitude of all other frequency
components at the A/D output. The output is band limited
tofrequenciesfromaboveDCandbelowhalfthesampling
frequency.Figure11showsatypicalSINADof87.5dBwith
a 100kHz sampling rate and a 1kHz input.
Total Harmonic Distortion
Total Harmonic Distortion (THD) is the ratio of the RMS
sumofallharmonicsoftheinputsignaltothefundamental
itself. The out-of-band harmonics alias into the frequency
1605fd
13
For more information www.linear.com/LTC1605
LTC1605
TYPICAL APPLICATIONS
Figure 12. Component Side Silkscreen for the Suggested LTC1605 Evaluation Circuit
ANALOG
GROUND PLANE
DIGITAL
GROUND PLANE
ANALOG
GROUND PLANE
Figure 13. Bottom Side Showing Analog Ground Plane
Figure 14. Component Side Showing Separate Analog and
Digital Ground Plane
1605fd
14
For more information www.linear.com/LTC1605
LTC1605
1605fd
15
For more information www.linear.com/LTC1605
LTC1605
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
G Package
28-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
9.90 – 10.50*
(.390 – .413)
1.25 0.12
5.3 – 5.7
28 27 26 25 24 23 22 21 20 19 18
16 15
17
7.8 – 8.2
7.40 – 8.20
(.291 – .323)
0.42 0.03
RECOMMENDED SOLDER PAD LAYOUT
0.65 BSC
5
7
8
1
2
3
4
6
9 10 11 12 13 14
2.0
(.079)
MAX
5.00 – 5.60**
(.197 – .221)
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.25
0.55 – 0.95
(.0035 – .010)
(.022 – .037)
0.05
0.22 – 0.38
(.009 – .015)
TYP
(.002)
NOTE:
MIN
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
G28 SSOP 0204
3. DRAWING NOT TO SCALE
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
N Package
28-Lead Plastic PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
1.400*
(35.560)
MAX
28
27 26 25 24
23 22 21 20
19 18 17 16
15
14
.240 – .295*
(6.096 – 7.493)
5
6
7
8
9
10 11 12
13
1
2
3
4
.045 – .065
.130 ±.005
(1.143 – 1.651)
(3.302 ±0.127)
.020
(0.508)
MIN
.065
(1.651)
TYP
N28 REV I 0711
.120
(3.048)
MIN
.005
(0.127)
MIN
.018 ±.003
(0.457 ±0.076)
.100
(2.54)
BSC
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
OBSOLETE PACKAGE
1605fd
16
For more information www.linear.com/LTC1605
LTC1605
REVISION HISTORY (Revision history begins at Rev D)
REV
DATE
DESCRIPTION
PAGE NUMBER
D
07/15 Obsoleted ±8-Lead PDIP Package
±, 16
1605fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTC1605
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
SW Package
28-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
.050 BSC .045 .005
.030 .005
TYP
.697 – .712
(17.70 – 18.08)
NOTE 4
N
28 27 26 25 24 23 22 21 20 19 18
16 15
17
N
.325 .005
.420
MIN
.394 – .419
(10.007 – 10.643)
NOTE 3
1
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
.291 – .299
(7.391 – 7.595)
NOTE 4
2
3
5
7
8
9
10 11 12 13 14
1
4
6
.037 – .045
(0.940 – 1.143)
.093 – .104
.010 – .029
× 45°
(2.362 – 2.642)
(0.254 – 0.737)
.005
(0.127)
RAD MIN
0° – 8° TYP
.050
(1.270)
BSC
.004 – .012
.009 – .013
NOTE 3
(0.102 – 0.305)
(0.229 – 0.330)
.014 – .019
.016 – .050
(0.356 – 0.482)
TYP
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
INCHES
(MILLIMETERS)
S28 (WIDE) 0502
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
0.05% Max, 5ppm/°C Max
LT1019-±.5
Precision Bandgap Reference
LTC1±74/LTC1±77 Low Power 1±-Bit, 100ksps ADCs
10mW Power Dissipation, Parallel/Byte Interface
55mW Power Dissipation, 7±dB SINAD
LTC1415
LTC1419
LT1460-±.5
Single 5V, 1±-Bit, 1.±5Msps ADC
Low Power 14-Bit, 800ksps ADC
Micropower Precision Series Reference
True 14-Bit Linearity, 81.5dB SINAD, 150mW Dissipation
0.075% Max, 10ppm/°C Max, Only 130µA Supply Current
Serial I/O, 3V and 5V Versions
LTC1594/LTC1598 Micropower 4-/8-Channel 1±-Bit ADCs
1605fd
LT 0715 REV D • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
18
●
●
LINEAR TECHNOLOGY CORPORATION 2005
(408)43±-1900 FAX: (408) 434-0507 www.linear.com/LTC1605
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