LTC1874EGN [Linear]
Dual Constant Frequency Current Mode Step-Down DC/DC Controller; 双恒定频率电流模式降压型DC / DC控制器
| 型号： | LTC1874EGN |
| 厂家： | 
Linear |
| 描述： | Dual Constant Frequency Current Mode Step-Down DC/DC Controller |
| 文件： | 总12页 (文件大小：181K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1874
Dual Constant Frequency
Current Mode Step-Down
DC/DC Controller
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FEATURES
DESCRIPTIO
The LTC®1874 is a dual constant frequency current mode
step-downDC/DCcontrollerwithexcellentACandDCload
and line regulation. Each controller has an accurate
undervoltage lockout that shuts down the individual con-
troller when the input voltage falls below 2.0V.
■
High Efficiency: Up to 94%
■
High Output Currents Easily Achieved
■
Wide VIN Range: 2.5V to 9.8V
■
Constant Frequency 550kHz Operation
Burst ModeTM Operation at Light Load
■
■
Low Dropout: 100% Duty Cycle
0.8V Reference Allows Low Output Voltages
Current Mode Operation for Excellent
Line and Load Transient Response
Low Quiescent Current: 270µA (Each Controller)
Separate Shutdown Pin for Each Controller
Shutdown Mode Draws Only
8µA Supply Current (Each Controller)
±2.5% Reference Accuracy
The LTC1874 boasts ±2.5% output voltage accuracy and
consumes only 270µA of quiescent current per controller.
The LTC1874 is configured with Burst Mode operation,
which enhances efficiency at low output current for appli-
cations where efficiency is a prime consideration.
■
■
■
■
■
To further maximize the life of a battery source, each
external P-channel MOSFET is turned on continuously in
dropout(100%dutycycle). Inshutdown, eachcontroller
draws a mere 8µA. High constant operating frequency of
550kHz allows the use of small external inductors.
■
■
■
Available in 16-Lead Narrow SSOP
Each Controller Functions Independent of the Other
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The LTC1874 is available in a small footprint 16-lead
narrow SSOP.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
APPLICATIO S
■
1- or 2-Cell Lithium-Ion-Powered Applications
Personal Information Appliances
Portable Computers
■
■
■
Distributed 3.3V, 2.5V or 1.8V Power Systems
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TYPICAL APPLICATION
V
IN
3.5V
TO 9.5V
C
IN
R1
0.04Ω
R2
10µF
16V
×2
LTC1874
–
0.04Ω
1
2
8
V
PV
IN2
IN1
7
L2
4.7µH
SENSE1
GND1
PGATE2
PGND2
M2
V
1.8V
1A
OUT2
3
6
L1
M1
4.7µH
V
10k
OUT1
3.3V
1A
+
C2
47µF
6V
4
5
D2
V
FB1
I
/RUN2
TH
10k
+
13
14
15
16
12
11
10
9
220pF
C1
D1
I
TH
/RUN1
V
FB2
47µF
220pF
C1, C2: SANYO POSCAP 6TPA47M
6V
PGND1
GND2
–
249k
C
: TAIYO YUDEN CERAMIC
IN
EMK325BJ106MNT (×2)
100k
PGATE1 SENSE2
D1, D2: MBRM120
80.6k
PV
IN1
V
IN2
L1, L2: COILCRAFT D01608C-472
M1, M2: Si3443DV
R1, R2: DALE 0.25W
80.6k
1874 TA01
Figure 1. LTC1874 3.5V-9.5V Input to 3.3V/1A and 1.8V/1A Dual Step-Down Converter
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LTC1874
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
TOP VIEW
Input Supply Voltage (VIN, PVIN) ...............–0.3V to 10V
SENSE–, PGATE Voltages............. –0.3V to (VIN + 0.3V)
VFB, ITH/RUN Voltages ..............................–0.3V to 2.4V
PGATE Peak Output Current (<10µs) ....................... 1A
Storage Ambient Temperature Range ... –65°C to 150°C
Operating Temperature Range (Note 2) .. –40°C to 85°C
Junction Temperature (Note 3)............................. 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PV
IN1
–
IN1
SENSE1
GND1
PGATE1
PGND1
LTC1874EGN
V
FB1
I
/RUN1
TH
I
TH
/RUN2
V
FB2
PGND2
GND2
–
GN PART MARKING
1874
PGATE2
SENSE2
PV
IN2
V
IN2
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
TJMAX = 150°C, θJA = 135°C/ W
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
All specifications apply to each controller. The ● denotes specifications that
apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise specified.
(Note 2)
PARAMETER
CONDITIONS
Typicals at V = 4.2V (Note 4)
MIN
TYP
MAX
UNITS
Input DC Supply Current (Per Controller)
IN
Normal Operation
Sleep Mode
Shutdown
2.4V ≤ V ≤ 9.8V
270
230
8
420
370
22
µA
µA
µA
µA
IN
2.4V ≤ V ≤ 9.8V
IN
2.4V ≤ V ≤ 9.8V, V /RUN = 0V
IN
ITH
UVLO
V
< UVLO Threshold
6
10
IN
Undervoltage Lockout Threshold
V
V
Falling
●
●
1.55
1.85
2.0
2.3
2.35
2.40
V
V
IN
IN
Rising
Shutdown Threshold (at I /RUN)
0.15
0.25
0.35
0.5
0.55
0.85
V
TH
Start-Up Current Source
V
/RUN = 0V
ITH
µA
Regulated Feedback Voltage
T = 0°C to 70°C (Note 5)
A
●
●
0.780
0.770
0.800
0.800
0.820
0.830
V
V
A
T = –40°C to 85°C (Note 5)
Output Voltage Line Regulation
Output Voltage Load Regulation
2.4V ≤ V ≤ 9.8V (Note 5)
0.05
mV/V
IN
I
I
/RUN Sinking 5µA (Note 5)
TH
/RUN Sourcing 5µA (Note 5)
TH
2.5
2.5
mV/µA
mV/µA
V
Input Current
(Note 5)
10
0.860
20
50
nA
V
FB
Overvoltage Protect Threshold
Overvoltage Protect Hysteresis
Oscillator Frequency
Measured at V
0.820
500
0.895
FB
mV
V
V
= 0.8V
= 0V
550
120
650
kHz
kHz
FB
FB
Gate Drive Rise Time
Gate Drive Fall Time
C
C
= 3000pF
= 3000pF
40
40
ns
ns
LOAD
LOAD
Peak Current Sense Voltage
(Note 6)
120
mV
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 2: The LTC1874E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 5: Each controller in the LTC1874 is individually tested in a feedback
loop that servos V to the output of the error amplifier.
FB
Note 6: Peak current sense voltage is reduced dependent upon duty cycle
to a percentage of value as given in Figure 2.
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
D
T = T + (P • θ °C/W)
J
A
D
JA
2
LTC1874
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TYPICAL PERFORMANCE CHARACTERISTICS
Undervoltage Lockout Trip
Voltage vs Temperature
Reference Voltage
vs Temperature
Normalized Oscillator Frequency
vs Temperature
825
820
815
810
805
800
795
790
785
780
775
10
8
2.24
2.20
2.16
2.12
2.08
2.04
2.00
1.96
1.92
1.88
1.84
V
IN
= 4.2V
V
IN
= 4.2V
V
IN
FALLING
6
4
2
0
–2
–4
–6
–8
–10
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1874 G01
1874 G02
1874 G03
Maximum (VIN – SENSE–) Voltage
vs Duty Cycle
Shutdown Threshold
vs Temperature
600
560
520
480
440
400
360
320
280
240
200
130
120
110
100
90
V
IN
= 4.2V
V
A
= 4.2V
IN
T
= 25°C
80
70
60
50
60 70
20 30 40 50
DUTY CYCLE (%)
–55 –35 –15
5
45
85 105 125
80 90 100
25
65
TEMPERATURE (°C)
1874 G04
1874 G05
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LTC1874
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PIN FUNCTIONS
VIN1 (Pin 1): Main Supply Pin for Controller #1. This pin
delivers the Input DC Supply Current (listed in the Electri-
cal Characteristics table) plus a small amount of logic
switching current. Must be connected to PVIN1 (Pin 16)
and closely decoupled to GND1 (Pin 3).
VIN2 (Pin 9): Main Supply Pin for Controller #2. This pin
delivers the Input DC Supply Current (listed in the Electri-
cal Characteristics table) plus a small amount of logic
switching current. Must be connected to PVIN2 (Pin 8) and
closely decoupled to GND2 (Pin 11).
SENSE1– (Pin 2): The Negative Input to the Current
Comparator of Controller #1.
SENSE2– (Pin 10): The Negative Input to the Current
Comparator of Controller #2.
GND1 (Pin 3): Signal Ground for Controller #1. Must be
connected to PGND1 (Pin 14).
GND2 (Pin 11): Signal Ground for Controller #2. Must be
connected to PGND2 (Pin 6).
VFB1 (Pin 4): Receives the feedback voltage from an
external resistive divider across the output of Controller
#1.
VFB2 (Pin 12): Receives the feedback voltage from an
external resistive divider across the output of Controller
#2.
ITH/RUN2 (Pin 5): This pin performs two functions. It
servesastheerroramplifiercompensationpointaswellas
the run control input of Controller #2. The current com-
parator threshold increases with this control voltage.
Nominal voltage range for this pin is 0.7V to 1.9V. Forcing
thispinbelow0.35VcausesController#2tobeshutdown.
In shutdown, all functions of Controller #2 are disabled
and PGATE2 (Pin 7) is held high.
ITH/RUN1 (Pin 13): This pin performs two functions. It
servesastheerroramplifiercompensationpointaswellas
the run control input of Controller #1. The current com-
parator threshold increases with this control voltage.
Nominal voltage range for this pin is 0.7V to 1.9V. Forcing
thispinbelow0.35VcausesController#1tobeshutdown.
In shutdown, all functions of Controller #1 are disabled
and PGATE1 (Pin 15) is held high.
PGND2 (Pin 6): Power Ground for Controller #2. Must be
connected to GND2 (Pin 11).
PGND1(Pin14):PowerGroundforController#1. Mustbe
connected to GND1 (Pin 3).
PGATE2 (Pin 7): Gate Drive for the External P-Channel
PGATE1 (Pin 15): Gate Drive for the External P-Channel
MOSFET of Controller #2. This pin swings from 0V to the
MOSFET of Controller #1. This pin swings from 0V to the
voltage of PVIN2
.
voltage of PVIN1.
PVIN2 (Pin8):PowerSupplyPinforController#2. Thispin
deliversthedynamicswitchingcurrentthatdrivesthegate
of the external P-channel MOSFET of Controller #2. Must
be connected to VIN2 (Pin 9) and closely decoupled to
PGND2 (Pin 6).
PVIN1 (Pin 16): Power Supply Pin for Controller #1. This
pin delivers the dynamic switching current that drives the
gate of the external P-channel MOSFET of Controller #1.
Must be connected to VIN1 (Pin 1) and closely decoupled
to PGND1 (Pin 14).
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LTC1874
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FUNCTIONAL DIAGRA
–
Controller #1
V
SENSE1
2
IN1
1
+
–
PV
IN1
I
CMP
16
RS1
PGATE1
15
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
R
Q
S
SLOPE
COMP
PGND1
14
OSC
–
+
FREQ
BURST
CMP
OVP
FOLDBACK
+
–
+
–
0.3V
SHORT-CIRCUIT
DETECT
V
+
SLEEP
REF
0.15V
60mV
V
IN
EAMP
V
REF
0.8V
+
–
0.5µA
V
FB1
4
+
–
V
IN
V
IN
0.3V
0.35V
+
–
SHDN
UV
SHDN
CMP
VOLTAGE
REFERENCE
V
REF
0.8V
GND1
3
UNDERVOLTAGE
LOCKOUT
1.2V
13
/RUN1
I
TH
–
V
SENSE2
10
IN2
9
Controller #2
PV
IN2
8
PGATE2
7
PGND2
6
GND2
11
CONTROLLER #2 IS THE SAME AS CONTROLLER #1
V
FB2
12
1874FD
5
/RUN2
I
TH
5
LTC1874
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OPERATIO
(Refer to Functional Diagram)
high, turning off the external MOSFET. The sleep signal
goes low when the ITH/RUN voltage goes above 0.925V
and the controller resumes normal operation. The next
oscillator cycle will turn the external MOSFET on and the
switching cycle repeats.
The LTC1874 is a dual, constant frequency current mode
switching regulator. The two switching regulators func-
tionidenticallybutindependentofeachother.Thefollow-
ing description of operation is written for a single
switching regulator.
Dropout Operation
Main Control Loop
When the input supply voltage decreases towards the
output voltage, the rate of change of inductor current
during the ON cycle decreases. This reduction means that
the external P-channel MOSFET will remain on for more
thanoneoscillatorcyclesincetheinductorcurrenthasnot
ramped up to the threshold set by EAMP. Further reduc-
tion in input supply voltage will eventually cause the
P-channel MOSFET to be turned on 100%, i.e., DC. The
outputvoltagewillthenbedeterminedbytheinputvoltage
minus the voltage drop across the MOSFET, the sense
resistor and the inductor.
During normal operation, the external P-channel power
MOSFET is turned on by the oscillator and turned off when
the current comparator (ICMP) resets the RS latch. The
peak inductor current at which ICMP resets the RS latch is
controlled by the voltage on the ITH/RUN pin, which is the
output of the error amplifier EAMP. An external resistive
divider connected between VOUT and ground allows the
EAMPtoreceiveanoutputfeedbackvoltageVFB.Whenthe
load current increases, it causes a slight decrease in VFB
relative to the 0.8V reference, which in turn causes the
ITH/RUN voltage to increase until the average inductor
current matches the new load current.
Undervoltage Lockout
ThemaincontrolloopisshutdownbypullingtheITH/RUN
pin low. Releasing ITH/RUN allows an internal 0.5µA
current source to charge up the external compensation
network. When the ITH/RUN pin reaches 0.35V, the main
control loop is enabled with the ITH/RUN voltage then
pulled up to its zero current level of approximately 0.7V.
Astheexternalcompensationnetworkcontinuestocharge
up, the corresponding output current trip level follows,
allowing normal operation.
TopreventoperationoftheP-channelMOSFETbelowsafe
input voltage levels, an undervoltage lockout is incorpo-
rated into the controller. When the input supply voltage
drops below approximately 2.0V, the P-channel MOSFET
and all circuitry is turned off except the undervoltage
block, which draws only several microamperes.
Short-Circuit Protection
Whentheoutputisshortedtoground, thefrequencyofthe
oscillator will be reduced to about 120kHz. This lower
frequency allows the inductor current to safely discharge,
thereby preventing current runaway. The oscillator’s fre-
quency will gradually increase to its designed rate when
the feedback voltage again approaches 0.8V.
Comparator OVP guards against transient overshoots
greater than 7.5% by turning off the external P-channel
power MOSFET and keeping it off until the fault is
removed
.
Burst Mode Operation
The controller enters Burst Mode operation at low load
currents. In this mode, the peak current of the inductor is
set as if VITH/RUN = 1V (at low duty cycles) even though
the voltage at the ITH/RUN pin is at a lower value. If the
inductor’saveragecurrentisgreaterthantheloadrequire-
ment, the voltage at the ITH/RUN pin will drop. When the
ITH/RUN voltage goes below 0.85V, the sleep signal goes
Overvoltage Protection
As a further protection, the overvoltage comparator in the
controller will turn the external MOSFET off when the
feedback voltage has risen 7.5% above the reference
voltage of 0.8V. This comparator has a typical hysteresis
of 20mV.
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LTC1874
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OPERATIO
Slope Compensation and Inductor’s Peak Current
110
100
90
80
70
60
50
40
30
20
10
The inductor’s peak current is determined by:
V
ITH – 0.7
IPK
=
10 RSENSE
(
)
I
= 0.4I
PK
RIPPLE
AT 5% DUTY CYCLE
= 0.2I
when the controller is operating below 40% duty cycle.
However, once the duty cycle exceeds 40%, slope com-
pensationbeginsandeffectivelyreducesthepeakinductor
current. The amount of reduction is given by the curves in
Figure 2.
I
RIPPLE
PK
AT 5% DUTY CYCLE
V
IN
= 4.2V
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
1874 F02
Figure 2. Percentage of Maximum Output Current vs Duty Cycle
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APPLICATIO S I FOR ATIO
The basic LTC1874 application circuit is shown in
Figure 1. External component selection for each control-
ler is driven by the load requirement and begins with the
selection of L1 and RSENSE (= R1). Next, the power
MOSFET (M1) and the output diode (D1) are selected
followed by CIN and COUT (= C1).
selecttheappropriatevaluetoprovidetherequiredamount
of current. Using Figure 2, the value of RSENSE is:
SF
RSENSE
=
10 IOUT 100
( )(
)(
)
where SF is the “slope factor.”
RSENSE Selection for Output Current
Inductor Value Calculation
RSENSE is chosen based on the required output current.
Withthecurrentcomparatormonitoringthevoltagedevel-
oped across RSENSE, the threshold of the comparator
determines the inductor’s peak current. The output cur-
rent the controller can provide is given by:
The operating frequency and inductor selection are inter-
related in that higher operating frequencies permit the use
of a smaller inductor for the same amount of inductor
ripplecurrent. However, thisisattheexpenseofefficiency
due to an increase in MOSFET gate charge losses.
0.12V IRIPPLE
IOUT
=
−
The inductance value also has a direct effect on ripple
current. The ripple current, IRIPPLE, decreases with higher
inductance or frequency and increases with higher VIN or
RSENSE
2
where IRIPPLE is the inductor peak-to-peak ripple current
(see Inductor Value Calculation section).
V
OUT. The inductor’s peak-to-peak ripple current is given
by:
A reasonable starting point for setting ripple current is
IRIPPLE = (0.4)(IOUT). Rearranging the above equation, it
becomes:
V − VOUT
V
OUT + VD
IN
IRIPPLE
=
V + VD
f L
( )
IN
1
RSENSE
=
for Duty Cycle < 40%
IOUT
wherefistheoperatingfrequency.Acceptinglargervalues
of IRIPPLE allows the use of low inductances, but results in
higher output voltage ripple and greater core losses. A
reasonable starting point for setting ripple current is
10
( )(
)
However,foroperationthatisabove40%dutycycle,slope
compensation effect has to be taken into consideration to
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LTC1874
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APPLICATIO S I FOR ATIO
IRIPPLE =0.4(IOUT(MAX)).Remember,themaximumIRIPPLE
Power MOSFET Selection
occurs at the maximum input voltage.
The main selection criteria for the power MOSFET are the
In Burst Mode operation on an LTC1874 controller, the
ripple current is normally set such that the inductor
current is continuous during the burst periods. Therefore,
the peak-to-peak ripple current must not exceed:
threshold voltage VGS(TH), the “on” resistance RDS(ON),
reverse transfer capacitance CRSS and total gate charge.
Since the controller is designed for operation down to low
input voltages, a logic level threshold MOSFET (RDS(ON)
guaranteed at VGS = 2.5V) is required for applications that
workclosetothisvoltage.WhentheseMOSFETsareused,
make sure that the input supply to the controller is less
than the absolute maximum VGS rating, typically 8V.
0.03V
RSENSE
IRIPPLE
≤
This implies a minimum inductance of:
The required minimum RDS(ON) of the MOSFET is gov-
erned by its allowable power dissipation. For applications
that may operate the controller in dropout, i.e., 100% duty
cycle, at its worst case the required RDS(ON) is given by:
V − VOUT
V
OUT + VD
IN
LMIN
=
V + VD
0.03
f
IN
RSENSE
PP
RDS(ON)
=
(Use VIN(MAX) = VIN)
2
DC=100%
IOUT(MAX) 1+ δp
(
) (
)
A smaller value than LMIN could be used in the circuit;
however, the inductor current will not be continuous
during burst periods.
where PP is the allowable power dissipation and δp is the
temperature dependency of RDS(ON). (1 + δp) is generally
given for a MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but δp = 0.005/°C can be used as an
approximation for low voltage MOSFETs.
Inductor Core Selection
Once the value of inductor is known, an off the shelf
inductor can be selected. The inductor should be rated for
the calculated peak current. Some manufacturers specify
both peak saturation current and peak RMS current. Make
sure that the RMS current meets your continuous load
requirements. Also, you may want to compare the DC
resistance of different inductors in order to optimize the
efficiency.
In applications where the maximum duty cycle is less than
100% and the controller is in continuous mode, the
RDS(ON) is governed by:
PP
RDS(ON)
2
1+ δp
DC IOUT
(
)
(
)
Inductor core losses are usually not specified and you will
need to evaluate them yourself. Usually, the core losses
are not a problem because the inductors operate with
relatively low magnetic flux swings. The best way to
evaluate the core losses is by measuring the converters
efficiency. Converter efficiency will reveal the difference in
both DC current losses and core losses.
where DC is the maximum operating duty cycle of the
controller.
Output Diode Selection
The catch diode carries load current during the off-time.
The average diode current is therefore dependent on the
MOSFET duty cycle. At high input voltages the diode
conducts most of the time. As VIN approaches VOUT the
diode conducts only a small fraction of the time. The most
stressful condition for the diode is when the output is
Offtheshelfinductorsareavailablefromnumerousmanu-
facturers. Some of the most common manufacturers are
Coilcraft, Coiltronics, Panasonic, Toko, Tokin, Murata and
Sumida.
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LTC1874
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APPLICATIO S I FOR ATIO
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short-circuited.Underthisconditionthediodemustsafely
handle IPEAK at close to 100% duty cycle. Therefore, it is
importanttoadequatelyspecifythediodepeakcurrentand
average power dissipation so as not to exceed the diode
ratings.
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
usedfordesignbecauseevensignificantdeviationsdonot
offer much relief. Several capacitors may be paralleled to
meet the size or height requirements in the design. Due to
the high operating frequency of the controller, ceramic
capacitors can also be used for CIN. Always consult the
manufacturer if there is any question.
Under normal load conditions, the average current con-
ducted by the diode is:
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment is satisfied, the capacitance is adequate for filtering.
The output ripple (∆VOUT) is approximated by:
V − VOUT
V + VD
IN
IN
ID =
IOUT
The allowable forward voltage drop in the diode is calcu-
lated from the maximum short-circuit current as:
1
∆VOUT ≈ IRIPPLE ESR +
PD
VF ≈
4fCOUT
ISC(MAX)
where f is the operating frequency, COUT is the output
capacitance and IRIPPLE is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since ∆IL increases with input voltage.
where PD is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements.
Schottky diodes are a good choice for low forward drop
and fast switching times. Remember to keep lead length
short and observe proper grounding (see Board Layout
Checklist) to avoid ringing and increased dissipation.
Once the ESR requirement for COUT has been met, the
RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement. Multiple capacitors may have to be paral-
leled to meet the ESR or RMS current handling require-
ments of the application. Aluminum electrolytic and dry
tantalum capacitors are both available in surface mount
configurations. Anexcellentchoiceoftantalumcapacitors
are the AVX TPS and KEMET T510 series of surface mount
tantalum capacitors.
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle (VOUT + VD)/
(VIN + VD). To prevent large voltage transients, a low ESR
input capacitor sized for the maximum RMS current must
beused. ThemaximumRMScapacitorcurrentisgivenby:
1/2
]
VOUT V − VOUT
(
IN
)
[
CIN Required IRMS ≈ IMAX
V
IN
9
LTC1874
W U U
U
APPLICATIO S I FOR ATIO
105
100
95
Low Supply Operation
V
REF
Although the controller can function down to approxi-
mately 2.0V, the maximum allowable output current is
reducedwhenVIN decreasesbelow3V. Figure3showsthe
amount of change as the supply is reduced down to 2V.
Also shown in Figure 3 is the effect of VIN on VREF as VIN
goes below 2.3V.
V
ITH
90
85
80
Setting Output Voltage
75
2.0
2.2
2.4
2.6
2.8
3.0
The controller develops a 0.8V reference voltage between
the feedback (VFB) terminal and ground (see Figure 4). By
selecting resistor R1, a constant current is caused to flow
through R1 and R2 to set the overall output voltage. The
regulated output voltage is determined by:
INPUT VOLTAGE (V)
1874 F03
Figure 3. Line Regulation of VREF and VITH
R2
VOUT = 0.8V 1+
R1
V
OUT
1/2 LTC1874
R2
R1
4
3
V
FB1
Formostapplications, an80kresistorissuggestedforR1.
To prevent stray pickup, locate resistors R1 and R2 close
to the LTC1874.
GND1
1874F04
Foldback Current Limiting
Figure 4. Setting Output Voltage
As described in the Output Diode Selection, the worst-
case dissipation occurs with a short-circuited output
when the diode conducts the current limit value almost
continuously. To prevent excessive heating in the diode,
foldback current limiting can be added to reduce the
current in proportion to the severity of the fault.
1/2 LTC1874
V
OUT
R2
+
13
4
3
I
/RUN1 V
FB1
TH
D
D
FB1
Foldback current limiting is implemented by adding di-
odes DFB1 and DFB2 between the output and the ITH/RUN
pin as shown in Figure 5. In a hard short (VOUT = 0V), the
current will be reduced to approximately 50% of the
maximum output current.
R1
FB2
GND1
1874 F05
Figure 5. Foldback Current Limiting
10
LTC1874
W U U
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
U
5. Is the trace from SENSE– to the SENSE resistor kept
short? Does the trace connect close to RSENSE
?
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1874. These items are illustrated graphically for a
single controller in the layout diagram in Figure 6. Check
the following in your layout:
6. Keep the switching node PGATE away from sensitive
small signal nodes.
7. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1 and R2 must be
connected between the (+) plate of COUT and signal
ground.
1. IstheSchottkydiodecloselyconnectedbetweenpower
ground (PGND) and the drain of the external MOSFET?
2. Does the (+) plate of CIN connect to the sense resistor
as closely as possible? This capacitor provides AC
current to the MOSFET.
8. PVIN must connect to VIN and PGND must connect to
GND. Isolate high current power paths from signal
power and signal ground where possible in the layout.
An unbroken ground plane is recommended.
3. Is the input decoupling capacitor (0.1µF) connected
closely between VIN and signal ground (GND)?
4. Connect the end of RSENSE as close to VIN as possible.
The VIN pin is the SENSE+ of the current comparator.
V
IN
+
C
IN
1/2 LTC1874
SENSE
L1
R
SW
1
2
3
4
16
15
14
13
V
V
PV
OUT
IN
IN
M1
+
–
SENSE PGATE
GND PGND
/RUN
C
D1
0.1µF
OUT
R2
R1
V
I
TH
FB
R
ITH
C
ITH
1874 F06
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 6. LTC1874 Layout Diagram (See PC Board Layout Checklist)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC1874
U
TYPICAL APPLICATIO
LTC1874 2.5V–8.5V Input to 3.3V/1A and 1.8V/1A Dual Converter
V
IN
2.5V TO 8.5V
C
IN
R1
0.03Ω
R2
0.082Ω
10µF
16V
×2
LTC1874
–
1
2
8
V
PV
IN2
IN1
7
L2
4.7µH
SENSE1
GND1
PGATE2
PGND2
M2
V
1.8V
1A
OUT2
3
6
M1
•
V
L1
C1
47µF
×2
10k
OUT1
3.3V
+
C2
47µF
6V
4
5
•
D2
V
I /RUN2
TH
FB1
/RUN1
10k
1A
13
14
15
16
12
11
10
9
220pF
C1, C2: SANYO POSCAP 6TPA47M
+
I
V
FB2
TH
C
: TAIYO YUDEN CERAMIC
L1A
IN
D1
220pF
EMK325BJ106MNT (×2)
PGND1
GND2
–
249k
D1: 15MQ040N
D2: MBRM120
100k
PGATE1 SENSE2
L1: BH-ELECTRONICS BH511-1012
L2: COILTRONICS UP2B-4R7
M1, M2: Si3443DV
80.6k
PV
V
IN2
IN1
80.6k
R1, R2: DALE 0.25W
1874 TA02
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 – 0.196*
(4.801 – 4.978)
0.009
(0.229)
REF
0.015 ± 0.004
(0.38 ± 0.10)
16 15 14 13 12 11 10 9
× 45°
0.053 – 0.068
(1.351 – 1.727)
0.004 – 0.0098
(0.102 – 0.249)
0.007 – 0.0098
(0.178 – 0.249)
0° – 8° TYP
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
0.016 – 0.050
(0.406 – 1.270)
0.0250
(0.635)
BSC
0.008 – 0.012
(0.203 – 0.305)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
GN16 (SSOP) 1098
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
2
3
4
5
6
7
8
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High Frequency, Small Inductor, High Efficiency
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V
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IN
2.5V to 9.8V, I
Up to 4A, SOT-23 Package
OUT
LTC1773
2.65V to 8.5V, I
up to 4A
OUT
LTC1877/LTC1878
Low Voltage, Monolithic Synchronous Step-Down Regulator
Low Supply Voltage Range: 2.65V to 8V, I
= 0.5A
OUT
No R
is a trademark of Linear Technology Corporation.
SENSE
1874f LT/TP 0201 4K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
LINEAR TECHNOLOGY CORPORATION 2000
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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