LTC2914IGN-1 [Linear]
Quad UV/OV Positive/Negative Voltage Monitor; 四路UV / OV正/负电压监控器型号: | LTC2914IGN-1 |
厂家: | Linear |
描述: | Quad UV/OV Positive/Negative Voltage Monitor |
文件: | 总16页 (文件大小:213K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC2914
Quad UV/OV
Positive/Negative
Voltage Monitor
U
DESCRIPTIO
FEATURES
TheLTC®2914isaquadinputvoltagemonitorintendedfor
monitoring multiple voltages in a variety of applications.
Dual inputs for each monitored voltage allow monitor-
ing four separate undervoltage (UV) conditions and four
separateovervoltage(OV)conditions.Allmonitorssharea
common undervoltage output and a common overvoltage
output. The LTC2914-1 has latching capability for the
overvoltage output. The LTC2914-2 has functionality to
disable both the overvoltage and undervoltage outputs.
■
Monitors Four Voltages Simultaneously
■
Adjustable UV and OV Trip Values
■
Guaranteed Threshold Accuracy: ±±1.5 oꢀ
Monitored Voltage over Temperature
■
Input Glitch Rejection
■
Monitors up to Two Negative Voltages
■
Buffered 1V Reference Output
■
Adjustable Reset Timeout with Timeout Disable
■
70µA Quiescent Current
■
Open-Drain OV and UV Outputs
Polarityselectionandabufferedreferenceallowmonitoring
uptotwoseparatenegativevoltages.Athree-stateinputpin
allows setting the polarity of two inputs without requiring
any external components. Glitch filtering ensures reliable
reset operation without false or noisy triggering.
■
Guaranteed OV and UV for V ≥ 1V
CC
■
Available in 16-Lead SSOP and 16-Lead
(5mm × 3mm) DFN Packages
U
APPLICATIO S
The LTC2914 provides a precise, versatile, space-con-
scious, micropower solution for voltage monitoring.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
■
Desktop and Notebook Computers
■
Network Servers
■
Core, I/O Voltage Monitors
U
TYPICAL APPLICATIO
Quad UV/OV Supply Monitor,±05 Tolerance, .V, 313V, 21.V, ±18V
5V
3.3V
2.5V
1.8V
P0WER
SUPPLIES
Input Threshold Voltage
0.1µF
vs Temperature
0.505
0.504
0.503
0.502
44.2k
V
CC
VH1
SEL
OV
1k
27.4k
VL1
VH2
SYSTEM
0.501
0.500
0.499
0.498
0.497
0.496
0.495
LTC2914-1
4.53k 1k
4.53k 19.6k
UV
VL2
REF
VH3
LATCH
1k
12.4k
VL3
VH4
–50 –25
25
50
75
100
0
4.53k 1k
TEMPERATURE (°C)
VL4
2914 G01
GND TMR
4.53k
2914 TA01a
C
TMR
22nF
TIMEOUT = 200ms
2914f
1
LTC2914
W W U W
ABSOLUTE AXI U RATI GS
(Notes ±, 2)
Terminal Voltages
Operating Temperature Range
V
(Note 3)............................................. –0.3V to 6V
LTC2914C ................................................ 0°C to 70°C
LTC2914I ............................................. –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
CC
OV, UV ................................................... –0.3V to 16V
TMR..........................................–0.3V to (V + 0.3V)
CC
VLn, VHn, LATCH, DIS, SEL.................. –0.3V to 7.5V
Terminal Currents
SSOP ................................................................ 300°C
I
....................................................................10mA
VCC
Reference Load Current (I ) ........................... 1mA
REF
I , I ...............................................................10mA
UV OV
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
DHC PART
MARKING*
TOP VIEW
TOP VIEW
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
1
2
3
4
5
6
7
8
16 V
CC
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
15 TMR
14 SEL
13 LATCH
12 UV
LTC2914CDHC-1
LTC2914IDHC-1
29141
29141
TMR
SEL
LATCH
UV
17
11 OV
OV
10 REF
ORDER PART
NUMBER
GN PART
MARKING
REF
GND
9
GND
DHC PACKAGE
LTC2914CGN-1
LTC2914IGN-1
29141
2914I1
GN PACKAGE
16-LEAD (5mm 3mm) PLASTIC DFN
16-LEAD PLASTIC SSOP
T
JMAX
= 150°C, θ = 43.5°C/W
JA
EXPOSED PAD (PIN 17)
PCB GND CONNECTION OPTIONAL
T
= 150°C, θ = 110°C/W
JMAX
JA
ORDER PART
NUMBER
DHC PART
MARKING*
TOP VIEW
TOP VIEW
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
1
2
3
4
5
6
7
8
16 V
CC
VH1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
15 TMR
14 SEL
13 DIS
12 UV
11 OV
10 REF
LTC2914CDHC-2
LTC2914IDHC-2
29142
29142
VL1
VH2
VL2
VH3
VL3
VH4
VL4
TMR
SEL
DIS
UV
17
OV
ORDER PART
NUMBER
GN PART
MARKING
REF
GND
9
GND
DHC PACKAGE
LTC2914CGN-2
LTC2914IGN-2
29142
2914I2
GN PACKAGE
16-LEAD PLASTIC SSOP
16-LEAD (5mm 3mm) PLASTIC DFN
T
JMAX
= 150°C, θ = 43.5°C/W
JA
EXPOSED PAD (PIN 17)
PCB GND CONNECTION OPTIONAL
T
= 150°C, θ = 110°C/W
JA
JMAX
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
2914f
2
LTC2914
ELECTRICAL CHARACTERISTICS The
DIS = Open unless otherwise noted1 (Note 2)
●
denotes the specifications which apply over the ꢀull operating
temperature range, otherwise specifications are at T = 2.°C1 V = 313V, VLn = 014.V, VHn = 01..V, LATCH = V , SEL = V
,
A
CC
CC
CC
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
6.6
MAX
UNITS
V
●
●
●
●
●
●
●
●
●
●
V
V
V
Shunt Regulator Voltage
I
CC
I
CC
= 5mA
6.2
6.9
SHUNT
CC
CC
ΔV
Shunt Regulator Load Regulation
= 2mA to 10mA
200
300
mV
V
SHUNT
V
V
V
Supply Voltage (Note 3)
2.3
V
SHUNT
CC
Minimum V Output Valid
DIS = 0V
Rising, DIS = 0V
1
V
CCR(MIN)
CC(UVLO)
CC
Supply Undervoltage Lockout
Supply Undervoltage Lockout Hysteresis
Supply Current
V
CC
1.9
5
2
25
70
1
2.1
50
V
ΔV
DIS = 0V
mV
µA
V
CC(UVHYST)
I
CC
V
CC
= 2.3V to 6V
100
V
V
Reference Output Voltage
I
=
1mA
0.985
492
50
1.015
508
REF
VREF
Undervoltage/Overvoltage Voltage Threshold
500
125
mV
µs
UOT
UOD
t
Undervoltage/Overvoltage Voltage Threshold VHn = V
to Output Delay
– 5mV or VLn = V
+ 5mV
500
UOT
UOT
●
●
●
●
●
●
●
●
●
●
●
●
I
t
VHn, VLn Input Current
15
nA
ms
V
VHL
UV/OV Time-Out Period
OV Latch Clear Input High
OV Latch Clear Threshold Input Low
LATCH Input Current
C
= 1nF
TMR
6
8.5
12.5
UOTO
V
V
1.2
LATCH(IH)
LATCH(IL)
LATCH
0.8
1
V
I
V
LATCH
> 0.5V
µA
V
V
V
DIS Input High
1.2
DIS(IH)
DIS(IL)
DIS Input Low
0.8
3
V
I
I
I
DIS Input Current
V
V
V
> 0.5V
1
–1.3
1.3
–180
1
2
µA
µA
µA
mV
V
DIS
DIS
TMR Pull-Up Current
TMR Pull-Down Current
Timer Disable Voltage
Output Voltage High UV/OV
Output Voltage Low UV/OV
= 0V
–2.1
2.1
–2.8
2.8
TMR(UP)
TMR(DOWN)
TMR
TMR
= 1.6V
V
V
V
Referenced to V
–270
TMR(DIS)
CC
UV/OV
UV/OV
V
CC
= 2.3V, I
= –1µA
OH
●
●
V
CC
V
CC
= 2.3V, I
= 2.5mA
0.1
0.01
0.3
0.15
V
V
OL
= 1V, I = 100µA
UV
Three-State Input SEL
●
●
●
●
●
V
V
V
Low Level Input Voltage
0.4
V
V
IL
High Level Input Voltage
1.4
0.7
IH
Pin Voltage when Left in Hi-Z State
SEL High, Low Input Current
Maximum SEL Input Current
I
=
10µA
0.9
1.1
25
30
V
Z
SEL
I
I
µA
µA
SEL
SEL Tied to Either V or GND
SEL(MAX)
CC
Note ±: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: V maximum pin voltage is limited by input current. Since the
CC
V
CC
pin has an internal 6.5V shunt regulator, a low impedance supply that
exceeds 6V may exceed the rated terminal current. Operation from higher
voltage supplies requires a series dropping resistor. See Applications
Information.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
2914f
3
LTC2914
WU
W
TI I G DIAGRA S
VHn Monitor Timing
VLn Monitor Timing
V
V
UOT
VHn
UV
VLn
OV
UOT
t
t
t
t
UOTO
UOD
UOTO
UOD
1V
1V
2914 TD01
2914 TD02
VHn Monitor Timing (TMR Pin Strapped to V
)
CC
VLn Monitor Timing (TMR Pin Strapped to V )
CC
V
UOT
V
UOT
VHn
VLn
t
t
t
t
UOD
UOD
UOD
UOD
UV
1V
OV
1V
2914 TD03
2914 TD04
NOTE: WHEN AN INPUT IS CONFIGURED AS A NEGATIVE SUPPLY MONITOR, VHn WILL TRIGGER AN OV CONDITION AND VLn WILL TRIGGER A UV CONDITION
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at T = 2.°C, V = 313V unless otherwise noted1
A
CC
Input Threshold Voltage
vs Temperature
V
Shunt Voltage
CC
Supply Current vs Temperature
vs Temperature
105
100
95
90
85
80
75
70
65
60
55
50
6.8
6.7
6.6
6.5
6.4
6.3
6.2
0.505
0.504
0.503
0.502
0.501
0.500
0.499
0.498
0.497
0.496
0.495
V
= 6V
CC
10mA
V
= 3.3V
CC
CC
5mA
2mA
1mA
V
= 2.3V
200µA
–50
–25
0
25
50
75
100
–50
0
25
50
75
100
–50 –25
25
50
75
100
–25
0
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
2914 G02
2914 G03
2914 G01
2914f
4
LTC2914
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at T = 2.°C, V = 313V unless otherwise noted1
A
CC
Buꢀꢀered Reꢀerence Voltage
vs Temperature
Transient Duration
vs Comparator Overdrive
V
Shunt Voltage vs I
CC
CC
6.75
6.65
6.55
6.45
6.35
6.25
1.005
1.004
1.003
1.002
1.001
1.000
0.999
0.998
0.997
0.996
0.995
700
600
500
400
300
200
100
0
RESET OCCURS
ABOVE CURVE
25°C
–40°C
85°C
V
= 6V
CC
V
= 2.3V
CC
–2
0
2
4
6
8
10
12
–50 –25
25
50
75
100
0
0.1
1
10
100
I
(mA)
TEMPERATURE (°C)
CC
COMPARATOR OVERDRIVE PAST THRESHOLD (%)
2914 G06
2914 G04
2914 G05
Reset Timeout Period
vs Temperature
UV Output Voltage vs V
UV Output Voltage vs V
CC
CC
12
11
10
9
0.8
0.6
0.4
0.2
0
5
C
= 1nF
VHn = 0.55V
SEL = V
TMR
CC
V
CC
4
3
2
1
0
UV WITH
10k PULL-UP
8
UV WITHOUT
10k PULL-UP
7
6
–50
0
25
50
75
100
–25
0
0.2
0.4
0.6
0.8
1.0
0
1
2
3
4
5
TEMPERATURE (°C)
SUPPLY VOLTAGE, V (V)
SUPPLY VOLTAGE, V (V)
CC
CC
2914 G07
2914 G08
2914 G09
UV/OV Voltage Output Low
vs Output Sink Current
Reset Timeout Period
vs Capacitance
UV, I
vs V
CC
SINK
5
4
3
2
1
0
1.0
0.8
0.6
0.4
10000
VHn = 0.45V
SEL = V
CC
1000
100
125°C
25°C
UV AT 150mV
–40°C
UV AT 50mV
10
1
0.2
0
0
1
2
3
4
5
0
10
15
(mA)
20
25
30
5
0.1
1
10
100
(nF)
1000
I
TMR PIN CAPACITANCE, C
SUPPLY VOLTAGE, V (V)
UV/OV
TMR
CC
2914 G12
2914 G10
2914 G11
2914f
5
LTC2914
U
U
U
PI FU CTIO S
UV(Pin±2):UndervoltageLogicOutput.Assertslowwhen
any positive polarity input voltage is below threshold or
any negative polarity input voltage is above threshold.
Held low for an adjustable delay time after all voltage
DIS (Pin ±3, LTC29±4-2): Output Disable Input. Disables
the OV and UV output pins. When DIS is pulled high, the
OV and UV pins are not asserted except during a UVLO
condition.Pinhasaweak(2µA)internalpull-downtoGND.
Leave pin open if unused.
inputs are valid. Pin has a weak pull-up to V and may
CC
be pulled above V using an external pull-up. Leave pin
CC
Exposed Pad (Pin ±7, DFN Package): Exposed Pad may
be left open or connected to device ground.
open if unused.
V
(Pin ±6): Supply Voltage. Bypass this pin to GND with
CC
GND (Pin 9): Device Ground
a 0.1µF (or greater) capacitor. Operates as a direct supply
inputforvoltagesupto6V.Operatesasashuntregulatorfor
supplyvoltagesgreaterthan6Vandmusthavearesistance
between the pin and the supply to limit input current to no
greater than 10mA. When used without a current-limiting
resistance, pin voltage must not exceed 6V.
LATCH (Pin ±3, LTC29±4-±): OV Latch Clear/Bypass In-
put. When pulled low, 0V is latched when asserted. When
pulled high, OV latch is cleared. While held high, OV has
the same delay and output characteristics as UV.
OV (Pin ±±): Overvoltage Logic Output. Asserts low when
any positive polarity input voltage is above threshold or
any negative polarity input voltage is below threshold.
Latched low (LTC2914-1). Held low for an adjustable
delay time after all inputs are valid (LTC2914-2). Pin has
VH±/VH2(Pin±/Pin3):VoltageHighInputs1and2.When
the voltage on this pin is below 0.5V, an undervoltage
condition is triggered. Tie pin to V if unused.
CC
VH3/VH4 (Pin ./Pin 7): Voltage High Inputs 3 and 4. The
polarity of the input is selected by the state of the SEL pin
(refer to Table 1). When the monitored input is configured
as a positive voltage, an undervoltage condition is trig-
gered when the pin is below 0.5V. When the monitored
input is configured as a negative voltage, an overvoltage
condition is triggered when the pin is below 0.5V. Tie pin
a weak pull-up to V and may be pulled above V using
CC
CC
an external pull-up. Leave pin open if unused.
REF (Pin ±0): Buffered Reference Output. 1V reference
used for the offset of negative-monitoring applications.
The buffered reference sources and sinks up to 1mA.
The reference drives capacitive loads up to 1nF. Larger
capacitive loads may cause instability. Leave pin open if
unused.
to V if unused.
CC
VL±/VL2 (Pin 2/Pin 4): Voltage Low Inputs 1 and 2. When
thevoltageonthispinisabove0.5V, anovervoltagecondi-
tion is triggered. Tie pin to GND if unused.
SEL (Pin ±4): Input Polarity Select Three-State Input.
Connect to V , GND or leave unconnected in open state
CC
to select one of three possible input polarity combinations
VL3/VL4 (Pin 6/Pin 8): Voltage Low Inputs 3 and 4. The
polarity of the input is selected by the state of the SEL pin
(refer to Table 1). When the monitored input is configured
as a positive voltage, an overvoltage condition is triggered
when the pin is above 0.5V. When the monitored input is
configured as a negative voltage, an undervoltage condi-
tion is triggered when the pin is above 0.5V. Tie pin to
GND if unused.
(refer to Table 1).
T
MR (Pin ±.): Reset Delay Timer. Attach an external
capacitor (C
) of at least 10pF to GND to set a reset
TMR
delay time of 9ms/nF. A 1nF capacitor will generate an
8.5ms reset delay time. Tie pin to V to bypass timer.
CC
2914f
6
LTC2914
W
BLOCK DIAGRA
16
15
TMR
V
CC
V
CC
VH1
–
+
400k
OSCILLATOR
1
UV
12
–
+
UV PULSE
GENERATOR
VL1
VH2
2
3
–
+
V
UVLO
UVLO
CC
+
–
2V
V
400k
–
+
CC
OV PULSE
VL2
VH3
GENERATOR
OV
4
5
11
DISABLE
–
+
OV LATCH
CLEAR/BYPASS
LATCH
–
+
+
–
13
13
VL3
VH4
1V
1V
6
7
LTC2914-1
LTC2914-2
–
+
DIS
+
–
2µA
–
+
VL4
8
GND
9
0.5V
REF
THREE-STATE
POLARITY
DECODER
10
1V
SEL
14
BUFFER
2914 -1 BD
2914f
7
LTC2914
U
W U U
APPLICATIO S I FOR ATIO
Voltage Monitoring
The three-state input pin SEL is connected to GND, V or
CC
left unconnected during normal operation. When the pin
is left unconnected, the maximum leakage allowed from
the pin is 10µA to ensure it remains in the open state.
Table 1 shows the three possible selections of polarity
based on the SEL pin connection.
The LTC2914 is a low power quad voltage monitoring cir-
cuit with four undervoltage and four overvoltage inputs. A
timeout period that holds OV or UV asserted after all faults
have cleared is adjustable using an external capacitor and
is externally disabled.
Table ±1 Voltage Polarity Programming (V
= 01.V Typical)
V4 INPUT
UOT
Each voltage monitor has two inputs (VHn and VLn) for
detectingundervoltageandovervoltageconditions. When
SEL
V3 INPUT
V
Positive
Positive
CC
configured to monitor a positive voltage V using the
n
VH3 < V
→ UV
→ OV
VH4 < V
→ UV
→ OV
UOT
UOT
UOT
UOT
3-resistor circuit configuration shown in Figure 1, VHn is
connected to the high-side tap of the resistive divider and
VLnisconnectedtothelow-sidetapoftheresistivedivider.
If an input is configured as a negative voltage monitor, the
VL3 > V
VL4 > V
Open
GND
Positive
Negative
VH3 < V
→ UV
→ OV
VH4 < V
→ OV
→ UV
UOT
UOT
UOT
UOT
VL3 > V
VL4 > V
outputsUV andOV inFigure1areswappedinternally. V
n
n
n
Negative
Negative
is then connected as shown in Figure 2. Note, VHn is still
connected to the high-side tap and VLn is still connected
to the low-side tap.
VH3 < V
→ OV
VH4 < V
→ OV
→ UV
UOT
UOT
UOT
UOT
VL3 > V
→ UV
VL4 > V
3-Step Design Procedure
Polarity Selection
The following 3-step design procedure allows selecting
appropriateresistancestoobtainthedesiredUVandOVtrip
points for the positive voltage monitor circuit in Figure 1
and the negative voltage monitor circuit in Figure 2.
Thethree-statepolarity-selectpin(SEL)selectsoneofthree
possible polarity combinations for the input thresholds,
as described in Table 1. When an input is configured for
negativesupplymonitoring,VHnisconfiguredtotriggeran
overvoltage condition and VLn is configured to trigger an
undervoltagecondition.Withthisconfiguration,anOVcon-
ditionoccurswhenthesupplyvoltageismorenegativethan
the configured threshold and a UV condition occurs when
thevoltageislessnegativethantheconfiguredthreshold.
LTC2914
+
REF
+
1V
–
–
V
n
LTC2914
VHn
R
R
R
C
A
VHn
–
+
–
+
OV
UV
UV
OV
n
n
n
+
–
+
0.5V
R
0.5V
B
B
–
–
+
–
+
n
VLn
VLn
R
R
A
C
2914 F01
2914 F02
V
n
Figure ±1 3-Resistor Positive UV/OV Monitoring Configuration
Figure 21 3-Resistor Negative UV/OV Monitoring Configuration
2914f
8
LTC2914
U
W U U
APPLICATIO S I FOR ATIO
For positive supply monitoring, V is the desired nominal
1. Find R to set the OV trip point of the monitor.
A
n
operatingvoltage,I isthedesirednominalcurrentthrough
n
0.5V 5V
the resistive divider, V is the desired overvoltage trip
OV
RA =
•
≈ 45.3k
10µA 5.5V
point and V is the desired undervoltage trip point.
UV
2. Find R to set the UV trip point of the monitor.
B
For negative supply monitoring, to compensate for the 1V
reference, 1V must be subtracted from V , V and V
n
OV
UV
0.5V 5V
10µA 4.5V
RB =
•
– 45.3k ≅ 10.2k
before using each in the following equations.
±1 Choose R to obtain the desired OV trip point
A
3. Determine R to complete the design.
C
R is chosen to set the desired trip point for the
A
5V
10µA
overvoltage monitor.
RC =
– 45.3k − 10.2k ≈ 442k
Vn
VOV
0.5V
In
RA =
•
(1)
Negative Voltage Monitor Example
21 Choose R to obtain the desired UV trip point
AnegativevoltagemonitorapplicationisshowninFigure 4.
The monitored voltage is a –5V 10ꢀ supply. Nominal
current in the resistive divider is 10µA. For the negative
B
Once R is known, R is chosen to set the desired trip
A
B
point for the undervoltage monitor.
case, 1V is subtracted from V , V and V .
n
OV
UV
Vn
VUV
0.5V
In
1. Find R to set the OV trip point of the monitor.
(2)
RB =
•
–RA
A
0.5V –5V – 1V
10µA –5.5V – 1V
RA =
•
≈ 46.4k
31 Choose R to Complete the Design
C
Once R and R are known, R is determined by:
A
B
C
2. Find R to set the UV trip point of the monitor.
B
Vn
In
(3)
RC =
–RA –RB
0.5V 5V – 1V
10µA 4.5V – 1V
RB =
•
− 46.4k ≅ 8.45k
If any of the variables V , I , V or V change, then each
step must be recalculated.
n
n
UV
OV
3. Determine R to complete the design.
C
–5V – 1V
10µA
RC =
− 46.4k − 8.45k ≈ 549k
Positive Voltage Monitor Example
ApositivevoltagemonitorapplicationisshowninFigure 3.
The monitored voltage is a 5V 10ꢀ supply. Nominal cur-
rent in the resistive divider is 10µA.
V
CC
5V
V1
5V 10%
V
CC
5V
V
CC
REF
LTC2914
VH3
OV
UV
R
A
R
C
V
46.4k
CC
442k
VH1
LTC2914
VL1
OV
R
8.45k
B
R
10.2k
B
VL3
SEL
UV
R
549k
C
R
45.3k
A
GND
SEL
GND
2914 F04
V3
–5V 10%
2914 F03
Figure 31 Positive Supply Monitor
Figure 41 Negative Supply Monitor
2914f
9
LTC2914
U
W U U
APPLICATIO S I FOR ATIO
Power-Up/Power-Down
⎛
⎞
⎟
RC • 0.99
VUV(MIN) = 0.5V • 0.985 • 1+
⎜
AssoonasV reaches1Vduringpower-up,theUVoutput
CC
R +R •1.01
(
)
⎝
⎠
A
B
asserts low and the OV output weakly pulls to V .
CC
and
The LTC2914 is guaranteed to assert UV low and OV high
underconditionsoflowV ,downtoV =1V.AboveV =
CC
CC
CC
⎛
⎞
RC •1.01
R +R • 0.99
2V (2.1V maximum) the VH and VL inputs take control.
VUV(MAX) = 0.5V •1.015 • 1+
⎜
⎟
(
)
⎝
⎠
A
B
Once all VH inputs and V become valid an internal timer
CC
is started. After an adjustable delay time, UV weakly pulls
high.
RC
RA +RB
For a desired trip point of 4.5V,
= 8
Threshold Accuracy
Therefore,
Resetthresholdaccuracyisimportantinasupply-sensitive
system.Ideally,suchasystemresetsonlyifsupplyvoltages
fall outside the exact thresholds for a specified margin.
All LTC2914 inputs have a relative threshold accuracy of
1.5ꢀ over the full operating temperature range.
⎛
⎞
⎠
0.99
1.01
VUV(MIN) = 0.5V • 0.985 • 1+ 8
= 4.354V
= 4.650V
⎝
and
⎛
⎞
⎠
1.01
0.99
VUV(MAX) = 0.5V •1.015 • 1+ 8
For example, when the LTC2914 is programmed to moni-
tor a 5V input with a 10ꢀ tolerance, the desired UV trip
point is 4.5V. Because of the 1.5ꢀ relative accuracy of
the LTC2914, the UV trip point is between 4.433V and
4.567V which is 4.5V 1.5ꢀ.
⎝
Glitch Immunity
In any supervisory application, noise riding on the moni-
tored DC voltage causes spurious resets. To solve this
problem without adding hysteresis, which causes a new
error term in the trip voltage, the LTC2914 lowpass filters
the output of the first stage comparator at each input. This
filter integrates the output of the comparator before as-
serting the UV or OV logic. A transient at the input of the
comparator of sufficient magnitude and duration triggers
the output logic. The Typical Performance Characteristics
section shows a graph of the Transient Duration vs Com-
parator Overdrive.
Likewise, the accuracy of the resistances chosen for R ,
A
R and R affect the UV and OV trip points as well. Us-
B
C
ing the example just given, if the resistances used to set
the UV trip point have 1ꢀ accuracy, the UV trip range is
between 4.354V and 4.650V. This is illustrated in the fol-
lowing calculations.
The UV trip point is given as:
⎛
⎞
RC
RA +RB
VUV = 0.5V 1+
⎜
⎝
⎟
⎠
The two extreme conditions, with a relative accuracy of
1.5ꢀ and resistance accuracy of 1ꢀ, result in:
2914f
10
LTC2914
U
W U U
APPLICATIO S I FOR ATIO
UV/OV Timing
Undervoltage Lockout
TheLTC2914hasanadjustabletimeoutperiod(t
)that
When V falls below 2V, the LTC2914 asserts an
UOTO
CC
holds OV or UV asserted after all faults have cleared. This
assures a minimum reset pulse width allowing a settling
time delay for the monitored voltage after it has entered
the valid region of operation.
undervoltage lockout (UVLO) condition. During UVLO,
UV is asserted and pulled low while OV is cleared and
blocked from asserting. When V rises above 2V, UV
CC
follows the same timing procedure as an undervoltage
condition on any input.
When any VH input drops below its designed threshold,
the UV pin asserts low. When all inputs recover above
their designed thresholds, the UV output timer starts. If
all inputs remain above their designed thresholds when
the timer finishes, the UV pin weakly pulls high. However,
if any input falls below its designed threshold during this
time-outperiod,thetimerresetsandrestartswhenallinputs
areabovethedesignedthresholds.TheOVoutputbehaves
as the UV output when LATCH is high (LTC2914-1).
Shunt Regulator
The LTC2914 has an internal shunt regulator. The V pin
CC
operates as a direct supply input for voltages up to 6V.
Under this condition, the quiescent current of the device
remains below a maximum of 100µA. For V voltages
CC
higher than 6V, the device operates as a shunt regulator
and must have a resistance R between the supply and the
Z
V
CC
pin to limit the current to no greater than 10mA.
Selecting the UV/OV Timing Capacitor
Whenchoosingthisresistancevalue,chooseanappropriate
locationontheI-VcurveshownintheTypicalPerformance
The UV and OV timeout period (t
) for the LTC2914
UOTO
is adjustable to accommodate a variety of applications.
Connecting a capacitor, C , between the TMR pin and
Characteristics section to accommodate variations in V
CC
due to changes in current through R .
TMR
Z
ground sets the timeout period. The value of capacitor
needed for a particular timeout period is:
UV and OV Output Characteristics
–9
The DC characteristics of the UV and OV pull-up and
pull-down strength are shown in the Typical Performance
Characteristicssection.Eachpinhasaweakinternalpull-up
C
= t
• 115 • 10 (F/s)
TMR
UOTO
The Reset Timeout Period vs Capacitance graph found in
theTypicalPerformanceCharacteristicsshowsthedesired
delay time as a function of the value of the timer capacitor
that must be used. The TMR pin must have a minimum of
toV andastrongpull-downtoground.Thisarrangement
CC
allows these pins to have open-drain behavior while pos-
sessing several other beneficial characteristics. The weak
pull-up eliminates the need for an external pull-up resistor
when the rise time on the pin is not critical. On the other
hand, the open-drain configuration allows for wired-OR
connections and is useful when more than one signal
10pF or be tied to V . For long timeout periods, the only
CC
limitation is the availability of a large value capacitor with
low leakage. Capacitor leakage current must not exceed
the minimum TMR charging current of 1.3µA. Tying the
TMR pin to V bypasses the timeout period.
CC
needs to pull down on the output. V of 1V guarantees
CC
a maximum V = 0.15V at UV.
OL
2914f
11
LTC2914
U
W U U
APPLICATIO S I FOR ATIO
AtV =1V,theweakpull-upcurrentonOVisbarelyturned
OV Latch (LTC29±4-±)
CC
on. Therefore, an external pull-up resistor of no more than
100kisrecommendedontheOVpinifthestateandpull-up
With the LATCH pin held low, the OV pin latches low when
an OV condition is detected. The latch is cleared by raising
the LATCH pin high. If an OV condition clears while LATCH
is held high, the latch is bypassed and the OV pin behaves
the same as the UV pin with a similar timeout period at the
output. If LATCH is pulled low while the timeout period is
active, the OV pin latches as before.
strength of the OV pin is crucial at very low V .
CC
Note however, by adding an external pull-up resistor, the
pull-up strength on the OV pin is increased. Therefore, if
it is connected in a wired-OR connection, the pull-down
strength of any single device must accommodate this
additional pull-up strength.
Disable (LTC29±4-2)
Output Rise and Fall Time Estimation
The LTC2914-2 allows disabling the UV and OV outputs
via the DIS pin. Pulling DIS high forces both outputs to
remain weakly pulled high, regardless of any faults that
occur on the inputs. However, if a UVLO condition oc-
curs, UV asserts and pulls low, but the timeout function
is bypassed. UV pulls high as soon as the UVLO condition
is cleared.
The UV and OV outputs have strong pull-down capabil-
ity. The following formula estimates the output fall time
(90ꢀ to 10ꢀ) for a particular external load capacitance
(C
):
LOAD
t
≈ 2.2 • R • C
PD LOAD
FALL
where R is the on-resistance of the internal pull-down
PD
DIS has a weak 2µA (typical) internal pull-down current
guaranteeing normal operation with the pin left open.
transistor, typically 50Ω at V > 1V and at room tem-
CC
perature (25°C). C
is the external load capacitance
on the pin. Assuming a 150pF load capacitance, the fall
LOAD
time is 16.5ns.
The rise time on the UV and OV pins is limited by a 400k
pull-up resistance to V . A similar formula estimates the
CC
output rise time (10ꢀ to 90ꢀ) at the UV and OV pins:
t
≈ 2.2 • R • C
PU LOAD
RISE
where R is the pull-up resistance.
PU
2914f
12
LTC2914
U
TYPICAL APPLICATIO S
Quad UV/OV Supply Monitor, ±05 Tolerance, .V, 313V, 21.V, ±18V
5V
3.3V
2.5V
1.8V
P0WER
SUPPLIES
C
0.1µF
BYP
1
16
R
C1
V
CC
44.2k
14
11
12
VH1
SEL
R
R
C2
B1
LTC2914-1
27.4k
1k
2
3
VL1
OV
SYSTEM
VH2
R
R
1k
A1
B2
UV
4.53k
4
VL2
REF
VH3
10
5
R
R
4.53k
C3
A2
19.6k
13
LATCH
R
R
1k
C4
B3
12.4k
6
7
VL3
VH4
R
1k
R
4.53k
B4
A3
8
VL4
GND TMR
R
A4
4.53k
2914 TA02
9
15
C
TMR
TIMEOUT = 200ms
22nF
Dual Positive and Dual Negative UV/OV Supply Monitor,
±05 Tolerance, .V, 313V, –.V, –313V
5V
P0WER
SUPPLIES
3.3V
C
0.1µF
BYP
16
R
C1
V
CC
44.2k
1
VH1
R
1k
R
B1
C2
27.4k
2
3
VL1
VH2
11
12
OV
R
1k
R
B2
A1
LTC2914-1
4.53k
4
VL2
UV
LATCH
SEL
10
REF
VH3
SYSTEM
R
4.53k
R
A2
A3
4.64k
13
14
5
R
R
A4
B3
845Ω 4.64k
6
7
VL3
VH4
R
C3
54.9k
R
B4
768Ω
8
VL4
GND TMR
R
C4
37.4k
9
15
C
TMR
2.2nF
TIMEOUT = 20ms
–3.3V
–5V
2914 TA03
2914f
13
LTC2914
Triple UV/OV Supply Monitor Powered ꢀrom 48V, ±05 Tolerance, 48V, .V, 21.V
48V
R
Z
P0WER
SUPPLIES
8.25k
5V
2.5V
C
0.1µF
BYP
16
R
C1
V
475k
CC
1
14
VH1
SEL
R
1k
R
C2
B1
44.2k
2
3
15
11
VL1
VH2
TMR
OV
SYSTEM
R
R
B2
A1
LTC2914-1
4.53k 1k
12
13
4
10
5
VL2
REF
VH3
UV
R
R
A2
C3
4.53k
19.6k
LATCH
R
1k
B3
6
7
VL3
VH4
R
4.53k
A3
8
VL4
GND
2914 TA04
9
2914f
14
LTC2914
U
PACKAGE DESCRIPTIO
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
R = 0.115
0.40 0.10
5.00 0.10
(2 SIDES)
TYP
16
9
R = 0.20
TYP
0.65 0.05
3.50 0.05
1.65 0.05
3.00 0.10 1.65 0.10
(2 SIDES) (2 SIDES)
PIN 1
2.20 0.05 (2 SIDES)
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
PACKAGE
OUTLINE
(DHC16) DFN 1103
8
1
0.25 0.05
0.50 BSC
0.75 0.05
0.00 – 0.05
0.200 REF
0.25 0.05
0.50 BSC
4.40 0.10
(2 SIDES)
4.40 0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 .005
.150 – .165
.009
(0.229)
REF
16 15 14 13 12 11 10 9
.254 MIN
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165 .0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
7
8
.015 .004
(0.38 0.10)
× 45°
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
.007 – .0098
(0.178 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.0250
(0.635)
BSC
.008 – .012
GN16 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2914f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC2914
U
TYPICAL APPLICATIO
Quad UV/OV Supply Monitor with LED Undervoltage and Overvoltage Indicator
and Manual Undervoltage Reset Button, ±05 Tolerance, ±2V, .V, 313V, 21.V
12V
5V
3.3V
P0WER
SUPPLIES
2.5V
0.1µF
510Ω
510Ω
44.2k
1k
V
CC
VH1
SEL
OV
LED
LED
27.4k
VL1
VH2
SYSTEM
4.53k 1k
4.53k 19.6k
LTC2914-1
VL2
UV
REF
VH3
LATCH
1k
2.05M
10k
VL3
VH4
4.53k 100k
VL4
GND TMR
2914 TA06
C
TMR
TIMEOUT = 200ms
22nF
MANUAL
RESET BUTTON
(NORMALLY OPEN)
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LTC1326/
LTC1326-2.5
LTC1726-2.5/
LTC1726-5
LTC1727-2.5/
LTC1727-5
LTC1728-1.8/
LTC1728-3.3
LTC1728-2.5/
LTC1728-5
Micropower Precision Triple Supply Monitor for 5V/2.5V,
3.3V and ADJ
Micropower Triple Supply Monitor for 2.5V/5V, 3.3V and
ADJ
Micropower Triple Supply Monitor with Open-Drain Reset
Micropower Triple Supply Monitor with Open-Drain Reset
Micropower Triple Supply Monitor with Open-Drain Reset
4.725V, 3.118V, 1V Threshold ( 0.75ꢀ)
Adjustable RESET and Watchdog Time-Outs
Individual Monitor Outputs in MSOP
5-Lead SOT-23 Package
5-Lead SOT-23 Package
LTC1985-1.8
LTC2900
Micropower Triple Supply Monitor with Push-Pull Reset
Programmable Quad Supply Monitor
5-Lead SOT-23 Package
Adjustable RESET, 10-Lead MSOP and 3mm x 3mm 10-Lead
DFN Package
LTC2901
LTC2902
Programmable Quad Supply Monitor
Programmable Quad Supply Monitor
Adjustable RESET and Watchdog Timer, 16-Lead SSOP Package
Adjustable RESET and Tolerance, 16-Lead SSOP Package,
Margining Functions
LTC2903
LTC2904
LTC2905
LTC2906
LTC2907
LTC2908
LTC2909
Precision Quad Supply Monitor
Three-State Programmable Precision Dual Supply Monitor
Three-State Programmable Precision Dual Supply Monitor
Precision Dual Supply Monitor 1 Selectable and 1 Adjustable Separate VCC Pin, RST/RST Outputs
Precision Dual Supply Monitor 1 Selectable and 1 Adjustable Separate VCC, Adjustable Reset Timer
Precision Six Supply Monitor
6-Lead SOT-23 Package, Ultralow Voltage Reset
Adjustable Tolerance, 8-Lead SOT-23 Package
Adjustable RESET and Tolerance, 8-Lead SOT-23 Package
8-Lead TSOT-23 and 3mm × 2mm DFN Packages
Separate VCC Pin, Adjustable Reset Timer, 8-Lead TSOT-23 and
3mm × 2mm DFN Packages
Precision Dual Input UV, OV and Negative Voltage Monitor
2914f
LT 0606 • PRINTED IN USA
16 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
© LINEAR TECHNOLOGY CORPORATION 2006
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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