LTC3124EDHC#PBF [Linear]
LTC3124 - 15V, 5A 2-Phase Synchronous Step-Up DC/DC Converter with Output Disconnect; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LTC3124EDHC#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3124 - 15V, 5A 2-Phase Synchronous Step-Up DC/DC Converter with Output Disconnect; Package: DFN; Pins: 16; Temperature Range: -40°C to 85°C |
| 文件： | 总28页 (文件大小：642K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3124
15V, 5A 2-Phase Synchronous
Step-Up DC/DC Converter with
Output Disconnect
FEATURES
DESCRIPTION
The LTC®3124 is a dual-phase, synchronous step-up DC/
DC converter with true output disconnect and inrush
current limiting capable of providing output voltages up
to 15V. Dual-phase operation significantly reduces peak
inductor and capacitor ripple currents, minimizing induc-
tor and capacitor size. The 2.5A per phase current limit,
alongwiththeabilitytoprogramoutputvoltagesupto15V
make the LTC3124 well suited for a variety of demanding
applications. Once started, operation will continue with
inputs down to 500mV.
n
V Range: 1.8V to 5.5V, 500mV After Start-Up
IN
n
Adjustable Output Voltage: 2.5V to 15V
n
1.5A Output Current for V = 5V and V
= 12V
IN
OUT
n
n
n
n
n
Dual-Phase Control Reduces Output Voltage Ripple
Output Disconnects from Input When Shut Down
Synchronous Rectification: Up to 95% Efficiency
Inrush Current Limit
Up to 3MHz Programmable Switching Frequency
Synchronizable to External Clock
Selectable Burst Mode® Operation: 25µA I
n
n
n
n
n
Q
Output Overvoltage Protection
Internal Soft-Start
The LTC3124 switching frequency can be programmed
from 100kHz to 3MHz to optimize applications for highest
efficiencyorsmallestsolutionfootprint. Theoscillatorcan
be synchronized to an external clock for noise sensitive
applications. Selectable Burst Mode operation reduces
quiescentcurrentto25µA,ensuringhighefficiencyacross
the entire load range. An internal soft-start limits inrush
current during start-up.
<1µA I in Shutdown
Q
16-Lead, Thermally- Enhanced 3mm × 5mm ×
0.75mm DFN and TSSOP Packages
APPLICATIONS
n
RF, Microwave Power Amplifiers
n
Piezo Actuators
Otherfeaturesincludea<1µAshutdowncurrentandrobust
protectionundershort-circuit,thermaloverload,andoutput
overvoltage conditions. The LTC3124 is offered in both
16-lead DFN and thermally-enhanced TSSOP packages.
n
Small DC Motors, Thermal Printers
12V Analog Rail from Battery, 5V, or Backup Capacitor
n
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
TYPICAL APPLICATION
5V to 12V Synchronous Boost Converter
Efficiency Curve
100
90
80
70
60
50
40
30
20
10
0
10
4.7µH
V
IN
Burst Mode
OPERATION
SWB
CAP
5V
V
100nF
OUT
12V
1
PGNDB
V
OUTB
22µF
×2
1.5A
4.7µH
PWM
SWA
LTC3124
PGNDA
V
OUTA
0.1
Burst Mode
OPERATION
V
IN
SGND
0.01
0.001
0.0001
PWM/SYNC SD
1.02M
BURST PWM
10µF
OFF ON
PWM
10
V
FB
V
C
CC
f
= 1MHz
SW
RT
113k
EFFICIENCY
POWER LOSS
84.5k
680pF
4.7µF
56pF
28k
0.01
0.1
1
100
1000
LOAD CURRENT (mA)
3124 TA01b
3124 TA01a
3124f
1
For more information www.linear.com/LTC3124
LTC3124
ABSOLUTE MAXIMUM RATINGS (Note 1)
V Voltage................................................... –0.3V to 6V
OUTA OUTB
SWA, SWB Voltages (Note 2)..................... –0.3V to 18V
SWA, SWB (Pulsed < 100ns) (Note 2) ....... –0.3V to 19V
All Other Pins............................................... –0.3V to 6V
Operating Junction Temperature Range (Notes 3, 4)
LTC3124E/LTC3124I........................... –40°C to 125°C
LTC3124H .......................................... –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
IN
V
, V
Voltages............................... –0.3V to 18V
VC Voltage ..................................................–0.3V to V
RT Voltage ..................................................–0.3V to V
CAP Voltage
CC
CC
FE Package Only ...............................................300°C
V
< 5.7V ............................–0.3V to (V
+ 0.3V)
+ 0.3V)
OUT
5.7V ≤ V
V
OUT
≤ 11.7V......(V
– 6V) to (V
OUT
OUT
OUT
> 11.7V.................................(V
– 6V) to 12V
OUT
OUT
PIN CONFIGURATION
TOP VIEW
TOP VIEW
SWB
PGNDB
SWA
1
2
3
4
5
6
7
8
16 CAP
15
14 NC
13
SWB
PGNDB
SWA
1
2
3
4
5
6
7
8
16 CAP
15
14 NC
V
V
OUTB
OUTB
PGNDA
V
OUTA
PGNDA
13
12
11
10
9
V
OUTA
17
PGND
17
PGND
V
IN
12 SGND
11 SD
V
SGND
SD
IN
PWM/SYNC
PWM/SYNC
V
CC
10 FB
V
CC
FB
RT
9
VC
RT
VC
FE PACKAGE
DHC PACKAGE
16-LEAD PLASTIC TSSOP
16-LEAD (5mm × 3mm) PLASTIC DFN
T
JMAX
= 150°C, θ = 40°C/W (NOTE 5), θ = 10°C/W
JA JC
EXPOSED PAD (PIN 17) IS PGND AND MUST BE SOLDERED TO PCB
FOR RATED THERMAL PERFORMANCE
T
= 125°C, θ = 43°C/W (NOTE 5), θ = 5°C/W
JA JC
EXPOSED PAD (PIN 17) IS PGND AND MUST BE SOLDERED TO PCB
FOR RATED THERMAL PERFORMANCE
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LTC3124EDHC#PBF
LTC3124IDHC#PBF
LTC3124EFE#PBF
LTC3124IFE#PBF
LTC3124HFE#PBF
TAPE AND REEL
PART MARKING*
3124
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3124EDHC#TRPBF
LTC3124IDHC#TRPBF
LTC3124EFE#TRPBF
LTC3124IFE#TRPBF
LTC3124HFE#TRPBF
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
16-Lead Plastic TSSOP
3124
3124FE
3124FE
16-Lead Plastic TSSOP
3124FE
16-Lead Plastic TSSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping
container.Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3124f
2
For more information www.linear.com/LTC3124
LTC3124
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 3). VIN = 3.6V, VOUTA = VOUTB = 12V, RT = 28k unless
otherwise noted.
PARAMETER
Minimum Start-Up Voltage
Input Voltage Range
Output Voltage Adjust Range
Feedback Voltage
Feedback Input Current
Quiescent Current, Shutdown
Quiescent Current, Active
Quiescent Current, Burst
CONDITIONS
MIN
TYP
1.6
MAX
1.8
5.5
15
1.224
50
1
840
40
20
UNITS
V
l
l
l
l
V
V
= 0V
≥ 2.5V
OUT
OUT
0.5
2.5
1.176
V
V
V
nA
µA
µA
µA
µA
1.200
1
0.2
600
25
10
FB = 1.4V
SD = 0V, V
= 0V, Not Including Switch Leakage
OUT
FB = 1.4V, Measured on V , Non-Switching
Measured on V , FB = 1.4V
Measured on V , FB = 1.4V
IN
IN
OUT
l
l
N-Channel MOSFET Switch Leakage Current SW = 15V, V
= 15V, Per Phase
= 15V, SD = 0V, Per Phase
0.1
0.1
0.130
0.200
3.5
40
70
µA
µA
Ω
Ω
A
%
%
MHz
MHz
V
OUT
P-Channel MOSFET Switch Leakage Current SW = 0V, V
OUT
N-Channel MOSFET Switch On-Resistance
P-Channel MOSFET Switch On-Resistance
N-Channel MOSFET Peak Current Limit
Maximum Duty Cycle
Minimum Duty Cycle
Switching Frequency
Per Phase
Per Phase
Per Phase
FB = 1.0V
FB = 1.4V
Per Phase
l
l
l
l
l
l
l
2.5
90
4.5
94
0
1.17
6.0
0.83
0.2
0.9 • V
1
SYNC Frequency Range
PWM/SYNC Input High Voltage
PWM/SYNC Input Low Voltage
PWM/SYNC Input Current
CC
0.1 • V
1
–5.8
4.6
V
µA
V
CC
V
V
V
= 5.5V
> 6.2V, Referenced to V
0.01
–5.4
4.25
100
25
PWM/SYNC
CAP Clamp Voltage
–5.0
3.9
60
OUT
OUT
V
Regulation Voltage
< 2.8V, V > 5V
OUT
V
CC
IN
l
Error Amplifier Transconductance
Error Amplifier Sink Current
Error Amplifier Source Current
Soft-Start Time
130
µS
µA
µA
ms
V
FB = 1.6V, VC = 1.15V
FB = 800mV, VC = 1.15V
–25
10
l
l
SD Input High Voltage
SD Input Low Voltage
1.6
0.25
2
V
µA
SD Input Current
SD = 5.5V
1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Voltage transients on the SW pin beyond the DC limit specified in
the Absolute Maximum Ratings are non-disruptive to normal operations
when using good layout practices, as shown on the demo board or
described in the data sheet or application notes.
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance
and other environmental factors. The junction temperature (T in °C) is
J
calculated from the ambient temperature (T in °C) and power dissipation
A
(P in Watts) according to the formula:
D
T = T + (P • θ )
JA
J
A
D
where θ is the thermal impedance of the package.
JA
Note 3: The LTC3124 is tested under pulsed load conditions such that
Note 4: The LTC3124 includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 150°C when overtemperature shutdown is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
Note 5: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal impedance much higher than
the rated package specifications.
T ≈ T . The LTC3124E is guaranteed to meet performance specifications
A
J
from 0°C to 85°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3124I is guaranteed to meet specifications over the –40°C to 125°C
operating junction temperature range. The LTC3124H is guaranteed to
meet specifications over the full –40°C to 150°C operating junction range.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C.
3124f
3
For more information www.linear.com/LTC3124
LTC3124
TYPICAL PERFORMANCE CHARACTERISTICS
Configured as front page application at TA = 25°C, unless otherwise specified.
Efficiency vs Load Current,
VOUT = 5V
Efficiency vs Load Current,
VOUT = 7.5V
Efficiency vs Load Current,
VOUT = 12V
100
100
100
90
80
70
60
50
40
30
20
10
0
Burst Mode
90 OPERATION
Burst Mode
90 OPERATION
Burst Mode
OPERATION
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
PWM
PWM
PWM
f
= 1MHz
f
= 1MHz
f
= 1MHz
SW
SW
SW
V
V
V
= 4.2V
= 3.3V
= 0.6V
V
V
V
= 5.4V
= 3.8V
= 2.3V
V
V
V
= 5.4V
= 4.2V
= 2.6V
IN
IN
IN
IN
IN
IN
IN
IN
IN
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3124 G01
3124 G02
3124 G03
PWM Mode Operation
Load Transient Response
Inrush Current Control
V
SD
5V/DIV
OUT
V
OUT
20mV/DIV
500mV/DIV
AC-COUPLED
AC-COUPLED
PHASE A
INDUCTOR
CURRENT
500mA/DIV
V
1500mA
OUT
5V/DIV
OUTPUT
CURRENT
500mA/DIV
INDUCTOR A
CURRENT
1A/DIV
INDUCTOR B
CURRENT
1A/DIV
PHASE B
INDUCTOR
CURRENT
500mA/DIV
150mA
150mA
3124 G04
3124 G06
3124 G05
I
= 500mA
2µs/DIV
I
= 100mA
2ms/DIV
R
= 169k
= 330pF
500µs/DIV
LOAD
LOAD
C
C
C
NO C
F
R
DS(ON) vs Temperature,
Switching Frequency
vs Temperature
Feedback vs Temperature
Both NMOS and PMOS
80
60
0.5
0
0.05
0
–0.05
–0.10
40
–0.5
–1.0
–1.5
–2.0
–0.15
–0.20
20
0
–0.25
–0.30
–0.35
–20
–40
0
40
TEMPERATURE (°C)
120
–40
160
–50
–10
30
70
110
150
80
70
TEMPERATURE (°C)
160
–50 –20 10
40
100 130
TEMPERATURE (°C)
3124 G08
3124 G07
3124 G09
3124f
4
For more information www.linear.com/LTC3124
LTC3124
TYPICAL PERFORMANCE CHARACTERISTICS
Configured as front page application at TA = 25°C, unless otherwise specified.
PWM Mode Maximum Output
Current vs VIN
Peak Current Limit Change
vs Temperature
PWM Operation No-Load Input
Current vs VIN
4.0
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
2
1
200
180
160
140
120
100
80
V
V
V
V
= 5V
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
= 15V
= 12V
= 7.5V
= 5V
OUT
OUT
OUT
OUT
= 7.5V
= 12V
= 15V
= 2.5V
0
–1
–2
–3
–4
60
40
20
0
0.5
1
1.5
2
2.5
V
3
3.5
4
4.5
5
5.5
–50
–10
30
70
110
150
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
TEMPERATURE (°C)
(V)
V
IN
(V)
IN
3124 G11
3124 G10
3124 G12
Burst Mode No-Load Input
Current vs VIN
Burst Mode Quiescent Current
Change vs Temperature
Burst Mode Output Current vs VIN
400
350
300
250
200
150
100
50
10000
1000
100
75
60
45
30
15
0
V
V
V
V
V
= 15V
OUT
OUT
OUT
OUT
OUT
= 12V
= 7.5V
= 5V
= 2.5V
10
0.5
0
–15
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
–50
–10
30
70
110
150
V , FALLING (V)
IN
TEMPERATURE (°C)
V
, FALLING (V)
IN
3124 G13
3124 G15
3124 G14
V
V
V
= 2.5V
= 5V
= 7.5V
V
= 12V
= 15V
OUT
OUT
OUT
OUT
OUT
V
SD Pin Threshold
RT vs Frequency
V
OUT
100
10
5V/DIV
900mV
400mV
V
SD
500mV/DIV
3124 G16
1s/DIV
10
100
1000
3000
FREQUENCY (kHz)
3124 G17
3124f
5
For more information www.linear.com/LTC3124
LTC3124
TYPICAL PERFORMANCE CHARACTERISTICS
Configured as front page application at TA = 25°C, unless otherwise specified.
Frequency Accuracy
Efficiency vs Frequency
CAP Pin Voltage vs VOUT
100
90
2
1
0
–1
–2
–3
–4
–5
–6
–7
80
70
60
50
0
40
30
20
10
0
–1
V
V
V
= 15V
= 3.6V
= 2.5V
100kHz EFFICIENCY
1MHz EFFICIENCY
3MHz EFFICIENCY
OUT
OUT
OUT
–2
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
10
100
OUTPUT CURRENT (mA)
1000
0
2
4
6
8
10
12
14
V
OUT
(V)
V , FALLING (V)
IN
3124 G21
3124 G20
3124 G19
Burst Mode Operation to
PWM Mode
VCC vs VIN
Burst Mode Operation
4.5
4.0
3.5
3.0
2.5
V
OUT
V
OUT
100mV/DIV
50mV/DIV
AC-COUPLED
AC-COUPLED
V
SWA
10V/DIV
V
PWM/SYNC
2V/DIV
PHASE A
INDUCTOR
CURRENT
500mA/DIV
V
IN
V
IN
FALLING
RISING
3124 G23
3124 G24
5µs/DIV
OUTPUT CURRENT = 50mA
50µs/DIV
OUTPUT CURRENT = 100mA
TYPE III COMPENSATION—SEE FIGURE 10 FOR
COMPONENT VALUES
0
1
2
3
4
5
6
V
(V)
IN
3124 G22
PWM Mode to Burst Mode
Operation
Burst Mode Transient
Synchronized Operation
V
V
OUT
OUT
V
100mV/DIV
50mV/DIV
SWB
10V/DIV
AC-COUPLED
AC-COUPLED
SYNCHRONIZED TO 1.3MHz
V
SWA
10V/DIV
V
PWM/SYNC
2V/DIV
SYNCHRONIZATION SIGNAL SET TO 2.6MHz
100mA
OUTPUT
CURRENT
100mA/DIV
V
PWM/SYNC
5V/DIV
10mA
10mA
3124 G26
3124 G27
3124 G25
200µs/DIV
1µs/DIV
50µs/DIV
OUTPUT CURRENT = 1A
OUTPUT CURRENT = 100mA
TYPE III COMPENSATION—SEE FIGURE 10 FOR
COMPONENT VALUES
3124f
6
For more information www.linear.com/LTC3124
LTC3124
TYPICAL PERFORMANCE CHARACTERISTICS
Configured as front page application at TA = 25°C, unless otherwise specified.
SWA and SWB at 1MHz/Phase
Short-Circuit Response
SHORT-CIRCUIT
APPLIED
V
SWB
5V/DIV
V
OUT
5V/DIV
SHORT-CIRCUIT
REMOVED
INDUCTOR B
CURRENT
2A/DIV
V
SWA
5V/DIV
INDUCTOR A
CURRENT
2A/DIV
3124 G29
3124 G28
I
= 1500mA 500ns/DIV
I
= 500mA 100µs/DIV
LOAD
LOAD
Output Voltage Ripple at 1.5A
Load with Two 10µF Ceramic
Capacitors
SW Pins while Synchronizing
to 1.2MHz
V
OUT
V
SWB
20mV/DIV
5V/DIV
AC-COUPLED
INDUCTOR B
CURRENT
500mA/DIV
INDUCTOR A
CURRENT
500mA/DIV
V
SWA
5V/DIV
3124 G30
3124 G31
I
= 1500mA 500ns/DIV
500ns/DIV
LOAD
PIN FUNCTIONS
SWB, SWA (Pin 1, Pin 3): Phase B and Phase A Switch
Pins. Connect inductors from these pins to the input sup-
ply. Keep PCB trace lengths as short and wide as possible
PGNDB, PGNDA, PGND (Pin 2, Pin 4, Exposed Pad
Pin17):PowerGround.WhenlayingoutyourPCB,provide
a short, direct path between PGND and the output capaci-
tors and tie directly to the ground plane. The exposed pad
is ground and must be soldered to the PCB ground plane
for rated thermal and electrical performance.
to reduce EMI and voltage overshoot. When V
≥ V +
OUT
IN
2V, internal anti-ringing resistors are connected between
V and both SWA and SWB after their respective induc-
IN
tor currents have dropped to near zero, to minimize EMI.
Theseanti-ringingresistorsarealsoactivatedinshutdown
and during the sleep periods of Burst Mode operation.
V (Pin 5): Input Supply Pin. The device is powered from
IN
V if V is initially greater than approximately 3.5V, with
IN
IN
V continuingtosupplythedevicedowntoapproximately
IN
3V; otherwise the greater of V and V
supplies the
IN
OUT
3124f
7
For more information www.linear.com/LTC3124
LTC3124
PIN FUNCTIONS
device. Place a low ESR ceramic bypass capacitor of at
VC (Pin 9): Error Amplifier Output. A frequency com-
pensation network is connected from this pin to SGND
to compensate the control loop. See Compensating the
Feedback Loop section for guidelines.
least 10µF from V to PGND. X5R and X7R dielectrics
IN
are preferred for their superior voltage and temperature
characteristics.
PWM/SYNC (Pin 6): Burst Mode Operation Select and
OscillatorSynchronization. Donotleavethispinfloating.
FB (Pin 10): Feedback Input to the Error Amplifier. Con-
nect the resistor divider tap to this pin. Connect the top
of the divider to V
and the bottom of the divider to
OUT
• PWM/SYNC = High. Disable Burst Mode operation and
maintain low noise, constant frequency operation.
SGND. The output voltage can be adjusted from 2.5V to
15V according to the formula:
• PWM/SYNC = Low. The converter operates in Burst
Mode, independent of load current.
R1
R2
VOUT =1.2V • 1+
• PWM/SYNC = External CLK. The internal oscillator is
synchronized to the external CLK signal. Burst Mode
operation is disabled. A clock pulse width of 100ns
minimum is required to synchronize the oscillator.
SD(Pin11):LogicControlledShutdownInput.Pullingthis
pin above 1.6V enables normal, free-running operation.
Forcing this pin below 0.25V shuts the LTC3124 off, with
quiescentcurrentbelow1µA.Donotleavethispinfloating.
An external resistor MUST BE connected between R
T
and SGND to program the oscillator slightly below the
SGND (Pin 12): Signal Ground. When laying out your PC
board, provide a short, direct path between SGND and the
groundreferencedsidesofalltheappropriatecomponents
connecting to pins RT, VC, and FB.
desired synchronization frequency.
In non-synchronized applications, repeated clocking of
the PWM/SYNC pin to affect an operating mode change
is supported with these restrictions:
V
, V
(Pin13, Pin15):OutputVoltageSensesand
OUTA OUTB
• Boost Mode (V
> V ): I
< 3mA: f
≤
OUT
≥ 3mA: f
IN
OUT
PWM/SYNC
theSourceoftheInternalSynchronousRectifierMOSFETs.
Driver bias is derived from V . Connect the output filter
10Hz, I
≤ 5kHz.
< V ): I < 5mA: f
OUT
OUT
PWM/SYNC
OUT
capacitor from V
to PGND, close to the IC. A minimum
value of 10µF ceramic per phase is recommended. V
disconnected from V when SD is low. V
OUT
• Buck Mode (V
≤
OUT
IN
PWM/SYNC
PWM/SYNC
is
OUTB
OUT
and V
2.5Hz, I
≥ 5mA: f
≤ 5kHz.
OUT
IN
OUTA
V
(Pin 7): V Regulator Output. Connect a low ESR
CC
CC
must be tied together.
filter capacitor of at least 4.7µF from this pin to SGND to
NC(Pin14):NoConnect.Notconnectedinternally.Connect
this pin to V /V to provide a wider V copper
providearegulatedrailapproximatelyequaltothelowerof
OUTA OUTB
OUT
V and 4.25V. When V
is higher than V , and V falls
IN IN
IN
OUT
plane on the printed circuit board.
below 3V, V will regulate to the lower of approximately
CC
V
and 4.25V. A UVLO event occurs if V drops below
CAP (Pin 16): Serves as the Low Reference for the Syn-
chronous Rectifiers Gate Drives. Connect a low ESR filter
OUT
CC
1.5V, typical. Switching is inhibited, and a soft-start is
initiated when V returns above 1.6V, typical.
capacitor(typically100nF)fromthispintoV
an elevated ground rail, approximately 5.4V below V
used to drive the synchronous rectifiers.
toprovide
CC
OUT
,
OUT
RT (Pin 8): Frequency Adjust Pin. Connect to SGND
through an external resistor (R ) to program the oscillator
T
frequency according to the formula:
56
RT
fOSC
≅
fOSC 28
fSWITCH
=
≅
2
RT
where f
is in MHz and R is in kΩ.
OSC
T
3124f
8
For more information www.linear.com/LTC3124
LTC3124
BLOCK DIAGRAM
BULK
CONTROL
SIGNALS
V
IN
V
SWB
1
OUTB
V
OUT
15
11
2.5V TO 15V
SD
SHUT
C
OUT
PWM
LOGIC
AND
DOWN
C
CAP
100nF
ANTI-
RING
EN
DRIVERS
–
+
CAP
NC
V
– 5.4V RAIL
16
14
OUT
CURRENT
SENSE
I
ZERO
COMP
PWM
COMP
+
– –
OVLO
–
+
+
16.5V
STOP SWITCHING
+
+
3.5A
–
I
LB
PEAK
BULK
COMP
CONTROL
V
IN
SIGNALS
ADAPTIVE SLOPE COMP
V
OUTA
SWA
3
13
PWM
LOGIC
AND
TSD
ANTI-
RING
LA
DRIVERS
–
+
CURRENT
SENSE
IZERO
COMP
THERMAL SD
PWM
COMP
+
– –
REFERENCE
1.2V
BURST
SLEEP
Burst
+
Mode
V
IN
V
IN
1.8V TO 5.5V
CONTROL
5
+
V
+
–
REFUP
+
C
IN
V
IN
3.5A
I
PEAK
COMP
4.25V
LDO
SOFT-
START
ADAPTIVE SLOPE COMP
OSCILLATOR
SYNC
g
ERROR
m
AMPLIFIER
+
–
R1
R2
VC
+
9
FB
10
V
CC
C
R
C
F
EXPOSED
PAD
RT
PWM/SYNC
V
CC
PGNDB
2
SGND
12
PGNDA
C
C
8
6
7
4
17
3124 BD
C
VCC
R
T
3124f
9
For more information www.linear.com/LTC3124
LTC3124
OPERATION
TheLTC3124isadual-phase,adjustablefrequency(100kHz
to 3MHz) synchronous boost converter housed in either a
16-lead5mm×3mmDFNorathermally-enhancedTSSOP
package. The LTC3124 offers the unique ability to start up
from inputs as low as 1.8V and continue to operate from
inputs as low as 0.5V, for output voltages greater than
2.5V. The device also features fixed frequency, current
mode PWM control for exceptional line and load regula-
tion. The current mode architecture with adaptive slope
compensation provides excellent load transient response
and requires minimal output filtering. An internal 10ms
soft-start limits inrush current during start-up and simpli-
fies the design process while minimizing the number of
external components.
The peak inductor current, reduced nearly by a factor of
2 when compared to a single phase step-up converter,
is given by:
1
IO
∆IL
2
ILPEAK ≅ •
2 (1–D)
+
where I is the average load current, D is the PWM duty
O
cycle, and ∆I is the inductor ripple current. This relation-
L
ship is shown graphically in Figure 1.
With 2-phase operation, one of the phases is always de-
livering current to the load whenever V is greater than
IN
one-half V
(duty cycles less than 50%). As the duty
OUT
cycle decreases further, load current delivery between the
two phases begins to overlap, occurring simultaneously
for a growing portion of each phase as the duty cycle ap-
proaches zero. This significantly reduces both the output
ripple current and the peak current in each inductor, when
comparedwithasingle-phaseconverter.Thisisillustrated
in the waveforms of Figures 2 and 3.
WithitslowR
andlowgatechargeinternalN-channel
DS(ON)
MOSFET switches and P-channel MOSFET synchronous
rectifiers, the LTC3124 achieves high efficiency over a
wide range of load current. High efficiency is achieved at
light loads by utilizing Burst Mode operation. Operation
can be best understood by referring to the Block Diagram.
3.5
SINGLE PHASE
3.0
MULTIPHASE OPERATION
2.5
The LTC3124 uses a dual-phase architecture, rather than
the conventional single phase of other boost converters.
By having two phases equally spaced 180° apart, not only
is the output ripple frequency increased by a factor of
two, but the output capacitor ripple current is significantly
reduced. Although this architecture requires two induc-
tors, rather than a single inductor, there are a number of
important advantages.
2.0
1.5
1.0
0.5
0
DUAL
PHASE
0
0.5
1.0
1.5
TIME (µs)
3124 F01
• Substantially lower peak inductor current allows the
use of smaller, lower cost inductors.
Figure 1. Comparison of Output Ripple Current with Single Phase
and Dual Phase Boost Converter in a 1.5A Load Application
Operating at 50% Duty Cycle
• Significantly reduced output ripple current minimizes
output capacitance requirement.
• Higher frequency output ripple is easier to filter for low
noise applications.
• Input ripple current is also reduced for lower noise on
V .
IN
3124f
10
For more information www.linear.com/LTC3124
LTC3124
OPERATION
LOW VOLTAGE OPERATION
The LTC3124 is designed to allow start-up from input
voltages as low as 1.8V. When V exceeds 2.5V, the
SWITCH A
VOLTAGE
OUT
SWITCH B
VOLTAGE
LTC3124 continues to regulate its output, even when V
IN
falls as low as 0.5V. This feature extends operating times
by maximizing the amount of energy that can be extracted
from the input source. The limiting factors for the applica-
tion become the availability of the power source to supply
sufficient power to the output at the low input voltage,
and the maximum duty cycle, which is clamped at 94%.
Note that at low input voltages, small voltage drops due
to series resistance become critical and greatly limit the
power delivery capability of the converter.
INDUCTOR A
CURRENT
INDUCTOR B
CURRENT
INPUT
CURRENT
RECTIFIER A
CURRENT
RECTIFIER B
CURRENT
LOW NOISE FIXED FREQUENCY OPERATION
Soft-Start
OUTPUT
RIPPLE
CURRENT
3124 F02
The LTC3124 contains internal circuitry to provide soft-
startoperation.Thesoft-startutilizesalinearlyincreasing
ramp of the error amplifier reference voltage from zero
to its nominal value of 1.2V in approximately 10ms, with
Figure 2. Simplified Voltage and Current Waveforms
for 2-Phase Operation at 50% Duty Cycle
the internal control loop driving V
from zero to its
SWITCH A
VOLTAGE
OUT
final programmed value. This limits the inrush current
drawn from the input source. As a result, the duration
of the soft-start is largely unaffected by the size of the
output capacitor or the output regulation voltage. The
closed-loop nature of the soft-start allows the converter
to respond to load transients that might occur during
the soft-start interval. The soft-start period is reset by a
SWITCH B
VOLTAGE
INDUCTOR A
CURRENT
INDUCTOR B
CURRENT
shutdown command on SD, a UVLO event on V (V
<
CC CC
INPUT
CURRENT
1.5V), an overvoltage event on V
(V
≥ 16.5V), or
OUT OUT
an overtemperature event (TSD is invoked when the die
temperatureexceeds170°C).Uponremovalofthesefault
conditions,theLTC3124willsoft-starttheoutputvoltage.
RECTIFIER A
CURRENT
RECTIFIER B
CURRENT
Error Amplifier
The noninverting input of the transconductance error
amplifier is internally connected to the 1.2V reference and
theinvertinginputisconnectedtoFB. Anexternalresistive
OUTPUT
RIPPLE
CURRENT
3124 F03
voltage divider from V
to SGND programs the output
OUT
Figure 3. Simplified Voltage and Current Waveforms
for 2-Phase Operation at 25% Duty Cycle
voltage from 2.5V to 15V via FB as shown in Figure 4.
R1
R2
VOUT =1.2V 1+
3124f
11
For more information www.linear.com/LTC3124
LTC3124
OPERATION
Selecting an R2 value of 113k to have approximately
10µA of bias current in the V
the formula:
ThusR (kΩ)≅28/f(MHz). SeeTable1forvariousswitch-
T
resistor divider yields
ing frequencies and their corresponding R values.
OUT
T
Table 1. Switching Frequency and Their Respective RT
SWITCHING
R1 = 94 • (V
– 1.2V); V
in Volts and R1 in kΩ.
OUT
OUT
FREQUENCY (kHz)
RT (kΩ)
316
Power converter control loop compensation is set with
a simple RC network connected between VC and SGND.
100
200
154
V
OUT
300
100
500
57.6
34.8
28
LTC3124
R1
800
–
+
FB
1000
1200
2000
2200
3000
1.2V
R2
22.6
13
3124 F04
11.5
8.06
Figure 4. Programming the Output Voltage
Internal Current Limit
For desired switching frequencies not included in Table 1,
please refer to the Resistance vs Frequency curve in the
Typical Performance Characteristics section.
Current limit comparators shut off the N-channel MOSFET
switches once their respective peak current is reached.
Peak switch current per phase is limited to 3.5A, inde-
pendent of input or output voltage, unless V
approximately 1.5V, resulting in the current limit being
approximately half of the nominal peak values.
Theoscillatorcanbesynchronizedtoanexternalfrequency
by applying a pulse train of twice the desired switching
frequency to the PWM/SYNC pin. An external resistor
must be connected between RT and SGND to program the
oscillator to a frequency approximately 25% below that of
theexternallyappliedpulsetrainusedforsynchronization.
is below
OUT
Lossless current sensing converts the peak current signals
of the N-channel MOSFET switches into voltages that are
summedwiththeirrespectiveinternalslopecompensation.The
summed signals are compared to the error amplifier outputs
to provide a peak current control command for the PWMs.
R is selected in this case according to this formula:
T
R
(kΩ) ≥ 1.25 • R
(kΩ)
T(SYNC)
T(SWITCH)
whereR
isthevalueofR atthedesiredswitching
T
T(SWITCH)
Zero Current Comparator
frequency, which is half of the synchronization frequency.
Thezerocurrentcomparatorsmonitortheinductorcurrents
beingdeliveredtotheoutputandshutoffthesynchronous
rectifiers when the current is approximately 50mA. This
prevents the inductor currents from reversing in polarity,
improving efficiency at light loads.
Shutdown
The boost converter is disabled by pulling SD below 0.25V
and enabled by pulling SD above 1.6V. Note that SD can
be driven above V or V , as long as it is limited to less
than its absolute maximum rating.
IN
OUT
Oscillator
Thermal Shutdown
The internal oscillator is programmed to twice the desired
switching frequency with an external resistor from the RT
pin to SGND according to the following formula:
Ifthedietemperatureexceeds170°Ctypical, theLTC3124
will go into thermal shutdown (TSD). All switches will be
shut off until the die temperature drops by approximately
7°C, whenthedevicere-initiatesasoft-startandswitching
is re-enabled.
56
fOSC (MHz)≅
= 2•f (MHz)
R (kΩ)
T
where f = switching frequency of one phase.
3124f
12
For more information www.linear.com/LTC3124
LTC3124
OPERATION
Boost Anti-Ringing Control
Output Disconnect
WhenV
≥V +2V,theanti-ringingcircuitryconnectsa The LTC3124’s output disconnect feature eliminates body
IN
OUT
resistoracrosseachinductortoV todamphighfrequency diode conduction of the internal P-channel MOSFET recti-
IN
ringingontheSWpinsduringdiscontinuouscurrentmode fiers.ThisfeatureallowsforV todischargeto0Vduring
OUT
operation. Although the ringing of the resonant circuits shutdown, and draw no current from the input source.
formed by the inductors and C
(capacitance on Inrush current will also be limited at turn-on, minimizing
SW(A/B)
the respective SW pins) is low energy, it can cause EMI surgecurrentsseenbytheinputsupply.Notethattoobtain
radiation if not damped.
the advantages of output disconnect, there must not be
anexternalSchottkydiodeconnectedbetweenSWA, SWB
and V . The output disconnect feature also allows V
V
CC
Regulator
OUT
OUT
to be pulled high, without backfeeding the power source
An internal low dropout regulator generates the 4.25V
(nominal) V rail from V or V , depending upon
operating conditions. V is supplied from V if V is
initiallygreaterthanapproximately3.5V,withV continuing
connected to V .
IN
CC
IN
OUT
CC
IN
IN
IN
V > V
Operation
IN
OUT
to supply V down to approximately 3V; otherwise the The LTC3124 step-up converter will maintain voltage
CC
IN
greater of V and V
supplies V . The V rail powers regulationevenwhentheinputvoltageisabovethedesired
OUT
CC CC
theinternalcontrolcircuitryandpowerMOSFETgatedrivers outputvoltage.Notethatoperatinginthismodewillexhibit
of the LTC3124. The V regulator is disabled in shutdown lower efficiency and a reduced output current capability.
CC
to reduce quiescent current and is enabled by forcing the RefertotheTypicalPerformanceCharacteristicsfordetails.
SD pin above its input high threshold. A 4.7µF or larger
capacitor must be connected between V and SGND.
CC
Burst Mode OPERATION
When the PWM/SYNC pin is held low, the boost converter
operates in Burst Mode, independent of load current. This
mode of operation is typically commanded to improve
efficiency at light loads and reduce standby current at no
Overvoltage Lockout
An overvoltage condition occurs when V
approximately 16.5V. Switching is disabled and the in-
ternal soft-start ramp is reset. Once V drops below
exceeds
OUT
OUT
load. The output current (I ) capability in Burst Mode
OUT
approximately 16V a soft-start is initiated and switching
is allowed to resume. If the boost converter output is
lightly loaded such that the time constant of the output
operation is significantly less than in PWM mode and
varies with V and V , as shown in Figure 5. The logic
IN
OUT
input thresholds for this pin are determined relative to V
CC
capacitance, C , and the output load resistance, R
OUT
OUT
with a low being less than 10% of V and a high being
CC
isnearorgreaterthanthesoft-starttimeofapproximately
10ms, the soft-start ramp may end before or soon after
switchingresumes,defeatingtheinrushcurrentlimitingof
theclosed-loopsoft-startfollowinganovervoltageevent.
greater than 90% of V . The LTC3124 will operate in
CC
fixed frequency PWM mode even if Burst Mode operation
is commanded during soft-start.
In Burst Mode operation, only Phase A of the LTC3124
is operational, while Phase B is disabled. The Phase A
inductor current is initially charged to approximately
700mA by turning on the N-channel MOSFET switch, at
which point the N-channel switch is turned off and the
P-channel synchronous switch is turned on, delivering
currenttotheoutput.Whentheinductorcurrentdischarges
to approximately zero, the cycle repeats. In Burst Mode
operation,energyisdeliveredtotheoutputuntilthenominal
Short-Circuit Protection
The LTC3124 output disconnect feature allows output
short-circuit protection while maintaining a maximum set
current limit. To reduce power dissipation under overload
andshort-circuitconditions,thepeakswitchcurrentlimits
are reduced to approximately 2A. Once V
exceeds
OUT
approximately 1.5V, the current limits are reset to their
nominal values of 3.5A per phase.
3124f
13
For more information www.linear.com/LTC3124
LTC3124
OPERATION
400
350
300
250
200
150
100
50
regulation value is reached, then the LTC3124 transitions
into a very low quiescent current sleep state. In sleep, the
outputswitchesareturnedoffandtheLTC3124consumes
only 25μA of quiescent current. When the output volt-
age droops approximately 1%, switching resumes. This
maximizes efficiency at very light loads by minimizing
switching and quiescent losses. Output voltage ripple in
Burst Mode operation is typically 1% to 2% peak-to-peak.
Additional output capacitance (22μF or greater), or the
addition of a small feedforward capacitor (10pF to 50pF)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
connected between V
the output ripple.
and FB can help further reduce
OUT
V
, FALLING (V)
IN
3124 F05
V
V
V
= 2.5V
= 5V
= 7.5V
V
V
= 12V
OUT
OUT
OUT
OUT
OUT
= 15V
Figure 5. Burst Mode Output Current vs VIN
APPLICATIONS INFORMATION
PCB LAYOUT CONSIDERATIONS
3. PGNDA pin, PGNDB pin, and the exposed pad are the
power ground connections for the LTC3124. Multiple
viasshouldconnectthebackpaddirectlytotheground
plane. In addition, maximization of the metallization
connected to the back pad will improve the thermal
environmentandimprovethepowerhandlingcapabili-
ties of the IC.
The LTC3124 switches currents as high as 4.5A at high
frequencies. Special attention should be paid to the PCB
layouttoensureastable,noise-freeandefficientapplication
circuit.Figure6presentstheLTC3124’s4-layerPCBdemo
board layout (the schematic of which may be obtained
from the Quick Start Guide) to outline some of the primary
considerations. A few key guidelines are outlined below:
4. The high current components and their connections
should all be placed over a complete ground plane to
minimize loop cross-sectional areas. This minimizes
EMI and reduces inductive drops.
1. A4-layerboardishighlyrecommendedfortheLTC3124
to ensure stable performance over the full operating
voltage and current range. A dedicated/solid ground
5. Connections to all of the high current components
should be made as wide as possible to reduce the
series resistance. This will improve efficiency and
maximize the output current capability of the boost
converter.
plane should be placed directly under the V , V
,
IN OUTA
V
OUTB
, SWA, andSWBtracestoprovideamirrorplane
to minimize noise loops from high dI/dt and dV/dt
edges (see Figure 6, 2nd layer).
2. All circulating high current paths should be kept as
short as possible. Capacitor ground connections
should via down to the ground plane in the shortest
6. To prevent large circulating currents from disrupting
theconverters’outputvoltagesensing,compensation,
and programmed switching frequency, the ground for
the resistor divider, compensation components, and
RT should be returned to the ground plane using a
via placed close to the IC and away from the power
connections.
routepossible.ThebypasscapacitorsonV shouldbe
IN
placed as close to the IC as possible and should have
the shortest possible paths to ground (see Figure 6,
top layer).
3124f
14
For more information www.linear.com/LTC3124
LTC3124
APPLICATIONS INFORMATION
7. Keep the connections from the resistor divider to the
FB pin and from the compensation components to the
VC pin as short as possible and away from the switch
pin connections.
8. Crossover connections should be made on inner cop-
per layers if available. If it is necessary to place these
on the ground plane, make the trace on the ground
plane as short as possible to minimize the disruption
to the ground plane (see Figure 6, 3rd layer).
Top Layer
2nd Layer
3rd Layer
Bottom Layer (Top View)
Figure 6. Example PCB Layout
3124f
15
For more information www.linear.com/LTC3124
LTC3124
APPLICATIONS INFORMATION
SCHOTTKY DIODE
2
windings) to reduce the I R power losses, and must be
able to support the peak inductor current without saturat-
ing. Molded chokes and most chip inductors usually do
not have enough core area to support the peak inductor
currents of 3A to 4A seen on the LTC3124. To minimize
radiated noise, use a shielded inductor.
Although it is not required, adding a Schottky diode from
bothSWpinstoV
canimprovetheconverterefficiency
OUT
by up to 4%. Note that this defeats the output disconnect
and short-circuit protection features of the LTC3124.
See Table 2 for suggested components and suppliers.
COMPONENT SELECTION
Inductor Selection
Table2. RecommendedInductors
VALUE DCR
I
SIZE(mm)
W × L× H
SAT
The LTC3124 can utilize small inductors due to its capa-
bility of setting a fast (up to 3MHz) switching frequency.
Larger values of inductance will allow slightly greater
output current capability by reducing the inductor ripple
current. To design a stable converter the range of induc-
tance values is bounded by the targeted magnitude of the
internal slope compensation and is inversely proportional
to the switching frequency. The Inductor selection for the
LTC3124 has the following bounds:
PART NUMBER
(µH) (mΩ) (A)
CoilcraftXFL4020-102ME
CoilcraftMSS7341T-332NL
CoilcraftXAL5030-332ME
CoilcraftXAL5030-472ME
CoilcraftXAL5050-562ME
CoilcraftXAL6060-223ME
CoilcraftMSS1260T-333ML
1
12
18
23
36
26
61
5.4
3.7
8.7
6.7
6.3
5.6
4.3× 4.3× 2.1
7.3× 7.3× 4.1
5.3× 5.3× 3.1
5.3× 5.3× 3.1
5.3× 5.3× 5.1
6.3× 6.3× 6.1
12.3× 12.3 × 6.2
3.3
3.3
4.7
5.6
22
33
57 4.34
CoiltronicsSD53-1R1-R
CoiltronicsDR74-4R7-R
CoiltronicsDR125-330-R
CoiltronicsDR127-470-R
1.1
4.7
33
20 4.8
5.2× 5.2× 3
7.6× 7.6× 4.35
12.5× 12.5 × 6
12.5× 12.5 × 8
25 4.37
51 3.84
72 5.28
47
10
f
3
f
Sumida CDR7D28MNNP-1R2NC 1.2
21
31
5.9
5
7.6× 7.6× 3
7.25× 6.7× 3
µH>L > µH
Sumida CDMC6D28NP-3R3MC
3.3
Taiyo-Yuden NR5040T3R3N
3.3
35
3.8
5× 5 × 4
The inductor peak-to-peak ripple current is given by the
following equation:
TDKLTF5022T-1R2N4R2-LC
TDKSPM6530T-3R3M
TDKVLP8040T-4R7M
1.2
3.3
4.7
25
30
25
4.3
6.8
4.4
5× 5.2× 2.2
7.1× 6.5× 3
8× 7.7× 4
V • V
– V
IN
(
)
Würth WE-LHMI74437324010
Würth WE-PD7447789002
Würth WE-PD7447779002
Würth WE-PD 7447789003
Würth WE-PD7447789004
Würth WE-HCI 7443251000
WürthWE-PD744770122
Würth WE-PD744770133
Würth WE-PD7447709470
1
27
20
20
30
35
16
43
64
60
9
4.8
6
4.2
3.9
8.5
5
3.6
4.5
4.45× 4.06 × 1.8
7.3× 7.3× 3.2
7.3× 7.3 × 4.5
7.3× 7.3× 3.2
7.3× 7.3× 3.2
10× 10× 5
IN
OUT
Ripple A =
( )
2.2
2.2
3.3
4.7
10
22
33
47
f•L•VOUT
where:
L = Inductor Value in μH
12× 12× 8
12× 12× 8
12× 12× 10
f = Switching Frequency in MHz of One Phase
The inductor ripple current is a maximum at the minimum
inductor value. Substituting 3/f for the inductor value in
the above equation yields the following:
Output and Input Capacitor Selection
Low ESR (equivalent series resistance) capacitors should
be used to minimize the output voltage ripple. Multilayer
ceramic capacitors are an excellent choice as they have
extremely low ESR and are available in small footprints.
X5R and X7R dielectric materials are preferred for their
ability to maintain capacitance over wide voltage and tem-
perature ranges. Y5V types should not be used. Although
ceramic capacitors are recommended, low ESR tantalum
capacitors may be used as well.
V • V
– V
IN
(
)
IN
OUT
RippleMAX A =
( )
3•VOUT
A reasonable operating range for the inductor ripple cur-
rent is typically 10% to 40% of the maximum inductor
current. High frequency ferrite core inductor materials
reduce frequency dependent power losses compared to
cheaper powdered iron types, improving efficiency. The
inductor should have low DCR (series resistance of the
3124f
16
For more information www.linear.com/LTC3124
LTC3124
APPLICATIONS INFORMATION
When selecting output capacitors, the magnitude of the
peak inductor current, together with the ripple voltage
specification, determine the choice of the capacitor. Both
theESR(equivalentseriesresistance)ofthecapacitorand
the charge stored in the capacitor each cycle contribute
to the output voltage ripple.
Table 3: Representative Output Capacitors
Manufacturer,
Part Number
Value
(µF)
Voltage SIZE L × W × H (mm)
(V)
Type, ESR (mΩ)
AVX,
22
22
22
22
22
47
22
22
22
22
47
100
100
22
47
100
47
1F
16
3.2 × 1.6 × 1.78,
X5R Ceramic
1206YD226KAT2A
AVX,
1210YC226KAT2A
16
16
16
16
16
16
16
16
16
16
6.3
16
25
16
16
25
5.5
3.2 × 2.5 × 2.79,
X7R Ceramic
Murata,
GRM31CR61C226ME15L
3.2 × 1.6 × 1.8,
X5R Ceramic
Thepeak-to-peakrippleduetothechargeisapproximately:
IP •V
COUT •VOUT •f•2
Murata,
GRM32ER71C226KE18K
3.2 × 2.5 × 2.7,
X7R Ceramic
IN
VRIPPLE(CHARGE)(V)≈
Murata,
GRM43ER61C226KE01L
4.5 × 3.2 × 2.7,
X5R Ceramic
where:
Murata,
GRM32EB31C476ME15K
3.2 × 2.5 × 2.5,
X5R Ceramic
I = Peak inductor current
P
Panasonic,
ECJ-4YB1C226M
3.2 × 2.5 × 2.7,
X5R Ceramic
f = Switching frequency of one phase
The ESR of C
is usually the most dominant factor for
OUT
Taiyo Yuden,
EMK316BJ226ML-T
3.2 × 1.6 × 1.8,
X5R Ceramic
ripple in most power converters. The peak-to-peak ripple
Taiyo Yuden,
EMK325B7226MM-TR
3.2 × 2.5 × 2.7,
X7R Ceramic
due to the capacitor ESR is:
VOUT
Taiyo Yuden,
EMK432BJ226KM-T
4.5 × 3.2 × 2.7,
X5R Ceramic
VRIPPLE(ESR)(V)=ILOAD • RESR
where R
•
V
IN
TDK,
C5750X7R1C476M
5.7 × 5 × 2.5,
X7R Ceramic
= capacitor equivalent series resistance.
ESR
TDK,
C4532X5R0J107M
4.5 × 3.2 × 2.8,
X5R Ceramic
The input filter capacitor reduces peak currents drawn
from the input source and reduces input switching noise.
AlowESRbypasscapacitorwithaminimumvalueof10µF
Nichicon,
UBC1C101MNS1GS
8.3 × 8.3 × 11.5,
Aluminum Polymer
Sanyo,
25TQC22MV
7.3 x 4.3 x 1.9,
POSCAP, 45mΩ
should be located as close to V as possible.
IN
Low ESR and high capacitance are critical to maintain low
output ripple. Capacitors can be used in parallel for even
largercapacitancevaluesandlowereffectiveESR.Ceramic
capacitors are often utilized in switching converter appli-
cations due to their small size, low ESR and low leakage
currents. However, many ceramic capacitors experience
significant loss in capacitance from their rated value with
increased DC bias voltage. It is not uncommon for a small
surfacemountcapacitortolosemorethan50%ofitsrated
capacitance when operated near its rated voltage. As a
result it is sometimes necessary to use a larger capaci-
tor value or a capacitor with a larger value and case size,
such as 1812 rather than 1206, in order to actually realize
the intended capacitance at the full operating voltage. Be
sure to consult the vendor’s curve of capacitance versus
DC bias voltage. Table 3 shows a sampling of capacitors
suited for the LTC3124 applications.
Sanyo,
16TQC47MW
7.3 × 4.3 × 3.1,
POSCAP, 40mΩ
Sanyo,
16TQC100M
7.3 × 4.3 × 3.1,
POSCAP, 50mΩ
Sanyo,
25SVPF47M
6.6 × 6.6 × 5.9,
OS-CON, 30mΩ
AVX, BestCap Series
BZ125A105ZLB
48 × 30 × 6.1,
35mΩ, 4 Lead
Cap-XX GS230F
1.2F
4.5
2.7
39 × 17 × 3.8, 28mΩ
Tecate Powerburst
TPL-100/22X45
100F
D = 22, H = 45
15mΩ
Cooper KR-5R5C155-R
1.5F
110F
50F
5.5
2.5
2.5
D = 21.5, H = 7.5
30mΩ
Cooper
HB1860-2R5117-R
D = 18.5, H = 60
20mΩ
Maxwell
BCAP0050-P270
D = 18, H = 40
20 mΩ
3124f
17
For more information www.linear.com/LTC3124
LTC3124
APPLICATIONS INFORMATION
Thermal Considerations
For applications requiring a very low profile and very large
capacitance, the GS, GS2 and GW series from Cap-XX,
the BestCap series from AVX and PowerStor KR series
capacitors from Cooper all offer very high capacitance
and low ESR in various low profile packages.
For the LTC3124 to deliver its full power, it is imperative
that a good thermal path be provided to dissipate the
heat generated within the package. This can be accom-
plished by taking advantage of the large thermal pad on
the underside of the IC. It is recommended that multiple
vias in the printed circuit board be used to conduct heat
away from the IC and into a copper plane with as much
area as possible. If the junction temperature rises above
~170°C, the part will trip an internal thermal shutdown,
and all switching will stop until the junction temperature
drops ~7°C.
OPERATING FREQUENCY SELECTION
Thereareseveralconsiderationsinselectingtheoperating
frequencyoftheconverter.Typically,thefirstconsideration
is to stay clear of sensitive frequency bands, which can-
not tolerate any spectral noise. For example, in products
incorporatingRFcommunications,the455kHzIFfrequency
can be sensitive to any noise, therefore switching above
600kHzisdesired.Somecommunicationshavesensitivity
to 1.1MHz and in that case a 1.5MHz switching converter
frequencymaybeemployed.Asecondconsiderationisthe
physical size of the converter. As the operating frequency
is increased, the inductor and filter capacitors typically
can be reduced in value, leading to smaller sized external
components. The smaller solution size is typically traded
forefficiency,sincetheswitchinglossesduetogatecharge
increase with frequency.
Compensating the Feedback Loop
The LTC3124 uses current mode control, with internal
adaptiveslopecompensation.Currentmodecontrolelimi-
natesthesecondorderfilterduetotheinductorandoutput
capacitorexhibitedinvoltagemodecontrol,andsimplifies
the power loop to a single pole filter response. Because
of this fast current control loop, the power stage of the IC
combined with the external inductor can be modeled by a
transconductance amplifier g and a current controlled
mp
current source. Figure 7 shows the key equivalent small
Anotherconsiderationiswhethertheapplicationcanallow
pulse-skipping.Whentheboostconverterpulse-skips,the
minimum on-time of the converter is unable to support
the duty cycle. This results in a low frequency component
to the output ripple. In many applications where physical
size is the main criterion, running the converter in this
mode is acceptable. In applications where it is preferred
nottoenterthismode, themaximumoperatingfrequency
is given by:
signal elements of a boost converter.
The DC small-signal loop gain of the system shown in
Figure 7 is given by the following equation:
R2
R1+R2
GBOOST =GEA •GMP •GPOWER
•
where G is the DC gain of the error amplifier, G is
EA
MP
the modulator gain, and G
is the inductor current
POWER
to V
gain.
OUT
VOUT – V
VOUT •tON(MIN)
IN
fMAX _NOSKIP <≅
Hz
G
= g • R ≈ 1000V/V
ma O
EA
(Not Adjustable; g ≈ 100µS, R ≈ 10MΩ)
ma
O
where t
= minimum on-time, which is typically
ON(MIN)
around 100ns.
∆IL
GMP = 2•gmp; gmp
=
≈3.4S NotAdjustable
(
)
∆VC
∆VOUT η•V
η•V •RL
2•VOUT
IN
IN
GPOWER
=
=
=
∆IL
2•IOUT
3124f
18
For more information www.linear.com/LTC3124
LTC3124
APPLICATIONS INFORMATION
–
+
MODULATOR
1
V
OUT
g
mp
Phase Lead Zero: Z4 =
Phase Lead Pole: P4 =
Hz
η • V
IN
I
L
2π • R1+R •C
• I
(
)
L
R
PL
PL
ESR
C
2 • V
OUT
R
L
1
OUT
Hz
1.2V
REFERENCE
ERROR
AMPLIFIER
R
PL
R1•R2
R1+R2
2π •
+R
•C
PL
PL
C
PL
R1
+
–
VC
R
g
ma
FB
R
C
Error Amplifier Filter Pole:
1
C
F
O
R2
C : COMPENSATION CAPACITOR
C
C
C
3124 F07
R : COMPENSATION RESISTOR
CC
C
C : HIGH FREQUENCY FILTER CAPACITOR
P5=
Hz, CF <
F
PL
PL
ma
CC •CF
CC +CF
C
: PHASE LEAD CAPACITOR
10
2π •RC •
R
g
: PHASE LEAD RESISTOR
: TRANSCONDUCTANCE AMPLIFIER INSIDE IC
R : OUTPUT RESISTANCE OF g
O
mp
OUT
ESR
ma
g
: POWER STAGE TRANSCONDUCTANCE AMPLIFIER
1
C
: OUTPUT CAPACITOR
≈
Hz
R
: OUTPUT CAPACITOR ESR
2π •RC •CF
R : OUTPUT RESISTANCE DEFINED AS V /I
L
OUT LOAD(MAX)
R1, R2: FEEDBACK RESISTOR DIVIDER NETWORK
η: CONVERSION EFFICIENCY (~90% AT HIGHER CURRENTS)
The current mode zero (Z3) is a right-half plane zero
which can be an issue in feedback control design, but is
manageable with proper external component selection.
Also note that the RHP zero is a minimum at minimum
input voltage and maximum output current for a given
output voltage. As a general rule, the frequency at which
the open-loop gain of the converter is reduced to unity,
Figure 7. Boost Converter Equivalent Model
Combining the two equations above yields:
3.4•η•V •RL
IN
GDC =GMP •GPOWER
≈
V/V
VOUT
known as the crossover frequency f , should be set to
C
Converter efficiency η will vary with I
SWITCH
characteristics curves.
and switching
OUT
less than one-sixth of the right-half plane zero (Z3), and
frequency f
as shown in the typical performance
underone-eighthoftheswitchingfrequencyf
C
.Once
SWITCH
f is selected, the compensation component values can
2
be calculated using a Bode plot of the power stage or two
Output Pole: P1 =
Hz
generally valid assumptions: P1 dominates the gain of the
2π •RL •COUT
power stage for frequencies lower than f and f is much
C
C
Error Amplifier Pole:
higher than P2. First calculate the power stage gain at f ,
C
fC
1
CC
10
G in V/V. Assuming the output pole P1 dominates G
fC
P2 =
Hz;CF <
2π •R • C +C
for this range, it is expressed by:
(
)
F
O
C
1
GDC
≈
Hz; ExtremelyClosetoDC
G fC ≈
V/V
2π •RO •CC
f
P1
C 2
1+
1
Error Amplifier Zero: Z1 =
Hz
2π •RC •CC
1
ESR Zero: Z2 =
Hz
2π •RESR •COUT
2 •2RL
2π •VOUT •L
V
IN
RHP Zero: Z3 =
Hz
2
f
High Frequency Pole: P3 > OSC Hz
3
3124f
19
For more information www.linear.com/LTC3124
LTC3124
APPLICATIONS INFORMATION
Decide how much phase margin (Φ ) is desired. Greater
the transfer function of the converter. The values of these
phase lead components are given by the expressions:
m
phasemargincanoffermorestabilitywhilelowerphasemar-
gincanyieldfastertransientresponse.Typically,Φ ≈60°
m
R1•R2
R1+R2
is optimal for minimizing transient response time while
R1− a •
2
allowing sufficient margin to account for component
RPL
CPL
=
kΩ and
a2 −1
variability. Φ is the phase boost of Z1, P2, and P5 while
1
106 a −1 R1+R2
Φ is the phase boost of Z4 and P4. Select Φ and Φ
2
1
2
(
)
)
pF
(
2
=
such that:
2π • ƒC •R12 a2
ƒ
Z3
1 C
Φ1 + Φ2 = Φm + tan−
and
where R1, R2, and R are in kΩ and ƒ is in kHz.
PL
C
Note that selecting Φ = 0° forces a = 1, and so the
2
2
VOUT
1.2V
Φ1 ≤ 74°; Φ2 ≤ 2 • tan−1
− 90°
converter will have Type II compensation and therefore
ꢀ
no feedforward: R is open (infinite impedance) and C
PL
PL
= 0pF. If a = 0.833 • V
(its maximum), feedforward is
where V
is in V and ƒ and Z3 are in kHz.
C
2
OUT
OUT
maximized; R = 0 and C is maximized for this com-
PL
PL
Setting Z1, P5, Z4, and P4 such that
ƒC ƒC
pensation method.
Once the compensation values have been calculated, ob-
taining a converter bode plot is strongly recommended to
verify calculations and adjust values as required.
Z1=
, P5 = ƒC a1, Z4 =
, P4 = ƒC a2
a1
a2
allows a and a to be determined using Φ and Φ
1
2
1
2
Using the circuit in Figure 8 as an example, Table 4 shows
the parameters used to generate the Bode plot shown in
Figure 9.
Φ + 90°
Φ +90°
a1 = tan2
, a = tan2
2
1
2
2
2
The compensation will force the converter gain G
BOOST
Table 4. Bode Plot Parameters
to unity at ƒ by using the following expression for C :
C
C
PARAMETER
VALUE
UNITS
V
V
COMMENT
App Specific
App Specific
App Specific
V
V
5
12
8
103 • gma •R2 •G a −1 a
IN
(
)
1
2
ƒC
OUT
CC =
pF
2π • ƒ • R1+R2 a
(
)
R
C
Ω
1
L
C
at No Bias
at 12V Bias
µF
µF
App Specific
App Specific
22 × 2
14 × 2
OUT
OUT
(gma in µS, ƒC in kHz, GƒC in V/V)
C
R
2.5
4.7
1
1020
113
100
10
mΩ
µH
MHz
kΩ
kΩ
µS
MΩ
S
App Specific
App Specific
Adjustable
Adjustable
Adjustable
Fixed
ESR
Once C is calculated, R and C are determined by:
C
C
F
LA, LB
106 • a1
2π • ƒC •CC
SWITCH
f
RC =
kΩ (ƒC in kHz, CC in pF)
R1
R2
CC
a1 −1
g
ma
CF =
R
Fixed
Fixed
O
g
mp
3.4
90
Amethodforimprovingtheconverter’stransientresponse
usesasmallfeedforwardseriesnetworkofacapacitorand
a resistor across the top resistor of the feedback divider
%
App Specific
Adjustable
Adjustable
Adjustable
Optional
η
R
84.5
680
56
Open
0
kΩ
pF
pF
kΩ
pF
C
C
F
C
C
(from V
to FB). This adds a phase-lead zero and pole to
OUT
R
PL
C
PL
Optional
3124f
20
For more information www.linear.com/LTC3124
LTC3124
APPLICATIONS INFORMATION
Switching Waveforms with 1.5A Load
LB
V
OUT
4.7µH
20mV/DIV
V
IN
5V
SWB
CAP
C1
100nF
INDUCTOR B
CURRENT
1A/DIV
AC-COUPLED
V
OUT
LA
4.7µH
12V
PGNDB
V
OUTB
C
1.5A
OUT
V
SWB
22µF
SWA
V
OUTA
LTC3124
10V/DIV
×2
INDUCTOR A
CURRENT
1A/DIV
PGNDA
V
SWA
V
IN
SGND
10V/DIV
R1
PWM/SYNC SD
FB
BURST PWM
OFF ON
1.02M
3124 F08b
200ns/DIV
V
CC
RT
C
IN
R2
113k
10µF
V
C
R
C
Transient Response with 700mA to 1.5A Load Step
84.5k
C
R
VCC
T
28k
C
C
F
C
4.7µF
V
56pF
680pF
OUT
500mV/DIV
C1: 100nF, 16V, X5R, 0805
AC-COUPLED
3124 F08
C
C
C
: 10µF, 10V, X5R, 1206
IN
OUT
VCC
: 22µF ×2, 16V, X5R, 1210
: 4.7µF, 10V, X5R, 1206
LA, LB: COILCRAFT XAL5030-472ME
1500mA
OUTPUT
CURRENT
500mA/DIV
Figure 8. 1MHz, 5V to 12V, 1.5A Boost Converter
700mA
700mA
3124 F08c
100µs/DIV
45
30
90
45
PHASE
15
0
GAIN
0
–45
–90
–135
–180
–15
–30
–45
100
1k
10k
FREQUENCY (Hz)
100k
3124 F09
Figure 9. Bode Plot for Example Converter
3124f
21
For more information www.linear.com/LTC3124
LTC3124
APPLICATIONS INFORMATION
LB
From Figure 9, the phase is ~60° when the gain reaches
0dB, so the phase margin of the converter is ~60°. The
crossover frequency is ~10kHz, which is more than six
times lower than the 94kHz frequency of the RHP zero to
achieve adequate phase margin.
4.7µH
V
IN
5V
SWB
CAP
C1
100nF
V
OUT
LA
4.7µH
12V
PGNDB
V
OUTB
C
1.5A
OUT
22µF
V
SWA
OUTA
LTC3124
×2
PGNDA
R
The circuit in Figure 10 shows the same application as
that in Figure 8 with Type III compensation. This is ac-
PL
V
SGND
IN
787k
C
R1
PL
PWM/SYNC SD
BURST PWM
OFF ON
12pF 1.02M
complished by adding C and R and adjusting C , C ,
PL
PL
C
F
V
CC
RT
FB
V
C
C
IN
R2
113k
10µF
and R accordingly. Table 5 shows the parameters used
C
R
C
to generate the bode plot shown in Figure 11.
71.5k
C
R
VCC
T
28k
C
F
C
C
4.7µF
120pF
470pF
From Figure 11, the phase margin is still optimized at ~60°
andthecrossoverfrequencyremains~10kHz.AddingCPL
and RPL provides some feedforward signal in Burst Mode
operation, leading to lower output voltage ripple.
3124 F10
C1: 100nF, 16V, X5R, 0805
C
C
C
: 10µF, 10V, X5R, 1206
IN
OUT
VCC
: 22µF ×2, 16V, X5R, 1210
: 4.7µF, 10V, X5R, 1206
LA, LB: COILCRAFT XAL5030-472ME
Figure 10. Boost Converter with Phase Lead
Table 5. Bode Plot Parameters
PARAMETER
VALUE
UNITS
COMMENT
App Specific
App Specific
App Specific
45
30
90
V
V
5
12
8
V
V
IN
OUT
45
R
C
Ω
L
PHASE
at No Bias
at 12V Bias
µF
µF
App Specific
App Specific
22 × 2
14 × 2
OUT
OUT
15
0
C
GAIN
R
2.5
4.7
1
mΩ
µH
MHz
kΩ
kΩ
µS
MΩ
S
App Specific
App Specific
Adjustable
Adjustable
Adjustable
Fixed
0
–45
–90
–135
–180
ESR
LA, LB
–15
–30
–45
f
SWITCH
R1
R2
113
1020
100
10
g
ma
100
1k
10k
FREQUENCY (Hz)
100k
R
Fixed
O
3124 F11
g
3.4
90
Fixed
mp
%
App Specific
Adjustable
Adjustable
Adjustable
Adjustable
Adjustable
η
Figure 11. Bode Plot Showing Phase Lead
R
71.5
470
120
787
12
kΩ
pF
C
C
F
C
C
pF
R
kΩ
pF
PL
PL
C
3124f
22
For more information www.linear.com/LTC3124
LTC3124
TYPICAL APPLICATIONS
Single Li Cell to 6V, 9W, 2.2MHz Synchronous Boost Converter
for RF Transmitter
Load Step
V
OUT
LB
500mV/DIV
2.2µH
AC-COUPLED
V
IN
SWB
CAP
C1
1.5A
2.7V TO 4.2V
V
OUT
100nF
6V
LA
2.2µH
PGNDB
V
OUTB
OUTPUT
CURRENT
500mA/DIV
C
1.5A
OUT
47µF
V
SWA
OUTA
150mA
150mA
×2
LTC3124
PGNDA
3124 TA02b
V = 3.6V
IN
100µs/DIV
V
SGND
IN
R1
PWM/SYNC SD
FB
OFF ON
1.13M
V
CC
C
IN
Bode Plot
R2
280k
10µF
RT
V
C
C
R
C
VCC
50
40
30
20
10
0
120
90
C
F
68pF
4.7µF
60.4k
R
T
C
C
11.5k
1.2nF
60
PHASE
C1: 100nF, 16V, X5R, 0805
: 10µF, 10V, X5R, 1206
3124 TA02a
30
C
C
C
IN
: 47µF × 2, 16V, X5R, 1210
: 4.7µF, 10V, X5R, 1206
0
OUT
VCC
GAIN
–30
–60
–90
–120
–150
LA, LB: WÜRTH WE-PD 7447779002
–10
–20
–30
–40
–50
–180
100k
100
1k
10k
FREQUENCY (Hz)
3124 TA02c
2-Port USB-Powered 1MHz Synchronous Boost Converter to 5V, 500mA
LB
3.3µH
V
IN
SWB
CAP
C1
4.3V TO 5.5V
V
OUT
100nF
2-Port USB 2.0 Hot Plugged
5V
LA
3.3µH
PGNDB
V
OUTB
C
500mA
OUT
100µF
V
SWA
OUTA
V
×2
IN
LTC3124
2V/DIV
PGNDA
V
SGND
IN
V
OUT
2V/DIV
R1
PWM/SYNC SD
FB
OFF ON
1.47M
INPUT
CURRENT
500mA/DIV
V
CC
C2
10µF
C
IN
10µF
R2
464k
RT
V
C
C
R
C
VCC
C
4.7µF
35.7k
F
R
3124 TA03b
T
28k
R
V
= 10Ω
2ms/DIV
C
C
270pF
LOAD
IN
= USB 2.0
2.7nF
2-PORT HOT PLUGGED
C1: 100nF, 16V, X5R, 0805
3124 TA03a
C2: KEMET T491C106K025AS
C
C
C
: 10µF, 10V, X5R, 1206
IN
: 100µF × 2, 6.3V, X5R, 1812
OUT
VCC
: 4.7µF, 10V, X5R, 1206
LA, LB: COILCRAFT XAL5030-332ME
3124f
23
For more information www.linear.com/LTC3124
LTC3124
TYPICAL APPLICATIONS
3.3V to 12V, 300kHz Synchronous Boost Converter
with Output Disconnect, 1A
LB
22µH
Efficiency
V
IN
SWB
CAP
100
90
C1
3.3V
V
12V
1A
OUT
Burst Mode
OPERATION
100nF
LA
22µH
PGNDB
V
OUTB
C
OUT
80
47µF
V
SWA
OUTA
×3
70
LTC3124
PGNDA
60
50
PWM
V
SGND
IN
R1
40
30
20
10
0
PWM/SYNC SD
BURST PWM
OFF ON
1.02M
V
FB
CC
C
IN
V
DERIVED
CC
R2
113k
10µF
RT
V
C
FROM V
IN
R
C
76.8k
C
VCC
V
CC
DERIVED
C
F
4.7µF
R
FROM V
T
OUT
270pF
C
C
100k
3.9nF
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
C1: 100nF, 16V, X5R, 0805
3124 TA04a
C
C
C
: 10µF, 10V, X5R, 1206
3124 TA04b
IN
OUT
VCC
: 47µF × 3, 16V, X5R, 1210
: 4.7µF, 10V, X5R, 1206
LA, LB: WÜRTH WE-PDF 7447998221
Single Li Cell to 5V, 1.8A Synchronized 1.2MHz Switching Boost
Converter for RFPA Power Supply
Efficiency
LB
3.3µH
V
IN
100
90
SWB
CAP
C1
2.7V TO 4.2V
V
OUT
100nF
Burst Mode
OPERATION
5V
LA
3.3µH
PGNDB
V
OUTB
C
1.8A
OUT
80
22µF
V
SWA
OUTA
×2
70
LTC3124
PGNDA
60
50
PWM
V
SGND
IN
2.4MHz SYNC PULSE
R1
40
30
20
10
0
PWM/SYNC SD
FB
OFF ON
1.47M
V
CC
C
IN
R2
464k
10µF
RT
V
C
4.2V
3.3V
2.7V
IN
IN
IN
R
C
C
VCC
31.6k
4.7µF
R
28.7k
T
C
C
1.5nF
F
C
150pF
0.01
0.1
1
10
100
1000
LOAD CURRENT (mA)
C1: 100nF, 16V, X7R, 0805
3124 TA05a
3124 TA05b
C
C
C
: 10µF, 10V, X7R, 1206
IN
OUT
VCC
: 22µF × 2, 16V, X7R, 1210
: 4.7µF, 10V, X7R, 1206
LA, LB: COILCRAFT MSS7341T-332NL
3124f
24
For more information www.linear.com/LTC3124
LTC3124
TYPICAL APPLICATIONS
1.8V to 5.5V Input to 15V Output, 500kHz Synchronous Boost
Converter with Output Disconnect, 300mA
Efficiency
LB
10µH
V
IN
100
95
90
85
80
75
SWB
CAP
C1
OUTPUT CURRENT = 300mA
1.8V TO 5.5V
V
OUT
100nF
15V
LA
10µH
PGNDB
V
OUTB
C
300mA
OUT
22µF
SWA
V
OUTA
×2
LTC3124
PGNDA
V
SGND
IN
R1
PWM/SYNC SD
FB
OFF ON
1.3M
V
CC
C
IN
R2
113k
10µF
RT
V
C
R
C
49.9k
C
VCC
C
F
4.7µF
R
T
100pF
C
C
57.6k
3.3nF
3.5
(V)
1.5
2
2.5
3
4
4.5
5
5.5
V
IN
C1: 100nF, 16V, X7R, 0805
3124 TA06a
3124 TA06b
C
C
C
: 10µF, 10V, X7R, 1206
IN
OUT
VCC
: 22µF × 2, 16V, X7R, 1210
: 4.7µF, 10V, X7R, 1206
LA, LB: WÜRTH WE-HCI 7443251000
Single Li Cell to 12V, 1MHz Synchronous Boost Converter
with Output Disconnect, 800mA
LB
5.6µH
V
IN
SWB
CAP
C1
2.7V TO 4.2V
V
OUT
100nF
12V
800mA
LA
5.6µH
PGNDB
V
OUTB
C
OUT
22µF
SWA
V
OUTA
×2
LTC3124
PGNDA
V
SGND
IN
R1
PWM/SYNC SD
FB
OFF ON
1.02M
V
CC
C
IN
R2
113k
10µF
RT
V
C
R
C
88.7k
C
VCC
C
F
4.7µF
R
T
28k
47pF
C
C
680pF
C1: 100nF, 16V, X7R, 0805
3124 TA08
C
C
C
: 10µF, 10V, X7R, 1206
IN
OUT
VCC
: 22µF × 2, 16V, X7R, 1210
: 4.7µF, 10V, X7R, 1206
LA, LB: COILCRAFT XAL5050-562ME
3124f
25
For more information www.linear.com/LTC3124
LTC3124
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706 Rev Ø)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 ±0.10
5.00 ±0.10
(2 SIDES)
9
16
R = 0.20
TYP
3.00 ±0.10
(2 SIDES)
1.65 ±0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 ±0.05
0.75 ±0.05
0.200 REF
0.50 BSC
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3124f
26
For more information www.linear.com/LTC3124
LTC3124
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev J)
Exposed Pad Variation BC
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
0.48
(.019)
REF
3.58
(.141)
16 1514 13 12 11 109
6.60 ±0.10
4.50 ±0.10
0.51
(.020)
REF
2.94
DETAIL B
(.116)
6.40
(.252)
BSC
SEE NOTE 4
2.94
(.116)
DETAIL B IS THE PART OF
0.45 ±0.05
THE LEAD FRAME FEATURE
FOR REFERENCE ONLY
1.05 ±0.10
NO MEASUREMENT PURPOSE
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE16 (BC) TSSOP REV J 1012
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
3124f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC3124
TYPICAL APPLICATION
PWM Rundown Curve
Dual Supercapacitor Backup Power Supply, 0.5V to 5.4V
V
IN
2V/DIV
LB
3.3µH
V
SD
2V/DIV
IN
SWB
CAP
SUPPLY REMOVED
FROM SUPERCAP
C1
0.5V TO 5.4V
100nF
V
OUT
LA
3.3µH
PGNDB
V
OUTB
5V
C
OUT
100µF
V
SWA
V
OUTA
OUT
5V/DIV
×2
LTC3124
PGNDA
OUTPUT
CURRENT
100mA/DIV
V
IN
V
SGND
R3
1M
IN
C
3124 TA07b
IN
200s/DIV
10µF
SD
PWM/SYNC
R1
+
+
1.47M
SC1
100F
SC2
Burst Mode Rundown Curve
OFF ON
V
FB
CC
V
IN
R2
464k
V
C
2V/DIV
RT
100F
R
C
C
F
59k
C
C
VCC
4.7µF
R
T
28k
SD
2V/DIV
47pF
C
SUPPLY REMOVED
FROM SUPERCAP
1.5nF
C1: 100nF, 16V, X5R, 0805
3124 TA07a
C
C
C
: 10µF, 10V, X5R, 1206
V
OUT
IN
OUT
VCC
: 100µF × 2, 6.3V, X5R, 1812
5V/DIV
: 4.7µF, 10V, X5R, 1206
OUTPUT
CURRENT
20mA/DIV
LA, LB: COILCRAFT XAL5030-332ME
SC1, SC2: TECATE POWERBURST TPL-100/22X45
3124 TA07c
500s/DIV
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3459
70mA I , 10V Micropower Synchronous Boost Converter
V : 1.5V to 5.5V, V
= 10V, I = 10μA, I < 1μA,
OUT(MAX) Q SD
SW
IN
with Output Disconnect, Burst Mode Operation
ThinSOT Package
LTC3528
LTC3539
LTC3421
LTC3428
LTC3425
LTC3122
1A I , 1MHz, Synchronous Step-Up DC/DC Converter with
94% Efficiency V : 700mV to 5.25V, V
SD
= 5.25V, I = 12µA,
Q
SW
IN
OUT(MAX)
Output Disconnect, Burst Mode Operation
I
< 1µA, 2mm × 3mm DFN Package
2A I , 1MHz/2MHz, Synchronous Step-Up DC/DC Converters 94% Efficiency V : 700mV to 5.25V, V
= 5.25V, I = 10uA,
Q
SW
IN
OUT(MAX)
with Output Disconnect, Burst Mode Operation
I
SD
< 1µA, 2mm × 3mm DFN Package
3A I , 3MHz, Synchronous Step-Up DC/DC Converter with
95% Efficiency V : 0.5V to 4.5V, V
SD
= 5.25V, I = 12μA,
Q
SW
IN
OUT(MAX)
OUT(MAX)
OUT(MAX)
Output Disconnect
I
< 1μA, QFN24 Package
4A I , 2MHz (1MHz Switching), Dual Phase Step-Up
92% Efficiency V : 1.6V to 4.5V, V
= 5.25V, I < 1µA,
SD
SW
IN
DC/DC Converter
3mm × 3mm DFN Package
5A I , 8MHz, Low Ripple, 4-Phase Synchronous Step-Up
95% Efficiency V : 0.5V to 4.5V, V
= 5.25V, I = 12μA,
Q
SW
IN
DC/DC Converter with Output Disconnect
I
SD
< 1μA, QFN32
2.5A I , 3MHz, Synchronous Step-Up DC/DC Converter with 95% Efficiency V : 1.8V to 5.5V [500mV After Start-Up],
SW
IN
Output Disconnect, Burst Mode Operation
V
= 15V, I = 25μA, I < 1μA, 3mm × 4mm DFN
OUT(MAX) Q SD
and MSOP Packages
LTC3112
15V, 2.5A, 750kHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency V : 2.7V to 15V, V
= 14V, I = 50μA,
IN
OUT(MAX) Q
with Output Disconnect, Burst Mode Operation
I
< 1μA, 4mm × 5mm DFN and TSSOP Packages
SD
LTC3114-1
40V, 1A, 2MHz, Synchronous Buck-Boost DC/DC Converter
with Output Disconnect, Output Current Limit, Burst Mode
Operation
95% Efficiency V : 2.2V to 40V, V
SD
= 40V, I = 30μA,
Q
IN
OUT(MAX)
I
= 3μA, 3mm × 5mm DFN and TSSOP Packages
LTC3115-1
40V, 2A, 2MHz, Synchronous Buck-Boost DC/DC Converter
with Output Disconnect, Burst Mode Operation
95% Efficiency V : 2.7V to 40V, V
SD
= 40V, I = 30μA,
Q
IN
OUT(MAX)
I
= 3μA, 4mm × 5mm DFN and TSSOP Packages
3124f
LT 0614 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3124
●
●
ꢀLINEAR TECHNOLOGY CORPORATION 2014
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