LTC3245IDE#PBF [Linear]
LTC3245 - Wide VIN Range, Low Noise, 250mA Buck-Boost Charge Pump; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C;
| 型号： | LTC3245IDE#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3245 - Wide VIN Range, Low Noise, 250mA Buck-Boost Charge Pump; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C 光电二极管 |
| 文件： | 总18页 (文件大小：579K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3245
Wide V Range,
IN
Low Noise, 250mA Buck-Boost
Charge Pump
FeaTures
DescripTion
The LTC®3245 is a switched capacitor buck-boost DC/DC
converter that produces a regulated output (3.3V, 5V or
adjustable) from a 2.7V to 38V input. The device uses
switched capacitor fractional conversion to maintain
regulation over a wide range of input voltage. Internal
circuitry automatically selects the conversion ratio to
optimize efficiency as input voltage and load conditions
vary. No inductors are required.
n
2.7V to 38V V Range
Q
12V to 5V Efficiency = 81%
IN
n
I = 18µA Operating; 4μA in Shutdown
n
n
Multimode Operation (2:1, 1:1, 1:2) with Automatic
Mode Switching
n
Low Noise, Constant Frequency Operation
Pin Selectable Burst Mode® Operation
n
n
V
: Fixed 3.3V, 5V or Adjustable (2.5V to 5V)
OUT
Up to 250mA
n
n
n
n
I
OUT
The unique constant frequency architecture provides a
lower noise output than conventional charge pump regu-
lators. To optimize efficiency at the expense of slightly
higher output ripple, the device has pin selectable Burst
Mode operation.
Overtemperature and Short-Circuit Protection
Operating Junction Temperature: 150°C Maximum
Thermally Enhanced 12-Pin MSOP and Low Profile
12-Pin (3mm × 4mm) DFN Packages
Low operating current (20μA with no load, 4μA in shut-
down) and low external parts count (three small ceramic
capacitors)maketheLTC3245ideallysuitedforlowpower,
spaceconstrainedautomotive/industrialapplications.The
deviceisshort-circuitandovertemperatureprotected,and
is available in thermally enhanced 12-pin MSOP and low
profile 3mm × 4mm 12-pin DFN packages.
applicaTions
n
Automotive ECU/CAN Transceiver Supplies
n
Industrial Housekeeping Supplies
n
Low Power 12V to 5V Conversion
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
Typical applicaTion
Efficient Regulated 5V Output
5VOUT Efficiency vs Output Current
90
80
70
60
50
40
30
20
10
400
350
300
250
200
150
100
50
V
= 12V
IN
1µF
EFFICIENCY
+
–
C
C
LTC3245
V
= 5V
UP TO 250mA
OUT
OUT
V
= 2.7V TO 38V
V
V
OUT
IN
IN
I
SEL2
OUTS/ADJ
PGOOD
500k
P
LOSS
1µF
BURST
SEL1
10µF
GND
3245 TA01a
0
0.1
1
10
(mA)
100
1000
I
OUT
3245 TA01b
3245fa
1
For more information www.linear.com/LTC3245
LTC3245
absoluTe MaxiMuM raTings
(Note 1)
Operating Junction Temperature Range (Notes 2, 3)
(E-/I-Grade)........................................ –40°C to 125°C
(H-Grade)........................................... –40°C to 150°C
(MP-Grade)........................................ –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
V , SEL1, SEL2, BURST ............................ –0.3V to 38V
IN
V
, OUTS/ADJ, PGOOD ............................ –0.3V to 6V
OUT
PGOOD
V
I
......................................................................2mA
Short-Circuit Duration............................. Indefinite
OUT
(MSE Only) ...........................................................300°C
pin conFiguraTion
TOP VIEW
TOP VIEW
V
V
V
1
2
3
4
5
6
12 GND
–
IN
IN
IN
1
2
3
4
5
6
V
V
V
12 GND
–
11
10
9
C
V
C
IN
IN
IN
11
10
9
C
V
C
OUT
+
13
GND
13
OUT
+
GND
BURST
SEL1
SEL2
BURST
SEL1
8
PGOOD
8
PGOOD
7
OUTS/ADJ
SEL2
7
OUTS/ADJ
MSE PACKAGE
12-LEAD PLASTIC MSOP
DE PACKAGE
T
= 150°C, θ = 40°C/W
JA
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB GND
JMAX
12-LEAD (3mm × 4mm) PLASTIC DFN
T
= 150°C, θ = 43°C/W
JA
JMAX
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB GND
orDer inForMaTion
LEAD FREE FINISH
LTC3245EDE#PBF
LTC3245IDE#PBF
TAPE AND REEL
PART MARKING*
3245
PACKAGE DESCRIPTION
12-Lead (3mm × 4mm) Plastic DFN
12-Lead (3mm × 4mm) Plastic DFN
12-Lead Plastic MSOP
TEMPERATURE RANGE
LTC3245EDE#TRPBF
LTC3245IDE#TRPBF
LTC3245EMSE#TRPBF
LTC3245IMSE#TRPBF
LTC3245HMSE#TRPBF
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
3245
LTC3245EMSE#PBF
LTC3245IMSE#PBF
LTC3245HMSE#PBF
LTC3245MPMSE#PBF
3245
3245
12-Lead Plastic MSOP
3245
12-Lead Plastic MSOP
LTC3245MPMSE#TRPBF 3245
12-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C, (Note 2). VIN = 12V, VOUT = 5V, CFLY = 1µF unless otherwise
noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
38
UNITS
l
l
V
IN
Operating Input Voltage Range
2.7
V
V
UVLO
V
Undervoltage Lockout Threshold
V
IN
V
IN
Rising
Falling
2.4
2.2
2.7
V
V
IN
3245fa
2
For more information www.linear.com/LTC3245
LTC3245
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C, (Note 2). VIN = 12V, VOUT = 5V, CFLY = 1µF unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
V
Quiescent Current
SEL1 = SEL2 = 0V
VIN
IN
Shutdown, V
= 0V
4
18
20
8
35
40
µA
µA
µA
OUT
V
V
Enabled, BURST = 0V
CP Enabled, Output in Regulation
CP Enabled, Output in Regulation
OUT
Enabled, BURST = V
OUT
IN
l
l
l
l
V
V
V
V
V
Fixed 5V Burst Mode Output Regulation
5V ≤ V < 38V, I ≤ 250mA
OUT
4.8
4.8
4.8
4.8
5.2
5.2
5.2
5.2
V
V
V
V
OUT5_BM
OUT5_LN
OUT33_BM
OUT33_LN
ADJ
IN
(OUTS/ADJ Connected to V
,
4V ≤ V < 5V, I
≤ 150mA
OUT
OUT
IN
BURST = 0V, SEL2 = V , SEL1 = 0V)
3.3V ≤ V < 4V, I
≤ 75mA
≤ 45mA
IN
IN
OUT
OUT
(Note 5)
3V ≤ V < 3.3V, I
IN
l
l
l
l
Fixed 5V Low Noise Output Regulation
5V ≤ V < 38V, I
≤ 200mA
4.8
4.8
4.8
4.8
5.2
5.2
5.2
5.2
V
V
V
V
IN
OUT
(OUTS/ADJ Connected to V
,
4V ≤ V < 5V, I
≤ 120mA
OUT
OUT
IN
BURST = V , SEL2 = V , SEL1 = 0V)
3.3V ≤ V < 4V, I
≤ 60mA
≤ 35mA
IN
IN
IN
OUT
OUT
(Note 5)
Fixed 3.3V Burst Mode Output Regulation
(OUTS/ADJ Connected to V
3V ≤ V < 3.3V, I
IN
l
l
l
l
5V ≤ V < 38V, I
≤ 250mA
3.17
3.17
3.17
3.17
3.43
3.43
3.43
3.43
V
V
V
V
IN
OUT
,
4V ≤ V < 5V, I
≤ 175mA
OUT
OUT
IN
BURST = 0V, SEL2 = V , SEL1 = V )
3.3V ≤ V < 4V, I
≤ 110mA
OUT
≤ 60mA
OUT
IN
IN
IN
(Note 5)
Fixed 3.3V Low Noise Output Regulation
(OUTS/ADJ Connected to V
2.7V ≤ V < 3.3V, I
IN
l
l
l
l
5V ≤ V < 38V, I
≤ 220mA
OUT
3.17
3.17
3.17
3.17
3.43
3.43
3.43
3.43
V
V
V
V
IN
,
4V ≤ V < 5V, I
≤ 140mA
OUT
OUT
IN
BURST = V , SEL2 = V , SEL1 = V )
3.3V ≤ V < 4V, I
≤ 90mA
OUT
≤ 50mA
OUT
IN
IN
IN
IN
(Note 5)
2.7V ≤ V < 3.3V, I
IN
l
OUTS/ADJ Reference Voltage (Note 4)
Load Regulation (Referred to ADJ)
PGOOD Rising Threshold
SEL2 = 0V, SEL1 = V , I
= 0mA
1.176
1.200
0.2
95
1.224
V
IN OUT
R
SEL2 = 0V, SEL1 = V
mV/mA
%
CL
IN
V
V
V
V
V
% of Final Regulation Voltage
OUT
% of Final Regulation Voltage
OUT
98
PG_RISE
PG_FALL
PG_LOW
PG_HIGH
PGOOD Falling Threshold
88
91
%
l
PGOOD Output Low Voltage
I
= 0.2mA
= 5V
0.1
0
0.4
1
V
PGOOD
I
PGOOD Output High Leakage
BURST, SEL1, SEL2 Input Voltage
BURST, SEL1, SEL2 input Voltage
BURST, SEL1, SEL2 Input Current
BURST, SEL1, SEL2 Input Current
V
–1
µA
V
PGOOD
l
l
V
V
0.4
0.9
1.2
0
LOW
2
1
3
V
HIGH
I
I
I
V
V
V
= 0V
–1
µA
µA
mA
LOW
PIN
PIN
OUT
= 38V
= GND
0.5
1
HIGH
I
Short-Circuit Current
VOUT
900
SHORT_CKT
R
OUT
Charge Pump Output Impedance
2:1 Step-Down Mode
1:1 Step-Down Mode
3
3.5
14
Ω
Ω
Ω
1:2 Step-Up Mode (V = 3.3V)
IN
l
f
Oscillator Frequency
450
500
kHz
OSC
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. This IC has overtemperature protection that is
intended to protect the device during momentary overload conditions.
Junction temperatures will exceed 150°C when overtemperature is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 2: The LTC3245E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3245I is guaranteed over the
–40°C to 125°C operating junction temperature range. The LTC3245H is
guaranteed over the –40°C to 150°C operating junction temperature range
and the LTC3245MP is tested and guaranteed over the full –55°C to 150°C
operating junction temperature range. High junction temperatures degrade
operating lifetimes; operating lifetime is derated for junction temperatures
greater than 150°C. Note that the maximum ambient temperature consistent
with these specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Note 3: The junction temperature (T , in °C) is calculated from the ambient
J
temperature (T , in °C) and power dissipation (P , in Watts) according to
A
D
the formula:
T = T + (P • θ ) where θ (in °C/W) is the package thermal
J
A
D
JA
JA
impedance.
Note 4: V programming range is from 2.5V to 5V. See the
OUT
Programming the Output Voltage section for more detail.
Note 5: The maximum operating junction temperature of 150°C must be
followed. Certain combinations of input voltage and output current will
cause the junction temperature to exceed 150°C and must be avoided. See
Thermal Management section for information on calculating maximum
operating conditions.
3245fa
3
For more information www.linear.com/LTC3245
LTC3245
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
Input Operating Current
vs Input Voltage
Input Shutdown Current
vs Input Voltage
Oscillator Frequency
vs Temperature
50
45
40
35
30
25
20
18
16
14
12
10
500
475
450
425
400
375
350
325
300
BURST = 0V
150°C
125°C
V
= 5V
OUT
20
15
10
5
8
6
4
2
0
V
= 3.3V
OUT
25°C
–55°C
0
0
5
10 15 20 25 30 35 40
(V)
0
5
10 15 20 25 30 35 40
(V)
–60 –30
0
30
60
90 120 150
V
V
IN
TEMPERATURE (°C)
IN
3245 G01
3245 G02
3245 G03
5V Fixed Output Voltage
vs Input Voltage (Burst Mode
Operation)
5V Fixed Output Voltage
vs Input Voltage (Low Noise
Operation)
5V Fixed Efficiency
vs Output Current
100
90
80
70
60
50
40
30
20
10
0
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
V
= 12V
IN
Burst Mode OPERATION
I
= 0mA
I
= 0mA
OUT
OUT
LOW NOISE
I
= 150mA
OUT
I
= 150mA
OUT
I
= 250mA
OUT
I
= 250mA
OUT
6
2
3
4
5
7
8
9
10 11 12 13 14 15
0.1
1
10
(mA)
100
1000
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
(V)
I
V
(V)
IN
OUT
IN
3245 G06
3245 G04
3245 G05
3.3V Fixed Output Voltage
vs Input Voltage (Burst Mode
Operation)
3.3V Fixed Output Voltage
vs Input Voltage (Low Noise
Operation)
3.3V Fixed Output Efficiency
vs Output Current
100
90
80
70
60
50
40
30
20
10
0
3.50
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
3.50
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
V
= 9V
IN
Burst Mode OPERATION
I
= 0mA
I
= 0mA
OUT
OUT
LOW NOISE
I
= 150mA
OUT
I
= 150mA
OUT
I
= 250mA
I
= 250mA
OUT
OUT
2
3
4
5
6
7
8
9
10 11 12 13 14 15
0.1
1
10
(mA)
100
1000
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
(V)
I
V
(V)
IN
OUT
IN
3245 G09
3245 G07
3245 G08
3245fa
4
For more information www.linear.com/LTC3245
LTC3245
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
3.3V Fixed Output Voltage
vs Falling Input Voltage
(Burst Mode Operation)
5V Fixed Output Voltage
vs Falling Input Voltage
(Burst Mode Operation)
ADJ Regulation Voltage
vs Temperature
5.100
5.075
5.050
5.025
5.000
4.975
4.950
4.925
4.900
1.220
1.215
1.210
1.205
1.200
1.195
1.190
1.185
1.180
3.400
3.375
3.350
3.325
3.300
3.275
3.250
3.225
3.200
I
= 1mA
OUT
I
= 1mA
OUT
I
= 250mA
OUT
I
= 250mA
OUT
–55°C
25°C
125°C
–55°C
25°C
125°C
2
3
4
5
6
7
8
9
10 11 12 13 14 15
–60 –30
0
30
60
90 120 150
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
(V)
TEMPERATURE (°C)
V
(V)
IN
IN
3245 G10
3245 G12
3245 G11
5V Output Impedance
vs Temperature (Boost Mode)
3.3V Output Impedance
vs Temperature (Boost Mode)
Output Current vs Input Voltage
(VOUT 5% Below Regulation)
800
700
600
500
400
300
200
100
30
25
20
15
40
35
30
25
20
15
10
5
5V LOW NOISE
5V Burst Mode
OPERATION
V
= 2.7V
IN
V
= 2.7V
IN
V
= 3.3V
IN
V
= 3.3V
IN
LOW NOISE
LOW NOISE
3.3V LOW NOISE
10
5
3.3V Burst Mode
OPERATION
Burst Mode OPERATION
Burst Mode OPERATION
0
0
0
2
3
4
5
6
7
8
9
10 11 12 13 14
–60 –30
0
30
60
90 120 150
–60 –30
0
30
60
90 120 150
V
(V)
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
3245 G15
3245 G13
3245 G14
Operating Mode Transition
Voltage vs Input Voltage
Operating Mode Transition
Voltage vs Input Voltage
Operating Mode Transition
Voltage vs Input Voltage
12
11
10
9
12
11
10
9
12
I
= 1mA
I = 250mA
OUT
I
= 150mA
BUCK
BUCK
OUT
OUT
BUCK
11
10
9
RISING
RISING
8
8
LDO
8
LDO
RISING
RISING
LDO
FALLING
RISING
FALLING
7
7
7
FALLING
RISING
FALLING
FALLING
3.5
6
6
6
5
5
5
4
4
4
BOOST
BOOST
4.5
BOOST
3
3
3
FALLING
2
2
2
1
0
1
0
1
0
2.5
3
4
4.5
5
2.5
3
3.5
V
4
(V)
4.5
5
2.5
3
3.5
4
5
V
(V)
V
(V)
OUT
OUT
OUT
3245 G16
3245 G17
3245 G18
3245fa
5
For more information www.linear.com/LTC3245
LTC3245
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
5V Output Transient Response
3.3V Output Transient Response
Burst Mode
OPERATION
AC 50mV/DIV
Burst Mode
OPERATION
AC 50mV/DIV
LOW NOISE
AC 50mV/DIV
LOW NOISE
AC 50mV/DIV
200mA
OUT
150mA
OUT
I
5mA
I
5mA
3245 G19
3245 G20
V
V
= 12V
= 5V
V
V
= 12V
IN
OUT
IN
OUT
= 3.3V
3245fa
6
For more information www.linear.com/LTC3245
LTC3245
pin FuncTions
V (Pins 1, 2, 3): Power Input Pins. Input voltage for both
OUTS/ADJ (Pin 7): V
Sense / Adjust Input Pin. This pin
IN
OUT
charge pump and IC control circuitry. The V pin oper-
acts as V
sense (OUTS) for 5V or 3.3V fixed outputs
IN
OUT
ates from 2.7V to 38V. All V pins should be connected
and adjust (ADJ) for adjustable output through external
feedback. The ADJ pin servos to 1.2V when the device is
enabled in adjustable mode. (OUTS / ADJ are selected by
SEL1 and SEL2 pins; See Table 1)
IN
together at pins.
BURST (Pin 4): Burst Mode Logic Input. A logic high on
the BURST pin operates the charge pump in low noise
constant frequency. A logic low will operates the charge
pump in Burst Mode operation for higher efficiency at
low output currents. The BURST pin has a 1μA (typical)
pull-down current to ground and can tolerate 38V inputs
PGOOD (Pin 8): Power Good Open Drain Logic Output.
The PGOOD pin goes high impedance when V
is about
OUT
6% of its final operating voltage. PGOOD is intended to
be pulled up to V
external resistor.
or other low voltage supply with an
OUT
allowing it to be pin-strapped to V .
IN
+
SEL1 (Pin 5): Logic Input Pin. See Table 1 for SEL1/SEL2
operatinglogic.TheSEL1pinhasa1μA(typical)pull-down
current to ground and can tolerate 38V inputs allowing it
C (Pin 9): Flying Capacitor Positive Connection.
V
(Pin 10): Charge Pump Output Voltage. If V drops
IN
OUT
below its UVLO threshold, the connection from V be-
comes high impedance with no reverse leakage from
OUT
UVLO threshold. V
from 2.5V to 5V.
IN
to be pin-strapped to V .
IN
SEL2 (Pin 6): Logic Input Pin. See Table 1 for SEL1/SEL2
operatinglogic.TheSEL2pinhasa1μA(typical)pull-down
current to ground and can tolerate 38V inputs allowing it
V
to V . V
regulation only takes place above the
OUT
IN OUT
can be programmed to regulate
to be pin-strapped to V .
–
IN
C (Pin 11): Flying Capacitor Negative Connection.
Table 1: VOUT Operating Modes
GND (Pin 12, Exposed Pad Pin 13): Ground. The exposed
package pad is ground and must be soldered to the PC
board ground plane for proper functionality and for rated
thermal performance.
SEL2
LOW
LOW
HIGH
HIGH
SEL1
LOW
HIGH
LOW
HIGH
MODE
Shutdown
Adjustable V
Fixed 5V
OUT
Fixed 3.3V
3245fa
7
For more information www.linear.com/LTC3245
LTC3245
siMpliFieD block DiagraM
+
–
C
C
CHARGE PUMP
EN
V
V
OUT
IN
BURST
DETECTED
BURST
OUTS/ADJ
ADJ
OVERTEMPERATURE
3.3V
MUX
–
+
5V
1.2V
PGOOD
–
+
SD
1.14V
SEL1
SEL2
GND
3245 BD
3245fa
8
For more information www.linear.com/LTC3245
LTC3245
applicaTions inForMaTion
General Operation
capacitor. As the load on V
increases, V
will drop
OUT
OUT
slightly increasing the amount of charge transferred until
the output current matches the output load. This method
of regulation applies regardless of the conversion ratio.
The LTC3245 uses switched capacitor based DC/DC
conversion to provide the efficiency advantages associ-
ated with inductor based circuits as well as the cost and
simplicity advantages of a linear regulator. The LTC3245’s
unique constant frequency architecture provides a low
noise regulated output as well as lower input noise than
conventionalswitchcapacitorchargepumpregulators.The
LTC3245 uses an internal switch network and fractional
conversion ratios to achieve high efficiency and regula-
The optimal conversion ratio is chosen based on V ,
IN
V
OUT
and output load conditions. Two internal compara-
tors are used to select the default conversion ratio. Each
comparator has an adjustable offset built in that increases
(decreases) in proportion to the increasing (decreasing)
output load current. In this manner, the conversion ratio
switch point is optimized to provide peak efficiency over
allsupplyandloadconditionswhilemaintainingregulation.
Each comparator also has built-in hysteresis to reduce the
tendency of oscillating between modes when a transition
point is reached.
tion over widely varying V and output load conditions.
IN
Internal control circuitry selects the appropriate conver-
sion ratio based on V and load conditions. The device
IN
has three possible conversion modes: 2:1 step-down
mode, 1:1 step-down mode and 1:2 step-up mode. Only
one external flying capacitor is needed to operate in all
Low Noise vs Burst Mode Operation
three modes. 2:1 mode is chosen when V is greater than
IN
two times the desired V . 1:1 mode is chosen when
OUT
Burst Mode operation is selected by driving the BURST
V falls between two times V
and V . 1:2 mode is
IN
OUT
OUT
pin low. In Burst Mode operation the LTC3245 delivers a
chosen when V falls below the desired V . An internal
IN
OUT
minimumamountofchargeeachcycleforcingV
above
OUT
load current sense circuit controls the switch point of the
conversion ratio as needed to maintain output regulation
over all load conditions.
regulationatlightoutputloads.WhentheLTC3245detects
that V is above regulation the device stops charge
OUT
transfer and goes into a low current sleep state. During
this sleep state, the output load is supplied by the output
capacitor. Thedevicewillremaininthesleepstateuntilthe
output drops enough to require another burst of charge.
Burst Mode operation allows the LTC3245 to achieve high
efficiency even at light loads. If the output load exceeds
theminimumchargetransferredpercycle, thenthedevice
will operate continuously to maintain regulation.
Regulation is achieved by sensing the output voltage and
regulatingtheamountofchargetransferredpercycle. This
methodofregulationprovidesmuchlowerinputandoutput
ripple than that of conventional switched capacitor charge
pumps.Theconstantfrequencychargetransferalsomakes
additional output or input filtering much less demanding
than conventional switched capacitor charge pumps.
The LTC3245 has a Burst Mode operation pin that allows
the user to trade output ripple for better efficiency/lower
quiescent current. The device has two SEL pins that select
the output regulation (fixed 5V, fixed 3.3V or adjustable)
as well as shutdown. The device includes soft-start func-
tion to limit in-rush current at startup. The device is also
short-circuit and overtemperature protected.
Unlike traditional charge pumps who’s burst current is
dependant on many factors (i.e., supply, switch strength,
capacitor selection, etc.), the LTC3245 burst current is
regulated which helps to keep burst output ripple voltage
relatively constant and is typically 50mV for C
= 10μF.
OUT
Driving the BURST pin high puts the LTC3245 in low noise
operation. In low noise operation the minimum amount
of charge delivered each cycle and sleep hysteresis
are reduced compared to Burst Mode operation. This
results in lower burst output ripple (typically 20mV for
V
Regulation and Mode Selection
OUT
AsshownintheSimplifiedBlockDiagram, thedeviceuses
a control loop to adjust the strength of the charge pump to
match the current required at the output. The error signal
of this loop is stored directly on the output charge storage
C
= 10µF) and will transition to constant frequency
OUT
operation at lighter loads.
3245fa
9
For more information www.linear.com/LTC3245
LTC3245
applicaTions inForMaTion
Short-Circuit/Thermal Protection
Driving both SEL1 and SEL2 low shuts down the device
causing V
to go high impedance.
OUT
The LTC3245 has built-in short-circuit current limiting as
well as overtemperature protection. During short-circuit
conditions the device will automatically limit the output
current.
LTC3245
V
OUT
V
FIXED 3.3V OR
FIXED 5V
OUT
OUTS
C
OUT
The LTC3245 has thermal protection that will shut
down the device if the junction temperature exceeds the
overtemperature threshold (typically 175°C). Thermal
shutdown is included to protect the IC in cases of exces-
sivelyhighambienttemperatures, orincasesofexcessive
power dissipation inside the IC. The charge transfer will
reactivate once the junction temperature drops back to
approximately 165°C.
GND
3245 F01
Figure 1: Fixed Output Operation
Adjustable output programming is accomplished by con-
necting ADJ (OUTS/ADJ pin) to a resistor divider between
V
OUT
and GND as shown in Figure 2. Adjustable operation
When the thermal protection is active, the junction tem-
perature is beyond the specified operating range. Thermal
protectionisintendedformomentaryoverloadconditions
outsidenormaloperation.Continuousoperationabovethe
specified maximum operating junction temperature may
impair device reliability.
is enabled by driving SEL1 high and SEL2 low. Driving
both SEL1 and SEL2 low shuts down the device causing
OUT
V
to go high impedance.
LTC3245
V
V
OUT
OUT
R
R
A
B
R
A
B
1.2V 1+
(
)
Soft-Start Operation
ADJ
C
OUT
R
To prevent excessive current flow at V during start-up,
IN
GND
3245 F02
the LTC3245 has built-in soft-start circuitry. Soft-start is
achieved by increasing the amount of current available to
the output charge storage capacitor linearly over a period
of approximately 500μs. Soft-start is enabled whenever
the device is brought out of shutdown, and is disabled
shortly after regulation is achieved.
Figure 2: Adjustable Output Operation
Using adjustable operation the output (V ) can be
OUT
programmed to regulate from 2.5V to 5V. The limited
programming range provides the required V
operating
OUT
pin.
Programming the Output Voltage (OUTS/ADJ Pin)
voltage without overstressing the V
OUT
The LTC3245 output voltage programming is very flexible
offering a fixed 3.3V output, fixed 5V output as well as
adjustable output that is programmed through an external
resistor divider. The desired output regulation method is
selected through the SET pins.
The desired adjustable output voltage is programmed by
solving the following equation for R and R :
A
B
RA
V
=
OUT –1
RB 1.2V
For a fixed output simply short OUTS (OUTS/ADJ pin) to
Select a value for R in the range of 1k to 1M and solve
B
V
asshowninFigure1. Fixed3.3Voperationisenabled
OUT
for R . Note that the resistor divider current adds to the
A
by driving both SEL1 and SEL2 pins high, while fixed 5V
total no load operating current. Thus a larger value for R
will result in lower operating current.
B
operating is selected by driving SEL2 high with SEL1 low.
3245fa
10
For more information www.linear.com/LTC3245
LTC3245
applicaTions inForMaTion
2:1 Step-Down Charge Pump Operation
1:2 Step-Up Charge Pump Operation
When the input supply is greater than about two times
the output voltage, the LTC3245 will operate in 2:1 step-
down mode. Charge transfer happens in two phases. On
When the input supply is less than the output voltage the
LTC3245 will operate in 1:2 step-up mode. Charge trans-
fer happens in two phases. On the first phase the flying
the first phase the flying capacitor (C ) is connected
capacitor (C ) is connected between V and GND. On
FLY
FLY IN
between V and V . On this phase C is charged up
this phase C is charged up. On the second phase the
FLY
IN
OUT
FLY
and current is delivered to V . On the second phase the
flyingcapacitor(C )isconnectedbetweenV and V
OUT
FLY IN OUT
flying capacitor (C ) is connected between V
and
and the charge stored on C during the first phase is
FLY
FLY
OUT
GND. The charge stored on C
during the first phase
transferred to V . When in 1:2 step-up mode the input
FLY
OUT
is transferred to V
on the second phase. When in 2:1
current will be approximately twice the total output cur-
OUT
step-down mode the input current will be approximately
rent. Thus efficiency (η) and chip power dissipation (P )
D
half of the total output current. The efficiency (η) and chip
in 1:2 are approximately:
power dissipation (P ) in 2:1 are approximately:
D
POUT VOUT •IOUT VOUT
η ≅
=
=
POUT VOUT •IOUT 2VOUT
PIN V • 2I
2VIN
IN
OUT
η ≅
=
=
PIN
1
VIN
V • I
P = 2V – V
I
(
)
IN
OUT
D
IN
OUT OUT
2
V
2
P = IN – V
I
OUT
D
OUT
Due to the limited drive in 1:2 step-up mode the device
always operates in Burst Mode operation when operating
at this conversion ratio. This is done to delay the onset of
dropout at the expense of more output ripple.
1:1 Step-Down Charge Pump Operation
When the input supply is less than about two times the
output voltage but more than the programmed output
voltage, the LTC3245 will operate in 1:1 step-down mode.
This method of regulation is very similar to a linear regula-
PGOOD Output Operation
TheLTC3245includesanopen-drainpowergood(PGOOD)
output pin. If the chip is in shutdown or under UVLO con-
tor. Charge is delivered directly from V to V
through
IN
OUT
ditions (V < 2.2V typical), PGOOD is low impedance to
IN
most of the oscillator period. The charge transfer is briefly
interrupted at the end of the period. The interruption in
chargetransferimprovesstabilityandtransientresponse.
When in 1:1 step-down mode the input current will be
approximately equal to the total output current. Thus
ground.PGOODbecomeshighimpedancewhenV rises
OUT
to 95% (typical) of its regulation voltage. PGOOD stays
high impedance until V
is shut down or drops below
OUT
the PGOOD threshold (91% typical) due to an overload
condition. A pull-up resistor can be inserted between
PGOOD and a low voltage positive logic supply (such as
efficiency (η) and chip power dissipation (P ) in 1:1 are
D
approximately:
V
OUT
) to signal a valid power good condition. The use of
a large pull-up resistor on PGOOD and a capacitor placed
betweenPGOODandGNDcanbeusedtodelaythePGOOD
signal if desired.
POUT VOUT •IOUT VOUT
η ≅
=
=
PIN
P = V – V
V • I
VIN
IN
OUT
I
(
)
D
IN
OUT OUT
V
OUT
Ripple and Capacitor Selection
The type and value of capacitors used with the LTC3245
determine several important parameters such as regula-
tor control loop stability, output ripple and charge pump
3245fa
11
For more information www.linear.com/LTC3245
LTC3245
applicaTions inForMaTion
necessary for input bypassing is very dependant on the
applied source impedance as well as existing bypassing
strength. The value of C
directly controls the amount
OUT
of output ripple for a given load current when operating
already on the V node. For optimal input noise and ripple
in constant frequency mode. Increasing the size of C
will reduce the output ripple.
IN
OUT
reduction, it is recommended that a low ESR ceramic
capacitor be used for C bypassing. An electrolytic or
IN
To reduce output noise and ripple, it is suggested that a
low ESR (equivalent series resistance < 0.1Ω) ceramic
tantalum capacitor may be used in parallel with the ce-
ramic capacitor on C to increase the total capacitance,
IN
capacitor (10μF or greater) be used for C . Tantalum
OUT
but due to the higher ESR it is not recommended that an
electrolytic or tantalum capacitor be used alone for input
bypassing. The LTC3245 will operate with capacitors less
than 1μF but depending on the source impedance input
noise can feed through to the output causing degraded
performance. For best performance 1μF or greater total
and aluminum capacitors can be used in parallel with a
ceramic capacitor to increase the total capacitance but
are not recommended to be used alone because of their
high ESR.
BoththestyleandvalueofC
cansignificantlyaffectthe
OUT
stability of the LTC3245. As shown in the Block Diagram,
the device uses a control loop to adjust the strength of the
charge pump to match the current required at the output.
Theerrorsignalofthisloopisstoreddirectlyontheoutput
chargestoragecapacitor.Thechargestoragecapacitoralso
serves to form the dominant pole for the control loop. To
prevent ringing or instability it is important for the output
capacitor to maintain at least 4μF of capacitance over all
conditions (see Ceramic Capacitor Selection Guidelines).
capacitance is suggested for C .
IN
Flying Capacitor Selection
Warning: A polarized capacitor such as tantalum or alumi-
num should never be used for the flying capacitors since
the voltage can reverse upon start-up of the LTC3245.
Ceramic capacitors should always be used for the flying
capacitors. The flying capacitors control the strength of
the charge pump. In order to achieve the rated output
current, it is necessary for the flying capacitor to have
at least 0.4μF of capacitance over operating temperature
Likewise excessive ESR on the output capacitor will tend
to degrade the loop stability of the LTC3245. The closed
loopoutputresistanceofthedeviceisdesignedtobe0.3Ω
for a 5V output and 0.2Ω for a 3.3V output. For a 250mA
load current change, the output voltage will change by
about 1.5%V. If the output capacitor has more ESR than
the closed loop impedance, the closed loop frequency
response will cease to roll off in a simple 1-pole fashion
andpoorloadtransientresponseorinstabilitycouldresult.
CeramiccapacitorstypicallyhaveexceptionalESRperfor-
mance, and combined with a tight board layout, should
yield excellent stability and load transient performance.
with a bias voltage equal to the programmed V
(see
OUT
Ceramic Capacitor Selection Guidelines). If only 100mA
or less of output current is required for the application,
the flying capacitor minimum can be reduced to 0.15μF.
The voltage rating of the ceramic capacitor should be
V
OUT
+ 1V or greater.
Ceramic Capacitor Selection Guidelines
Capacitors of different materials lose their capacitance
with higher temperature and voltage at different rates.
For example, a ceramic capacitor made of X5R or X7R
material will retain most of its capacitance from –40°C
to 85°C, whereas a Z5U or Y5V style capacitor will lose
considerable capacitance over that range (60% to 80%
loss typical). Z5U and Y5V capacitors may also have a
very strong voltage coefficient, causing them to lose an
additional60%ormoreoftheircapacitancewhentherated
voltage is applied. Therefore, when comparing different
capacitors, it is often more appropriate to compare the
V Capacitor Selection
IN
The constant frequency architecture used by the LTC3245
makesinputnoisefilteringmuchlessdemandingthanwith
conventional regulated charge pumps. Depending on the
mode of operation the input current of the LTC3245 can
vary from I
to 0mA on a cycle-by-cycle basis. Low ESR
OUT
will reduce the voltage steps caused by changing input
current, while the absolute capacitor value will determine
thelevelofripple.Thetotalamountandtypeofcapacitance
amount of achievable capacitance for a given case size
3245fa
12
For more information www.linear.com/LTC3245
LTC3245
applicaTions inForMaTion
ratherthandiscussingthespecifiedcapacitancevalue.For
example, over rated voltage and temperature conditions,
a 4.7μF, 10V, Y5V ceramic capacitor in an 0805 case may
not provide any more capacitance than a 1μF, 10V, X5R
or X7R available in the same 0805 case. In fact, over bias
and temperature range, the 1μF, 10V, X5R or X7R will
provide more capacitance than the 4.7μF, 10V, Y5V. The
capacitor manufacturer’s data sheet should be consulted
to determine what value of capacitor is needed to ensure
minimum capacitance values are met over operating
temperature and bias voltage. Below is a list of ceramic
capacitor manufacturers and how to contact them:
Because of the wide input operating range it is possible to
exceed the specified operating junction temperature and
even reach thermal shutdown. Figure 3 shows the avail-
able output current vs temperature to ensure the 150°C
operating junction temperature is not exceed for input
voltages less than 20V.
Figure3assumesworst-caseoperatingconditions. Under
someoperatingconditionsthepartcansupplymorecurrent
than shown without exceeding the 150°C operating junc-
tion temperature. When operating outside the constraints
of Figure 3 it is the responsibility of the user to calculate
worst-caseoperatingconditions(temperatureandpower)
to make sure the LTC3245’s specified operating junction
temperature is not exceeded for extended periods of time.
The 2:1 Step-Down, 1:1 Step-Down, and 1:2 Step-Up
Charge Pump Operation sections provide equations for
MANUFACTURER
AVX
WEBSITE
www.avxcorp.com
www.kemet.com
www.murata.com
www.t-yuden.com
www.tdk.com
Kemet
Murata
calculating power dissipation (P ) in each mode.
D
Taiyo Yuden
TDK
300
V
< 20V
IN
Layout Considerations
250
200
Due to the high switching frequency and transient cur-
rents produced by the LTC3245, careful board layout is
necessary for optimal performance. A true ground plane
and short connections to all capacitors will optimize
performance, reduce noise and ensure proper regulation
over all conditions.
150
100
When using the LTC3245 with an external resistor divider
it is important to minimize any stray capacitance to the
ADJ (OUTS/ADJ pin) node. Stray capacitance from ADJ
to C or C can degrade performance significantly and
should be minimized and/or shielded if necessary.
50
0
70
80
90
100 110 120 130 140 150
TEMPERATURE (°C)
+
–
3245 F03
Figure 3. Available Output Current vs Temperature
Thermal Management
TheonchippowerdissipationintheLTC3245willcausethe
junction to ambient temperature to rise at rate of 40°C/W
or more. To reduce the maximum junction temperature, a
goodthermalconnectiontothePCboardisrecommended.
Connecting the die paddle (Pin 13) with multiple vias to a
largegroundplaneunderthedevicecanreducethethermal
resistanceofthepackageandPCboardconsiderably.Poor
board layout and failure to connect the die paddle (Pin 13)
to a large ground plane can result in thermal junction to
ambient impedance well in excess of 40°C/W.
For example, if it is determined that the maximum power
dissipation (P ) is 1.2W under normal operation, then the
D
junction to ambient temperature rise will be:
Junction to ambient = 1.2W • 40°C/W = 48°C
Thus,theambienttemperatureunderthisconditioncannot
exceed102°Cifthejunctiontemperatureistoremainbelow
150°Candiftheambienttemperatureexceedsabout127°C
the device will cycle in and out of the thermal shutdown.
3245fa
13
For more information www.linear.com/LTC3245
LTC3245
Typical applicaTions
Regulated 5V Low Noise Output
1µF
+
–
C
C
LTC3245
V
VOUT
= 5V
UP TO 250mA
OUT
V
IN
V
OUT
I
12V
LEAD ACID
BATTERY
BURST OUTS/ADJ
+
100k
1µF
SEL2
SEL1
PGOOD
10µF
GND
3245 TA02
High Efficiency 3.3V Microcontroller Supply from 9V Alkaline
(with Power-On Reset Delay)
1µF
+
–
C
C
MICROCONTROLLER
LTC3245
V
= 3.3V
OUT
V
V
V
DD
IN
OUT
9V
ALKALINE
BATTERY
SEL1
OUTS/ADJ
PGOOD
+
510k
10µF
1µF
SEL2
POR
BURST
1µF
GND
GND
3245 TA03
Wide Input Range Low Noise 3.6V Supply
1µF
+
–
C
C
LTC3245
V
V
OUT
V
OUT
= 3.6V
V
= 2.7V TO 38V
IN
IN
BURST
SEL1
499k
249k
1µF
OUTS/ADJ
PGOOD
10µF
SEL2
GND
3245 TA04
3245fa
14
For more information www.linear.com/LTC3245
LTC3245
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
12-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1666 Rev G)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
(.112 ±.004)
1
6
0.35
REF
1.651 ±0.102
(.065 ±.004)
5.10
(.201)
MIN
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
DETAIL “B”
12
7
0.65
(.0256)
BSC
0.42 ±0.038
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0165 ±.0015)
TYP
0.406 ±0.076
RECOMMENDED SOLDER PAD LAYOUT
(.016 ±.003)
12 11 10 9 8 7
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1
2 3 4 5 6
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE12) 0213 REV G
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
3245fa
15
For more information www.linear.com/LTC3245
LTC3245
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
0.70 ±0.05
3.30 ±0.05
3.60 ±0.05
2.20 ±0.05
1.70 ± 0.05
PACKAGE OUTLINE
0.25 ± 0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.40 ± 0.10
4.00 ±0.10
(2 SIDES)
R = 0.115
TYP
7
12
R = 0.05
TYP
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ± 0.10
PIN 1
TOP MARK
(NOTE 6)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
(UE12/DE12) DFN 0806 REV D
6
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.50 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3245fa
16
For more information www.linear.com/LTC3245
LTC3245
revision hisTory
REV
DATE
DESCRIPTION
PAGE NUMBER
A
7/13
Added MP-grade in MSOP package to Order Information table
Modified Note 2 to add MP-grade
2
3
3245fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However,noresponsibilityisassumedforitsuse.LinearTechnologyCorporationmakesnorepresenta-
tionthattheinterconnec iono it ir ts scribe ei llno nfri eonexistingpatentrights.
17
t f sc cui sde dher nwi ti ng
LTC3245
Typical applicaTion
Wide VIN 5V Supply with Battery Backup
1µF
+
–
12V TO 24V
C
C
LTC3245
V
VOUT
= 5V
UP TO 250mA
OUT
V
V
OUT
IN
I
+
+
SEL2
OUTS/ADJ
PGOOD
10µF
1µF
BURST
SEL1
4 × AA
+
+
GND
3245 TA05
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
V : 2V to 5V, V
LTC1751-3.3/
LTC1751-5
100mA, 800kHz Regulated Doubler
= 3.3V/5V, I = 20μA, I < 2μA, MS8 Package
OUT(MAX) Q SD
IN
LTC1983-3/
LTC1983-5
100mA, 900kHz Regulated Inverter
V : 3.3V to 5.5V, V
= –3V/–5V, I = 25μA, I < 2μA, ThinSOT™ Package
Q SD
IN
OUT(MAX)
OUT(MAX)
OUT(MAX)
LTC3200-5
100mA, 2MHz Low Noise, Doubler/
White LED Driver
V : 2.7V to 4.5V, V
IN
= 5V, I = 3.5mA, I < 1μA, ThinSOT Package
Q SD
LTC3202
125mA, 1.5MHz Low Noise, Fractional V : 2.7V to 4.5V, V
White LED Driver
= 5.5V, I = 2.5mA, I < 1μA, DFN, MS Packages
Q SD
IN
LTC3204-3.3/
LTC3204B-3.3/
LTC3204-5/
Low Noise, Regulated Charge Pumps
in (2mm × 2mm) DFN Package
V : 1.8V to 4.5V (LTC3204B-3.3), 2.7V to 5.5V (LTC3204B-5), I = 48μA, B Version without
IN
Q
Burst Mode Operation, 6-Lead (2mm × 2mm) DFN Package
LTC3204B-5
LTC3440
600mA (I ) 2MHz Synchronous
95% Efficiency, V : 2.5V to 5.5V, V
= 2.5V, I = 25μA, I ≤ 1μA, 10-Lead MS
Q SD
OUT
IN
OUT(MIN)
OUT(MIN)
Buck-Boost DC/DC Converter
Package
LTC3441
High Current Micropower 1MHz
Synchronous Buck-Boost DC/DC
Converter
95% Efficiency, V : 2.5V to 5.5V, V
= 2.5V, I = 25μA, I ≤ 1μA, DFN Package
Q SD
IN
LTC3443
High Current Micropower 600kHz
Synchronous Buck-Boost DC/DC
Converter
96% Efficiency, V : 2.4V to 5.5V, V
= 2.4V, I = 28μA, I < 1μA, DFN Package
OUT(MIN) Q SD
IN
LTC3240-3.3/
LTC3240-2.5
3.3V/2.5V Step-Up/Step-Down Charge V : 1.8V to 5.5V, V
= 3.3V / 2.5V, I = 65μA, I < 1μA, (2mm × 2mm) DFN Package
OUT(MAX) Q SD
IN
Pump DC/DC Converter
LTC3260
Low Noise Dual Supply Inverting
Charge Pump
V Range: 4.5V to 32V, I = 100µA, 100mA Charge Pump, 50mA Positive LDO, 50mA
IN Q
Negative LDO
V Range: 4.5V to 32V, I = 60µA, 100mA Charge Pump
IN
LTC3261
High Voltage Low I Inverting Charge
Q
Q
Pump
3245fa
LT 0713 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
18
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3245
●
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LINEAR TECHNOLOGY CORPORATION 2013
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