LTC3246EMSE#PBF [Linear]
LTC3246 - Wide VIN Range Buck-Boost Charge Pump with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LTC3246EMSE#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3246 - Wide VIN Range Buck-Boost Charge Pump with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: -40°C to 85°C 光电二极管 |
| 文件： | 总20页 (文件大小：259K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3246
Wide V Range
IN
Buck-Boost Charge Pump
with Watchdog Timer
DESCRIPTION
FEATURES
®
The LTC 3246 is a switched capacitor buck-boost DC/DC
n
2.7V – 38V Operating Range (42V Abs Max)
n
I = 20µA Operating, 1.5µA in Shutdown
Q
converter with integrated watchdog timer. The device
produces a regulated output (3.3V, 5V or adjustable) from
a 2.7V to 38V input. Switched capacitor fractional conver-
sion is used to maintain regulation over a wide range of
input voltage. Internal circuitry automatically selects the
conversionratiotooptimizeefficiencyasinputvoltageand
load conditions vary. No inductors are required.
n
Multimode Buck-Boost Charge Pump (2:1, 1:1, 1:2)
with Automatic Mode Switching
n
12V to 5V Efficiency = 81%
n
I
Up to 500mA
OUT
n
n
n
V
: Fixed 3.3V, 5V or Adjustable (2.5V to 5V)
OUT
Ultralow EMI Emissions
Engineered for Diagnostic Coverage in ISO 26262
Systems
The LTC3246’s reset time and watchdog timeout may
be set without external components, or adjusted using
external capacitors. A windowed watchdog function is
used for high reliability applications. The reset input can
be used for additional supply monitoring or be configured
as a pushbutton reset.
n
Overtemperature, Overvoltage and Short-Circuit
Protection
n
n
n
Operating Junction Temperature: 150°C Max
POR/Watchdog Controller w/External Timing Control
Thermally Enhanced 16-Lead MSOP Package
Low operating current (20µA without load, 1.5µA in shut-
down) and low external parts count make the LTC3246
ideally suited for low power, space constrained automo-
tive/industrial applications. The device is short-circuit and
overtemperature protected and is available in a thermally
enhanced 16-lead MSOP package.
APPLICATIONS
n
Automotive ECU/CAN Transceiver Supplies
n
Industrial/Telecom Housekeeping Supplies
n
Low Power 12V to 5V Conversion
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
Regulated 5V Output with Pushbutton Reset
Output Voltage vs Input Voltage
2.2µF
5.20
5.15
V
OUT
= 5V
+
–
I
UP TO 500mA
OUT
5.10
5.05
5.00
4.95
4.90
4.85
4.80
C
C
V
IN
= 2.7V TO 38V
V
V
OUT
IN
10µF
SEL2
SEL1
BIAS
RT
OUTS/ADJ
1µF
500k
500k
RST
LTC3246
µC
WDI
10µF
WT
RSTI
I
= 50mA
OUT
GND
I
= 500mA
OUT
RESET
3246 TA01a
0
2
4
6
8
10 12 14 16
V
(V)
IN
3246fa
1
For more information www.linear.com/LTC3246
LTC3246
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2)
TOP VIEW
V , SEL1, SEL2, WDI................................. –0.3V to 42V
IN
1
2
3
4
5
6
7
8
WT
RT
16 OUTS/ADJ
15 GND
V
OUT
, OUTS/ADJ, RSTI, WT, RT, BIAS, RST . –0.3V to 6V
RSTI
BIAS
SEL2
14 RST
I
........................................................................10mA
RST
–
13
12
11
C
V
C
17
V
OUT
Short Circuit Duration ............................. Indefinite
OUT
+
V
IN
SEL1
BIAS
10 WDI
Lead Temperature (Soldering, 10 sec)...................300°C
Operating Junction Temperature Range (Notes 3, 4)
(E-Grade/I-Grade)..................................–40 to 125°C
(H-Grade)...............................................–40 to 150°C
(MP-Grade)............................................–55 to 150°C
Storage Temperature Range ......................–65 to 150°C
9
V
IN
MSE PACKAGE
16-LEAD PLASTIC MSOP
T
= 150°C, ꢀ = 40°C/W
JMAX
JA
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
http://www.linear.com/product/LTC3246#orderinfo
LEAD FREE FINISH
LTC3246EMSE#PBF
LTC3246IMSE#PBF
LTC3246HMSE#PBF
LTC3246MPMSE#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3246EMSE#TRPBF
LTC3246IMSE#TRPBF
LTC3246HMSE#TRPBF
3246
3246
3246
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
LTC3246MPMSE#TRPBF 3246
Consult ADI Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult ADI Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T = 25°C. V = 12V, C = 2.2µF, C = 10µF, unless otherwise noted.
A IN FLY OUT
SYMBOL
PARAMETER
Operating Input Voltage Range
CONDITIONS
(Note 5)
MIN
TYP
MAX
38
UNITS
l
l
V
IN
2.7
V
V
V
V
V
Undervoltage Lockout Threshold
2.35
2.7
UVLO
IN
IN
I
Quiescent Current
VIN
Shutdown
SEL1 = SEL2 = 0V
1.5
20
3
µA
µA
CP Enabled, Output in Regulation SEL1 = V and/or SEL2 = V , RSTI = 5V
IN IN
30
l
l
l
l
V
SEL1, SEL2 Input Voltage
SEL1, SEL2 Input Voltage
SEL1, SEL2 Input Current
SEL1, SEL2 Input Current
1.1
0.8
0
1.6
V
V
HIGH
V
LOW
0.4
–1
I
V
= 0V
1
2
µA
µA
LOW
PIN
PIN
I
V
= 38V
0.5
1
HIGH
Charge Pump Operation
l
l
l
V
V
V
VOUTS/ADJ Regulation Voltage
SEL1 = 0V, SEL2 = V
IN
2.7V < V < 38V (Notes 5, 6)
IN
4.8
5.2
OUTS_5
OUTS_3
ADJ
V
VOUTS/ADJ Regulation Voltage
SEL1 = V , SEL2 = V
2.7V < V < 38V (Notes 5, 6)
IN
3.17
3.43
V
IN
IN
VOUTS/ADJ Regulation Voltage
SEL1 = V , SEL2 = 0V
IN
2.7V < V < 38V (Notes 5, 6)
IN
1.08
1.11
1.14
V
3246fa
2
For more information www.linear.com/LTC3246
LTC3246
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T = 25°C. V = 12V, CFLY = 2.2µF, C = 10µF, unless otherwise noted.
A IN OUT
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
I
VOUTS/ADJ Input Current
–50
0
+50
nA
ADJ
SEL1 = SEL2 = V
IN
I
I
Short Circuit Foldback Current
V = 0V
OUT
250
mA
OUT_SCKT
VOUT
R
Charge Pump Output Impedance
2:1 Step-Down Mode
1:1 Step-Down Mode, V = 5.5V
IN
1
1.2
4
Ω
Ω
Ω
OUT
l
1:2 Step-Up Mode, V = 3V, V
IN
≥ 3.3V (Note 6)
OUT
8
V
V
Overvoltage Reset
OUT
% of Final Regulation Voltage at Which
V Rising Makes RST Go Low
OUT
OUT_OV_RST
l
l
109
111.5
%
%
V
Falling Makes RST Go Hi-Z
106
108.5
OUT
V
V
Undervoltage Reset
OUT
% of Final Regulation Voltage at Which
V Rising Makes RST Go Hi-Z
OUT
OUT_UV_RST
l
l
97.5
95
99
%
%
V
Falling Makes RST Go Low
93
OUT
V
V
V
Pull-Down in Shut Down
SEL1 = SEL2 = 0V
100
kΩ
OUT_PD
OUT
OUT
V
Ripple Voltage
C = 10µF
OUT
50
25
mV
mV
OUT_RIPPLE
C
= 22µF
OUT
Reset Timer Control Pin (RT)
l
l
l
l
I
I
I
RT Pull-Up Current
V
V
V
V
= 0.3V
= 1.3V
–2
2
–3.1
3.1
0.4
2.4
–4.2
4.2
1
µA
µA
µA
V
RT(UP)
RT
RT
RT
RT
RT Pull-Down Current
RT(DOWN)
RT(INT)
Internal RT Detect Current
RT Internal Timer Threshold
= V
BIAS
V
Rising
2.0
2.65
RT(INT)
Reset Timer Input (RSTI)
l
l
l
l
V
V
I
RSTI Input High Voltage
1.22
1.2
0
1.27
V
V
RSTI_H
RSTI Input Low Voltage
RSTI Input High Current
RSTI Input Low Current
1.04
–1
RSTI_L
RSTI = 5V
RSTI = 0V
1
1
µA
µA
RSTI_H
I
–1
0
RSTI_L
Reset Timing
t
Internal Reset Timeout Period
Adjustable Reset Timeout Period
RSTI Low to RST Asserted
V
C
= V
BIAS
150
14
5
200
21
270
28
ms
ms
µs
RST(INT)
RT
RT
l
l
t
= 2.2nF
RST(EXT)
t
20
40
RSTIL
Reset Output (RST)
Output Voltage Low RST
RST Output Voltage High Leakage
Watchdog Timing
Internal Watchdog Upper Boundary
l
l
V
I
= 2mA
RST
0.1
0
0.4
1
V
OL(RST)
I
V
= 5V
–1
µA
OH(RST)
RST
l
l
l
l
l
t
t
t
t
t
V
V
C
= V
1.2
37.5
100
t
1.6
50
2.2
68
s
ms
ms
ms
ms
WDU(INT)
WDL(INT)
WDR(EXT)
WDU(EXT)
WDL(EXT)
WT
WT
WT
BIAS
Internal Watchdog Lower Boundary
External Watchdog Timeout Period
External Watchdog Upper Boundary
External Watchdog Lower Boundary
= V
BIAS
= 2.2nF
160
220
• (128/129)
WDR(EXT)
t
• (5/129)
WDR(EXT)
Watchdog Timer Input (WDI)
l
l
l
l
l
V
V
I
WDI Input High Voltage
1.1
0.8
0
1.6
V
V
IH
WDI Input Low Voltage
WDI Input High Current
WDI Input Low Current
Input Pulsewidth
0.4
OL
V
V
= 38V
= 0V
–1
–1
1
1
µA
IH
WDI
WDI
I
IL
0
µA
t
400
ns
PW(WDI)
3246fa
3
For more information www.linear.com/LTC3246
LTC3246
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T = 25°C. V = 12V, CFLY = 2.2µF, C = 10µF, unless otherwise noted.
A IN OUT
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Watchdog Timer Control Pin (WT)
l
l
l
l
I
I
I
WT Pull-Up Current
V
V
V
V
= 0.3V
= 1.3V
–2
2
–3.1
3.1
0.4
2.2
–4.2
4.2
1
µA
µA
µA
V
WT(UP)
WT
WT
WT
WT
WT Pull-Down Current
Internal WT Detect Current
WT Internal Timer Threshold
WT(DOWN)
WT(INT)
= V
BIAS
V
Rising
2
2.65
WT(INT)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
The junction temperature (T , in °C) is calculated from the ambient
J
temperature (T , in °C) and power dissipation (P , in watts) according to
A D
the formula:
T = T + (P • ꢀ ), where ꢀ (in °C/W) is the package thermal
impedance.
J
A
D
JA
JA
Note 2: All voltages are referenced to GND unless otherwise specified.
Note 3: The LTC3246E is guaranteed to meet performance specifications
from 0°C to 85°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3246I is guaranteed over the –40°C to 125°C operating junction
temperature range. The LTC3246H is guaranteed over the –40°C to 150°C
operating junction temperature range. The LTC3246MP is guaranteed and
tested over the –55°C to 150°C operating junction temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 4: This IC has overtemperature protection that is intended to protect
the device during momentary overload conditions. Junction temperatures
will exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
may impair device reliability.
Note 5: The maximum operating junction temperature of 150°C must
be followed. Certain combinations of input voltage, output current and
ambient temperature will cause the junction temperature to exceed 150°C
and must be avoided. See Thermal Management section for information on
calculating maximum operating conditions.
Note 6: The LTC3246 will attempt to regulate the output voltage under
all load conditions, but like any regulator, the output will drop out if
inadequate supply voltage exists for the load. See V
Regulation section
OUT
for calculating available load current at low input operating voltages. Also
see “Boost Output Impedance at Dropout vs Temperature” for typical
impedance values at output voltages less than 3.3V.
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Input Operating Current
Input Shutdown Current
Input Operating Current
vs Input Voltage
vs Input Voltage
vs Input Voltage
10
9
8
7
6
5
4
3
2
1
0
1000
100
10
60
NO LOAD
125°C
T
= 125°C
T
T
T
= 125°C
= 25°C
A
A
A
A
T
= 25°C
25°C
A
50
40
30
20
10
0
= –55°C
–55°C
NO LOAD
6
0
4
8
12 16 20 24 28 32 36 40
V (V)
IN
0
5
10 15 20 25 30 35 40
4
8
10
V (V)
IN
12
14
16
V
(V)
IN
3246 G01
3246 G02
3246 G03
3246fa
4
For more information www.linear.com/LTC3246
LTC3246
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
3.3V Fixed Output Voltage vs
3.3V Fixed Output Voltage
3.3V Efficiency and Power Loss
vs Input Voltage
Input Voltage
vs Input Voltage
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.45
3.40
3.35
3.30
3.25
3.20
3.15
100
90
80
70
60
50
40
30
20
10
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
I
=50mA
OUT
EFFICIENCY
LOSS
I
I
I
= 0mA
I
I
I
= 0mA
OUT
OUT
OUT
OUT
OUT
OUT
= 50mA
= 500mA
= 50mA
= 500mA
0
2
4
6
8
10 12 14 16
0
4
8
12 16 20 24 28 32 36 40
V (V)
IN
0
2
4
6
8
10 12 14 16
V
(V)
V
(V)
IN
IN
3246 G04
3246 G05
3246 G06
5V Fixed Output Voltage vs
Input Voltage
5V Fixed Output Voltage
vs Input Voltage
5V Efficiency and Power Loss
vs Input Voltage
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
100
90
80
70
60
50
40
30
20
10
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
I
=50mA
OUT
EFFICIENCY
LOSS
I
= 0mA
I
I
I
= 0mA
OUT
OUT
OUT
OUT
I
= 50mA
= 500mA
= 50mA
= 500mA
OUT
I
OUT
0
2
4
6
8
10 12 14 16
0
4
8
12 16 20 24 28 32 36 40
V (V)
IN
0
2
4
6
8
10 12 14 16
V
(V)
V
(V)
IN
IN
3246 G07
3246 G08
3246 G09
5V Efficiency and Power Loss
vs Input Voltage
3.3V Efficiency and Power Loss
vs Input Voltage
100
90
80
70
60
50
40
30
20
10
0
10
9
8
7
6
5
4
3
2
1
0
100
90
80
70
60
50
40
30
20
10
0
10
I
=500mA
I
=500mA
EFFICIENCY
OUT
OUT
9
8
7
6
5
4
3
2
1
0
EFFICIENCY
LOSS
LOSS
0
2
4
6
8
10 12 14 16
0
2
4
6
8
10 12 14 16
V
(V)
V
(V)
IN
IN
3246 G10
3246 G11
3246fa
5
For more information www.linear.com/LTC3246
LTC3246
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Boost Output Impedance at
Dropout vs Temperature
Internal Reset Timeout Period
vs Temperature
ADJ Regulation Voltage
vs Temperature
1.20
1.18
1.16
1.14
1.12
1.10
1.08
1.06
1.04
1.02
1.00
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
300
275
250
225
200
175
150
125
100
I
= 500mA
OUT
V
OUT
V
OUT
V
OUT
V
OUT
= 2.5V
= 3.0V
= 3.3V
= 5.0V
−60 −40 −20
0
20 40 60 80 100 120 140
−60 −45 −30 −15
0
15 30 45 60 75 90
−60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3246 G12
3246 G13
3246 G14
Internal Watchdog Timeout
Period vs Temperature
RT/WT Timer Control Current
vs Temperature
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
3.5
3.4
3.3
3.2
3.1
3.0
2.9
2.8
2.7
2.6
2.5
V
= 12V
IN
V
= 2.7V
IN
−60 −40 −20
0
20 40 60 80 100 120 140
−60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
3246 G15
3246 G16
BIAS Output Voltage vs
Input Voltage
Reset Timeout Period
vs C Capacitance
RT
Watchdog Timeout Period
vs C Capacitance
WT
10000
1000
100
10
100000
6.0
5.5
5.0
4.5
4.0
3.5
3.0
10000
1000
100
10
1
V
SD
OUT
V
EN
OUT
0.1
1
0.001 0.01
0.1
1
10
100 1000
0.001 0.01
0.1
1
10
100 1000
0
5
10 15 20 25 30 35 40
(V)
C
(nF)
C
(nF)
V
IN
RT
WT
3246 G17
3246 G18
3246 G19
3246fa
6
For more information www.linear.com/LTC3246
LTC3246
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Output Transient Response
Output Voltage Ripple
2:1 MODE
50mV/DIV
V
OUT
50mV/DIV
1:1 MODE
50mV/DIV
1:2 MODE
50mV/DIV
440mA
I
OUT
25mA
5µs/DIV
1µs/DIV
V
V
C
= 14V
IN
I
= 400mA
OUT
= 5V
= 10µF
OUT
3246 G20
3246 G21
C
= 10µF
OUT
OUT
TIMING DIAGRAMS
Charge Pump Output Reset Timing
RSTI
t
t
RST
RSTIL
RST
3246 TD01
Watchdog Timing
WDI
RST
t
< t < t
t
WDR
WDL
WDU
3246 TD02
t < t
t
t
RST
WDL
RST
3246fa
7
For more information www.linear.com/LTC3246
LTC3246
PIN FUNCTIONS
Table 1. V
Operating Modes
WT (Pin 1): Watchdog Timer Control Pin. Attach an ex-
OUT
SEL2
LOW
LOW
HIGH
HIGH
SEL1
MODE
Shutdown
ternal capacitor (C ) to GND to set a watchdog upper
WT
LOW
HIGH
LOW
HIGH
boundary timeout time (See “Watchdog Timeout Period
vs WT Capacitance” graph on page 6). Tie WT to BIAS to
generate a timeout of about 1.6s. Tie WT and WDI to GND
to disable the watchdog timer.
Adjustable V
OUT
Fixed 5V
Fixed 3.3V
RT (Pin 2): Reset Timeout Control Pin. Attach an external
WDI (Pin 10): Watchdog Logic Input Pin. If the watchdog
timer is not disabled then WDI must be driven such that a
falling edge occurs within a time less than the watchdog
upper boundary time, or RST will be asserted low. The
WDI period must also be greater than the watchdog lower
boundary time, and only falling edges are considered. Tie
WT and WDI to GND to disable the watchdog timer. WDI
is a high impedance pin and must be driven to a valid
level. Do not float.
capacitor (C ) to GND to set a reset timeout time (See
RT
“Reset Timeout Period vs RT Capacitance” graph on
page 6). Tie RT to BIAS to generate a reset timeout of
about 200ms.
RSTI (Pin 3): Reset Logic Comparator Pin. The RSTI input
iscomparedtoareferencethreshold(1.2Vtypical).IfRSTI
is below the reference voltage, the part will enter the reset
state and the RST pin will be low. Once RSTI exceeds the
reference voltage and V
in regulation, the reset timer
OUT
C+ (Pin 11): Connect to positive flying capacitor terminal
is started. RST pin will be low until the reset period times
out. RSTI is a high impedance pin and must be driven to
a valid level. Do not float.
only. Do not load or drive externally.
V
(Pin 12): Charge Pump Output Voltage. The charge
OUT
pumpoutputisenabledifeitherSEL1orSEL2arelogichigh.
BIAS (Pin 4, 8): Internal BIAS Voltage. The bias pin is for
internal operation only and should not be loaded or driven
externally. Bypass BIAS with a 10µF or greater ceramic
capacitor.
C- (Pin 13): Connect to negative flying capacitor terminal
only. Do not load or drive externally.
RST(Pin14):ResetOpenDrainLogicOutput.TheRSTpin
is low impedance during the reset period, and goes high
impedance during the watchdog period. RST is intended
SEL2 (Pin 5): Logic Input Pin. See Table 1 for SEL1/SEL2
operating logic. SEL2 enables and disables the charge
pump along with the SEL1 pin. The SEL2 pin has a 1µA
(typical) pull down current to ground and can tolerate 38V
to be pulled up to low voltage supply (such as V ) with
OUT
an external resistor.
inputs allowing it to be pin-strapped to V .
IN
GND (Pin 15, Exposed Pad): Ground. The exposed pack-
age pad is ground and must be soldered to the PC board
groundplaneforproperfunctionalityandforratedthermal
performance.
V (Pin6,9):PowerInputPin.Inputvoltageforbothcharge
IN
pump and IC control circuitry. The V pin operates from
IN
2.7V to 38V. All V pins should be connected together at
IN
pinsandbypassedwitha1µForgreaterceramiccapacitor.
OUTS/ADJ(Pin16):V
Sense/AdjustInputPin.Thispin
OUT
SEL1 (Pin 7): Logic Input Pin. See Table 1 for SEL1/SEL2
operating logic. SEL1 enables and disables the charge
pump along with the SEL2 pin. The SEL1 pin has a 1µA
(typical) pull down current to ground and can tolerate 38V
acts as V
sense (OUTS) for 5V or 3.3V fixed outputs
OUT
and adjust (ADJ) for adjustable output through external
feedback. The ADJ pin servos to 1.1V when the device is
enabled in adjustable mode. (OUTS/ADJ are selected by
SEL1 and SEL2 pins; See Table 1). Connect OUTS/ADJ to
inputs allowing it to be pin-strapped to V .
IN
V
or external divider as appropriate.
OUT
3246fa
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For more information www.linear.com/LTC3246
LTC3246
SIMPLIFIED BLOCK DIAGRAM
2.2µF
11
13
+
–
C
C
V
V
IN
IN
17
15
6
9
4
8
I
CHARGE PUMP
LIM
2.7V TO 38V
GND
1µF
V
IN
5V
LDO
BIAS
V
OUT
V
OUT
10µF
3.5V/5V/ADJ
12
500mA
10µF
BIAS
MODE CLK
2
V
OUT
IN
OUTS/
ADJ
MODE
COMP
OSC
EN
16
ADJ
3.3V
5V
V
OUT
1.1V
+
MUX
–
PGOOD
+9%/–5%
SD
SEL1
SEL1
7
UP TO 38V
SEL2
SEL2
5
UP TO 38V
–
1.2V
RST
14
RSTI
+
RSTI
3
RESET
TIMER
0V TO 5V
WDI
WATCHDOG
TIMER
WDI
10
UP TO 38V
WT
RT
1
2
3246 BD
C
C
RT
WT
3246fa
9
For more information www.linear.com/LTC3246
LTC3246
APPLICATIONS INFORMATION
General Operation
TheoptimalconversionratioischosenbasedonV , V
IN OUT
and output conditions. Two internal comparators are used
to select the default conversion ratio. The conversion ratio
switchpointisoptimizedtoprovidepeakefficiencyoverall
supply and load conditions while maintaining regulation.
Each comparator also has built-in hysteresis to reduce the
tendency of oscillating between modes when a transition
point is reached.
The LTC3246 uses switched capacitor based DC/DC
conversion to provide the efficiency advantages associ-
ated with inductor based circuits as well as the cost and
simplicity advantages of a linear regulator. The LTC3246
uses an internal switch network and fractional conversion
ratiostoachievehighefficiencyandregulationoverwidely
varying V and output load conditions.
IN
The LTC3246 will attempt to regulate its output over the
full operating range (2.7V to 38V), but like any regulator
the output will drop out of regulation if inadequate supply
voltage exists to the operating load. As the input voltage
drops, the LTC3246 will eventually end up in the 1:2 step
up mode. As the input voltage drops further, the output
will eventually drop out of regulation. At this point, the 1:2
step-up charge pump impedance can be calculated as:
Internalcontrolcircuitryselectstheappropriateconversion
ratio based on V and load conditions. The device has
IN
threepossibleconversionmodes:2:1step-downmode,1:1
step-down mode and 1:2 step-up mode. Only one external
flying capacitor is needed to operate in all three modes.
2:1 mode is chosen when V is greater than two times the
IN
desired V . 1:1 mode is chosen when V falls between
OUT IN
two times V
and V . 1:2 mode is chosen when V
OUT
OUT
IN
falls below the desired V . The internal mode control
OUT
2 • V – V
IN
OUT
R
=
OUT
logic maintains output regulation over all load conditions.
I
OUT
Regulation is achieved by sensing the output voltage
and enabling charge transfer when the output falls below
regulation. When the charge pump is enabled, it controls
the current into the flying capacitor to limit the output
ripple beyond that of conventional switched capacitor
charge pumps. The part has two SEL pins that select the
output regulation (fixed 5V, fixed 3.3V or adjustable) as
well as shutdown.
This equation can be rewritten to determine the output
current at which the output will drop out for a given input
voltage as:
2 • V – V
IN
OUT
I
=
I
ꢁ 500mA
ꢂ
ꢃ
OUT
OUT
R
OUT
For a typical 1:2 step-up charge pump impedance of 4Ω
with 5V output voltage and 3V input voltage, the output
current at dropout will be about:
Thechargepumpoperatesatanominalfrequencyofabout
450kHz, though actual output ripple frequency will vary
with output load, operating mode and output capacitance.
2 • 3 – 4.8
I
=
mA = 300mA
OUT
4
The LTC3246 is designed for applications requiring high
systemreliability.Thepartincludesoutputsupplymonitor-
ing and watchdog timing circuitry as well as overvoltage,
short-circuit and overtemperature protection.
Thus, typically the part should be able to output 300mA
without dropping out. To be conservative, the max 1:2
step-up charge pump impedance of 8Ω should be used
whichgivesamoreconservativeoutputcurrentof150mA.
V
Regulation and Mode Selection
OUT
Any supply impedance in series with the LTC3246 must
be doubled and added to the 1:2 step-up charge pump
Regulation is achieved by sensing the output voltage and
enabling charge transfer when the output falls below the
programmed regulation voltage. The amount of charge
transferred per cycle is controlled over the full input range
to minimize output ripple. The regulation voltage (fixed
5V, fixed 3.3V or adjustable) is selected through the SEL1
and SEL2 pins per Table 1 in the Pin Function section.
impedance. It is also important to have the specified C
OUT
andC capacitancetoachievethespecifiedoutputimped-
FLY
ance. Observing dropout will allow the user to calculate
the output impedance for their specific application.
3246fa
10
For more information www.linear.com/LTC3246
LTC3246
APPLICATIONS INFORMATION
Short-Circuit/Thermal Protection
Adjustable output programming is accomplished by con-
necting ADJ (OUTS/ADJ pin) to a resistor divider between
The LTC3246 has built-in short-circuit current limiting
V
and GND as shown in Figure 2. Adjustable operation
OUT
on both the V
and BIAS outputs to protect the part in
OUT
isenabledbydrivingSEL1highandSEL2low.Drivingboth
the event of a short. During short-circuit conditions, the
device will automatically limit the output current from
both outputs.
SEL1 and SEL2 low shuts down the device, causing V
OUT
to be pulled low by an internal impedance of about 80kΩ.
The LTC3246 has thermal protection that will shut
down the device if the junction temperature exceeds the
overtemperature threshold (typically 175°C). Thermal
shutdown is included to protect the IC in cases of exces-
sivelyhigh ambienttemperatures, orincases of excessive
power dissipation inside the IC. The charge transfer will
reactivate once the junction temperature drops back to
approximately 165°C.
V
V
OUT
OUT
ꢁ
ꢃ
ꢂ
ꢄ
R
LTC3246
OUTS/ADJ
R
A
A ꢆ
1.1V 1ꢀ
R
ꢅ
C
B
OUT
R
B
GND
3246 F02
Figure 2. Adjustable Output Operation
Using adjustable operation, the output (V ) can be
OUT
Whenthethermalprotectionisactive,thejunctiontempera-
ture is beyond the specified operating range. The thermal
and short-circuit protection are intended for momentary
overload conditions outside normal operation. Continu-
ous operation above the specified maximum operating
conditions may impair device reliability.
programmed to regulate from 2.5V to 5V. The limited
programming range provides the required V operating
OUT
voltage without overstressing the V
pin.
OUT
The desired adjustable output voltage is programmed by
solving the following equation for R and R :
A
B
R
V
A
B
OUT
=
– 1
Programming the Output Voltage (OUTS/ADJ Pin)
R
1.11V
The LTC3246 output voltage programming is very flexible
offering a fixed 3.3V output, fixed 5V output as well as
adjustable output that is programmed through an external
resistor divider. The desired output regulation method is
selected through the SEL pins.
Select a value for R in the range of 1k to 1M and solve
B
for R . Note that the resistor divider current adds to the
A
total no load operating current. Thus, a larger value for
R will result in lower operating current.
B
For a fixed output simply short OUTS (OUTS/ADJ pin) to
2:1 Step-Down Charge Pump Operation
V
asshowninFigure1. Fixed3.3Voperationisenabled
OUT
When the input supply is greater than about two times
the output voltage, the LTC3246 will operate in 2:1 step-
down mode. Charge transfer happens in two phases. On
by driving both SEL1 and SEL2 pins high, while fixed 5V
operating is selected by driving SEL2 high with SEL1 low.
Driving both SEL1 and SEL2 low shuts down the device
the first phase, the flying capacitor (C ) is connected
FLY
causing V
to be pulled low by an internal impedance
OUT
between V and V . On this phase, C is charged up
IN OUT FLY
of about 80kΩ.
and current is delivered to V . On the second phase,
OUT
V
OUT
the flying capacitor (C ) is connected between V
FLY
and
OUT
FIXED 3.3V OR
FIXED 5.0V
V
OUT
GND. The charge stored on C during the first phase is
FLY
LTC3246
OUTS/ADJ
C
OUT
transferred to V
on the second phase. When in 2:1
OUT
step-down mode, the input current will be approximately
GND
3246 F01
Figure 1. Fixed Output Operation
3246fa
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LTC3246
APPLICATIONS INFORMATION
half of the total output current. The efficiency (ꢄ) and chip
power dissipation (P ) in 2:1 are approximately:
D
V
Ripple and Capacitor Selection
OUT
The type and value of capacitors used with the LTC3246
determine output ripple and charge pump strength. The
value of C directly controls the amount of output ripple
P
OUT
V
•I
OUT OUT
2V
OUT
ꢄ ꢅ
=
=
1
OUT
P
V
IN
IN
V • I
IN
OUT
for a given load current. Output ripple decreases with
outputcapacitanceuntilabout20µF, atwhichpointoutput
peak to peak ripple remains more or less constant. See
Figure 3 for graph of output ripple vs output capacitance.
2
V
IN
ꢆ
ꢉ
ꢋ
P =
D
– V
I
ꢈ
ꢇ
OUT OUT
ꢊ
2
200
BOOST, 500mA
1:1 Step-Down Charge Pump Operation
BOOST, 50mA
175
BUCK, 500mA
BUCK, 50mA
When the input supply is less than about two times the
output voltage, but more than the programmed output
voltage, the LTC3246 will operate in 1:1 step-down mode.
This method of regulation is very similar to a linear regula-
150
LDO, 500mA
LDO, 50mA
125
100
75
50
25
0
tor. Charge is delivered directly from V to V
IN
through
OUT
most of the oscillator period. The charge transfer is briefly
interruptedattheendoftheperiod.Whenin1:1step-down
mode, the input current will be approximately equal to the
total output current. Thus, efficiency (ꢄ) and chip power
0
5
10 15 20 25 30 35 40
C CAPACITANCE (µF)
OUT
dissipation (P ) in 1:1 are approximately:
D
3246 TA01b
P
OUT
V
•I
OUT OUT
V
OUT
Figure 3. Typical V
Ripple Voltage vs C
Capacitance
OUT
OUT
ꢄ ꢅ
=
=
V
OUT
P
IN
V •I
IN
IN
To reduce output noise and ripple, it is suggested that a
low ESR (equivalent series resistance < 0.1Ω) ceramic
P = V – V
I
OUT OUT
D
IN
capacitor (10µF or greater) be used for C . For optimal
OUT
performance, it is best to increase C
for low V
as
OUT
OUT
1:2 Step-Up Charge Pump Operation
the ripple becomes a larger percentage of the regulation
voltage degrading performance. Tantalum and aluminum
capacitors can be used in parallel with a ceramic capacitor
toincreasethetotalcapacitancebutarenotrecommended
to be used alone because of their high ESR.
When the input supply is less than the output voltage,
the LTC3246 will operate in 1:2 step-up mode. Charge
transfer happens in two phases. On the first phase, the
flying capacitor (C ) is connected between V and GND.
FLY
IN
On this phase, C is charged up. On the second phase,
FLY
V
Overvoltage Protection
the flying capacitor (C ) is connected between V and
FLY IN
OUT
V
OUT
and the charge stored on C during the first phase
FLY
An internal comparator monitors the voltage at V
and
OUT
is transferred to V . When in 1:2 step-up mode, the
OUT
will prevent charge transfer in the event that V
exceeds
OUT
input current will be approximately twice the total output
theovervoltagethreshold(5.9Vtyp.). Overvoltageprotec-
tion is added as a safety feature to prevent damage to the
part in the event of a fault such as VOUTS/ADJ pin shorted
current. Thus, efficiency (ꢄ) and chip power dissipation
(P ) in 1:2 are approximately:
D
to ground or not connected to V . Charge transfer will
OUT
P
OUT
V
•I
OUT OUT
V
OUT
ꢄ ꢅ
=
=
2V
OUT
start once the output falls to about 5.75V.
P
IN
V • 2I
IN
IN
P = 2V – V
I
OUT OUT
D
IN
3246fa
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LTC3246
APPLICATIONS INFORMATION
V Capacitor Selection
IN
material will retain most of its capacitance from –40°C
to 85°C, whereas a Z5U or Y5V style capacitor will lose
considerable capacitance over that range (60% to 80%
loss typical). Z5U and Y5V capacitors may also have a
very strong voltage coefficient, causing them to lose an
additional60%ormoreoftheircapacitancewhentherated
voltage is applied. Therefore, when comparing different
capacitors, it is often more appropriate to compare the
amount of achievable capacitance for a given case size
ratherthandiscussingthespecifiedcapacitancevalue.For
example, over rated voltage and temperature conditions,
a 4.7µF, 10V, Y5V ceramic capacitor in an 0805 case may
not provide any more capacitance than a 1µF, 10V, X5R
or X7R available in the same 0805 case. In fact, over bias
and temperature range, the 1µF, 10V, X5R or X7R will
provide more capacitance than the 4.7µF, 10V, Y5V. The
capacitor manufacturer’s data sheet should be consulted
to determine what value of capacitor is needed to ensure
minimum capacitance values are met over operating
temperature and bias voltage. Below is a list of ceramic
capacitor manufacturers and how to contact them:
ThefinitechargetransferarchitectureusedbytheLTC3246
makes input noise filtering much less demanding than the
sharp current spikes of conventional regulated charge
pumps. Depending on the mode of operation, the input
current of the LTC3246 can step from about 1A to 0A on
a cycle-by-cycle basis. Low ESR will reduce the voltage
steps caused by changing input current, while the ab-
solute capacitor value will determine the level of ripple.
The total amount and type of capacitance necessary for
input bypassing is very dependent on the applied source
impedance as well as existing bypassing already on the
V node. For optimal input noise and ripple reduction, it
IN
isrecommendedthatalowESRceramiccapacitorbeused
for C bypassing. An electrolytic or tantalum capacitor
IN
may be used in parallel with the ceramic capacitor on C
IN
to increase the total capacitance, but, due to the higher
ESR, it is not recommended that an electrolytic or tan-
talum capacitor be used alone for input bypassing. The
LTC3246 will operate with capacitors less than 1µF, but,
depending on the source impedance, input noise can feed
through to the output causing degraded performance.
For best performance 1µF or greater total capacitance is
MANUFACTURER
AVX
WEBSITE
www.avxcorp.com
www.kemet.com
www.murata
suggested for C .
IN
Kemet
Murata
Flying Capacitor Selection
Taiyo Yuden
TDK
www.t-yuden.com
www.tdk.com
Ceramic capacitors should always be used for the flying
capacitor. The flying capacitor controls the strength of
the charge pump. In order to achieve the rated output
current, it is necessary for the flying capacitor to have
at least 1µF of capacitance over operating temperature
Wurth Elektronik
www.we-online.com
BIAS Pin and Capacitor Selection
with a bias voltage equal to the programmed V
(see
OUT
TheBIASpinoftheLTC3246isa5Voutputthatisgenerated
by an internal Low Drop-Out (LDO) regulator supplied by
Ceramic Capacitor Selection Guidelines). If only 100mA
or less of output current is required for the application,
the flying capacitor minimum can be reduced to 0.2µF.
The voltage rating of the ceramic capacitor should be
V . The BIAS voltage is used as a supply for the internal
IN
low voltage circuitry. A capacitor on the BIAS pin is neces-
sarytostabilizetheLDOoutputandminimizerippleduring
transient conditions. A low ESR ceramic capacitor with a
minimum capacitance of 2µF over temperature with 5V
bias should be used. Since the BIAS voltage comes from
an LDO, the BIAS voltage will drop with V as V goes
V
+ 1V or greater.
OUT
Ceramic Capacitor Selection Guidelines
Capacitors of different materials lose their capacitance
with higher temperature and voltage at different rates.
For example, a ceramic capacitor made of X5R or X7R
IN
IN
below 5V. This is normal and expected operation. The
BIAS pin voltage is for internal circuitry only and should
not be loaded externally.
3246fa
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LTC3246
APPLICATIONS INFORMATION
Reset Generation (RSTI input, RST output)
open without external capacitor generates a reset timeout
of approximately 0.5ms. Shorting RT to BIAS generates a
reset timeout of approximately 0.2s.
10000
The LTC3246 pulls the RST open-drain output low when-
ever RSTI is below threshold (typically 1.2V) or V
is
OUT
greater than the overvoltage threshold or less than the
undervoltage threshold. RST remains asserted low for
1000
100
10
a reset timeout period (t ) once RSTI goes above the
RST
thresholdandV
isinregulation(withintheovervoltage
OUT
and undervoltage thresholds). RST de-asserts by going
high impedance at the end of the reset timeout period.
The reset timeout can be configured to use an internal
timer without external components or an adjustable timer
programmed by connecting an external capacitor from
the RT pin to GND. Glitch filtering ensures reliable reset
operation without false triggering.
1
0.1
0.001 0.01
0.1
1
10
100 1000
C
(nF)
RT
3246 F04
During initial power up, the RST output asserts low while
Figure 4. Reset Timeout Period vs C Capacitance
RT
V is below the V undervoltage lockout threshold. The
IN IN
state of V
and RSTI have no effect on RST while V
OUT
IN
is below the undervoltage lockout threshold. The reset
RST Output Characteristics
timeout period cannot start until V exceeds the under-
IN
RST is an open-drain pin and, thus, requires an external
pull-up resistor to a logic supply. RST may be pulled up to
voltage lockout threshold.
any valid logic level (such as V ) providing the voltage
OUT
V
Undervoltage/Overvoltage Reset
OUT
limits of the pin are observed (See Absolute Maximum
Ratings section).
Abuilt-inV
supplymonitorensurestheV
isinregu-
OUT
OUT
lation before RST is allowed to go high impedance. The
monitordetectsbothovervoltageandundervoltagefaults.
Watchdog Timer (WDI input, RST output)
If V is greater than the overvoltage threshold or less
OUT
The LTC3246 includes a windowed watchdog function
that can continuously monitor the application’s logic or
microprocessorandissueautomaticresetstoaidrecovery
from unintended lockups or crashes. With the RSTI input
held above threshold, the application must periodically
toggle the logic state of the watchdog input (WDI pin) in
ordertoclearthewatchdogtimer. Specifically, successive
falling edges on the WDI pin must be spaced by more than
the watchdog lower boundary but less than the watchdog
upper boundary. As long as this condition holds, RST
remains high impedance.
than the undervoltage threshold, the part registers a fault
and pulls RST low. The fault condition is removed when
iswithintheovervoltageandundervoltagethresholds.
V
OUT
Load transients within the operating range of the part will
not registering as a fault by design.
Selecting the Reset Timing Capacitor
The reset timeout period can be set to a fixed internal
timer or programmed with a capacitor in order to accom-
modate a variety of applications. Connecting a capacitor,
If a falling edge arrives before the watchdog lower bound-
ary, or if the watchdog timer reaches the upper bound-
ary without seeing a falling edge on WDI, the watchdog
timer immediately enters its reset state and asserts RST
C , between the RT pin and GND sets the reset timeout
RT
period, t
.
RST
Figure 4 shows the desired reset timeout period as a
function of the value of the timer capacitor. Leaving RT
3246fa
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LTC3246
APPLICATIONS INFORMATION
low for the reset timeout period. Once the reset timeout
completes, RST is released to go high and the watchdog
timer starts again.
Figure 5 shows the approximate external watchdog
timeout period as a function of the watchdog capacitor.
Shorting WT to BIAS sets an upper and lower watchdog
timeout period of about 50ms and 1.6s respectively.
Duringpower-up,thewatchdogtimerremainsclearedwhile
RST is asserted low. As soon as the reset timer times out,
RST goes high and the watchdog timer is started.
100000
10000
1000
100
Setting the Watchdog Timeout Period
The watchdog upper boundary (t
) and lower bound-
WDU
ary (t
) are not observable outside the part; only the
WDL
watchdog timeout period (t
) of the part is observable
WDR
via the RST pin. The watchdog upper boundary (t
)
WDU
10
occurs one watchdog clock cycle before the watchdog
timeout period (t ). The internal watchdog timeout
WDR
1
0.001 0.01
0.1
1
10
100 1000
period consists of 8193 clock cycles, so the internal
watchdog upper boundary time is essentially the same
as the internal watchdog timeout period. Conversely, the
external watchdog timeout period consists of only 129
clock cycles, so the external watchdog upper boundary
should be more accurately calculated as:
C
(nF)
WT
3246 F05
Figure 5. External Watchdog Timeout Period vs C Capacitance
WT
Layout Considerations
128
Due to the high switching frequency and transient cur-
rents produced by the LTC3246, careful board layout is
necessary for optimal performance. A true ground plane
and short connections to all capacitors will optimize
performance, reduce noise and ensure proper regulation
over all conditions.
t
= t
•
WDU(EXT)
WDR(EXT)
129
The external watchdog lower boundary (t
) oc-
WDL(EXT)
curs five clock cycles into the watchdog timeout period
(t ). Thus the external watchdog lower boundary
WDR(EXT)
can be calculated from the external watchdog timeout
WhenusingtheLTC3246withanexternalresistordividerit
is important to minimize any stray capacitance to the ADJ
period as:
5
+
t
= t
•
(OUTS/ADJ pin) node. Stray capacitance from ADJ to C
WDR(EXT)
WDL EXT
ꢂ
ꢃ
129
–
or C can degrade performance significantly and should
be minimized and/or shielded if necessary. Minimize stray
The internal watchdog lower boundary can be calcu-
lated from the internal watchdog timeout period by the
following:
+ –
capacitance from WT and RT to C and C when using
external timing capacitors to minimize timing variation.
t
WDR(INT)
Thermal Management/Thermal Shutdown
t
=
WDL(INT)
32
Theon-chippowerdissipationintheLTC3246willcausethe
junction to ambient temperature to rise at rate of typically
40°C/W in still air with a good thermal connection to the
PC board. Connecting the die pad (Pin 17) with multiple
vias to a large gro und plane under the device can reduce
the thermal resistance of the package and PC board con-
The watchdog upper boundary is adjustable and can be
optimized for software execution. The watchdog upper
boundary is adjusted by connecting a capacitor, C ,
WT
between the WT and GND pins.
3246fa
15
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LTC3246
APPLICATIONS INFORMATION
siderably. Poor board layout and failure to connect the die
pad (Pin 17) to a large ground plane can result in thermal
junction to ambient impedance well in excess of 40°C/W.
It is also possible to get thermal rates less than 40°C/W
with good airflow over the part and PC board.
Thus, the ambient temperature under this condition can-
not exceed 102°C if the junction temperature is to remain
below 150°C, and, if the ambient temperature exceeds
about 127°C, the device will cycle in and out of the thermal
shutdown.
Because of the wide input operating range, it is possible
to exceed the specified operating junction temperature
and even reach thermal shutdown (175°C typ). Figure 6
and Figure 7 show the available output current vs ambi-
ent temperature to ensure the 150°C operating junction
temperature is not exceeded.
Every application will have a slightly different thermal rise
than the specified 40°C/W, especially applications with
good airflow. Calculating the actual thermal rate for a
specific application circuit is too complex to be presented
here, but the thermal rate can be measured in application.
This is done by first taking the final application circuit and
enabling the LTC3246 under a known power dissipation
Thefiguresassumeworst-caseoperatingconditionsanda
thermal impedance of 40°C/W. It is always safe to operate
under the line shown on the graph. Operation above the
line is conditional and is the responsibility of the user to
calculate worst-case operating conditions (temperature
and power) to make sure the part does not exceed the
150°C operating junction temperature for extended pe-
riods of time.
(P ) and raising the ambient temperature slowly until
D
the LTC3246 shuts down. Note this temperature as T1.
Now, remove the load from the part and raise the ambi-
ent temperature slowly until the LTC3246 shuts down
again. Note this temperature as T2. The thermal rate can
be calculated as:
ꢀ
= P /(T2 – T1)
D
JA
The 2:1 Step-Down Charge Pump Operation, 1:1 Step-
Down Charge Pump Operation, and 1:2 Step-Up Charge
PumpOperationsectionsprovideequationsforcalculating
Anothermethodfordeterminingmaximumsafeoperating
temperature in application is to configure the LTC3246 to
operate under the worst case operating power dissipa-
tion. Then slowly raise the ambient temperature until the
LTC3246 shuts down. At this point the LTC3246 junction
temperature will be about 175°C, so simply subtract
25°C from the shutdown temperature and this is the safe
operating temperature for the application.
power dissipation (P ) in each mode.
D
For example, if it is determined that the maximum power
dissipation (P ) is 1.2W under normal operation, then the
D
junction to ambient temperature rise will be:
T
= 1.2W • 40°C/W = 48°C
JA
0.5
0.5
CONDITIONAL
0.4
0.4
OPERATION
CONDITIONAL
OPERATION
0.3
0.3
SAFE OPERATION
SAFE OPERATION
0.2
0.2
0.1
0.1
2.7V < V < 22V
IN
2.7V < V < 15V
IN
θ
= 40°C/W
θ
= 40°C/W
JA
JA
0.0
0.0
0
25
50
75
100
125
150
0
25
50
75
100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
3246 F06
3246 F07
Figure 6. 5V Output Operation vs Ambient Temperature
Figure 7. 3.3V Output Operation vs Ambient Temperature
3246fa
16
For more information www.linear.com/LTC3246
LTC3246
TYPICAL APPLICATIONS
Regulated 2.5V Output with Externally Programmed Watchdog Timing
2.2µF
V
OUT
= 2.5V
+
–
I
UP TO 500mA
OUT
C
C
V
IN
= 2.7V TO 38V
V
V
OUT
IN
47µF
SEL1
SEL2
BIAS
RSTI
1µF
500k
RST
LTC3246
µC
WDI
1270k
10µF
OUTS/ADJ
RT
GND
10nF
WT
1000k
3246 TA02
22nF
3246fa
17
For more information www.linear.com/LTC3246
LTC3246
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC3246#packaging for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.10
(.201)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
0.12 REF
DETAIL “B”
(.126 – .136)
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
BSC
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.280 ±0.076
RECOMMENDED SOLDER PAD LAYOUT
(.011 ±.003)
REF
16151413121110
9
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
3246fa
18
For more information www.linear.com/LTC3246
LTC3246
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
12/17 Changed R
V
OUT IN
condition
3
3
Changed V
lower limit
RSTI_L
Changed I
equation resultant to 300mA and text to 150mA
10
17
OUT
Changed circuit pin names
3246fa
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
19
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LTC3246
TYPICAL APPLICATION
Reduced Ripple 3.3V Output with Watchdog Timing Disabled
2.2µF
V
OUT
= 3.3V
+
–
I
UP TO 500mA
OUT
C
C
V
IN
= 2.7V TO 38V
V
V
OUT
IN
22µF
SEL2
SEL1
BIAS
RT
OUTS/ADJ
1µF
500k
RST
RST
LTC3246
RSTI
10µF
WT
WDI
GND
3246 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
V : 1.8V to 4.5V (LTC3204B-3.3), 2.7V to 5.5V (LTC3204B-5), I = 48µA, B Version without
LTC3204-3.3/
LTC3204B-3.3/
LTC3204-5/
Low Noise, Regulated Charge Pumps
in (2mm × 2mm) DFN Package
IN
Q
Burst Mode Operation, 6-Lead (2mm × 2mm) DFN Package
LTC3204B-5
LTC3440
600mA (I ) 2MHz Synchronous
OUT
95% Efficiency, V : 2.5V to 5.5V, V = 2.5V, I = 25µA, I ≤ 1µA, 10-Lead MS
IN OUT(MIN) Q SD
Buck-Boost DC/DC Converter
Package
LTC3441
High Current Micropower 1MHz
Synchronous Buck-Boost DC/DC
Converter
95% Efficiency, V : 2.5V to 5.5V, V = 2.5V, I = 25µA, I ≤ 1µA, DFN Package
IN OUT(MIN) Q SD
LTC3443
High Current Micropower 600kHz
Synchronous Buck-Boost DC/DC
Converter
96% Efficiency, V : 2.4V to 5.5V, V
IN
= 2.4V, I = 28µA, I < 1µA, DFN Package
OUT(MIN) Q SD
LTC3240-3.3/
LTC3240-2.5
3.3V/2.5V Step-Up/Step-Down Charge V : 1.8V to 5.5V, V
IN
= 3.3V/2.5V, I = 65µA, I < 1µA, 2mm × 2mm DFN Package
OUT(MAX) Q SD
Pump DC/DC Converter
LTC3260
LTC3261
LTC3245
LTC3255
LTC3256
Low Noise Dual Supply Inverting
Charge Pump
V Range: 4.5V to 32V, I = 100µA, 100mA Charge Pump, 50mA Positive LDO, 50mA
IN Q
Negative LDO
High Voltage Low I Inverting Charge
Q
V
Range: 4.5V to 32V, I = 60µA, 100mA Charge Pump
Q
IN
Pump
High Voltage, Low Noise 250mA
Buck-Boost Charge Pump
V
Range: 2.7V to 38V, V Range: 2.5V to 5V, I = 18µA, I = 4µA, 3mm × 4mm DFN and
OUT Q SD
IN
12-Pin MSE Packages
Wide V Range Fault Protected 50mA
IN
V
Range: 4V to 48V, V
Range: 2.4V to 15V, I = 20µA, 10-Pin 3mm × 3mm DFN and
Q
IN
OUT
Step-Down Charge Pump
MSE Packages
Wide V Range Dual Output 350mA
IN
V
Range: 5.5V to 38V, V
Range: 5V/3.3V, I = 18µA, 16-Pin MSE Package
Q
IN
OUT
Step-Down Charge Pump with WDT
3246fa
LT 1217 REV A • PRINTED IN USA
www.linear.com/LTC3246
ꢌꢍANALOG DEVICES, INC. 2016
20
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