LTC3406ABES5-2#TRPBF [Linear]
LTC3406AB-2 - 2.25MHz, 600mA Synchronous Step-Down Regulator in ThinSOT; Package: SOT; Pins: 5; Temperature Range: -40°C to 85°C;型号: | LTC3406ABES5-2#TRPBF |
厂家: | Linear |
描述: | LTC3406AB-2 - 2.25MHz, 600mA Synchronous Step-Down Regulator in ThinSOT; Package: SOT; Pins: 5; Temperature Range: -40°C to 85°C 开关 光电二极管 |
文件: | 总18页 (文件大小:345K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC3406AB-2
2.25MHz, 600mA
Synchronous Step-Down
Regulator in ThinSOT
DescripTion
TheLTC®3406AB-2isahighefficiencymonolithicsynchro-
nous buck regulator using a constant frequency, current
mode architecture. Supply current with no load is 200µA
and drops to <1µA in shutdown. The 2.5V to 5.5V input
voltage range makes the LTC3406AB-2 ideally suited for
single Li-Ion battery-powered applications. 100% duty
cycle provides low dropout operation, extending battery
life in portable systems. PWM pulse skipping mode op-
eration provides very low output ripple voltage for noise
sensitive applications.
FeaTures
n
High Efficiency: Up to 96%
n
600mA Output Current
n
2.5V to 5.5V Input Voltage Range
n
2.25MHz Constant Frequency Operation
n
No Schottky Diode Required
n
Low Dropout Operation: 100% Duty Cycle
n
±±2% OutOu%ꢀoluage%AccOracy
n
Low Quiescent Current: 200µA
n
0.6V Reference Allows Low Output Voltages
n
Shutdown Mode Draws <1µA Supply Current
n
Internal Soft-Start Limits Inrush Current
Switching frequency is internally set at 2.25MHz, allowing
the use of small surface mount inductors and capacitors.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Low
outputvoltagesareeasilysupportedwiththe0.6Vfeedback
reference voltage. The LTC3406AB-2 is available in a low
profile (1mm) ThinSOT package. Refer to LTC3406A for
applications that require Burst Mode® operation.
n
Current Mode Operation for Excellent Line and
Load Transient Response
n
Overtemperature Protected
Low Profile (1mm) ThinSOTTM Package
n
applicaTions
n
Cellular Telephones
n
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode
is a registered trademark of Linear Technology Corporation. ThinSOT is a registered trademark
of Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents including 5481178, 6580258
Personal Navigation Devices
n
Wireless and DSL Modems
n
Digital Still Cameras
n
Media Players
n
Portable Instruments
Typical applicaTion
Efficiency vs Output Current
100
V
= 1.8V
OUT
2.2µH*
V
90
80
70
60
50
40
30
20
10
0
OUT
V
IN
V
SW
1.8V
IN
†
22pF
C
600mA
IN
C
10µF
CER
**
4.7µF
CER
OUT
LTC3406AB-2
RUN
GND
V
FB
619k
*MURATA LQH32CN2R2M33
**TAIYO YUDEN JMK316BJ106
† TAIYO YUDEN JMK212BJ475
309k
3406AB2 TA01a
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
0.1
1
10
100
1000
OUTPUT CURRENT (mA)
3406AB2 TA01b
3406ab2fa
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For more information www.linear.com/LTC3406AB-2
LTC3406AB-2
absoluTe MaxiMuM raTinGs
pin conFiGuraTion
(Note 1)
TOP VIEW
Input Supply Voltage....................................–0.3V to 6V
RUN 1
GND 2
SW 3
5 V
4 V
FB
IN
RUN, V Voltages .......................................–0.3V to V
FB
IN
SW Voltage (DC)........................... –0.3V to (V + 0.3V)
IN
P-Channel Switch Source Current
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
(DC) (Note 7) .......................................................800mA
N-Channel Switch Sink Current (DC) (Note 7) .....800mA
Peak SW Sink and Source Current (Note 7).............1.3A
Operating Temperature Range (Note 2)....–40°C to 85°C
Maximum Junction Temperature (Notes 3, 6)....... 125°C
Storage Temperature Range...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
T
= 125°C, θ = 250°C/W, θ = 90°C/W
JMAX
JA JC
orDer inForMaTion
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3406ABES5-2#PBF
LTC3406ABES5-2#TRPBF LTDBB
5-Lead Plastic TSOT-23
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3406ab2fa
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LTC3406AB-2
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
0.5880
0.75
TYP
MAX
30
UNITS
nA
l
l
l
I
Feedback Current
VFB
V
FB
Regulated Feedback Voltage
Reference Voltage Line Regulation
Peak Inductor Current
(Note 4)
0.6
0.04
1
0.6120
0.4
V
V
IN
= 2.5V to 5.5V (Note 4)
%/V
A
DV
FB
I
PK
V
= 3V, V = 0.5V
1.25
IN
FB
Duty Cycle < 35%
V
V
Output Voltage Load Regulation
Input Voltage Range
0.5
%
V
LOADREG
l
l
2.5
1.8
5.5
IN
I
Input DC Bias Current
Active
Shutdown
(Note 5)
S
V
V
= 0.63V
200
0.1
300
1
µA
µA
FB
RUN
= 0V, V = 5.5V
IN
f
Oscillator Frequency
V = 0.6V
FB
2.25
0.23
0.21
0.01
0.9
2.7
0.35
0.35
1
MHz
W
OSC
R
R
R
DS(ON)
R
DS(ON)
of P-Channel FET
of N-Channel FET
I
= 100mA
PFET
SW
SW
I
= –100mA
W
NFET
I
t
SW Leakage
V
RUN
= 0V, V = 0V or 5V, V = 5V
µA
ms
V
LSW
SW
IN
Soft-Start Time
RUN Threshold
RUN Leakage Current
V from 10% to 90% Full-Scale
FB
0.6
0.3
1.2
1.5
1
SOFT-START
l
l
V
1
RUN
RUN
I
0.01
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The LTC3406AB-2 is tested in a proprietary test mode that
connects V to the output of the error amplifier.
Note 5: Dynamic supply current is higher due to the gate charge being
FB
delivered at the switching frequency.
Note 2: The LTC3406AB-2E is guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 6: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
D
Note 7: Limited by long term current density considerations.
LTC3406AB-2: T = T + (P )(250°C/W)
J
A
D
3406ab2fa
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LTC3406AB-2
Typical perForMance characTerisTics
(From Figure 1a Except for the Resistive Divider Resistor Values)
Efficiency vs Input Voltage
Efficiency vs Load Current
Efficiency vs Input Voltage
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 1.2V
OUT
I
I
I
= 10mA
= 100mA
= 600mA
I
I
I
= 10mA
= 100mA
= 600mA
L
L
L
L
L
L
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
V
= 1.8V
3
V
= 1.2V
3
OUT
OUT
2
4
5
6
2
4
5
6
0.1
1
10
100
1000
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
INPUT VOLTAGE (V)
3406AB2 G02
3406AB2 G01
3406AB2 G03
Reference Voltage vs
Temperature
Efficiency vs Load Current
Efficiency vs Input Voltage
100
90
80
70
60
50
40
30
20
10
0
0.615
0.610
0.605
0.600
100
90
80
70
60
50
40
30
20
10
0
V
= 3.6V
IN
V
= 2.5V
OUT
0.595
0.590
0.585
I
I
I
= 10mA
= 100mA
= 600mA
L
L
L
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
V
= 2.5V
3
OUT
50
TEMPERATURE (°C)
100 125
2
4
5
6
–50 –25
0
25
75
0.1
1
10
100
1000
INPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
3406AB2 G04
3406AB2 G05
3406AB2 G06
Oscillator Frequency vs
Temperature
Oscillator Frequency vs
Supply Voltage
Output Voltage vs Load Current
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.820
1.816
V
= 1.8V
V
= 3.6V
OUT
IN
1.812
1.808
1.804
1.800
1.796
1.792
1.788
1.784
1.780
V
IN
V
IN
V
IN
= 2.7V
= 3.6V
= 4.2V
4.5
INPUT VOLTAGE (V)
5
2
2.5
3
3.5
4
5.5
6
0
400
200
OUTPUT CURRENT (mA)
600
–50
0
25
50
75 100 125
–25
TEMPERATURE (°C)
3406AB2 G08
3406AB2 G09
3406AB2 G07
3406ab2fa
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LTC3406AB-2
Typical perForMance characTerisTics
(From Figure 1a Except for the Resistive Divider Resistor Values)
RDS(ON) vs Input Voltage
RDS(ON) vs Temperature
0.40
0.35
0.30
0.25
0.40
0.35
0.30
V
= 3.6V
IN
V
IN
= 2.7V
0.25
0.20
0.15
0.10
0.05
MAIN SWITCH
V
= 4.2V
IN
SYNCHRONOUS
SWITCH
0.20
0.15
0.10
SYNCHRONOUS SWITCH
MAIN SWITCH
0
4
6
7
–25
0
50
75 100 125
0
1
2
3
5
–50
25
INPUT VOLTAGE (V)
TEMPERATURE (°C)
3406AB2 G10
3406AB2 G11
Dynamic Supply Current
vs Temperature
Dynamic Supply Current
300
250
200
150
100
50
300
250
200
150
V
LOAD
= 1.2V
= 0A
OUT
V
V
LOAD
= 3.6V
IN
OUT
I
= 1.2V
= 0A
I
PULSE SKIPPING MODE
PULSE SKIPPING MODE
100
50
0
0
4.5
INPUT VOLTAGE (V)
5
2
2.5
3
3.5
4
5.5
6
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
3406AB2 G12
3406AB2 G13
Switch Leakage vs Temperature
Switch Leakage vs Input Voltage
140
120
1000
900
800
700
600
500
400
300
200
100
0
RUN = 0V
100
80
60
40
20
MAIN SWITCH
MAIN SWITCH
SYNCHRONOUS
SWITCH
SYNCHRONOUS
SWITCH
0
50
TEMPERATURE (°C)
100 125
0
1
3
4
5
6
–50 –25
0
25
75
2
INPUT VOLTAGE (V)
3406AB2 G15
3406AB2 G14
3406ab2fa
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LTC3406AB-2
Typical perForMance characTerisTics
(From Figure 1a Except for the Resistive Divider Resistor Values)
Start-Up from Shutdown
Load Step
RUN
2V/DIV
V
OUT
200mV/DIV
V
OUT
I
L
2V/DIV
500mA/DIV
I
L
I
LOAD
500mA/DIV
500mA/DIV
3406AB2 G17
3406AB2 G16
V
V
I
= 3.6V
V
V
I
= 3.6V
20µs/DIV
400µs/DIV
IN
OUT
IN
OUT
= 1.8V
= 1.8V
= 0mA TO 600mA
= 600mA (3Ω RES)
LOAD
LOAD
Load Step
Load Step
V
V
OUT
100mV/DIV
OUT
100mV/DIV
I
I
L
L
500mA/DIV
500mA/DIV
I
I
LOAD
500mA/DIV
LOAD
500mA/DIV
3406AB2 G18
3406AB2 G19
V
V
LOAD
= 3.6V
V
V
= 3.6V
IN
20µs/DIV
20µs/DIV
IN
= 1.8V
= 1.8V
OUT
OUT
I
= 50mA TO 600mA
I
LOAD
= 100mA TO 600mA
Load Step
Discontinuous Operation
SW
2V/DIV
V
OUT
100mV/DIV
V
OUT
I
L
20mV/DIV
500mA/DIV
AC COUPLED
I
LOAD
I
500mA/DIV
L
200mA/DIV
3406AB2 G20
3406AB2 G21
V
V
LOAD
= 3.6V
V
V
LOAD
= 3.6V
IN
20µs/DIV
400ns/DIV
IN
= 1.8V
= 1.8V
OUT
OUT
I
= 200mA TO 600mA
I
= 25mA
3406ab2fa
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LTC3406AB-2
pin FuncTions
RUN (Pin 1): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
V (Pin 4): Main Supply Pin. Must be closely decoupled
IN
to GND, Pin 2, with a 2.2µF or greater ceramic capacitor.
V (Pin 5): Feedback Pin. Receives the feedback voltage
FB
from an external resistive divider across the output.
GND (Pin 2): Ground Pin.
SW (Pin 3): Switch Node Connection to Inductor. This pin
connectstothedrainsoftheinternalmainandsynchronous
power MOSFET switches.
FuncTional DiaGraM
SLOPE
COMP
OSC
OSC
V
IN
4
FREQ
SHIFT
–
+
V
FB
5
+
–
5Ω
0.6V
+
–
I
COMP
EA
Q
Q
S
R
SWITCHING
LOGIC
RS LATCH
V
ANTI-
SHOOT-
THRU
AND
IN
BLANKING
CIRCUIT
SW
3
RUN
1
0.6V REF
+
–
SHUTDOWN
I
RCMP
2
GND
3406AB2 BD
3406ab2fa
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LTC3406AB-2
operaTion (Refer to Functional Diagram)
Main Control Loop
pulses in pulse skipping mode operation to maintain out-
put regulation. Refer to the LTC3406A data sheet if Burst
Mode operation is preferred.
The LTC3406AB-2 uses a constant frequency, current
mode step-down architecture. Both the main (P-channel
MOSFET)andsynchronous(N-channelMOSFET)switches
areinternal.Duringnormaloperation,theinternaltoppower
MOSFET is turned on each cycle when the oscillator sets
the RS latch, and turned off when the current comparator,
Dropout Operation
Astheinputsupplyvoltagedecreasestoavalueapproach-
ing the output voltage, the duty cycle increases toward the
maximumon-time.Furtherreductionofthesupplyvoltage
forces the main switch to remain on for more than one
cycle until it reaches 100% duty cycle. The output voltage
willthenbedeterminedbytheinputvoltageminusthevolt-
age drop across the P-channel MOSFET and the inductor.
I
, resets the RS latch. The peak inductor current at
COMP
of error amplifier EA. When the load current increases,
it causes a slight decrease in the feedback voltage, V ,
COMP
whichI
resetstheRSlatch,iscontrolledbytheoutput
FB
relative to the 0.6V reference, which in turn, causes the
EA amplifier’s output voltage to increase until the average
inductor current matches the new load current. While the
top MOSFET is off, the bottom MOSFET is turned on until
either the inductor current starts to reverse, as indicated
Animportantdetailtorememberisthatatlowinputsupply
voltages, the R
of the P-channel switch increases
DS(ON)
(see Typical Performance Characteristics). Therefore,
the user should calculate the power dissipation when the
LTC3406AB-2 is used at 100% duty cycle with low input
voltage (See Thermal Considerations in the Applications
Information section).
bythecurrentreversalcomparatorI
of the next clock cycle.
,orthebeginning
RCMP
The main control loop is shut down by grounding RUN,
resetting the internal soft-start. Re-enabling the main
control loop by pulling RUN high activates the internal
soft-start, which slowly ramps the output voltage over
approximately 0.9ms until it reaches regulation.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscil-
lations at high duty cycles. It is accomplished internally
by adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles >40%. However, the LTC3406AB-2 uses
a patented scheme that counteracts this compensating
ramp, which allows the maximum inductor peak current
to remain unaffected throughout all duty cycles.
Pulse Skipping Mode Operation
At light loads, the inductor current may reach zero or
reverse on each pulse. The bottom MOSFET is turned off
by the current reversal comparator, I
, and the switch
RCMP
voltage will ring. This is discontinuous mode operation,
and is normal behavior for the switching regulator. At
very light loads, the LTC3406AB-2 will automatically skip
3406ab2fa
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LTC3406AB-2
applicaTions inForMaTion
The basic LTC3406AB-2 application circuit is shown on
the front page. External component selection is driven by
the load requirement and begins with the selection of L
Table 1. Representative Surface Mount Inductors
PART
NUMBER
VALUE
(µH)
DCR
MAX DC
SIZE
3
(W MAX) CURRENT (A)
W × L × H (mm )
followed by C and C
.
Sumida
CDRH3D16
1.5
2.2
3.3
4.7
0.043
0.075
0.110
0.162
1.55
1.20
1.10
0.90
3.8 × 3.8 × 1.8
IN
OUT
Inductor Selection
Sumida
CMD4D06
2.2
3.3
4.7
0.116
0.174
0.216
0.950
0.770
0.750
3.5 × 4.3 × 0.8
For most applications, the value of the inductor will fall in
the range of 1µH to 4.7µH. Its value is chosen based on the
desired ripple current. Large value inductors lower ripple
current and small value inductors result in higher ripple
Panasonic
ELT5KT
3.3
4.7
0.17
0.20
1.00
0.95
4.5 × 5.4 × 1.2
2.5 × 3.2 × 2.0
currents. Higher V or V
also increases the ripple cur-
IN
OUT
Murata
LQH32CN
1.0
2.2
4.7
0.060
0.097
0.150
1.00
0.79
0.65
rent as shown in equation 1. A reasonable starting point
for setting ripple current is
D
I = 240mA (40% of 600mA).
L
C and C
Selection
VOUT
1
IN
OUT
DIL =
VOUT 1−
f L
( )( )
V
Incontinuousmode,thesourcecurrentofthetopMOSFET
is a square wave of duty cycle V /V . To prevent large
IN
(1)
OUT IN
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA
rated inductor should be enough for most applications
(600mA + 120mA). For better efficiency, choose a low
DC-resistance inductor.
voltage transients, a low ESR input capacitor sized for the
maximumRMScurrentmustbeused.ThemaximumRMS
capacitor current is given by:
1/2
VOUT V − V
(
)
IN
OUT
CIN required IRMS ≅ IOMAX
V
IN
Inductor Core Selection
This formula has a maximum at V = 2V , where
IN
OUT
I
= I /2. This simple worst-case condition is com-
RMS
OUT
Different core materials and shapes will change the
size/current and price/current relationship of an induc-
tor. Toroid or shielded pot cores in ferrite or permalloy
materials are small and don’t radiate much energy, but
generally cost more than powdered iron core inductors
with similar electrical characteristics. The choice of which
style inductor to use often depends more on the price vs
sizerequirementsandanyradiatedfield/EMIrequirements
than on what the LTC3406AB-2 requires to operate. Table
1 shows some typical surface mount inductors that work
well in LTC3406AB-2 applications.
monlyusedfordesignbecauseevensignificantdeviations
do not offer much relief. Note that the capacitor manu-
facturer’s ripple current ratings are often based on 2000
hours of life. This makes it advisable to further derate the
capacitor, or choose a capacitor rated at a higher tem-
perature than required. Always consult the manufacturer
if there is any question.
The selection of C
is driven by the required effective
OUT
series resistance (ESR).
3406ab2fa
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LTC3406AB-2
applicaTions inForMaTion
Typically,oncetheESRrequirementforC hasbeenmet,
the long wires can potentially cause a voltage spike at V ,
OUT
IN
theRMScurrentratinggenerallyfarexceedstheI
large enough to damage the part.
RIPPLE(P-P)
is determined by:
requirement. The output ripple DV
OUT
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage char-
acteristics of all the ceramics for a given value and size.
1
DVOUT ≅ DIL ESR+
8fC
OUT
where f = operating frequency, C
= output capacitance
OUT
Output Voltage Programming
and DI = ripple current in the inductor. For a fixed output
L
voltage, the output ripple is highest at maximum input
In the adjustable version, the output voltage is set by a
resistive divider according to the following formula:
voltage since DI increases with input voltage.
L
Aluminumelectrolyticanddrytantalumcapacitorsareboth
available in surface mount configurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
R2
R1
VOUT = 0.6V 1+
(2)
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 1.
0.6V ≤ V
≤ 5.5V
OUT
R2
Using Ceramic Input and Output Capacitors
V
FB
LTC3406AB-2
GND
R1
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high
ripple current, high voltage rating and low ESR make
them ideal for switching regulator applications. Because
the LTC3406AB-2’s control loop does not depend on
the output capacitor’s ESR for stable operation, ceramic
capacitors can be used freely to achieve very low output
ripple and small circuit size.
3406AB2 F01
Figure 1. Setting the LTC3406AB-2 Output Voltage
Efficiency Considerations
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
However, care must be taken when ceramic capacitors
are used at the input and the output. When a ceramic
capacitor is used at the input and the power is supplied
by a wall adapter through long wires, a load step at the
Efficiency = 100% – (L1 + L2 + L3 + ...)
output can induce ringing at the input, V . At best, this
IN
where L1, L2, etc. are the individual losses as a percent-
age of input power.
ringing can couple to the output and be mistaken as loop
instability. At worst, a sudden inrush of current through
3406ab2fa
10
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LTC3406AB-2
applicaTions inForMaTion
2
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
2. I R losses are calculated from the resistances of the
internal switches, R , and external inductor R . In
SW
L
lossesinLTC3406AB-2circuits:V quiescentcurrentand
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
(DC) as follows:
IN
2
I R losses. The V quiescent current loss dominates the
efficiency loss at very low load currents whereas the I R
IN
2
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 2.
and the duty cycle
DS(ON)
R
SW
= (R )(DC) + (R )(1 – DC)
DS(ON)TOP DS(ON)BOT
The R
for both the top and bottom MOSFETs can
DS(ON)
1
V
= 3.6V
IN
be obtained from the Typical Performance Character-
2
istics curves. Thus, to obtain I R losses, simply add
0.1
R
to R and multiply the result by the square of the
SW
L
average output current.
0.01
OtherlossesincludingC andC ESRdissipativelosses
IN
OUT
and inductor core losses generally account for less than
2% total additional loss.
0.001
V
V
V
= 1.2V
= 1.8V
= 2.5V
OUT
OUT
OUT
Thermal Considerations
0.0001
0.1
1
10
100
1000
InmostapplicationstheLTC3406AB-2doesnotdissipate
much heat due to its high efficiency. But, in applications
where the LTC3406AB-2 is running at high ambient tem-
perature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximumjunctiontemperatureofthepart.Ifthejunction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance.
OUTPUT CURRENT (mA)
3406AB2 F02
Figure 2. Power Loss vs Load Current
1. The V quiescent current is due to two components:
IN
the DC bias current as given in the electrical charac-
teristics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate
is switched from high to low to high again, a packet of
To avoid the LTC3406AB-2 from exceeding the maximum
junctiontemperature,theuserwillneedtodosomethermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
charge, dQ, moves from V to ground. The resulting
IN
dQ/dt is the current out of V that is typically larger
IN
than the DC bias current. In continuous mode, I
GATECHG
= f(Q + Q ) where Q and Q are the gate charges of
T
B
T
B
the internal top and bottom switches. Both the DC bias
T = (P )(θ )
R
D
JA
and gate charge losses are proportional to V and thus
IN
where P is the power dissipated by the regulator and θ
their effects will be more pronounced at higher supply
D
JA
is the thermal resistance from the junction of the die to
voltages.
the ambient temperature.
3406ab2fa
11
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LTC3406AB-2
applicaTions inForMaTion
The junction temperature, T , is given by:
A second, more severe transient is caused by switching
in loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in paral-
J
T = T + T
R
J
A
where T is the ambient temperature.
A
lel with C , causing a rapid drop in V . No regulator
OUT
OUT
can deliver enough current to prevent this problem if the
load switch resistance is low and it is driven quickly. The
only solution is to limit the rise time of the switch drive
so that the load rise time is limited to approximately
As an example, consider the LTC3406AB-2 in dropout
at an input voltage of 2.7V, a load current of 600mA and
an ambient temperature of 70°C. From the typical per-
formance graph of switch resistance, the R
of the
DS(ON)
(25 • C
). Thus, a 10µF capacitor charging to 3.3V
P-channel switch at 70°C is approximately 0.27W. There-
fore, power dissipated by the part is:
LOAD
would require a 250µs rise time, limiting the charging
current to about 130mA.
2
P = I
D
• R
= 97.2mW
LOAD
DS(ON)
PC Board Layout Checklist
For the SOT-23 package, the θ is 250°C/W. Thus, the
JA
junction temperature of the regulator is:
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3406AB-2. Theseitemsarealsoillustratedgraphically
in Figures 3 and 4. Check the following in your layout:
T = 70°C + (0.0972)(250) = 94.3°C
J
which is below the maximum junction temperature of
125°C.
1. The power traces, consisting of the GND trace, the SW
Note that at higher supply voltages, the junction tempera-
trace, the V
trace, and the V trace should be kept
OUT
IN
ture is lower due to reduced switch resistance (R
).
DS(ON)
short, direct and wide.
Checking Transient Response
2. Does the V pin connect directly to the feedback
FB
resistors? The resistive divider R1/R2 must be
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
connected between the (+) plate of C
and ground.
OUT
3. Does C connect to V as closely as possible? This
IN
IN
a load step occurs, V
immediately shifts by an amount
capacitor provides the AC current to the internal power
OUT
equal to (DI
• ESR), where ESR is the effective series
MOSFETs.
LOAD
resistance of C . DI
also begins to charge or dis-
OUT
LOAD
4. Keep the switching node, SW, away from the sensitive
chargeC , whichgeneratesafeedbackerrorsignal. The
OUT
V
FB
node.
regulator loop then acts to return V
value. During this recovery time V
to its steady-state
can be monitored
OUT
OUT
5. Keep the (–) plates of C , C
and the IC ground as
IN OUT
close as possible.
for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
3406ab2fa
12
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LTC3406AB-2
applicaTions inForMaTion
1
2
3
5
4
RUN
V
FB
LTC3406AB-2
GND
R2
R1
–
C
V
OUT
L1
OUT
C
FWD
SW
V
IN
+
C
IN
+
V
IN
–
3406AB2 F03
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 3. LTC3406AB-2 Layout Diagram
V
IN
VIA TO V
R1
IN
VIA TO V
OUT
R2
PIN 1
C
FWD
LTC3406AB-2
V
OUT
SW
L1
C
C
IN
OUT
GND
3406AB2 F04
Figure 4. LTC3406AB-2 Suggested Layout
Design Example
Substituting V
= 2.5V, V = 4.2V, ∆I = 240mA and
OUT
IN
L
f = 2.25MHz in Equation (3) gives:
As a design example, assume the LTC3406AB-2 is used
in a single lithium-ion battery-powered cellular phone
application. The V will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.6A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both
low and high load currents is important. Output voltage
is 2.5V. With this information we can calculate L using
Equation (1),
2.5V
2.25MHz(240mA)
2.5V
4.2V
L =
1−
= 1.87µH
IN
A 2.2µH inductor works well for this application. For best
efficiency choose a 720mA or greater inductor with less
than 0.2W series resistance.
C will require an RMS current rating of at least 0.3A ≅
IN
I
/2 at temperature and C
will require an ESR
LOAD(MAX)
OUT
1
f DI
(
VOUT
of less than 0.25W. In most cases, a ceramic capacitor
will satisfy this requirement.
L =
VOUT 1−
V
( )
)
L
IN
(3)
3406ab2fa
13
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LTC3406AB-2
applicaTions inForMaTion
For the feedback resistors, choose R1 = 309k. R2 can
then be calculated from Equation (2) to be:
Figure 5 shows the complete circuit along with its ef-
ficiency curve.
100
V
0.6
V
= 2.5V
OUT
OUT
90
80
70
60
50
40
30
20
10
0
R2=
− 1 R1= 978k
Use a 976k 1% resistor.
2.2µH*
22pF
V
OUT
2.5V
V
IN
V
SW
IN
†
C
600mA
IN
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
C
10µF
CER
**
4.7µF
CER
OUT
LTC3406AB-2
RUN
GND
V
FB
0.1
1
10
100
1000
976k
309k
*MURATA LQH32CN2R2M33
**TAIYO YUDEN JMK316BJ106ML
† TAIYO YUDEN JMK212BJ475MG
OUTPUT CURRENT (mA)
3406AB2 F05b
3406AB2 F05a
Figure 5a
Figure 5b. Efficiency vs Load Current
Load Step
Load Step
V
V
OUT
200mV/DIV
OUT
100mV/DIV
I
I
L
L
500mA/DIV
500mA/DIV
I
I
LOAD
500mA/DIV
LOAD
500mA/DIV
3406AB2 TA02
3406AB2 TA03
V
= 3.6V
V
V
= 3.6V
IN
20µs/DIV
20µs/DIV
IN
V
= 2.5V
= 2.5V
OUT
OUT
I
= 0mA TO 600mA
I
LOAD
= 50mA TO 600mA
LOAD
Load Step
Load Step
V
V
OUT
100mV/DIV
OUT
100mV/DIV
I
I
L
L
500mA/DIV
500mA/DIV
I
I
LOAD
500mA/DIV
LOAD
500mA/DIV
3406AB2 TA04
3406AB2 TA05
V
= 3.6V
V
V
= 3.6V
IN
20µs/DIV
20µs/DIV
IN
V
= 2.5V
= 2.5V
OUT
OUT
I
= 100mA TO 600mA
I
LOAD
= 200mA TO 600mA
LOAD
3406ab2fa
14
For more information www.linear.com/LTC3406AB-2
LTC3406AB-2
Typical applicaTions
Efficiency vs Load Current
Single Li-Ion 1.2V/600mA Regulator for
High Efficiency and Small Footprint
100
90
80
70
60
50
40
30
20
10
0
V
= 1.2V
OUT
2.2µH*
V
OUT
V
IN
V
SW
1.2V
IN
†
22pF
C
600mA
IN
C
10µF
CER
**
4.7µF
CER
OUT
LTC3406AB-2
RUN
GND
V
FB
309k
*MURATA LQH32CN2R2M33
**TAIYO YUDEN JMK316BJ106ML
† TAIYO YUDEN JMK212BJ475MG
309k
3406AB2 TA06
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
0.1
1
10
100
1000
OUTPUT CURRENT (mA)
3406AB2 TA07
Load Step
Load Step
V
V
OUT
200mV/DIV
OUT
100mV/DIV
I
I
L
L
500mA/DIV
500mA/DIV
I
I
LOAD
500mA/DIV
LOAD
500mA/DIV
3406AB2 TA08
3406AB2 TA09
V
V
LOAD
= 3.6V
V
V
= 3.6V
IN
20µs/DIV
20µs/DIV
IN
= 1.2V
= 1.2V
OUT
OUT
I
= 0mA TO 600mA
I
LOAD
= 50mA TO 600mA
Load Step
Load Step
V
V
OUT
100mV/DIV
OUT
100mV/DIV
I
I
L
L
500mA/DIV
500mA/DIV
I
I
LOAD
500mA/DIV
LOAD
500mA/DIV
3406AB2 TA10
3406AB2 TA11
V
V
LOAD
= 3.6V
V
V
= 3.6V
IN
20µs/DIV
20µs/DIV
IN
= 1.2V
= 1.2V
OUT
OUT
I
= 100mA TO 600mA
I
LOAD
= 200mA TO 600mA
3406ab2fa
15
For more information www.linear.com/LTC3406AB-2
LTC3406AB-2
packaGe DescripTion
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.62
MAX
0.95
REF
2.90 BSC
(NOTE 4)
1.22 REF
1.50 – 1.75
(NOTE 4)
2.80 BSC
1.4 MIN
3.85 MAX 2.62 REF
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.90 BSC
0.09 – 0.20
(NOTE 3)
NOTE:
S5 TSOT-23 0302
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3406ab2fa
16
For more information www.linear.com/LTC3406AB-2
LTC3406AB-2
revision hisTory
REV DATE
DESCRIPTION
PAGE NUMBER
A
09/15 Revised package drawing.
16
3406ab2fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTC3406AB-2
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
LTC3406A/LTC3406AB 600mA (I ), 1.5MHz, Synchronous Step-Down
96% Efficiency, V : 2.5V to 5.5V, V
= 0.6V, I = 16µA,
OUT
IN
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
Q
DC/DC Converters
I
<1µA, ThinSOT Package
SD
LTC3407/LTC3407-2
LTC3410/LTC3410B
LTC3411
Dual 600mA/800mA (I ), 1.5MHz/2.25MHz,
95% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.6V, I = 40µA,
OUT
IN
Q
Synchronous Step-Down DC/DC Converters
I
<1µA, MS10E, DFN Packages
300mA (I ), 2.25MHz, Synchronous Step-Down
95% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.8V, I = 26µA,
OUT
IN
Q
DC/DC Converters
I
<1µA, SC70 Package
1.25A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V : 2.5V to 5.5V, V
<1µA, MS10, DFN Packages
SD
= 0.8V, I = 60mA,
OUT
IN
Q
DC/DC Converter
I
LTC3412
2.5A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.8V, I = 60µA,
OUT
IN
Q
DC/DC Converter
I
<1µA, TSSOP-16E Package
LTC3440
600mA (I ), 2MHz, Synchronous Buck-Boost
95% Efficiency, V : 2.5V to 5.5V, V
SD
: 2.5V to 5.5V, I = 25µA,
OUT
IN
Q
DC/DC Converter
I
<1µA, MS10, DFN Packages
LTC3530
600mA (I ), 2MHz, Synchronous Buck-Boost
95% Efficiency, V : 1.8V to 5.5V, V
SD
: 1.8V to 5.25V, I = 40µA,
OUT
IN
Q
DC/DC Converter
I
<1µA, MS10, DFN Packages
LTC3531/LTC3531-3/
LTC3531-3.3
200mA (I ), 1.5MHz, Synchronous Buck-Boost
95% Efficiency, V : 1.8V to 5.5V, V
SD
: 2V to 5V, I = 16µA,
OUT
IN
Q
DC/DC Converters
I
<1µA, ThinSOT, DFN Packages
LTC3532
500mA (I ), 2MHz, Synchronous Buck-Boost
95% Efficiency, V : 2.4V to 5.5V, V
SD
: 2.4V to 5.25V, I = 35µA,
OUT
IN
Q
DC/DC Converter
I
<1µA, MS10, DFN Packages
LTC3542
500mA (I ), 2.25MHz, Synchronous Step-Down
95% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.6V, I = 26µA,
OUT
IN
Q
DC/DC Converter
I
<1µA, 2mm × 2mm DFN Package
LTC3544/LTC3544B
LTC3547/LTC3547B
Quad 300mA + 2 x 200mA + 100mA 2.25MHz,
Synchronous Step-Down DC/DC Converters
95% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.8V, I = 70µA,
Q
IN
I
<1µA, 3mm × 3mm QFN Package
Dual 300mA 2.25MHz, Synchronous Step-Down
DC/DC Converters
96% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.6V, I = 40µA,
IN
Q
I
<1µA, 2mm × 3mm DFN Package
LTC3548/LTC3548-1/
LTC3548-2
Dual 400mA and 800mA (I ), 2.25MHz,
95% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.6V, I = 40µA,
OUT
IN
Q
Synchronous Step-Down DC/DC Converters
I
<1µA, MS10E, DFN Packages
LTC3560
800mA (I ), 2.25MHz, Synchronous Step-Down
95% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.6V, I = 16µA,
OUT
IN
Q
DC/DC Converter
I
<1µA, ThinSOT Package
LTC3561
1.25A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V : 2.5V to 5.5V, V
= 0.8V, I = 240µA,
OUT
IN
Q
DC/DC Converter
I
<1µA, DFN Package
SD
3406ab2fa
LT 0915 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
18
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3406AB-2
●
●
LINEAR TECHNOLOGY CORPORATION 2007
相关型号:
LTC3406AES5#TRMPBF
LTC3406A - 1.5MHz, 600mA Synchronous Step-Down Regulator in ThinSOT; Package: SOT; Pins: 5; Temperature Range: -40°C to 85°C
Linear
LTC3406AIS5#PBF
LTC3406A - 1.5MHz, 600mA Synchronous Step-Down Regulator in ThinSOT; Package: SOT; Pins: 5; Temperature Range: -40°C to 85°C
Linear
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