LTC3566EUF-PBF_技术文档

LTC3566

High Efﬁciency USB

Power Manager Plus 1A

Buck-Boost Converter

FEATURES

DESCRIPTION

POWER MANAGER

The LTC^®3566 is a highly integrated power management

and battery charger IC for Li-Ion/Polymer battery applica-

tions.Itincludesahighefﬁciencycurrentlimitedswitching

PowerPath manager with automatic load prioritization,

a battery charger, an ideal diode, and a high efﬁciency

synchronous buck-boost switching regulator. Designed

speciﬁcally for USB applications, the LTC3566’s switch-

ing power manager automatically limits input current to a

maximumofeither100mAor500mAforUSBapplications

or 1A for adapter-powered applications.

High Efﬁciency Switching PowerPath^TMController

■

with Bat-Track^TMAdaptive Output Control

■

Programmable USB or Wall Input Current Limit

(100mA/500mA/1A)

■

Full Featured Li-Ion/Polymer Battery Charger

■

“Instant-On” Operation with Discharged Battery

■

1.5A Maximum Charge Current

■

Internal 180mΩ Ideal Diode Plus External Ideal Diode

Controller Powers Load in Battery Mode

■

Low No-Load I when Powered from BAT (<30μA)

Q

The LTC3566’s switching input stage transmits nearly all of

the 2.5W available from the USB port to the system load

with minimal power wasted as heat. This feature allows the

LTC3566toprovidemorepowertotheapplicationandeases

the constraint of thermal budgeting in small spaces.

1A BUCK-BOOST DC/DC

■

High Efﬁciency (1A I

)

OUT

■

2.25MHz Constant Frequency Operation

Low No-Load Quiescent Current (~13μA)

Zero Shutdown Current

The synchronous buck-boost DC/DC can provide up to 1A.

Pin Control of All Functions

The LTC3566 is available in a low profile 24-lead

4mm × 4mm QFN surface mount package.

APPLICATIONS

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

PowerPath and Bat-Track are trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Protected by U.S. Patents including 6522118, 6404251.

■

HDD Based MP3 Players, PDA, GPS, PMP Products

Other USB Based Handheld Products

■

TYPICAL APPLICATION

LTC3566 USB Power Manager with 3.3V/1A Buck-Boost

Switching Regulator Efﬁciency to

System Load (P_OUT/P_BUS

)

FROM AC

ADAPTER

3.3μH

100

90

80

70

60

50

40

30

20

10

V

=

OUT

V

SW

V

OUT

FROM USB

BAT + 300mV

TO OTHER

DC/DCs

BUS

10μF

4.7μF

CLPROG

PROG

GATE

BAT

3.01k

100k

OPTIONAL

BAT = 4.2V

0.1μF

2k

+

Li-Ion

1μF

3.3V/25mA

ALWAYS

ON LDO

BAT = 3.3V

NTC

LDO3V3

V

IN1

CHRG

CHRGEN

ILIM0

ILIM1

MODE

EN1

100k

LTC3566

T

SWAB1

2.2μH

1.3nF

1μF

SWCD1

3.3V/1A

HDD

V

I

= 5V

V

OUT1

BUS

BAT

DIGITAL CONTROL

= 0mA

324k

10x MODE

10μF

FB1

VC1

0

105k

0.01

0.1

(A)

1

GND

EXPOSED PAD

I

3566 TA01

OUT

3566 TA01b

3566fa

1

LTC3566

PIN CONFIGURATION

ABSOLUTE MAXIMUM RATINGS

(Note 1)

TOP VIEW

V

(Transient) t < 1ms,

BUS

Duty Cycle < 1% ...................................... –0.3V to 7V

(Static), V , BAT, NTC, CHRG, MODE, I

24 23 22 21 20 19

,

LIM0

BUS

I

IN1

LDO3V3

CLPROG

NTC

1

2

3

4

5

6

18 GATE

, EN1, CHRGEN ................................ –0.3V to 6V

LIM1

17

16

GND

CHRG

FB1, V ..............–0.3V to Lesser of 6V or (V + 0.3V)

C1

IN1

25

FB1

15 PROG

I

....................................................................3mA

CLPROG

CHRG

PROG

LDO3V3

SW BAT VOUT

VOUT1 SWAB1 SWCD1

V

C1

14

13

I

LIM1

LIM0

......................................................................50mA

GND

7

8

9 10 11 12

........................................................................2mA

...................................................................30mA

, I , I

............................................................2A

UF PACKAGE

24-LEAD (4mm × 4mm) PLASTIC QFN

, I

.............................................2.5A

Operating Temperature Range (Note 2).... –40°C to 85°C

Junction Temperature (Note 3) ............................. 125°C

Storage Temperature Range................... –65°C to 125°C

T

= 125°C, θ = 37°C/W

JMAX JA

EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION

LEAD FREE FINISH

TAPE AND REEL

PART MARKING

PACKAGE DESCRIPTION

24-Lead (4mm × 4mm) Plastic QFN

TEMPERATURE RANGE

–40°C to 85°C

LTC3566EUF#PBF

LTC3566EUF#TRPBF

3566

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_BUS= 5V, V_BAT= 3.8V, DV_CC= 3.3V, R_CLPROG= 3.01k, R_PROG= 1k,

V

_IN1= V_OUT1= 3.8V unless otherwise noted.

SYMBOL PARAMETER

Power Path Switching Regulator

CONDITIONS

MIN

TYP

MAX

UNITS

V

Input Supply Voltage

Total Input Current

4.35

5.5

V

BUS

●

I

1x Mode, V

5x Mode, V

= BAT

OUT

87

95

100

500

1000

0.50

mA

BUSLIM

OUT

436

800

0.31

460

860

0.38

10x Mode, V

= BAT

Suspend Mode, V

= BAT

OUT

I

V

Quiescent Current

1x Mode, I

5x Mode, I

= 0mA

7

15

mA

BUSQ

BUS

OUT

10x Mode, I

= 0mA

15

OUT

Suspend Mode, I

= 0mA

0.044

OUT

h

Ratio of Measured V

Current to

1x Mode

224

1133

2140

11.3

mA/mA

CLPROG

BUS

(Note 4)

CLPROG Program Current

5x Mode

10x Mode

Suspend Mode

3566fa

2

LTC3566

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_BUS= 5V, V_BAT= 3.8V, DV_CC= 3.3V, R_CLPROG= 3.01k, R_PROG= 1k,

V_IN1= V_OUT1= 3.8V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

I

V

Current Available Before

OUT

1x Mode, BAT = 3.3V

5x Mode, BAT = 3.3V

10x Mode, BAT = 3.3V

Suspend Mode

135

672

1251

0.32

mA

OUT

(PowerPath)

Loading BAT

V

CLPROG Servo Voltage in Current

Limit

1x, 5x, 10x Modes

Suspend Mode

1.188

100

V

CLPROG

mV

V

Undervoltage Lockout

Rising Threshold

Falling Threshold

4.30

4.00

4.35

4.7

V

UVLO_VBUS

BUS

3.95

3.4

V

to BAT Differential

Rising Threshold

Falling Threshold

200

50

mV

BUS

Undervoltage Lockout

Voltage

-VBAT

V

OUT

V

1x, 5x, 10x Modes, 0V < BAT < 4.2V,

BAT + 0.3

V

OUT

I

= 0mA, Battery Charger Off

OUT

USB Suspend Mode, I

= 250μA

4.5

1.8

4.6

4.7

2.7

V

MHz

Ω

OUT

●

f

Switching Frequency

PMOS On-Resistance

NMOS On-Resistance

Peak Switch Current Limit

2.25

0.18

0.30

OSC

R

PMOS_PowerPath

NMOS_PowerPath

PEAK_PowerPath

Ω

I

1x, 5x Modes

10x Mode

2

3

A

Battery Charger

V

FLOAT

BAT Regulated Output Voltage

4.179

4.165

4.200

4.221

4.235

V

●

I

Constant Current Mode Charge

Current

980

185

1022

204

1065

223

mA

CHG

R

= 5k

PROG

Battery Drain Current

V

> V , Battery Charger Off,

UVLO

= 0μA

= 0V, I

2

3.5

5

μA

BAT

BUS

OUT

BUS

I

V

= 0μA (Ideal Diode

OUT

27

38

μA

Mode)

V

PROG Pin Servo Voltage

1.000

0.100

V

PROG

PROG Pin Servo Voltage in Trickle

Charge

V < V

BAT TRIKL

PROG_TRIKL

V

C/10 Threshold Voltage at PROG

100

1022

100

2.85

135

–100

4

mV

mA/mA

mA

C/10

PROG

TRKL

h

Ratio of I to PROG Pin Current

BAT

I

Trickle Charge Current

BAT < V

TRKL

V

TRIKL

Trickle Charge Threshold Voltage

Trickle Charge Hysteresis Voltage

BAT Rising

2.7

3.0

V

mV

ΔV

TRKL

RECHRG

TERM

V

Recharge Battery Threshold Voltage Threshold Voltage Relative to V

–75

3.3

–125

5

mV

FLOAT

t

Safety Timer Termination

Timer Starts When BAT = V

BAT < V

Hour

mA/mA

FLOAT

Bad Battery Termination Time

0.42

0.088

0.5

0.63

0.112

BADBAT

TRKL

h

C/10

End of Charge Indication Current

Ratio

(Note 5)

0.1

V

I

= 5mA

= 5V

65

100

1

mV

μA

CHRG

CHRG Pin Output Low Voltage

CHRG Pin Leakage Current

I

V

CHRG

3566fa

3

LTC3566

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_BUS= 5V, V_BAT= 3.8V, DV_CC= 3.3V, R_CLPROG= 3.01k, R_PROG= 1k,

V_IN1= V_OUT1= 3.8V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

R

Battery Charger Power FET On

0.18

Ω

ON_CHG

Resistance (Between V

and BAT)

OUT

T

LIM

Junction Temperature in Constant

Temperature Mode

110

°C

NTC

V

Cold Temperature Fault Threshold

Voltage

Rising Threshold

Hysteresis

75.0

33.4

0.7

76.5

1.5

78.0

36.4

2.7

%V

COLD

HOT

DIS

BUS

Hot Temperature Fault Threshold

Voltage

Falling Threshold

Hysteresis

34.9

1.5

%V

BUS

NTC Disable Threshold Voltage

Falling Threshold

Hysteresis

1.7

50

%V

BUS

mV

I

NTC Leakage Current

V

NTC

= V = 5V

BUS

–50

50

nA

NTC

Ideal Diode

V

Forward Voltage

V

= 0V, I = 10mA

OUT

= 10mA

2

15

mV

FWD

BUS

OUT

I

R

Internal Diode On-Resistance,

Dropout

V

BUS

= 0V

0.18

Ω

DROPOUT

I

Internal Diode Current Limit

1.6

3.1

A

MAX_DIODE

Always On 3.3V Supply

V

Regulated Output Voltage

Closed-Loop Output Resistance

Dropout Output Resistance

, EN1, CHRGEN, MODE)

Logic Low Input Voltage

Logic High Input Voltage

0mA < I

< 25mA

3.3

4

3.5

V

Ω

LDO3V3

R

CL_LDO3V3

OL_LDO3V

23

Logic (I

, I

LIM0 LIM1

V

0.4

10

V

IL

IH

V

1.2

I

, I , EN1, MODE

LIM0 LIM1

1.6

μA

PD1

Pull-Down Currents

CHRGEN Pull-Down Current

μA

PD1_CHRGEN

Buck-Boost Regulator

V

Input Supply Voltage

2.7

2.5

5.5

2.9

2.7

V

IN1

V

OUT

V

OUT

UVLO -V

Falling

Rising

V

Connected to V Through

OUT

2.6

2.8

V

OUTUVLO

OUT

IN1

UVLO - V

Low Impedance. Switching Regulator

Disabled in UVLO

●

f

I

Oscillator Frequency

Input Current

PWM Mode

1.8

2.25

MHz

OSC

PWM Mode, I

= 0μA

220

13

0

400

20

1

μA

VIN1

OUT1

Burst Mode^®Operation, I

Shutdown

= 0μA

OUT1

Burst Mode is a registered trademark of Linear Technology Corporation.

3566fa

4

LTC3566

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_BUS= 5V, V_BAT= 3.8V, DV_CC= 3.3V, R_CLPROG= 3.01k, R_PROG= 1k,

V_IN1= V_OUT1= 3.8V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Minimum Regulated Output Voltage For Burst Mode Operation or

Synchronous PWM Operation

2.65

2.75

V

OUT1(LOW)

V

Maximum Regulated Output Voltage

5.50

2

5.60

2.5

V

A

OUT1(HIGH)

LIMF1

●

I

Forward Current Limit (Switch A)

PWM Mode

3

Forward Burst Current Limit (Switch Burst Mode Operation

A)

200

275

350

mA

PEAK1(BURST)

●

I

Reverse Burst Current Limit (Switch Burst Mode Operation

D)

–30

50

0

30

mA

ZERO1(BURST)

MAX1(BURST)

Maximum Deliverable Output Current 2.7V ≤ V ≤ 5.5V, 2.75V ≤ V

≤ 5.5V

IN1

OUT

in Burst Mode Operation

Feedback Servo Voltage

FB1 Input Current

(Note 6)

●

V

0.780

–50

0.800

0.820

50

V

nA

Ω

FB1

I

V

FB1

= 0.8V

FB1

R

PMOS R

NMOS R

Switches A, D

Switches B, C

Switches A, D

Switches B, C

0.22

0.17

DS(ON)P

DS(ON)N

LEAK(P)

LEAK(N)

DS(ON)

Ω

I

PMOS Switch Leakage

NMOS Switch Leakage

–1

1

μA

kΩ

%

R

V

Pull-Down in Shutdown

OUT1

10

VOUT1

●

D

Maximum Buck Duty Cycle

Maximum Boost Duty Cycle

Soft-Start Time

PWM Mode

100

BUCK(MAX)

75

%

BOOST(MAX)

t

0.5

ms

SS1

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

temperatures will exceed 125°C when overtemperature protection is

active. Continuous operation above the speciﬁed maximum operating

junction temperature may impair device reliability.

Note 4: Total input current is the sum of quiescent current, I

,

VBUSQ

Note 2: The LTC3566E is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

and measured current given by:

V

/R

• (h

+ 1)

CLPROG CLPROG

CLPROG

Note 5: h

is expressed as a fraction of measured full charge current

C/10

with indicated PROG resistor.

Note 3: The LTC3566 includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

Note 6: Guaranteed by design.

3566fa

5

LTC3566

T_A= 25°C unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Ideal Diode Resistance

vs Battery Voltage

Output Voltage vs Output Current

(Battery Charger Disabled)

Ideal Diode V-I Characteristics

1.0

0.8

0.6

0.4

0.2

0

0.25

0.20

0.15

0.10

0.05

0

4.50

4.25

4.00

3.75

3.50

3.25

V

= 5V

INTERNAL IDEAL DIODE

WITH SUPPLEMENTAL

EXTERNAL VISHAY

Si2333 PMOS

BUS

BAT = 4V

5x MODE

INTERNAL IDEAL

DIODE

INTERNAL IDEAL

DIODE ONLY

BAT = 3.4V

INTERNAL IDEAL DIODE

WITH SUPPLEMENTAL

EXTERNAL VISHAY

Si2333 PMOS

V

= 0V

= 5V

BUS

0

0.04

0.08

0.12

0.16

0.20

2.7

3.0

3.3

3.6

3.9

4.2

0

200

400

600

800

1000

FORWARD VOLTAGE (V)

BATTERY VOLTAGE (V)

OUTPUT CURRENT (mA)

3566 G01

3566 G02

3566 G03

USB Limited Battery Charge

Current vs Battery Voltage

USB Limited Battery Charge

Current vs Battery Voltage

Battery Drain Current

vs Battery Voltage

700

600

150

125

25

20

15

10

5

I

= 0μA

VOUT

V

= 0V

BUS

V

R

= 5V

BUS

500

400

300

200

100

0

V

R

= 5V

BUS

= 1k

PROG

CLPROG

100

75

= 1k

PROG

CLPROG

= 3.01k

50

25

0

V

= 5V

BUS

(SUSPEND MODE)

1x USB SETTING,

BATTERY CHARGER SET FOR 1A

5x USB SETTING,

BATTERY CHARGER SET FOR 1A

0

3.0

3.3

3.6

4.2

2.7

3.9

2.7 3.0 3.3 3.6

BATTERY VOLTAGE (V)

3.9

4.2

2.7

3.0

3.3

3.6

3.9

4.2

BATTERY VOLTAGE (V)

3566 G04

3566 G05

3566 G06

Battery Charging Efﬁciency vs

Battery Voltage with No External

Load (P_BAT/P_BUS

PowerPath Switching Regulator

Efﬁciency vs Output Current

V_BUSQuiescent Current vs V_BUS

Voltage (Suspend)

)

100

90

80

70

60

50

40

100

90

80

70

60

50

40

30

20

10

0

BAT = 3.8V

R

VOUT

= 3.01k

BAT = 3.8V

CLPROG

PROG

5x, 10x MODE

= 1k

I

= 0mA

1x MODE

VOUT

5x CHARGING

EFFICIENCY

I

= 0mA

1x CHARGING

EFFICIENCY

0.01

0.1

1

2.7

3.0

3.3

3.6

3.9

4.2

0

1

2

3

4

5

OUTPUT CURRENT (A)

BATTERY VOLTAGE (V)

V

VOLTAGE (V)

BUS

3566 G07

3566 G08

3566 G09

3566fa

6

LTC3566

T_A= 25°C unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Output Voltage

vs Load Current in Suspend

V_BUSCurrent

vs Load Current in Suspend

3.3V LDO Output Voltage vs Load

Current, V_BUS= 0V

5.0

4.5

4.0

3.5

3.0

2.5

3.4

3.2

3.0

2.8

2.6

0.5

0.4

0.3

0.2

0.1

0

BAT = 3.5V

V

= 5V

BAT = 3.9V, 4.2V

BUS

BAT = 3.4V

BAT = 3.6V

BAT = 3.3V

= 3.01k

R

CLPROG

BAT = 3V

BAT = 3.1V

BAT = 3.2V

BAT = 3.3V

V

= 5V

BUS

BAT = 3.3V

= 3k

R

CLPROG

0

0.1

0.2

0.3

0.4

0.5

0

5

10

15

20

25

0

0.1

0.2

0.3

0.4

0.5

LOAD CURRENT (mA)

3566 G10

3566 G12

3566 G11

Battery Charge Current

vs Temperature

Battery Charger Float Voltage

vs Temperature

Low-Battery (Instant-On) Output

Voltage vs Temperature

4.21

4.20

4.19

4.18

4.17

3.68

3.66

3.64

3.62

3.60

600

500

400

300

200

100

0

BAT = 2.7V

I

= 100mA

VOUT

5x MODE

THERMAL REGULATION

R

= 2k

PROG

10x MODE

60 80

20 40

TEMPERATURE (°C)

–40 –20

0

100 120

–40

–15

10

35

60

85

–40

–15

10

35

60

85

TEMPERATURE (°C)

3566 G13

3566 G14

3566 G15

Oscillator Frequency

vs Temperature

V_BUSQuiescent Current

vs Temperature

V_BUSQuiescent Current in

Suspend vs Temperature

2.6

2.4

2.2

2.0

1.8

15

12

9

70

60

50

40

30

V

VOUT

= 5V

= 0μA

I

= 0μA

BUS

VOUT

I

5x MODE

BAT = 3.6V

= 0V

V

= 5V

BUS

V

BUS

BAT = 3V

= 0V

1x MODE

V

BUS

6

BAT = 2.7V

= 0V

V

BUS

3

–40

–15

10

35

60

85

–40

–15

35

TEMPERATURE (°C)

60

85

10

–40

–15

35

TEMPERATURE (°C)

60

85

10

TEMPERATURE (°C)

3566 G16

3566 G17

3566 G18

3566fa

7

LTC3566

T_A= 25°C unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

CHRG Pin Current vs Voltage

(Pull-Down State)

3.3V LDO Step Response

(5mA to 15mA)

Battery Drain Current vs

Temperature

100

80

60

40

20

0

50

40

30

20

10

0

V

= 5V

BAT = 3.8V

BUS

BUCK REGULATORS OFF

BUS

BAT = 3.8V

V

= 0V

I

LDO3V3

5mA/DIV

0mA

V

LDO3V3

20mV/DIV

AC COUPLED

3566 G2

BAT = 3.8V

20μs/DIV

0

1

2

3

4

5

–40

–15

10

35

60

85

CHRG PIN VOLTAGE (V)

TEMPERATURE (°C)

3566 G19

3566 G21

R_DS(ON)for Buck-Boost Regulator

Power Switches vs Temperature

Buck-Boost Regulator Current

Limit vs Temperature

Buck-Boost Regulator Burst Mode

Operation Quiescent Current

0.30

0.25

0.40

0.35

2600

2550

14.0

13.5

V

= 3.3V

V

= 3V

OUT1

IN1

PMOS V = 3V

IN1

PMOS V = 3.6V

IN1

V

= 4.5V

IN1

PMOS V = 4.5V

IN1

V

= 3.6V

= 4.5V

IN1

0.20

0.30

2500

13.0

V

= 3V

V

IN1

NMOS V = 3V

IN1

0.15

0.10

0.25

0.20

2450

2400

12.5

12.0

NMOS V = 3.6V

V

= 3.6V

IN1

NMOS V = 4.5V

IN1

0.05

0

0.15

0.10

2350

2300

11.5

11.0

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

–55 –35 –15

5

25 45 65 85 105 125

TEMPERATURE (°C)

3566 G22

3566 G23

3566 G24

Buck-Boost Regulator PWM Mode

Efﬁciency

Buck-Boost Regulator PWM

Efﬁciency vs V_IN1

Buck-Boost Regulator vs I_LOAD

Burst Mode OPERATION

CURVES

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

Burst Mode

OPERATION

CURVES

PWM MODE

CURVES

PWM MODE

CURVES

V

= 3V

= 3.6V

= 4.5V

I

= 50mA

IN1

LOAD

V

= 3V

= 3.6V

= 4.5V

IN1

= 200mA

V

= 3V

= 3.6V

= 4.5V

IN1

= 1000mA

V

= 3V

= 3.6V

= 4.5V

IN1

V

T

= 3.3V

V

= 3.3V

V

= 5V

OUT1

A

OUT1

= 27°C

T

A

= 27°C

T = 27°C

A

TYPE 3 COMPENSATION

2.7

3.5

3.1 3.9

(V)

TYPE 3 COMPENSATION

10 100 1000

(mA)

0.1

1

10

(mA)

100

1000

4.3

4.7

0.1

1

I

LOAD

V

LOAD

IN1

3566 G25

3566 G27

3566 G26

3566fa

8

LTC3566

T_A= 25°C unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Buck-Boost Regulator Load

Regulation

Reduction in Current

Buck-Boost Regulator Load Step,

0mA to 300mA

Deliverability at Low V_IN1

3.333

3.322

3.311

3.300

3.289

3.278

3.267

300

250

V

= 3V

= 3.6V

= 4.5V

STEADY STATE I

START-UP WITH A

RESISTIVE LOAD

START-UP WITH A

CURRENT SOURCE LOAD

IN1

LOAD

CH1 V

OUT1

AC 100mV/DIV

200

150

CH2 I

LOAD

100

50

0

DC 200mA/DIV

V

= 3.3V

T = 27°C

A

3566 G30

V

A

= 3.3V

OUT1

V

= 4.2V

100μs/DIV

IN1

OUT1

T

= 27°C

= 3.3V

TYPE 3 COMPENSATION

3.9 4.3 4.7

(V)

TYPE 3 COMPENSATION

L = 2.2μH

= 47μF

C

OUT

1

10

100

1A

2.7

3.1

3.5

V

IN1

I

(mA)

LOAD

3566 G28

3566 G29

PIN FUNCTIONS

LDO3V3 (Pin 1): 3.3V LDO Output Pin. This pin provides

FB1(Pin4):FeedbackInputforthe(Buck-Boost)Switching

Regulator. When the regulator’s control loop is complete,

this pin servos to a ﬁxed voltage of 0.8V.

a regulated, always-on, 3.3V supply voltage. LDO3V3

gets its power from V . It may be used for light loads

OUT

such as a watchdog microprocessor or real time clock.

A 1μF capacitor is required from LDO3V3 to ground. If

the LDO3V3 output is not used it should be disabled by

V (Pin5):OutputoftheErrorAmpliﬁerandVoltageCom-

C1

pensationNodeforthe(Buck-Boost)SwitchingRegulator.

ExternalTypeIorTypeIIIcompensation(toFB1)connects

tothispin.SeeApplicationsInformationsectionforselect-

ing buck-boost loop compensation components.

connecting it to V

.

OUT

CLPROG (Pin 2): USB Current Limit Program and Moni-

tor Pin. A resistor from CLPROG to ground determines

GND (Pins 6, 12): Power GND pins for the buck-boost.

the upper limit of the current drawn from the V

pin.

BUS

SWAB1(Pin7):SwitchNodeforthe(Buck-Boost)Switch-

ing Regulator. Connected to internal power switches A

and B. External inductor connects between this node and

SWCD1.

A fraction of the V

current is sent to the CLPROG pin

BUS

when the synchronous switch of the PowerPath switching

regulator is on. The switching regulator delivers power

until the CLPROG pin reaches 1.188V. Several V

cur-

BUS

rent limit settings are available via user input which will

typically correspond to the 500mA and the 100mA USB

speciﬁcations. A multilayer ceramic averaging capacitor

or R-C network is required at CLPROG for ﬁltering.

MODE (Pin 8): Logic Input. Mode enables Burst Mode

functionality for the buck-boost switching regulator when

pin is set high. Has a 1.6μA internal pull-down current

source.

NTC (Pin 3): Input to the Thermistor Monitoring Circuits.

The NTC pin connects to a battery’s thermistor to deter-

mine if the battery is too hot or too cold to charge. If the

battery’s temperature is out of range, charging is paused

until it re-enters the valid range. A low drift bias resistor

V

(Pin 9): Power Input for the (Buck-Boost) Switching

IN1

Regulator. This pin will generally be connected to V

OUT

(Pin 20). A 1μF(min) MLCC capacitor is recommended

on this pin.

V

(Pin 10): Regulated Output Voltage for the (Buck-

OUT1

is required from V

to NTC and a thermistor is required

BUS

Boost) Switching Regulator.

from NTC to ground. If the NTC function is not desired,

the NTC pin should be grounded.

3566fa

9

LTC3566

PIN FUNCTIONS

SWCD1 (Pin 11): Switch Node for the (Buck-Boost)

SwitchingRegulator.Connectedtointernalpowerswitches

C and D. External inductor connects between this node

and SWAB1.

BAT (Pin 19): Single-Cell Li-Ion Battery Pin. Depending on

available V power, a Li-Ion battery on BAT will either

BUS

deliverpowertoV throughtheidealdiodeorbecharged

OUT

from V

via the battery charger.

OUT

ILIM0 (Pin 13): Logic Input. Control pin for ILIM0 bit of

the current limit of the PowerPath switching regulator.

See Table 2. Active high. Has a 1.6μA internal pull-down

current source.

V

(Pin 20): Output Voltage of the Switching Power-

OUT

Path Controller and Input Voltage of the Battery Charger.

The majority of the portable product should be powered

from V . The LTC3566 will partition the available power

OUT

between the external load on V

and the internal battery

OUT

ILIM1 (Pin 14): Logic Input. Control pin for ILIM1 bit of

the current limit of the PowerPath switching regulator.

See Table 2. Active high. Has a 1.6μA internal pull-down

current source.

charger. Priority is given to the external load and any extra

power is used to charge the battery. An ideal diode from

BAT to V

ensures that V

is powered even if the load

OUT

exceeds the allotted power from V

or if the V

power

BUS

PROG (Pin 15): Charge Current Program and Charge

Current Monitor Pin. Connecting a resistor from PROG

to ground programs the charge current. If sufﬁcient in-

put power is available in constant-current mode, this pin

servos to 1V. The voltage on this pin always represents

the actual charge current.

source is removed. V

should be bypassed with a low

OUT

impedance ceramic capacitor.

V

(Pin 21): Primary Input Power Pin. This pin delivers

BUS

powertoV viatheSWpinbydrawingcontrolledcurrent

OUT

from a DC source such as a USB port or wall adapter.

SW (Pin 22): Power Transmission Pin for the USB Pow-

CHRG (Pin 16): Open-Drain Charge Status Output. The

CHRG pin indicates the status of the battery charger. Four

possible states are represented by CHRG: charging, not

charging, unresponsive battery and battery temperature

out of range. CHRG is modulated at 35kHz and switches

between a low and high duty cycle for easy recognition

by either humans or microprocessors. See Table 1. CHRG

requires a pull-up resistor and/or LED to provide indica-

tion.

erPath. The SW pin delivers power from V

to V

BUS

OUT

via the step-down switching regulator. A 3.3μH inductor

should be connected from SW to V

.

OUT

CHRGEN (Pin 23): Logic Input. This logic input pin inde-

pendently enables the battery charger. Active low. Has a

1.6μA internal pull-down current source.

EN1(Pin24):LogicInput.Thislogicinputpinindependently

enables the buck-boost switching regulator. Active high.

Has a 1.6μA internal pull-down current source.

GND (Pin 17): GND pin for USB Power Manager.

GATE (Pin 18): Analog Output. This pin controls the gate

ExposedPad(Pin25):Ground. Buck-boostlogicandUSB

Power Manager ground connections. The Exposed Pad

should be connected to a continuous ground plane on the

printed circuit board directly under the LTC3566.

of an optional external P-channel MOSFET transistor used

to supplement the ideal diode between V

and BAT. The

OUT

external ideal diode operates in parallel with the internal

ideal diode. The source of the P-channel MOSFET should

be connected to V

and the drain should be connected

OUT

to BAT. If the external ideal diode FET is not used, GATE

should be left ﬂoating.

3566fa

10

LTC3566

BLOCK DIAGRAM

V

BUS

21

SW

2.25MHz PowerPath

BUCK REGULATOR

22

1

LDO3V3

3.3V LDO

V

OUT

SUSPEND LDO

500μA/2.5mA

20

18

+

CLPROG

NTC

–

+

–

GATE

2

3

IDEAL

+

BATTERY

TEMPERATURE

MONITOR

–

CC/CV

CHARGER

+

15mV

CHRG

BAT

16

1.2V

19

15

3.6V

+–

CHARGE

STATUS

PROG

0.3V

CHRGEN

V

IN1

9

7

ENABLE

MODE

SWAB1

ILIM

DECODE

LOGIC

V

OUT1

10

11

CHRGEN

EN1

1A, 2.25MHz

BUCK-BOOST

REGULATOR

23

24

13

14

8

SWCD1

ILIM0

ILIM1

MODE

FB1

4

5

V

C1

GND

6, 12, 17, 25

3566 BD

3566fa

11

LTC3566

OPERATION

Introduction

If the combined load does not exceed the PowerPath

switchingregulator’sprogrammedinputcurrentlimit,V

will track 0.3V above the battery (Bat-Track). By keeping

the voltage across the battery charger low, efﬁciency is

optimized because power lost to the linear battery char-

ger is minimized. Power available to the external load is

therefore optimized.

OUT

The LTC3566 is a highly integrated power management IC

which includes a high efﬁciency switch mode PowerPath

controller, a battery charger, an ideal diode, an always-on

LDO, and a 1A buck-boost switching regulator. The entire

chip is controlled via direct digital inputs.

DesignedspeciﬁcallyforUSBapplications,thePowerPath

controller incorporates a precision average input current

step-down switching regulator to make maximum use of

the allowable USB power. Because power is conserved,

the LTC3566 allows the load current on V

the current drawn by the USB port without exceeding the

USB load speciﬁcations.

If the combined load at V

is large enough to cause the

OUT

switching power supply to reach the programmed input

current limit, the battery charger will reduce its charge

current by the amount necessary to enable the external

load to be satisﬁed. Even if the battery charge current is

settoexceedtheallowableUSBcurrent,theUSBspeciﬁca-

tion will not be violated. The switching regulator will limit

the average input current so that the USB speciﬁcation

to exceed

OUT

The PowerPath switching regulator and battery charger

communicatetoensurethattheinputcurrentneverviolates

the USB speciﬁcations.

is never violated. Furthermore, load current at V

will

OUT

always be prioritized and only remaining available power

will be used to charge the battery.

The ideal diode from BAT to V

guarantees that ample

even if there is insuf-

OUT

power is always available to V

If the voltage at BAT is below 3.3V, or the battery is not

presentandtheloadrequirementdoesnotcausetheswitch-

ﬁcient or absent power at V

.

BUS

ing regulator to exceed the USB speciﬁcation, V

will

OUT

An “always-on” LDO provides a regulated 3.3V from avail-

regulateat3.6V,therebyproviding“Instant-On”operation.

If the load exceeds the available power, V will drop to

able power at V . Drawing very little quiescent current,

OUT

this LDO will be on at all times and can be used to supply

a voltage between 3.6V and the battery voltage. If there

up to 25mA.

is no battery present when the load exceeds the available

The LTC3566 also has a general purpose buck-boost

switching regulator, which can be independently enabled

via direct digital control. Along with constant frequency

PWM mode, the buck-boost regulator has a low power

burst-onlymodesettingforsigniﬁcantlyreducedquiescent

current under light load conditions.

USB power, V

can drop toward ground.

OUT

The power delivered from V

to V

is controlled

OUT

BUS

by a 2.25MHz constant-frequency step-down switching

regulator. To meet the USB maximum load speciﬁcation,

the switching regulator includes a control loop which

ensures that the average input current is below the level

programmed at CLPROG.

High Efﬁciency Switching PowerPath Controller

–1

ThecurrentatCLPROGisafraction(h

)oftheV

BUS

Whenever V

is available and the PowerPath switching

CLPROG

BUS

current. When a programming resistor and an averaging

capacitorareconnectedfromCLPROGtoGND,thevoltage

regulator is enabled, power is delivered from V

to V

BUS

OUT

via SW. V

drives both the external load (including the

OUT

buck-boost regulator) and the battery charger.

3566fa

12

LTC3566

OPERATION

on CLPROG represents the average input current of the

switching regulator. When the input current approaches

the programmed limit, CLPROG reaches V

and power out is held constant.

2200

2000

1800

1600

1400

1200

1000

800

VISHAY Si2333

OPTIONAL EXTERNAL

IDEAL DIODE

, 1.188V

CLPROG

LTC3566

IDEAL DIODE

The input current is programmed by the ILIM0 and ILIM1

pins. It can be conﬁgured to limit average input current to

one of several possible settings as well as be deactivated

(USB Suspend). The input current limit will be set by the

600

ON

SEMICONDUCTOR

MBRM120LT3

400

200

V

servo voltage and the resistor on CLPROG ac-

CLPROG

0

cording to the following expression:

0

120 180 240 300 360 420 480

FORWARD VOLTAGE (mV) (BAT – V

60

)

OUT

3566 F02

V

I_VBUS=I_BUSQ

+

^CLPROG•(h_CLPROG+1)

R_CLPROG

Figure 2. Ideal Diode Operation

consists of a precision ampliﬁer that enables a large on-

chipP-channelMOSFETtransistorwheneverthevoltageat

Figure 1 shows the range of possible voltages at V

as

OUT

a function of battery voltage.

V

is approximately 15mV (V ) below the voltage at

4.5

OUT

FWD

BAT. The resistance of the internal ideal diode is approxi-

mately180mΩ. Ifthisissufﬁcientfortheapplication, then

no external components are necessary. However, if more

conductance is needed, an external P-channel MOSFET

4.2

3.9

NO LOAD

3.6

300mV

transistor can be added from BAT to V

.

OUT

3.3

WhenanexternalP-channelMOSFETtransistorispresent,

the GATE pin of the LTC3566 drives its gate for automatic

ideal diode control. The source of the external P-chan-

3.0

2.7

2.4

nel MOSFET should be connected to V

and the drain

OUT

3.6

4.2

2.4

2.7

3.0

3.3

3.9

should be connected to BAT. Capable of driving a 1nF load,

the GATE pin can control an external P-channel MOSFET

transistor having an on-resistance of 40mΩ or lower.

BAT (V)

3566 F01

Figure 1. V_OUTvs BAT

Suspend LDO

Ideal Diode from BAT to V

OUT

If the LTC3566 is conﬁgured for USB suspend mode, the

switching regulator is disabled and the suspend LDO

The LTC3566 has an internal ideal diode as well as a con-

troller for an optional external ideal diode. The ideal diode

controller is always on and will respond quickly whenever

provides power to the V

pin (presuming there is power

OUT

available to V ). This LDO will prevent the battery from

BUS

V

drops below BAT.

OUT

running down when the portable product has access to

a suspended USB port. Regulating at 4.6V, this LDO only

becomes active when the switching converter is disabled

(suspended). ToremaincompliantwiththeUSBspeciﬁca-

tion, the input to the LDO is current limited so that it will

not exceed the 500μA low power suspend speciﬁcation.

If the load current increases beyond the power allowed

from the switching regulator, additional power will be

pulled from the battery via the ideal diode. Furthermore,

if power to V

(USB or wall power) is removed, then all

BUS

of the application power will be provided by the battery via

If the load on V

exceeds the suspend current limit,

the ideal diode. The transition from input power to battery

OUT

the additional current will come from the battery via the

power at V

will be quick enough to allow only a 10μF

OUT

ideal diode.

capacitor to keep V

from drooping. The ideal diode

OUT

3566fa

13

LTC3566

OPERATION

SYSTEM LOAD

3.5V TO

(BAT + 0.3V)

TO USB

OR WALL

ADAPTER

V

BUS

SW

OUT

21

22

20

I

/N

SWITCH

V

PWM AND

GATE DRIVE

IDEAL

DIODE

OPTIONAL

CONSTANT CURRENT

CONSTANT VOLTAGE

BATTERY CHARGER

EXTERNAL

IDEAL DIODE

PMOS

+

–

GATE

BAT

OV

18

19

–

+

15mV

–

+

–

+

0.3V

CLPROG

1.188V

2

+

–

3.6V

AVERAGE INPUT

CURRENT LIMIT

CONTROLLER

AVERAGE OUTPUT

VOLTAGE LIMIT

CONTROLLER

+

SINGLE CELL

Li-Ion

3566 F03

Figure 3. PowerPath Block Diagram

3.3V Always-On Supply

termination by safety timer, low voltage trickle charging,

bad cell detection and thermistor sensor input for out-of-

temperature charge pausing.

TheLTC3566includesalowquiescentcurrentlowdropout

regulator that is always powered. This LDO can be used to

provide power to a system pushbutton controller, standby

microcontroller or real time clock. Designed to deliver up

to 25mA, the always-on LDO requires at least a 1μF low

impedance ceramic bypass capacitor for compensation.

Battery Preconditioning

When a battery charge cycle begins, the battery charger

ﬁrst determines if the battery is deeply discharged. If the

batteryvoltageisbelowV ,typically2.85V,anautomatic

TRKL

The LDO is powered from V , and therefore will enter

OUT

trickle charge feature sets the battery charge current to

10% of the programmed value. If the low voltage persists

for more than 1/2 hour, the battery charger automatically

terminates and indicates via the CHRG pin that the battery

was unresponsive.

dropout at loads less than 25mA as V

falls near 3.3V.

OUT

If the LDO3V3 output is not used, it should be disabled

by connecting it to V

.

OUT

V

Undervoltage Lockout (UVLO)

BUS

AninternalundervoltagelockoutcircuitmonitorsV and

Oncethebatteryvoltageisabove2.85V,thebatterycharger

begins charging in full power constant-current mode. The

current delivered to the battery will try to reach 1022V/

BUS

keeps the PowerPath switching regulator off until V

BUS

rises above 4.30V and is about 200mV above the battery

voltage. Hysteresis on the UVLO turns off the regulator if

R

. Depending on available input power and external

PROG

V

drops below 4.00V or to within 50mV of BAT. When

load conditions, the battery charger may or may not be

able to charge at the full programmed rate. The external

load will always be prioritized over the battery charge

current. The USB current limit programming will always

be observed and only additional power will be available to

charge the battery. When system loads are light, battery

charge current will be maximized.

BUS

this happens, system power at V

the battery via the ideal diode.

will be drawn from

OUT

Battery Charger

The LTC3566 includes a constant-current/constant-volt-

age battery charger with automatic recharge, automatic

3566fa

14

LTC3566

OPERATION

Charge Termination

Ineithertheconstant-currentorconstant-voltagecharging

modes, the voltage at the PROG pin will be proportional to

the actual charge current delivered to the battery. There-

fore, the actual charge current can be determined at any

time by monitoring the PROG pin voltage and using the

following equation:

The battery charger has a built-in safety timer. When

the voltage on the battery reaches the pre-programmed

ﬂoat voltage of 4.200V, the battery charger will regulate

the battery voltage and the charge current will decrease

naturally. Once the battery charger detects that the battery

has reached 4.200V, the four hour safety timer is started.

After the safety timer expires, charging of the battery will

discontinue and no more current will be delivered.

V

I_BAT

=

^PROG•1022

R_PROG

In many cases, the actual battery charge current, I , will

BAT

Automatic Recharge

belowerthanI

duetolimitedinputpoweravailableand

CHG

After the battery charger terminates, it will remain off

drawing only microamperes of current from the battery.

If the portable product remains in this state long enough,

the battery will eventually self discharge. To ensure that

the battery is always topped off, a charge cycle will au-

tomatically begin when the battery voltage falls below

4.1V. In the event that the safety timer is running when

the battery voltage falls below 4.1V, it will reset back to

zero. To prevent brief excursions below 4.1V from reset-

ting the safety timer, the battery voltage must be below

4.1V for more than 1.3ms. The charge cycle and safety

prioritization with the system load drawn from V

.

OUT

Charge Status Indication

The CHRG pin indicates the status of the battery charger.

Four possible states are represented by CHRG which

include charging, not charging, unresponsive battery and

battery temperature out of range.

The signal at the CHRG pin can be easily recognized as

one of the above four states by either a human or a mi-

croprocessor. An open drain output, the CHRG pin can

drive an indicator LED through a current limiting resistor

for human interfacing or simply a pull-up resistor for

microprocessor interfacing.

timer will also restart if the V

UVLO cycles low and

BUS

then high (e.g. V , is removed and then replaced) or if

BUS

the battery charger is cycled on and off by the CHRGEN

digital I/O pin.

To make the CHRG pin easily recognized by both humans

and microprocessors, the pin is either low for charging,

high for not charging, or it is switched at high frequency

(35kHz) to indicate the two possible faults, unresponsive

battery and battery temperature out of range.

Charge Current

The charge current is programmed using a single resis-

tor from PROG to ground. 1/1022 of the battery charge

th

current is sent to PROG which will attempt to servo to

1.000V. Thus, the battery charge current will try to reach

1022 times the current in the PROG pin. The program

resistor and the charge current are calculated using the

following equations:

When charging begins, CHRG is pulled low and remains

lowforthedurationofanormalchargecycle.Whencharg-

ing is complete, i.e., the BAT pin reaches 4.200V and the

chargecurrenthasdroppedtoonetenthoftheprogrammed

value, the CHRG pin is released (Hi-Z). If a fault occurs,

the pin is switched at 35kHz. While switching, its duty

cycle is modulated between a high and low value at a very

low frequency. The low and high duty cycles are disparate

1022V

I_CHG

1022V

R_PROG

=

,I_CHG=

3566fa

15

LTC3566

OPERATION

enough to make an LED appear to be on or off thus giving

the appearance of “blinking”. Each of the two faults has

its own unique “blink” rate for human recognition as well

as two unique duty cycles for machine recognition.

charge threshold voltage within the bad battery timeout

period. Inthiscase, thebatterychargerwillfalselyindicate

a bad battery. System software may then reduce the load

and reset the battery charger to try again.

The CHRG pin does not respond to the C/10 threshold if

Although very improbable, it is possible that a duty cycle

reading could be taken at the bright-dim transition (low

duty cycle to high duty cycle). When this happens the

duty cycle reading will be precisely 50%. If the duty cycle

reading is 50%, system software should disqualify it and

take a new duty cycle reading.

the LTC3566 is in V

current limit. This prevents false

BUS

end of charge indications due to insufﬁcient power avail-

able to the battery charger.

Table 1 illustrates the four possible states of the CHRG

pin when the battery charger is active.

NTC Thermistor

Table 1. CHRG Output Pin

The battery temperature is measured by placing a nega-

tive temperature coefﬁcient (NTC) thermistor close to the

battery pack.

MODULATION (BLINK)

STATUS

Charging

FREQUENCY

0Hz

FREQUENCY

DUTY CYCLE

100%

0Hz (Lo-Z)

To use this feature connect the NTC thermistor, R , be-

Not Charging

NTC Fault

0Hz

0Hz (Hi-Z)

0%

NTC

, from

tween the NTC pin and ground and a resistor, R

NOM

35kHz

1.5Hz at 50%

6.1Hz at 50%

6.25%, 93.75%

12.5%, 87.5%

V

to the NTC pin. R

should be a 1% resistor with

BUS

NOM

Bad Battery

a value equal to the value of the chosen NTC thermistor

at 25°C (R25). A 100k thermistor is recommended since

thermistor current is not measured by the LTC3566 and

will have to be budgeted for USB compliance.

An NTC fault is represented by a 35kHz pulse train whose

duty cycle alternates between 6.25% and 93.75% at a

1.5Hz rate. A human will easily recognize the 1.5Hz rate

as a “slow” blinking which indicates the out-of-range

battery temperature while a microprocessor will be able

to decode either the 6.25% or 93.75% duty cycles as an

NTC fault.

The LTC3566 will pause charging when the resistance of

the NTC thermistor drops to 0.54 times the value of R25

or approximately 54k. For Vishay “Curve 1” thermistor,

this corresponds to approximately 40°C. If the battery

charger is in constant-voltage (ﬂoat) mode, the safety

timer also pauses until the thermistor indicates a return

to a valid temperature. As the temperature drops, the

resistance of the NTC thermistor rises. The LTC3566 is

also designed to pause charging when the value of the

NTC thermistor increases to 3.25 times the value of R25.

For Vishay “Curve 1” this resistance, 325k, corresponds

to approximately 0°C. The hot and cold comparators each

haveapproximately3°Cofhysteresistopreventoscillation

about the trip point. Grounding the NTC pin disables the

NTC charge pausing function.

If a battery is found to be unresponsive to charging (i.e.,

its voltage remains below 2.85V, for 1/2 hour), the CHRG

pingivesthebatteryfaultindication.Forthisfault,ahuman

would easily recognize the frantic 6.1Hz “fast” blink of the

LEDwhileamicroprocessorwouldbeabletodecodeeither

the 12.5% or 87.5% duty cycles as a bad battery fault.

Note that the LTC3566 is a 3-terminal PowerPath prod-

uct where system load is always prioritized over battery

charging. Due to excessive system load, there may not be

sufﬁcient power to charge the battery beyond the trickle

3566fa

16

LTC3566

OPERATION

Thermal Regulation

Input Current Limit

To optimize charging time, an internal thermal feedback

loop may automatically decrease the programmed charge

current. This will occur if the die temperature rises to

approximately 110°C. Thermal regulation protects the

LTC3566 from excessive temperature due to high power

operation or high ambient thermal conditions and allows

the user to push the limits of the power handling capability

with a given circuit board design without risk of damag-

ing the LTC3566 or external components. The beneﬁt

of the LTC3566 thermal regulation loop is that charge

current can be set according to actual conditions rather

than worst-case conditions with the assurance that the

battery charger will automatically reduce the current in

worst-case conditions.

The input current limit comparator will shut the input

PMOS switch off once current exceeds 2.5A (typical). The

2.5A input current limit also protects against a grounded

V

node.

OUT1

Output Overvoltage Protection

If the FB1 node were inadvertently shorted to ground, then

the output would increase indeﬁnitely with the maximum

current that could be sourced from V . The LTC3566

IN1

protects against this by shutting off the input PMOS if

the output voltage exceeds a 5.6V (typical).

Low Output Voltage Operation

When the output voltage is below 2.65V (typical) during

start-up, Burst Mode operation is disabled and switch D

is turned off (allowing forward current through the well

diode and limiting reverse current to 0mA).

Buck-Boost DC/DC Switching Regulator

TheLTC3566containsa2.25MHzconstant-frequencyvolt-

age mode buck-boost switching regulator. The regulator

provides up to 1A of output load current. The buck-boost

canbeprogrammedtoaminimumoutputvoltageof2.75V

and can be used to power a microcontroller core, micro-

controller I/O, memory, disk drive, or other logic circuitry.

Tosuitavarietyofapplications,aselectablemodefunction

allows the user to trade off noise for efﬁciency. Two modes

are available to control the operation of the LTC3566’s

buck-boost regulator. At moderate to heavy loads, the

constant frequency PWM mode provides the least noise

switching solution. At lighter loads Burst Mode operation

may be selected. The output voltage is programmed by

a user supplied resistive divider returned to the FB1 pin.

An error ampliﬁer compares the divided output voltage

with a reference and adjusts the compensation voltage

accordingly until the FB1 has stabilized at 0.8V. The buck-

boost regulator also includes a soft-start to limit inrush

current and voltage overshoot when powering on, short

circuit current protection, and switch node slew limiting

circuitry for reduced radiated EMI.

Buck-Boost Regulator PWM Operating Mode

In PWM mode the voltage seen at FB1 is compared to a

0.8V reference. From the FB1 voltage an error ampliﬁer

generates an error signal seen at V . This error signal

C1

commands PWM waveforms that modulate switches A,

B, C and D. Switches A and B operate synchronously as

do switches C and D. If V is signiﬁcantly greater than

IN1

the programmed V

, then the converter will operate

OUT1

in buck mode. In this mode switches A and B will be

modulated, with switch D always on (and switch C always

off), to step-down the input voltage to the programmed

output. If V is signiﬁcantly less than the programmed

IN1

V

OUT1

, then the converter will operate in boost mode. In

this mode switches C and D are modulated, with switch A

always on (and switch B always off), to step-up the input

voltage to the programmed output. If V is close to the

IN1

programmed V

, then the converter will operate in

OUT1

4-switchmode.Inthismodetheswitchessequencethrough

the pattern of AD, AC, BD to either step the input voltage

up or down to the programmed output.

3566fa

17

LTC3566

OPERATION

Buck-Boost Regulator Burst Mode Operation

Buck-Boost Regulator Soft-Start Operation

In Burst Mode operation, the buck-boost regulator uses

a hysteretic FB1 voltage algorithm to control the output

voltage. By limiting FET switching and using a hysteretic

control loop, switching losses are greatly reduced. In this

mode output current is limited to 50mA typical. While

operating in Burst Mode operation, the output capacitor

is charged to a voltage slightly higher than the regulation

point. The buck-boost converter then goes into a sleep

state, during which the output capacitor provides the

load current. The output capacitor is charged by charg-

ing the inductor until the input current reaches 275mA

typical and then discharging the inductor until the reverse

current reaches 0mA typical. This process is repeated

until the feedback voltage has charged to 6mV above the

regulation point. In the sleep state, most of the regulator’s

circuitry is powered down, helping to conserve battery

power. When the feedback voltage drops 6mV below the

regulation point, the switching regulator circuitry is pow-

ered on and another burst cycle begins. The duration for

which the regulator sleeps depends on the load current

and output capacitor value. The sleep time decreases as

the load current increases. The maximum load current in

Burst Mode operation is 50mA. The buck-boost regulator

will not go to sleep if the current is greater than 50mA

and if the load current increases beyond this point while

in Burst Mode operation the output will lose regulation.

Burst Mode operation provides a signiﬁcant improve-

ment in efﬁciency at light loads at the expense of higher

output ripple when compared to PWM mode. For many

noise-sensitive systems, Burst Mode operation might

be undesirable at certain times (i.e. during a transmit or

receive cycle of a wireless device), but highly desirable

at others (i.e. when the device is in low power standby

mode). The MODE pin is used to enable or disable Burst

Mode operation at any time, offering both low noise and

low power operation when they are needed.

Soft-start is accomplished by gradually increasing the

reference voltage input to the error ampliﬁer over a 0.5ms

(typical)period.Thislimitstransientinrushcurrentsduring

start-up because the output voltage is always “in regula-

tion”. Ramping the reference voltage input also limits the

rate of increase in the V voltage which helps minimize

C1

output overshoot during start-up. A soft-start cycle oc-

curs whenever the buck-boost is enabled, or after a fault

condition has occurred (thermal shutdown or UVLO). A

soft-start cycle is not triggered by changing operating

modes.Thisallowsseamlessoperationwhentransitioning

between Burst Mode operation and PWM mode.

Low Supply Operation

TheLTC3566incorporatesanundervoltagelockoutcircuit

on V

(connected to V ) which shuts down the buck-

OUT

IN1

boost regulator when V

drops below 2.6V. This UVLO

OUT

prevents unstable operation.

Table 2. USB Current Limit Settings

ILIM1

ILIM0

USB SETTING

0

1

0

1

0

1

1x Mode (USB 100mA Limit)

10x Mode (Wall 1A Limit)

Suspend

5x Mode (USB 500mA Limit)

Table 3. Switching Regulator Modes

MODE

SWITCHING REGULATOR MODE

PWM Mode

0

1

Burst Mode Operation

3566fa

18

LTC3566

APPLICATIONS INFORMATION

CLPROG Resistor and Capacitor

Choosing the PowerPath Inductor

As described in the High Efﬁciency Switching PowerPath

Controller section, the resistor on the CLPROG pin deter-

mines the average input current limit when the switching

regulator is set to either the 1x mode (USB 100mA), the

5x mode (USB 500mA) or the 10x mode. The input cur-

rent will be comprised of two components, the current

Because the input voltage range and output voltage range

of the PowerPath switching regulator are both fairly nar-

row, the LTC3566 was designed for a speciﬁc inductance

value of 3.3μH. Some inductors which may be suitable

for this application are listed in Table 4.

Table 4. Recommended Inductors for PowerPath Controller

that is used to drive V

and the quiescent current of the

OUT

INDUCTOR

TYPE

L

MAX MAX

SIZE IN mm MANUFACTURER

(L × W × H)

switching regulator. To ensure that the USB speciﬁcation

is strictly met, both components of input current should

be considered. The Electrical Characteristics table gives

values for quiescent currents in either setting as well as

current limit programming accuracy. To get as close to

the 500mA or 100mA speciﬁcations as possible, a 1%

(μH) IDC

(A)

DCR

(Ω)

LPS4018

3.3

2.2

0.08

CoilCraft

www.coilcraft.

com

3.9 × 3.9 × 1.7

D53LC

DB318C

3.3 2.26 0.034

3.3 1.55 0.070

Toko

www.toko.com

5.0 × 5.0 × 3.0

3.8 × 3.8 × 1.8

resistor should be used. Recall that I

= I

+

VBUS

VBUSQ

WE-TPC

Type M1

3.3 1.95 0.065

Würth Elektronik

www.we-online.

com

4.8 × 4.8 × 1.8

V

/R

• (h

+ 1).

CLPROG CLPROG

CLPROG

An averaging capacitor or an R-C combination is required

in parallel with the CLPROG resistor so that the switching

regulator can determine the average input current. This

network also provides the dominant pole for the feedback

loop when current limit is reached. To ensure stability, the

capacitor on CLPROG should be 0.1μF or larger.

CDRH6D12 3.3

CDRH6D38 3.3

2.2 0.0625

3.5 0.020

Sumida

www.sumida.com

6.7 × 6.7 × 1.5

7.0 × 7.0 × 4.0

3566fa

19

LTC3566

APPLICATIONS INFORMATION

Buck-Boost Regulator Inductor Selection

Different core materials and shapes will change the

size/current and price/current relationship of an induc-

tor. Toroid or shielded pot cores in ferrite or Permalloy

materials are small and do not radiate much energy, but

generally cost more than powdered iron core inductors

with similar electrical characteristics. Inductors that are

very thin or have a very small volume typically have much

higher core and DCR losses, and will not give the best ef-

ﬁciency. The choice of which style inductor to use often

depends more on the price vs size, performance and any

radiated EMI requirements than on what the LTC3566

requires to operate.

Many different sizes and shapes of inductors are avail-

able from numerous manufacturers. Choosing the right

inductor from such a large selection of devices can be

overwhelming, but following a few basic guidelines will

make the selection process much simpler.

The buck-boost converter is designed to work with induc-

tors in the range of 1μH to 5μH. For most applications a

2.2μH inductor will sufﬁce. Larger value inductors reduce

ripplecurrentwhichimprovesoutputripplevoltage.Lower

valueinductorsresultinhigherripplecurrentandimproved

transient response time. To maximize efﬁciency, choose

an inductor with a low DC resistance. For a 3.3V output,

efﬁciency is reduced about 3% for a 100mΩ series resis-

tance at 1A load current, and about 2% for 300mΩ series

resistance at 200mA load current. Choose an inductor

with a DC current rating at least 2 times larger than the

maximum load current to ensure that the inductor does

notsaturateduringnormaloperation.Ifoutputshortcircuit

is a possible condition, the inductor should be rated to

handle the 2.5A maximum peak current speciﬁed for the

buck-boost converter.

The inductor value also has an effect on Burst Mode op-

eration. Lower inductor values will cause the Burst Mode

operation switching frequencies to increase.

Table 5 shows several inductors that work well with the

LTC3566’s buck-boost regulator. These inductors offer a

good compromise in current rating, DCR and physical

size. Consult each manufacturer for detailed information

on their entire selection of inductors.

Table 5. Recommended Inductors for Buck-Boost Regulator

INDUCTOR TYPE

L (μH)

MAX I (A)

MAX DCR (ꢀ)

MANUFACTURER

SIZE IN mm (L × W × H)

DC

LPS4018

3.3

2.2

2.5

0.08

0.07

Coilcraft

www.coilcraft.com

3.9 × 3.9 × 1.7

D53LC

2.0

2.2

2.0

3.25

0.02

0.028

0.044

0.045

Toko

5.0 × 5.0 × 3.0

4.8 × 4.8 × 2.8

4.7 × 4.7 × 2.4

5.2 × 5.2 × 1.45

www.toko.com

7440430022

CDRH4D22/HP

SD14

2.5

Würth Elektronik

www.we-online.com

2.4

Sumida

www.sumida.com

2.56

Cooper

www.cooperet.com

3566fa

20

LTC3566

APPLICATIONS INFORMATION

V

and V

Bypass Capacitors

from the vendor the actual capacitance to determine if the

selected capacitor meets the minimum capacitance that

the application requires.

BUS

OUT

The style and value of capacitors used with the LTC3566

determineseveralimportantparameterssuchasregulator

control-loop stability and input voltage ripple. Because

the LTC3566 uses a step-down switching power supply

Buck-Boost Regulator Input/Output Capacitor

Selection

from V

to V , its input current waveform contains

BUS

OUT

Low ESR MLCC capacitors should be used at both the

high frequency components. It is strongly recommended

buck-boost regulator output (V

) and the buck-boost

that a low equivalent series resistance (ESR) multilayer

OUT1

regulator input supply (V ). Only X5R or X7R ceramic

ceramic capacitor be used to bypass V . Tantalum and

IN1

BUS

capacitors should be used because they retain their ca-

pacitance over wider voltage and temperature ranges than

other ceramic types. A 22μF output capacitor is sufﬁcient

formostapplications.Thebuck-boostregulatorinputsup-

ply should be bypassed with a 2.2μF capacitor. Consult

with capacitor manufacturers for detailed information on

their selection and speciﬁcations of ceramic capacitors.

Many manufacturers now offer very thin (<1mm tall)

ceramic capacitors ideal for use in height restricted de-

signs. Table 6 shows a list of several ceramic capacitor

manufacturers.

aluminum capacitors are not recommended because of

their high ESR. The value of the capacitor on V

directly

BUS

controls the amount of input voltage ripple for a given load

current. Increasing the size of this capacitor will reduce

the input voltage ripple.

To prevent large V

voltage steps during transient load

OUT

conditions, it is also recommended that a ceramic capaci-

tor be used to bypass V . The output capacitor is used

OUT

in the compensation of the switching regulator. At least

4μF of actual capacitance with low ESR are required on

V

. Additional capacitance will improve load transient

OUT

performance and stability.

Table 6. Recommended Ceramic Capacitor Manufacturers

MANUFACTURER

AVX

WEBSITE

Multilayer ceramic chip capacitors typically have excep-

tional ESR performance. MLCCs combined with a tight

board layout and an unbroken ground plane will yield very

good performance and low EMI emissions.

www.avxcorp.com

www.murata.com

www.t-yuden.com

www.vishay.com

www.tdk.com

Murata

Taiyo Yuden

Vishay Siliconix

TDK

There are several types of ceramic capacitors available,

each having considerably different characteristics. For

example, X7R ceramic capacitors have the best voltage

and temperature stability. X5R ceramic capacitors have

apparentlyhigherpackingdensitybutpoorerperformance

over their rated voltage and temperature ranges. Y5V

ceramic capacitors have the highest packing density,

but must be used with caution, because of their extreme

nonlinear characteristic of capacitance vs voltage. The

actual in-circuit capacitance of a ceramic capacitor should

be measured with a small AC signal (ideally less than

200mV) as is expected in-circuit. Many vendors specify

Over-Programming the Battery Charger

The USB high power speciﬁcation allows for up to 2.5W to

bedrawnfromtheUSBport(5Vx500mA).ThePowerPath

switching regulator transforms the voltage at V

to just

BUS

abovethevoltageatBATwithhighefﬁciency,whilelimiting

power to less than the amount programmed at CLPROG.

In some cases the battery charger may be programmed

(withthePROGpin)todeliverthemaximumsafecharging

current without regard to the USB speciﬁcations. If there

is insufﬁcient current available to charge the battery at the

programmed rate, the PowerPath regulator will reduce

the capacitance vs voltage with a 1V

AC test signal and

RMS

as a result overstate the capacitance that the capacitor will

present in the application. Using similar operating condi-

tions as the application, the user must measure or request

charge current until the system load on V

is satisﬁed

OUT

3566fa

21

LTC3566

APPLICATIONS INFORMATION

and the V

current limit is satisﬁed. Programming the

R

NOM

= Primary thermistor bias resistor (see Figure 4a)

BUS

battery charger for more current than is available will

not cause the average input current limit to be violated.

It will merely allow the battery charger to make use of

all available power to charge the battery as quickly as

possible, and with minimal power dissipation within the

battery charger.

R1 = Optional temperature range adjustment resistor

(see Figure 4b)

The trip points for the LTC3566’s temperature qualiﬁca-

tion are internally programmed at 0.349 • V

for the hot

BUS

threshold and 0.765 • V

for the cold threshold.

BUS

Therefore, the hot trip point is set when:

Alternate NTC Thermistors and Biasing

R_NTC|HOT

The LTC3566 provides temperature qualiﬁed charging if

a grounded thermistor and a bias resistor are connected

to NTC. By using a bias resistor whose value is equal to

the room temperature resistance of the thermistor (R25)

the upper and lower temperatures are pre-programmed

to approximately 40°C and 0°C, respectively (assuming

a Vishay “Curve 1” thermistor).

• V_BUS= 0.349• V_BUS

R_NOM+R_NTC|HOT

and the cold trip point is set when:

R_NTC|COLD

• V_BUS= 0.765• V_BUS

R_NOM+R_NTC|COLD

The upper and lower temperature thresholds can be ad-

justed by either a modiﬁcation of the bias resistor value

or by adding a second adjustment resistor to the circuit.

If only the bias resistor is adjusted, then either the upper

or the lower threshold can be modiﬁed but not both. The

other trip point will be determined by the characteristics

of the thermistor. Using the bias resistor in addition to an

adjustmentresistor,boththeupperandthelowertempera-

ture trip points can be independently programmed with

the constraint that the difference between the upper and

lower temperature thresholds cannot decrease. Examples

of each technique follow.

SolvingtheseequationsforR

in the following:

andR

results

NTC|COLD

NTC|HOT

R

= 0.536 • R

NTC|HOT

NOM

and

R

= 3.25 • R

NTC|COLD

NOM

By setting R

equal to R25, the above equations result

NOM

= 0.536 and r

in r

= 3.25. Referencing these ratios

HOT

COLD

to the Vishay Resistance-Temperature Curve 1 chart gives

a hot trip point of about 40°C and a cold trip point of about

0°C. The difference between the hot and cold trip points

is approximately 40°C.

NTC thermistors have temperature characteristics which

areindicatedonresistance-temperatureconversiontables.

TheVishay-DalethermistorNTHS0603N011-N1003F,used

in the following examples, has a nominal value of 100k

and follows the Vishay “Curve 1” resistance-temperature

characteristic.

By using a bias resistor, R

, different in value from

NOM

R25, the hot and cold trip points can be moved in either

direction.Thetemperaturespanwillchangesomewhatdue

to the nonlinear behavior of the thermistor. The following

equations can be used to easily calculate a new value for

the bias resistor:

In the explanation below, the following notation is used.

R25 = Value of the thermistor at 25°C

r_HOT

R_NOM

=

•R25

0.536

r

R

= Value of thermistor at the cold trip point

NTC|COLD

R_NOM

^COLD•R25

3.25

= Value of thermistor at the hot trip point

NTC|HOT

r

= Ratio of R

to R25

COLD

NTC|COLD

= Ratio of R

to R25

HOT

NTC|HOT

3566fa

22

LTC3566

APPLICATIONS INFORMATION

where r

and r

are the resistance ratios at the de-

HOT

COLD

3.266−0.4368

R_NOM

=

•100k =104.2k

sired hot and cold trip points. Note that these equations

are linked. Therefore, only one of the two trip points can

be chosen, the other is determined by the default ratios

designed in the IC. Consider an example where a 60°C

hot trip point is desired.

2.714

The nearest 1% value is 105k

R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k

The nearest 1% value is 12.7k. The ﬁnal solution is shown

in Figure 4b and results in an upper trip point of 45°C and

a lower trip point of 0°C.

FromtheVishayCurve1R-Tcharacteristics,r is0.2488

HOT

should be set

at 60°C. Using the above equation, R

NOM

to 46.4k. With this value of R

, the cold trip point is

NOM

about 16°C. Notice that the span is now 44°C rather than

the previous 40°C. This is due to the decrease in “tem-

perature gain” of the thermistor as absolute temperature

increases.

USB Inrush Limiting

When a USB cable is plugged into a portable product,

the inductance of the cable and the high-Q ceramic input

capacitor form an L-C resonant circuit. If the cable does

not have adequate mutual coupling or if there is not much

impedance in the cable, it is possible for the voltage at

the input of the product to reach as high as twice the USB

voltage (~10V) before it settles out. To prevent excessive

voltagefromdamagingtheLTC3566duringahotinsertion,

it is best to have a low voltage coefﬁcient capacitor at the

The upper and lower temperature trip points can be in-

dependently programmed by using an additional bias

resistor as shown in Figure 4b. The following formulas

can be used to compute the values of R

and R1:

NOM

r_COLD−r

R_NOM

=

^HOT•R25

2.714

R1 = 0.536 • R

V

BUS

pintotheLTC3566. Thisisachievablebyselectingan

MLCC capacitor that has a higher voltage rating than that

requiredfortheapplication. Forexample, a16V, X5R, 10μF

capacitor in a 1206 case would be a more conservative

choice than a 6.3V, X5R, 10μF capacitor in a smaller 0805

– r

• R25

HOT

NOM

For example, to set the trip points to 0°C and 45°C with

a Vishay Curve 1 thermistor choose:

LTC3566

NTC BLOCK

V

BUS

LTC3566

NTC BLOCK

V

BUS

0.765 • V

BUS

R

NOM

105k

NTC

NOM

–

+

–

+

100k

TOO_COLD

TOO_HOT

TOO_COLD

TOO_HOT

NTC

3

R

R1

12.7k

NTC

100k

–

+

–

+

0.349 • V

BUS

R

NTC

100k

+

–

+

–

NTC_ENABLE

0.017 • V

BUS

3566 F04a

3566 F04b

(b)

(a)

Figure 4. NTC Circuits

3566fa

23

LTC3566

APPLICATIONS INFORMATION

case. The size of the input overshoot will be determined

Where C

is the output ﬁlter capacitor.

OUT

by the “Q” of the resonant tank circuit formed by C and

IN

The output ﬁlter zero is given by:

the input lead inductance. It is recommended to measure

the input ringing with the selected components to verify

compliance with the Absolute Maximum speciﬁcations.

1

f _{FILTER _ ZERO}

=

Hz

2• π •R_ESR•C_OUT

Alternatively, the following soft connect circuit (Figure 5)

can be employed. In this circuit, capacitor C1 holds MP1

off when the cable is ﬁrst connected. Eventually C1 begins

to charge up to the USB input voltage applying increasing

gate support to MP1. The long time constant of R1 and

C1 prevent the current from building up in the cable too

fast thus dampening out any resonant overshoot.

where R

tance.

is the capacitor equivalent series resis-

ESR

Atroublesomefeatureinboostmodeistheright-halfplane

zero (RHP), and is given by:

2

V_IN1

f _RHPZ

=

Hz

2•π •I_OUT•L • V_OUT1

Buck-Boost Regulator Output Voltage Programming

The loop gain is typically rolled off before the RHP zero

frequency.

The buck-boost regulator can be programmed for output

voltages greater than 2.75V and less than 5.5V. The output

voltage is programmed using a resistor divider from the

A simple Type I compensation network (as shown in

Figure 6), can be incorporated to stabilize the loop but

at the cost of reduced bandwidth and slower transient

response. To ensure proper phase margin, the loop must

cross unity-gain a decade before the LC double pole.

V

pin connected to the FB1 pin such that:

OUT1

⎛

⎞

R1

V_OUT1= V_FB1

+1

⎜

⎟

R

⎝

⎠

FB

The unity-gain frequency of the error ampliﬁer with the

Type I compensation is given by:

where V is ﬁxed at 0.8V (see Figure 6).

FB1

Closing the Feedback Loop

1

f _UG

=

Hz

TheLTC3566incorporatesvoltagemodePWMcontrol.The

control to output gain varies with operation region (buck,

boost, buck-boost), but is usually no greater than 20. The

output ﬁlter exhibits a double pole response given by:

2• π •R1•C_P1

Mostapplicationsdemandanimprovedtransientresponse

toallowasmalleroutputﬁltercapacitor.Toachieveahigher

bandwidth, Type III compensation is required. Two zeros

are required to compensate for the double-pole response.

Type III compensation also reduces any V

seen at start-up.

1

f _{FILTER _POLE}

=

Hz

2• π • L •C_OUT

overshoot

OUT1

The compensation network depicted in Figure 7 yields the

transfer function:

MP1

Si2333

V

BUS

C1

V_C1

1

5V USB

INPUT

100nF

=

•

C2

10μF

USB CABLE

LTC3566

V_OUT1R1• C1+C2

(

)

R1

40k

1+sR2C2 • 1+s(R1+R3)C3

(

) (

)

GND

sR2C1C2

C1+C2

⎛

⎞

3566 F05

s• 1+

• 1+sR3C3

(

⎜

⎟

⎠

⎝

Figure 5. USB Soft Connect Circuit

3566fa

24

LTC3566

APPLICATIONS INFORMATION

A Type III compensation network attempts to introduce

a phase bump at a higher frequency than the LC double

pole. This allows the system to cross unity gain after the

LC double pole, and achieve a higher bandwidth. While

attempting to cross over after the LC double pole, the

system must still cross over before the boost right-half

plane zero. If unity gain is not reached sufﬁciently before

the right-half plane zero, then the –180° of phase lag from

the LC double pole combined with the –90° of phase lag

from the right-half plane zero will result in negating the

phase bump of the compensator.

Recommended Type III compensation components for a

3.3V output:

R1: 324kΩ

R : 105kΩ

FB

C1: 10pF

R2: 15kΩ

C2: 330pF

R3: 121kΩ

C3: 33pF

The compensator zeros should be placed either before

or only slightly after the LC double pole such that their

positive phase contributions offset the –180° that occurs

at the ﬁlter double pole. If they are placed at too low of a

frequency, theywillintroducetoomuchgaintothesystem

and the crossover frequency will be too high. The two high

frequency poles should be placed such that the system

crosses unity gain during the phase bump introduced by

the zeros and before the boost right-half plane zero and

such that the compensator bandwidth is less than the

bandwidth of the error amp (typically 900 kHz). If the gain

of the compensation network is ever greater than the gain

of the error ampliﬁer, then the error ampliﬁer no longer

acts as an ideal op-amp, another pole will be introduced

and at the same point.

C

: 22μF

OUT

L

: 2.2μH

OUT

Printed Circuit Board Layout Considerations

In order to be able to deliver maximum current under

all conditions, it is critical that the Exposed Pad on the

backside of the LTC3566 package be soldered to the PC

board ground. Failure to make thermal contact between

the Exposed Pad on the backside of the package and the

copper board will result in higher thermal resistances.

Furthermore, duetoitshighfrequencyswitchingcircuitry,

it is imperative that the input capacitors, inductors, and

output capacitors be as close to the LTC3566 as possible

V

OUT1

0.8V

FB1

+

–

V

OUT1

R3

C3

R1

ERROR

AMP

0.8V

FB1

+

–

R1

ERROR

AMP

C2

R

FB

V

C1

R2

C

R

P1

V

FB

C1

3566 F07

C1

3566 F06

Figure 6. Error Ampliﬁer with Type I Compensation

Figure 7. Error Ampliﬁer with Type III Compensation

3566fa

25

LTC3566

APPLICATIONS INFORMATION

1. Are the capacitors at V , V , and V

as close

OUT1

BUS IN1

as possible to the LTC3566? These capacitors provide

the AC current to the internal power MOSFETs and their

drivers. Minimizing inductance from these capacitors to

the LTC3566 is a top priority.

2.AreC andL1closelyconnected?The(-)plateofC

OUT

returns current to the GND plane, and then back to C .

IN

3566 F08

3. Keep sensitive components away from the SW pins.

Battery Charger Stability Considerations

Figure 8. Higher Frequency Ground Currents Follow Their Incident

Path. Slices in the Ground Plane Cause High Voltage and Increased

Emissions.

The LTC3566’s battery charger contains both a constant-

voltageandaconstant-currentcontrolloop.Theconstant-

voltage loop is stable without any compensation when a

battery is connected with low impedance leads. Excessive

lead length, however, may add enough series inductance

to require a bypass capacitor of at least 1μF from BAT to

GND. Furthermore, when the battery is disconnected, a

4.7μF capacitor in series with a 0.2Ω to 1Ω resistor from

BAT to GND is required to keep ripple voltage low.

and that there be an unbroken ground plane under the

LTC3566andallofitsexternalhighfrequencycomponents.

Highfrequencycurrents,suchastheV ,V ,andV

BUS IN1

OUT1

currents on the LTC3566, tend to ﬁnd their way along the

ground plane in a myriad of paths ranging from directly

back to a mirror path beneath the incident path on the

top of the board. If there are slits or cuts in the ground

plane due to other traces on that layer, the current will be

forcedtogoaroundtheslits.Ifhighfrequencycurrentsare

not allowed to ﬂow back through their natural least-area

path, excessive voltage will build up and radiated emis-

sions will occur. There should be a group of vias under

the grounded backside of the package leading directly

down to an internal ground plane. To minimize parasitic

inductance, the ground plane should be on the second

layer of the PC board.

High value, low ESR multilayer ceramic chip capacitors

reduce the constant-voltage loop phase margin, possibly

resulting in instability. Ceramic capacitors up to 22μF may

beusedinparallelwithabattery,butlargerceramicsshould

be decoupled with 0.2Ω to 1Ω of series resistance.

In constant-current mode, the PROG pin is in the feed-

back loop rather than the battery voltage. Because of the

additional pole created by any PROG pin capacitance,

capacitance on this pin must be kept to a minimum. With

no additional capacitance on the PROG pin, the battery

charger is stable with program resistor values as high

as 25k. However, additional capacitance on this node

reduces the maximum allowed program resistor. The pole

frequency at the PROG pin should be kept above 100kHz.

Therefore, if the PROG pin has a parasitic capacitance,

The GATE pin for the external ideal diode controller has

extremely limited drive current. Care must be taken to

minimize leakage to adjacent PC board traces. 100nA of

leakage from this pin will introduce an offset to the 15mV

ideal diode of approximately 10mV. To minimize leakage,

the trace can be guarded on the PC board by surrounding

C

, the following equation should be used to calculate

it with V

connected metal, which should generally be

PROG

OUT

the maximum resistance value for R

:

less than one volt higher than GATE.

PROG

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3566.

1

R_PROG

≤

2π •100kHz •C_PROG

3566fa

26

LTC3566

TYPICAL APPLICATIONS

Direct Pin Controlled LTC3566 USB Power Manager with 3.3V/1A Buck-Boost

L1

3.3μH

TO

OTHER

LOADS

USB

4.5V TO 5.5V

V

SW

OUT

BUS

C1

10μF

C2

22μF

100k

V

LTC3566

NTC

GATE

BAT

OPTIONAL

Li-Ion

1k

+

100k

T

PROG

GND

CLPROG

CHRG

2k

0.1μF 3.01k

V

IN1

2.2μF

33pF

SWAB1

L2

2.2μH

PARTS LIST

C1: MURATA GRM21BR61A/06KE19

C2,C3: TAIYO-YUDEN JMK212BJ226MG

L1: COILCRAFT LPS4018-332MLC

L2: COILCRAFT LPS4018-222MLC

LDO3V3

3.3V/1A

DISK DRIVE

SWCD1

1μF

121k

324k

C3

22μF

V

OUT1

FB1

CHRGEN

330pF

10pF

15k

MODE

EN1

V

C1

TO DIGITAL

CONTROLLER

GND

ILIM

105k

2

3566 TA02

PACKAGE DESCRIPTION

UF Package

24-Lead Plastic QFN (4mm × 4mm)

(Reference LTC DWG # 05-08-1697 Rev B)

BOTTOM VIEW—EXPOSED PAD

R = 0.115

PIN 1 NOTCH

R = 0.20 TYP OR

0.35 s 45o CHAMFER

0.75 p 0.05

4.00 p 0.10

(4 SIDES)

TYP

23 24

0.70 p 0.05

PIN 1

TOP MARK

(NOTE 6)

0.40 p 0.10

1

2

4.50 p 0.05

3.10 p 0.05

2.45 p 0.05

(4 SIDES)

2.45 p 0.10

(4-SIDES)

PACKAGE

OUTLINE

(UF24) QFN 0105

0.25 p 0.05

0.50 BSC

0.200 REF

0.25 p 0.05

0.00 – 0.05

0.50 BSC

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

3566fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

27

LTC3566

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

V : 2.5V to 5.5V, V : 2.5V to 5.5V

LTC3440

600mA (I ), 2MHz Synchronous Buck-

OUT

IN

OUT

Boost DC/DC Converter

I = 25μA, ISD < 1μA, MS, DFN Package

Q

LTC3441/

LTC3442

1.2A (I ), Synchronous Buck-Boost DC/DC V : 2.5V to 5.5V, V : 2.4V to 5.25V

OUT IN OUT

Converters, LTC3441 (1MHz), LTC3443

I = 25μA, ISD < 1μA, MS, DFN Package

Q

(600kHz)

LTC3442

LTC3455

LTC3538

LTC3550

1.2A (I ), 2MHz Synchronous Buck-Boost V : 2.4V to 5.5V, V : 2.4V to 5.25V

OUT IN OUT

DC/DC Converter

I = 28μA, ISD < 1μA, MS Package

Q

Dual DC/DC Converter with USB Power

Management and Li-Ion Battery Charger

Efﬁciency >96%, Accurate USB Current Limiting (500mA/100mA),

4mm × 4mm QFN-24 Package

800mA, 2MHz Synchronous Buck-Boost

DC/DC Converter

V : 2.4V to 5.5V, V : 1.8V to 5.25V

IN OUT

Q

I = 35μA, 2mm × 3mm DFN-8 Package

Dual Input USB/AC Adapter Li-Ion Battery

Charger with adjustable output 600mA Buck

Converter

Synchronous Buck Converter, Efﬁciency: 93%, Adjustable Output at 600mA; Charge

Current: 950mA Programmable, USB Compatible, Automatic Input Power Detection and

Selection, 3mm × 5mm DFN-16 Package

LTC3550-1

LTC3552

Dual Input USB/AC Adapter Li-Ion Battery

Charger with 600mA Buck Converter

Synchronous Buck Converter, Efﬁciency: 93%, Output: 1.875V at 600mA; Charge

Current: 950mA Programmable, USB Compatible, Automatic Input Power Detection and

Selection, 3mm × 5mm DFN-16 Package

Standalone Linear Li-Ion Battery Charger

with Adjustable Output Dual Synchronous

Buck Converter

Synchronous Buck Converter, Efﬁciency: >90%, Adjustable Outputs at 800mA and

400mA; Charge Current Programmable Up to 950mA, USB Compatible,

3mm × 5mm DFN-16 Package

LTC3552-1

LTC3555

Standalone Linear Li-Ion Battery Charger

with Dual Synchronous Buck Converter

Synchronous Buck Converter, Efﬁciency: >90%, Output: 1.8V at 800mA, 1.575V at

400mA; Charge Current Programmable Up to 950mA, USB Compatible,

3mm × 5mm DFN-16 Package

Switching USB Power Manager with Li-Ion/

Polymer Charger, Triple Synchronous Buck

Converter Plus LDO

Complete Multi-Function PMIC: Switchmode Power Manager and Three Buck

Regulators Plus LDO; Charge Current Programmable Up to 1.5A from Wall Adapter

Input, Thermal Regulation, Synchronous Buck Converters Efﬁciency: >95%, ADJ

Outputs: 0.8V to 3.6V at 400mA/400mA/1A Bat-Track Adaptive Output Control, 200mΩ

Ideal Diode, 4mm × 5mm QFN-28 Package

LTC3556

Switching USB Power Manager with Li-Ion/

Complete Multi-Function PMIC: Switching Power Manager, 1A Buck-Boost + 2 Buck

Polymer Charger, 1A Buck-Boost + Dual Sync Regulators + LDO, ADJ Out Down to 0.8V at 400mA/400mA/1A, Synchronous Buck/

Buck Converter + LDO

Buck-Boost Converter Efﬁciency: >95%; Charge Current Programmable up to 1.5A from

Wall Adapter Input, Thermal Regulation, Bat-Track Adaptive Output Control, 180mΩ

Ideal Diode, 4mm × 5mm QFN-28 Package

LTC3557/

LTC3557-1

USB Power Manager with Li-Ion/Polymer

Charger, Triple Synchronous Buck Converter

Plus LDO

Complete Multi-Function PMIC: Linear Power Manager and Three Buck Regulators,

Charge Current Programmable Up to 1.5A from Wall Adapter Input, Thermal Regulation,

Synchronous Buck Converters Efﬁciency: >95%, ADJ Output: 0.8V to 3.6V at 400mA/

400mA/600mA, Bat-Track Adaptive Output Control, 200mΩ Ideal Diode, 4mm × 4mm

QFN-28 Package

LTC3559

Linear USB Li-Ion/Polymer Battery Charger

with Dual Synchronous Buck Converters

Adjustable Synchronous Buck Converters, Efﬁciency: >90%, Outputs: Down to 0.8V at

400mA for Each, Charge Current Programmable Up to 950mA, USB Compatible,

3mm × 3mm QFN-16 Package

LTC4055

LTC4067

LTC4085

USB Power Controller and Battery Charger

Charges Single-Cell Li-Ion Batteries Directly From USB Port,

Thermal Regulation, 4mm × 4mm QFN-16 Package

Linear USB Power Manager with OVP,

Ideal Diode Controller and Li-Ion Charger

13V Overvoltage Transient Protection, Thermal Regulation 200mΩ Ideal Diode with

<50mΩ Option, 3mm × 4mm QFN-14 Package

Linear USB Power Manager with Ideal Diode Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,

Controller and Li-Ion Charger

200mΩ Ideal Diode with <50mΩ Option,

3mm × 4mm QFN-14 Package

LTC4088/

LTC4088-1/

LTC4088-2

High Efﬁciency USB Power Manager and

Battery Charger

Maximizes Available Power from USB Port, Bat-Track, “Instant-On” Operation, 1.5A

Maximum Charge Current, 180mΩ Ideal Diode with <50mΩ Option, 3.3V/25mA Always-

On LDO, 3mm × 4mm DFN-14 Package

LTC4090

High Voltage USB Power Manager with Ideal High Efﬁciency 1.2A Charger from 6V to 38V (60V Maximum) Input Charges Single Cell

Diode Controller and High Efﬁciency Li-Ion

Battery Charger

Li-Ion Batteries Directly from a USB Port, Thermal Regulation; 200mΩ Ideal Diode with

<50mΩ option, 3mm × 6mm DFN-22 Package Bat-Track Adaptive Output Control

3566fa

LT 0508 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

28

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3566EUF-PBF
厂家：	Linear
描述：	High Effi ciency USB Power Manager Plus 1A Buck-Boost Converter 高艾菲效率USB电源管理器加上1A降压 - 升压型转换器转换器
文件：	总28页 (文件大小：262K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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