LTC3576EUFE-1-PBF [Linear]
Switching Power Manager with USB On-the-Go + Triple Step-Down DC/DCs; 开关电源管理器与USB的On-the -去+三降压型DC / DC型号: | LTC3576EUFE-1-PBF |
厂家: | Linear |
描述: | Switching Power Manager with USB On-the-Go + Triple Step-Down DC/DCs |
文件: | 总48页 (文件大小:582K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC3576/LTC3576-1
Switching Power Manager
with USB On-the-Go + Triple
Step-Down DC/DCs
FEATURES
DESCRIPTION
The LTC®3576/LTC3576-1 are highly integrated power
n
Bidirectional Switching Regulator with Bat-
Track™ Adaptive Output Control Provides Efficient management and battery charger ICs for Li-Ion/Polymer
Charging and a 5V Output for USB On-The-Go
Bat-Track Control of External High Voltage Step-
Down Switching Regulator
battery applications. They each include a high efficiency,
bidirectional switching PowerPath™ manager with auto-
maticloadprioritization,abatterycharger,anidealdiode,a
controller for an external high voltage switching regulator
andthreegeneralpurposestep-downswitchingregulators
n
n
n
n
Overvoltage Protection Guards Against Damage
“Instant-On” Operation with Discharged Battery
2
2
Triple Step-Down Switching Regulators with I C
with I C adjustable output voltages. The internal switch-
Adjustable Outputs (1A/400mA/400mA I
)
ing regulators automatically limit input current for USB
compatibility and can also generate 5V at 500mA for USB
on-the-go applications when powered from the battery.
BoththeUSBandexternalswitchingregulatorpowerpaths
featureBat-Trackoptimizedchargingtoprovidemaximum
180mΩ Internal Ideal Diode + ExternalOIUdTeal Diode
Controller Powers the Load in Battery Mode
n
n
n
n
Li-Ion/Polymer Battery Charger (1.5A Max I
Battery Float Voltage: 4.2V (LTC3576), 4.1V (LTC3576-1)
)
CHG
Compact (4mm × 6mm × 0.75mm) 38-pin QFN Package power to the application from supplies as high as 38V. An
overvoltage circuit protects the LTC3576/LTC3576-1 from
APPLICATIONS
damageduetohighvoltageontheV
orWALLpinswith
BUS
justtwoexternalcomponents.TheLTC3576/LTC3576-1are
available in a low profile 38-pin (4mm × 6mm × 0.75mm)
QFN package.
n
HDD-Based Media Players
n
GPS, PDAs, Digital Cameras, Smart Phones
n
Automotive Compatible Portable Electronics
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Bat-Track
and PowerPath are trademarks of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6522118, 6404251.
TYPICAL APPLICATION
High Efficiency PowerPath Manager with Overvoltage Protection
and Triple Step-Down Regulator
AUTOMOTIVE
LT3653
FIREWIRE, ETC.
PowerPath Switching Regulator Efficiency
to System Load (PVOUT/PVBUS
)
USB OR
5V AC
ADAPTER
OVERVOLTAGE
PROTECTION
EXTERNAL HIGH VOLTAGE
BUCK CONTROLLER
100
90
80
70
60
50
40
30
20
10
0
TO OTHER
LOADS
USB COMPLIANT
BIDIRECTIONAL
SWITCHING
BAT = 4.2V
BAT = 3.3V
REGULATOR
CC/CV
0V
OPTIONAL
BATTERY
CHARGER
CHARGE
LTC3576/LTC3576-1
+
Li-Ion
T
V
I
= 5V
BUS
= 0mA
BAT
10x MODE
3.3V/20mA
RTC/LOW
ALWAYS ON LDO
POWER LOGIC
10
100
1000
0.8V TO 3.6V/400mA
0.8V TO 3.6V/400mA
LOAD CURRENT (mA)
1
2
3
MEMORY
I/O
TRIPLE
HIGH EFFICIENCY
STEP-DOWN
SWITCHING
REGULATORS
6
3576 TA01b
ENABLE
CONTROLS
0.8V TO 3.6V/1A
CORE
μPROCESSOR
RST
2
2
2
I C
I C PORT
3576 TA01
3576f
1
LTC3576/LTC3576-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2, 3)
TOP VIEW
V
, WALL (Transient) t < 1ms,
BUS
Duty Cycle < 1% .......................................... –0.3V to 7V
V
V
, WALL (Static), BAT, V , V , V
,
38 37 36 35 34 33 32
BUS
IN1 IN2 IN3
CLPROG
LDO3V3
NTCBIAS
NTC
1
2
3
4
5
6
7
8
9
31 IDGATE
, ENOTG, NTC, SDA, SCL, DV ,
OUT
CC
30 CHRG
RST3, CHRG ................................................ –0.3V to 6V
, I .........–0.3V to Max(V , V , BAT) + 0.3V
PROG
29
28
I
LIM0 ILIM1
BUS OUT
ACPR
EN1, EN2, EN3 ...............................–0.3V to V
+ 0.3V
OUT
INx
OVGATE
OVSENS
FB1
27 WALL
FBx (x = 1, 2, 3) ..............................–0.3V to V + 0.3V
V
26
25 FB2
24
C
39
I
I
I
I
I
I
...................................................................10mA
OVSENS
CLPROG
CHRG RST3
PROG
LDO3V3
SW1 SW2
I , I
....................................................................3mA
V
V
IN1
IN2
SW1
23 SW2
22 EN2
21 RST3
, I
............................................................50mA
EN1 10
........................................................................2mA
ENOTG 11
...................................................................30mA
20
FB3
DV
CC
12
, I
(Continuous).......................................600mA
13 14 15 16 17 18 19
UFE PACKAGE
, I , I
(Continuous)..............................2A
SW SW3 BAT VOUT
Maximum Junction Temperature........................... 125°C
Operating Temperature Range.................. –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
38-LEAD (4mm s 6mm) PLASTIC QFN
T
JMAX
= 125°C, θ = 34°C/W
JA
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3576EUFE#PBF
LTC3576EUFE-1#PBF
TAPE AND REEL
PART MARKING
3576
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3576EUFE#TRPBF
LTC3576EUFE-1#TRPBF
–40°C to 85°C
–40°C to 85°C
38-Lead (4mm × 6mm) Plastic QFN
38-Lead (4mm × 6mm) Plastic QFN
35761
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PowerPath Switching Regulator—Step-Down Mode
V
I
Input Supply Voltage
Total Input Current
4.35
5.5
V
BUS
l
l
l
l
l
82
440
800
0.32
1.6
90
100
500
1000
0.5
mA
mA
mA
mA
mA
1× Mode
VBUS(LIM)
472
880
0.39
2.05
5× Mode
10× Mode
Low Power Suspend Mode
High Power Suspend Mode
2.5
I
(Note 4) Input Quiescent Current
7
mA
mA
mA
1× Mode
VBUSQ
17
5×, 10× Modes
0.045
Low/High Power Suspend Modes
3576f
2
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
h
Ratio of Measured V
Current to
1x Mode
210
1160
2200
9.6
mA/mA
mA/mA
mA/mA
mA/mA
mA/mA
CLPROG
BUS
(Note 4)
CLPROG Program Current
5x Mode
10x Mode
Low Power Suspend Mode
High Power Suspend Mode
56
I
V
Current Available Before
OUT
1x Mode, BAT = 3.3V
121
667
1217
0.31
2
mA
mA
mA
mA
mA
VOUT(POWERPATH)
Discharging Battery
5x Mode, BAT = 3.3V
10x Mode, BAT = 3.3V
Low Power Suspend Mode
High Power Suspend Mode
0.26
1.6
0.41
2.4
V
V
V
V
CLPROG Servo Voltage in Current Limit
Switching Modes
Suspend Modes
1.18
100
V
CLPROG
UVLO
mV
V
Undervoltage Lockout
Rising Threshold
Falling Threshold
4.30
4.00
4.35
V
V
BUS
BUS
3.95
V
to BAT Differential Undervoltage
Rising Threshold
Falling Threshold
200
50
mV
mV
DUVLO
OUT
Lockout
V
Voltage
1x, 5x, 10x Modes, 0V < BAT < 4.2V,
OUT
I
= 0mA, Battery Charger Off
3.4
4.5
BAT + 0.3
4.6
4.7
4.7
V
V
VOUT
USB Suspend Modes, I
= 250μA
VOUT
f
Switching Frequency
PMOS On-Resistance
1.8
2.25
0.18
2.7
MHz
ꢀ
OSC
R
PMOS_
POWERPATH
R
NMOS On-Resistance
0.30
ꢀ
NMOS_
POWERPATH
I
Peak Inductor Current Limit
1x Mode (Note 5)
5x Mode (Note 5)
10x Mode (Note 5)
1
2
3
A
A
A
PEAK_POWERPATH
R
Suspend LDO Output Resistance
Closed Loop
10
ꢀ
SUSP
PowerPath Switching Regulator—Step-Up Mode (USB On-the-Go)
V
BUS
V
OUT
Output Voltage
Input Voltage
0mA ≤ I
≤ 500mA, V > 3.2V
OUT
4.75
2.9
5.25
5.5
V
V
VBUS
l
I
Output Current Limit
BUS
550
–150
680
0
mA
nA
VBUS
V
Leakage Current in Shutdown
On-the-Go Disabled, V < UVLO
BUS
150
I
I
Peak Inductor Current Limit
Quiescent Current
(Note 5)
1.8
A
mA
V
PEAK
V
V
V
= 3.8V, I = 0mA (Note 6)
VBUS
1.38
1.15
OTGQ
OUT
OUT
V
V
Output Current Limit Servo Voltage
CLPROG
V
V
UVLO—V
UVLO—V
Falling
Rising
2.5
2.6
2.8
V
V
OUT(UVLO)
OUT
OUT
OUT
OUT
2.9
t
Short-Circuit Fault Delay
< 4V and PMOS Switch Off
7.2
ms
SCFAULT
BUS
Bat-Track Switching Regulator Control
V
Absolute WALL Input Threshold
Rising Threshold
Hysteresis
4.2
0
4.3
1.1
4.4
45
V
V
WALL
Differential WALL Input Threshold
WALL-BAT Falling
Hysteresis
30
60
mV
mV
ΔV
WALL
V
Regulation Target Under V Control
3.55
BAT + 0.3
100
V
μA
ꢀ
OUT
C
I
WALL Quiescent Current
ACPR Pull-Down Strength
ACPR High Voltage
WALLQ
R
100
ACPR
V
V
V
OUT
V
HACPR
LACPR
ACPR Low Voltage
0
V
3576f
3
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Overvoltage Protection
V
V
Overvoltage Protection Threshold
OVGATE Output Voltage
With 6.2k Series Resistor
6.1
6.35
6.7
12
V
OVCUTOFF
OVGATE
V
V
< V
> V
1.88•V
V
V
OVSENS
OVSENS
OVCUTOFF
OVCUTOFF
OVSENS
0
t
OVGATE Time to Reach Regulation
BAT Regulated Output Voltage
OVGATE C
= 1nF
LOAD
1.25
ms
RISE
Battery Charger
V
LTC3576
4.179
4.165
4.200
4.200
4.221
4.235
V
V
FLOAT
l
l
LTC3576-1
4.079
4.065
4.100
4.100
4.121
4.135
V
V
I
I
Constant Current Mode Charger Current
Battery Drain Current
R
R
= 1k
= 5k
980
185
1030
206
1065
223
mA
mA
CHG
BAT
PROG
PROG
V
VOUT
> V
, Suspend Mode,
UVLO
3.6
6
μA
BUS
I
= 0μA
= 0V, I
V
= 0μA
VOUT
28
45
μA
BUS
(Ideal Diode Mode)
V
V
V
PROG Pin Servo Voltage
1.000
0.100
100
1030
100
2.85
135
–100
4
V
V
PROG
PROG_TRKL
C/10
PROG Pin Servo Voltage in Trickle Charge BAT < V
C/10 Threshold Voltage at PROG
TRKL
mV
h
Ratio of I to PROG Pin Current
mA/mA
mA
PROG
BAT
I
Trickle Charge Current
BAT < V
, R
= 1k
TRKL
TRKL PROG
V
TRKL
Trickle Charge Threshold Voltage
Trickle Charge Hysteresis Voltage
Recharge Battery Threshold Voltage
Safety Timer Termination Period
Bad Battery Termination Time
End of Charge Current Ratio
CHRG Pin Output Low Voltage
CHRG Pin Leakage Current
BAT Rising
2.7
3.0
V
mV
ΔV
ΔV
TRKL
Threshold Voltage Relative to V
–75
3.3
–125
5
mV
FLOAT
RECHRG
t
t
Timer Starts When V = V
Hour
Hour
mA/mA
mV
TERM
BADBAT
BAT
FLOAT
BAT < V
0.4
0.5
0.6
0.112
100
1
TRKL
h
(Note 7)
0.085
0.1
C/10
V
I
= 5mA
= 5V
65
CHRG
CHRG
CHRG
I
V
μA
CHRG
R
Battery Charger Power FET On-
0.18
110
ꢀ
ON_CHG
Resistance (Between V
and BAT)
OUT
T
LIM
Junction Temperature in Constant
Temperature Mode
°C
NTC
V
Cold Temperature Fault Threshold Voltage Rising Threshold
Hysteresis
75
76.5
1.5
78
%NTCBIAS
%NTCBIAS
COLD
V
V
Hot Temperature Fault Threshold Voltage Falling Threshold
Hysteresis
33.4
0.7
34.9
1.5
36.4
2.7
50
%NTCBIAS
%NTCBIAS
HOT
NTC Disable Threshold Voltage
Falling Threshold
Hysteresis
1.7
50
%NTCBIAS
mV
DIS
I
NTC Leakage Current
NTC = NTCBIAS = 5V
–50
nA
NTC
Ideal Diode
V
Forward Voltage
I
I
= 10mA
15
mV
ꢀ
FWD
VOUT
R
Internal Diode On-Resistance Dropout
Diode Current Limit
= 200mA
0.18
DROPOUT
VOUT
I
2
A
MAX_DIODE
3576f
4
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Always On 3.3V LDO Supply
V
Regulated Output Voltage
0mA < I < 20mA
LDO3V3
3.1
3.3
2.7
23
3.5
V
ꢀ
ꢀ
LDO3V3
R
R
Closed-Loop Output Resistance
Dropout Output Resistance
CL_LDO3V3
OL_LDO3V3
Logic (I
, I
, EN1, EN2, EN3, ENOTG, and SCL, SDA when DV = 0V)
LIM0 LIM1
CC
V
V
Logic Low Input Voltage
Logic High Input Voltage
0.4
5.5
V
V
IL
IH
1.2
1.6
I
I
, I , EN1, EN2, EN3, ENOTG, SCL,
LIM0 LIM1
2
μA
PD1
SDA Pull-Down Current
2
I C Port
DV
Input Supply
V
μA
V
CC
I
DV Current
CC
SCL/SDA = 0kHz, DV = 3.3V
0.5
1.0
DVCC
CC
V
DV UVLO
CC
DVCC(UVLO)
2
ADDRESS
V , SDA, SCL
I C Address
0001001[0]
Input High Threshold
Input Low Threshold
Pull-Down Current
70
%DV
%DV
IH
CC
CC
V , SDA, SCL
IL
30
I
, SDA, SCL
PD2
2
μA
V
V
Digital Output Low (SDA)
Clock Operating Frequency
I
= 3mA
0.4
OL
SCL
BUF
SDA
f
t
400
kHz
μs
Bus Free Time Between Stop and Start
Condition
1.3
0.6
t
Hold Time After (Repeated) Start
Condition
μs
HD_STA
t
t
t
t
t
t
t
t
t
t
Repeated Start Condition Setup Time
Stop Condition Setup Time
Data Hold Time Output
Data Hold Time Input
Data Setup Time
0.6
0.6
0
μs
μs
ns
ns
ns
μs
μs
ns
ns
ns
SU_STA
SU_STO
HD_DAT(O)
HD_DAT(I)
SU_DAT
LOW
900
0
100
1.3
0.6
20
20
SCL Low Period
SCL High Period
HIGH
SDA/SCL Fall Time
300
300
50
f
SDA/SCL Rise Time
r
Input Spike Suppression Pulse Width
SP
General Purpose Switching Regulators 1, 2 and 3
V
V
Input Supply Voltage
(Note 8)
Connected to V Through
OUT
2.7
2.5
5.5
2.9
V
IN1,2,3
V
V
UVLO—V
UVLO—V
Falling
Rising
V
2.6
2.8
V
V
OUT(UVLO)
OUT
OUT
OUT
OUT
IN1,2,3
Low Impedance. Switching
Regulators are Disabled in UVLO
f
I
Switching Frequency
FBx Input Current
1.8
–50
100
2.25
2.7
50
MHz
nA
OSC
V
= 0.85V
FB1,2,3
FB1,2,3
D1,2,3
Maximum Duty Cycle
SWx Pull-Down in Shutdown
%
R
10
kꢀ
SW1,2,3_PD
3576f
5
LTC3576/LTC3576-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, BAT = 3.8V, DVCC = 3.3V, RCLPROG = 3.01k, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
90
MAX
UNITS
μA
μA
μA
μA
V
I
Pulse Skip Mode Input Current
Burst Mode® Input Current
LDO Mode Input Current
Shutdown Input Current Limit
Maximum Servo Voltage
Minimum Servo Voltage
I
I
I
I
= 0μA (Note 9)
= 0μA (Note 9)
= 0μA (Note 9)
= 0μA, FB1,2,3 = 0V
VIN1,2,3
OUT1,2,3
OUT1,2,3
OUT1,2,3
OUT1,2,3
20
35
25
15
1
l
V
V
V
Full Scale (1,1,1,1) (Note 10)
Zero Scale (0,0,0,0) (Note 10)
0.78
0.80
0.425
25
0.82
0.445
FBHIGH1,2,3
FBLOW1,2,3
LSB1,2,3
0.405
V
V
Servo Voltage Step Size
mV
ꢀ
FB1,2
R
R
LDO Mode Closed-Loop R
V
= V = 0.8V
OUT1,2 3
0.25
2.5
LDO_CL1,2,3
OUT
FB1,2,3
LDO Mode Open-Loop R
(Note 11)
ꢀ
LDO_OL1,2,3
OUT
General Purpose Switching Regulator 1 and 2
I
PMOS Switch Current Limit
Pulse Skip/Burst Mode Operation
(Note 5)
600
50
900
1300
2800
mA
LIM1,2
I
Available Output Current
LDO Mode
mA
ꢀ
OUT1,2
R
R
PMOS R
NMOS R
0.6
0.7
P1,2
DS(ON)
ꢀ
N1,2
DS(ON)
General Purpose Switching Regulator 3
I
PMOS Switch Current Limit
Pulse Skip/Burst Mode Operation
(Note 5)
1300
50
1800
mA
LIM3
I
Available Output Current
LDO Mode
mA
ꢀ
OUT3
R
R
PMOS R
NMOS R
0.18
0.3
P3
DS(0N)
ꢀ
N3
DS(ON)
t
Power-On Reset Time for Switching
Regulator
V
Within 92% of Final Value to
230
ms
RST3
FB3
RST3 Hi-Z
Burst Mode is a registered trademark of Linear Technology Corporation.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 5: The current limit features of this part are intended to protect the
IC from short term or intermittent fault conditions. Continuous operation
above the maximum specified pin current rating may result in device
degradation or failure.
Note 2: The LTC3576E/LTC3576E-1 are guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 6: The bidirectional switcher’s supply current is bootstrapped to V
BUS
and in the application will reflect back to V
by (V /V ) •
BUS OUT
OUT
1/efficiency. Total quiescent current is the sum of the current into the
pin plus the reflected current.
V
OUT
Note 3: The LTC3576E/LTC3576E-1 include overtemperature protection
that is intended to protect the device during momentary overload
conditions. Junction temperature will exceed 125°C when overtemperature
protection is active. Continuous operation above the specified maximum
operating junction temperature may impair device reliability.
Note 7: h
current with indicated PROG resistor.
Note 8: V not in UVLO.
Note 9: FBx above regulation such that regulator is in sleep. Specification
does not include resistive divider current reflected back to V
Note 10: Applies to pulse skip and Burst Mode operation only.
Note 11: Inductor series resistance adds to open-loop R
is expressed as a fraction of the measured full charge
C/10
OUT
.
INx
Note 4: Total input current is the sum of quiescent current, I
, and
VBUSQ
measured current given by V /R
CLPROG
• (h
+ 1).
CLPROG
CLPROG
.
OUT
3576f
6
LTC3576/LTC3576-1
T = 25°C unless otherwise specified.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Ideal Diode Resistance
VOUT Voltage vs Load Current
Ideal Diode V-I Characteristics
vs Battery Voltage
(Battery Charger Disabled)
1.0
0.8
0.6
0.4
0.2
0
0.25
0.20
0.15
0.10
0.05
0
4.50
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
BAT = 4V
4.25
4.00
INTERNAL IDEAL
DIODE
INTERNAL IDEAL
DIODE ONLY
BAT = 3.4V
3.75
INTERNAL IDEAL DIODE
WITH SUPPLEMENTAL
EXTERNAL VISHAY
Si2333 PMOS
3.50
3.25
V
= 5V
BUS
0
0.04
0.08
0.12
0.16
0.20
2.7
3.0
3.3
3.6
3.9
4.2
0
0.1 0.2 0.3
0.6 0.7 0.8 0.9 1.0
0.4 0.5
FORWARD VOLTAGE (V)
BATTERY VOLTAGE (V)
LOAD CURRENT (A)
3576 G01
3576 G02
3576 G03
USB Limited Load Current vs Battery
Voltage (Battery Charger Disabled)
Battery and VBUS Currents
vs Load Current
Battery Charge Current vs
Temperature
750
500
250
900
600
500
400
300
200
100
0
R = 2k
PROG
V
= 5V
BUS
800
700
600
500
400
300
200
100
5x MODE
V
CURRENT
BUS
THERMAL REGULATION
BATTERY CURRENT
(CHARGING)
0
–250
–500
V
= 5V
BUS
BAT = 3.8V
5x MODE
R
R
= 3.01k
BATTERY CURRENT
(DISCHARGING)
CLPROG
= 1k
PROG
0
60 80
TEMPERATURE (°C)
–40 –20
0
20 40
100 120
0
100 200 300 400 500 600 700 800 9001000
2.7
3.9
4.2
3.0
3.3
3.6
LOAD CURRENT (mA)
BATTERY VOLTAGE (V)
3576 G06
3576 G05
3576 G04
Battery Charging Efficiency vs
Battery Voltage with No External
PowerPath Switching Regulator
Transient Response
PowerPath Switching Regulator
Efficiency vs Load Current
Load (PBAT/PVBUS
)
100
90
80
70
60
50
40
30
95
90
85
80
75
70
65
60
55
R
R
= 3.01k
CLPROG
PROG
= 1k
V
OUT
50mV/DIV
1x MODE
1x MODE
AC COUPLED
5x, 10x MODE
I
VOUT
500mA/DIV
0mA
5x MODE
3576 G07
V
V
= 5V
20μs/DIV
BUS
OUT
= 3.65V
CHARGER OFF
10x MODE
50
10
1000
100
2.7
3.9
4.2
3.0
3.3
3.6
LOAD CURRENT (mA)
BATTERY VOLTAGE (V)
3576 G08
3576 G09
3576f
7
LTC3576/LTC3576-1
T = 25°C unless otherwise specified.
A
TYPICAL PERFORMANCE CHARACTERISTICS
VBUS Quiescent Current vs
VOUT Voltage vs Load Current in
Suspend
VBUS Current vs Load Current in
Suspend
V
BUS Voltage (Suspend)
60
50
5.0
4.5
4.0
3.5
3.0
2.5
2.5
2.0
1.5
1.0
0.5
0
V
= 5V
BUS
BAT = 3.3V
= 3.01k
HIGH POWER SUSPEND
R
CLPROG
40
30
HIGH POWER
SUSPEND
LOW POWER SUSPEND
20
10
0
LOW POWER SUSPEND
V
= 5V
BAT = 3.3V
BUS
R
= 3.01k
CLPROG
0
1
2
3
4
5
0
0.5
1.0
1.5
2.0
2.5
0
0.5
1.0
1.5
2.0
2.5
BUS VOLTAGE (V)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3576 G10
3576 G11
3576 G12
Battery Charge Current vs VOUT
Voltage
V
OUT Voltage vs Battery Voltage
Normalized Battery Charger Float
Voltage vs Temperature
(Charger Overprogrammed)
1.001
1.000
0.999
0.998
0.997
0.996
600
500
400
300
200
100
0
4.7
4.5
4.3
4.1
3.9
3.7
3.5
3.3
3.1
2.9
2.7
R
R
= 3.01k
V
I
R
R
= 5V
= 0V
CLPROG
PROG
5x MODE
BUS
VOUT
= 2k
= 3.01k
CLPROG
PROG
= 1k
5x MODE
1x MODE
3.65 3.70
3.40 3.45 3.50 3.55 3.60
3.75 3.80
–40
–15
10
35
60
85
2.7
3.0
3.3
3.6
3.9
4.2
V
(V)
OUT
TEMPERATURE (°C)
BATTERY VOLTAGE (V)
3576 G13
3576 G15
3576 G14
VBUS Quiescent Current vs
Temperature
VBUS Quiescent Current in
Suspend vs Temperature
Battery Drain Current vs
Temperature
60
50
35
30
25
20
15
10
5
25
20
15
10
5
V = 5V
BUS
V
= 5V
BUS
5x MODE
40
30
20
10
0
1x MODE
BAT = 3.8V
= 0V
V
BUS
SWITCHING
REGULATORS OFF
0
0
–40
–15
10
35
60
85
–40
–15
10
35
60
TEMPERATURE (°C)
85
–40
–15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
3576 G17
3576 G18
3576 G16
3576f
8
LTC3576/LTC3576-1
T = 25°C unless otherwise specified.
A
TYPICAL PERFORMANCE CHARACTERISTICS
OTG Boost Quiescent Current
vs VOUT Voltage
OTG Boost Efficiency
vs Load Current
100
OTG Boost VBUS Voltage
vs Load Current
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
90
80
70
60
V
= 4.75V
BUS
I
= 500mA
VBUS
V
V
V
V
= 5V
V
V
V
V
= 5V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
= 4.4V
= 3.8V
= 3.2V
= 4.4V
= 3.8V
= 3.2V
50
40
2.90
3.55
4.20
(V)
4.85
5.50
0
100 200 300 400 500 600 700
LOAD CURRENT (mA)
1
10
LOAD CURRENT (mA)
100
1000
V
OUT
3576 G20
3576 G19
3576 G21
OTG Boost Start-Up Time into
Current Source Load vs VOUT
Voltage
OTG Boost Efficiency
vs VOUT Voltage
OTG Boost Burst Mode Current
Threshold vs VOUT Voltage
400
300
200
100
0
2.50
2.25
2.00
1.75
95
90
85
80
75
70
500mA LOAD
100mA LOAD
22μF ON V , 22μF AND
BUS
LOAD THROUGH OVP
RISING THRESHOLD
FALLING THRESHOLD
22μF ON V
,
BUS
NO OVP
22μF ON V
,
BUS
LOAD THROUGH OVP
1.50
4.20
(V)
4.85
2.90
5.50
3.55
2.9
3.4
3.9
V
4.4
(V)
4.9
5.4
3.55
4.20
(V)
4.85
2.90
5.50
V
OUT
V
OUT
OUT
3576 G24
3576 G23
3576 G22
OTG Boost Start-Up into Current
Source Load
OTG Boost Transient Response
OTG Boost Burst Mode Operation
V
BUS
50mV/DIV
V
AC COUPLED
BUS
50mV/DIV
I
VBUS
AC COUPLED
200mA/DIV
V
SW
1V/DIV
0mA
I
VBUS
V
200mA/DIV
BUS
2V/DIV
0V
0mA
0V
3576 G26
3576 G27
3576 G25
V
I
= 3.8V
= 500mA
200μs/DIV
V
I
= 3.8V
= 10mA
50μs/DIV
V
= 3.8V
20μs/DIV
OUT
LOAD
OUT
LOAD
OUT
3576f
9
LTC3576/LTC3576-1
T = 25°C unless otherwise specified.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Battery Charging from USB-HV
BUCK-USB
Oscillator Frequency vs
Temperature
USB OTG from BAT-HV BUCK-BAT
2.30
2.25
2.20
2.15
V
V
OUT
OUT
1V/DIV
1V/DIV
AC COUPLED
AC COUPLED
V
V
BUS
BUS
100mV/DIV
200mV/DIV
AC COUPLED
AC COUPLED
V
SW
I
BAT
1A/DIV
5V/DIV
0V
0A
HVOK
5V/DIV
HVOK
5V/DIV
0V
V
V
V
V
V
= 5V
OUT
OUT
OUT
OUT
OUT
= 4.2V
= 3.6V
= 3V
0V
2.10
3576 G28
3576 G29
V
= 5V
500μs/DIV
V
I
= 3.8V
500μs/DIV
BUS
BAT
BUS
HV = 12V
IN
= 285mA
= 2.7V
USING LT3653
HV = 12V
IN
2.05
USING LT3653
–40
–15
10
35
60
85
TEMPERATURE (°C)
3576 G30
Rising OVP Threshold vs
Temperature
OVP Connect Waveform
OVP Disconnect Waveform
6.280
6.275
6.270
6.265
6.260
6.255
V
BUS
V
BUS
5V/DIV
5V/DIV
OVGATE
5V/DIV
OVGATE
5V/DIV
OVP INPUT
VOLTAGE
5V TO 10V
STEP 5V/DIV
OVP INPUT
VOLTAGE
0V TO 5V
STEP 5V/DIV
3576 G32
3576 G31
500μs/DIV
500μs/DIV
–40
–15
10
35
60
85
TEMPERATURE (°C)
3576 G33
OVGATE Quiescent Current vs
Temperature
RST3, CHRG Pin Current vs
OVGATE vs OVSENS
Voltage (Pull-Down State)
12
10
37
35
33
31
29
27
100
80
60
40
20
0
V
= 5V
OVSENS CONNECTED
TO INPUT THROUGH
6.2k RESISTOR
V
= 5V
BUS
OVSENS
BAT = 3.8V
8
6
4
2
0
–15
10
35
60
85
0
1
2
3
4
5
0
2
4
6
8
–40
INPUT VOLTAGE (V)
TEMPERATURE (°C)
RST3, CHRG PIN VOLTAGE (V)
3576 G34
3576 G35
3576 G36
3576f
10
LTC3576/LTC3576-1
T = 25°C unless otherwise specified.
A
TYPICAL PERFORMANCE CHARACTERISTICS
3.3V LDO Output Voltage vs
Load Current, VBUS = 0V
3.3V LDO Step Response
(5mA to 15mA)
Battery Drain Current vs
Battery Voltage
35
3.4
3.2
3.0
2.8
2.6
I
= 0mA
BAT = 3.4V
VOUT
BAT = 3.9V, 4.2V
BAT = 3.5V
BAT = 3.6V
30
I
LDO3V3
V
= 0V
BUS
5mA/DIV
25
20
15
10
5
0mA
V
LDO3V3
20mV/DIV
AC COUPLED
BAT = 3V
V
= 5V
BUS
BAT = 3.1V
BAT = 3.2V
BAT = 3.3V
3576 G38
(SUSPEND MODE)
BAT = 3.8V
20μs/DIV
0
2.7
3.0
3.3
3.6
4.2
3.9
0
5
10
15
20
25
BATTERY VOLTAGE (V)
LOAD CURRENT (mA)
3576 G39
3576 G37
Switching Regulator Soft-Start
Waveform
Switching Regulator Current Limit
vs Temperature
RDS(ON) for Switching Regulator
Power Switches vs Temperature
2.0
1.5
1.0
0.5
0
1.0
0.8
0.6
0.4
0.2
0
REGULATOR 3
REGULATORS 1, 2
NMOS SWITCH
PMOS SWITCH
REGULATOR 3
REGULATORS 1, 2
NMOS SWITCH
PMOS SWITCH
3576 G40
50μs/DIV
V
= 3.8V
IN1,2,3
–40
–15
10
35
60
85
–40
–15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
3576 G42
3576 G41
Switching Regulators 1, 2
Pulse-Skip Mode Efficiency
Switching Regulators 1, 2
Burst Mode Efficiency
Switching Regulator Low Power
Quiescent Currents vs Temperature
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 2.5V
V
= 3.8V
V
= 3.8V
OUT1,2
IN3
IN3
V
= 2.5V
OUT1,2
PULSE-SKIP MODE
V
= 1.2V
OUT1,2
V
= 1.2V
OUT1,2
= 1.8V
V
= 1.8V
OUT1,2
V
OUT1,2
Burst Mode OPERATION
LDO MODE
0.1
1
10
100
1000
0.1
1
10
100
1000
–40
–15
10
35
60
85
LOAD CURRENT (mA)
LOAD CURRENT (mA)
TEMPERATURE (°C)
3576 G44
3576 G45
3576 G43
3576f
11
LTC3576/LTC3576-1
T = 25°C unless otherwise specified.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Regulator Constant
Frequency Quiescent Currents
Switching Regulator 3
Switching Regulator 3
Burst Mode Efficiency
100
Pulse-Skip Mode Efficiency
100
90
80
70
60
50
40
30
20
10
0
8
7
6
5
V
= 3.8V
V
= 2.5V
OUT3
V
= 3.8V
IN3
IN3
90
80
70
60
50
40
30
20
10
0
SWITCHING
REGULATOR 3
V
= 2.5V
OUT3
V
= 1.2V
OUT3
V
= 1.8V
OUT3
V
= 1.8V
OUT3
V
= 1.2V
OUT3
4
3
SWITCHING
REGULATORS 1, 2
2
1
0
–15
10
TEMPERATURE (°C)
60
0.1
1
10
100
1000
–40
85
35
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3576 G48
3576 G47
3576 G46
Switching Regulator Mode
Transition, Pulse Skip-LDO-
Pulse Skip
Switching Regulators 1, 2
Feedback Voltage vs Load Current
Switching Regulators 1, 2
Transient Response
0.820
V
Burst Mode
OPERATION
OUT3
V
0.815
0.810
OUT2
50mV/DIV
50mV/DIV
AC COUPLED
AC COUPLED
PULSE-SKIP
MODE
0.805
0.800
I
OUT2
V
SW3
200mA/DIV
1V/DIV
0V
0mA
3576 G50
3576 G51
0.795
0.790
V
V
= 3.8V
50μs/DIV
IN2
OUT2
V
V
= 3.8V
50μs/DIV
IN3
= 3.4V
= 1.8V
OUT3
OUT3
I
= 50mA
0.1
1
10
100
1000
LOAD CURRENT (mA)
3576 G49
Switching Regulator Mode
Transition, Pulse Skip–Burst
Mode Operation–Pulse Skip
Switching Regulator 3 Feedback
Voltage vs Load Current
Switching Regulator 3
Transient Response
0.810
0.805
0.800
V
OUT3
V
OUT3
50mV/DIV
AC COUPLED
50mV/DIV
Burst Mode
OPERATION
AC COUPLED
I
OUT3
V
500mA/DIV
SW3
1V/DIV
0V
PULSE SKIP MODE
0mA
0.795
0.790
3576 G54
3576 G53
V
V
= 3.8V
50μs/DIV
V
V
= 3.8V
50μs/DIV
IN3
IN3
OUT3
= 1.8V
= 1.8V
OUT3
OUT3
I
= 100mA
0.1
1
10
100
1000
LOAD CURRENT (mA)
3576 G52
3576f
12
LTC3576/LTC3576-1
PIN FUNCTIONS
CLPROG (Pin 1): USB Current Limit Program and Monitor
Pin. A 1% resistor from CLPROG to ground determines
the upper limit of the current drawn or sourced from the
be connected to V
and the drain should be connected
BUS
to the product’s DC input connector. In the absence of an
overvoltage condition, this pin is connected to an internal
chargepumpcapableofcreatingsufficientoverdrivetofully
enhance the pass transistor. If an overvoltage condition is
detected, OVGATE is brought rapidly to GND to prevent
damage to the LTC3576/LTC3576-1. OVGATE works in
conjunction with OVSENS to provide this protection.
V
pins. A precise fraction, h
, of the V
CLPROG
cur-
BUS
BUS
rent is sent to the CLPROG pin when the PMOS switch of
the PowerPath switching regulator is on. The switching
regulator delivers power until the CLPROG pin reaches
1.18V in step-down mode and 1.15V in step-up mode.
When the switching regulator is in step-down mode,
CLPROG is used to regulate the average input current.
OVSENS (Pin 6): Overvoltage Protection Sense Input.
OVSENS should be connected through a 6.2k resistor to
the input power connector and the drain of an external
N-channel MOS pass transistor. When the voltage on this
Several V
current limit settings are available via user
BUS
input which will typically correspond to the 500mA and
100mA USB specifications. When the switching regulator
is in step-up mode (USB on-the-go), CLPROG is used to
limit the average output current to 680mA. A multilayer
ceramic averaging capacitor or R-C network is required
at CLPROG for filtering.
pin exceeds
V
, the OVGATE pin will be pulled
OVCUTOFF
to GND to disable the pass transistor and protect the
LTC3576/LTC3576-1. The OVSENS pin shunts current
during an overvoltage transient in order to keep the pin
voltage at 6V.
LDO3V3 (Pin 2): 3.3V LDO Output Pin. This pin provides
FB1 (Pin 7): Feedback Input for Switching Regulator 1.
Whenregulator1’scontrolloopiscomplete,thispinservos
to 1 of 16 possible set points based on the commanded
a regulated always-on 3.3V supply voltage. LDO3V3
gets its power from V . It may be used for light loads
OUT
such as a watchdog microprocessor or real time clock.
A 1μF capacitor is required from LDO3V3 to ground. If
the LDO3V3 output is not used it should be disabled by
2
value from the I C serial port. See Table 4.
V
(Pin 8): Power Input for Switching Regulator 1.
IN1
This pin will generally be connected to V . A 1μF MLCC
connecting it to V
.
OUT
OUT
capacitor is recommended on this pin.
NTCBIAS (Pin 3): NTC Thermistor Bias Output. If NTC
operation is desired, connect a bias resistor between
NTCBIAS and NTC, and an NTC thermistor between NTC
and GND. To disable NTC operation, connect NTC to GND
and leave NTCBIAS open.
SW1 (Pin 9): Power Transmission Pin for Switching
Regulator 1.
EN1 (Pin 10): Logic Input. This logic input pin indepen-
dently enables switching regulator 1. Active high. This
pin is logically ORed with its corresponding bit in the
NTC (Pin 4): Input to the Thermistor Monitoring Circuits.
TheNTCpinconnectstoanegativetemperaturecoefficient
thermistor,whichistypicallyco-packagedwiththebattery,
to determine if the battery is too hot or too cold to charge.
If the battery’s temperature is out of range, charging is
paused until it re-enters the valid range. A low drift bias
resistorisrequiredfromNTCBIAStoNTCandathermistor
is required from NTC to ground. To disable NTC operation,
connect NTC to GND and leave NTCBIAS open.
2
I C serial port. See Table 3. Has a 2μA internal pull-down
current source.
ENOTG (Pin 11): Logic Input. This logic input pin inde-
pendently enables the bidirectional switching regulator to
step up the voltage on V
and provide a 5V output on
OUT
V
for USB on-the-go applications. Active high. This
BUS
pin is logically ORed with its corresponding bit in the
2
I C serial port. See Table 3. Has a 2μA internal pull-down
current source.
OVGATE (Pin 5): Overvoltage Protection Gate Output.
Connect OVGATE to the gate pin of an external N-channel
MOS pass transistor. The source of the transistor should
3576f
13
LTC3576/LTC3576-1
PIN FUNCTIONS
2
DV (Pin 12): Logic Supply for the I C Serial Port. If the
to 1 of 16 possible set points based on the commanded
CC
2
serial port is not needed, it can be disabled by grounding
value from the I C serial port. See Table 4.
2
DV . When DV is grounded, the I C bits are set to their
CC
CC
RST3 (Pin 21): Logic Output. This in an open-drain output
which indicates that switching regulator 3 has settled to
its final value. It can be used as a power-on reset for the
primary microprocessor or to enable the other switching
regulators for supply sequencing.
default values. See Table 3.
2
SCL (Pin 13): Clock Input Pin for the I C Serial Port. The
2
I C logic levels are scaled with respect to DV . If DV
CC
CC
is grounded, the SCL pin is equivalent to the C2, C4 and
2
C6 bits in the I C serial port. SCL in conjunction with SDA
EN2 (Pin 22): Logic Input. This logic input pin indepen-
dently enables switching regulator 2. Active high. This
pin is logically ORed with its corresponding bit in the
determine the operating modes of switching regulators 1,
2 and 3 when DV is grounded. See Tables 3 and 5. Has
CC
a 2μA internal pull-down current source.
2
I C serial port. See Table 3. Has a 2μA internal pull-down
2
SDA (Pin 14): Data Input Pin for the I C Serial Port. The
current source.
2
I C logic levels are scaled with respect to DV . If DV
CC
CC
SW2 (Pin 23): Power Transmission Pin for Switching
Regulator 2.
is grounded, the SDA pin is equivalent to the C3, C5 and
2
C7 bits in the I C serial port. SDA in conjunction with SCL
V
(Pin 24): Power Input for Switching Regulator 2.
determine the operating modes of switching regulators 1,
IN2
This pin will generally be connected to V . A 1μF MLCC
2 and 3 when DV is grounded. See Tables 3 and 5. Has
OUT
CC
capacitor is recommended on this pin.
a 2μA internal pull-down current source.
FB2 (Pin 25): Feedback Input for Switching Regulator 2.
Whenregulator2’scontrolloopiscomplete,thispinservos
to 1 of 16 possible set points based on the commanded
NC (Pin 15): Unconnected Pin. This pin is not connected
internally to the part. It is permissible to tie this pin to V
IN3
in order to make the V PCB trace wider.
IN3
2
value from the I C serial port. See Table 4.
V
(Pin 16): Power Input for Switching Regulator 3.
IN3
V (Pin26):Bat-TrackExternalSwitchingRegulatorControl
This pin will generally be connected to V . A 1μF MLCC
C
OUT
Output. This pin drives the V pin of an external Linear
capacitor is recommended on this pin.
C
Technology step-down switching regulator. An external P-
SW3 (Pin 17): Power Transmission Pin for Switching
Regulator 3.
channel MOSFET is sometimes required to provide power
to V
with its gate tied to the ACPR pin (see Applications
OUT
NC (Pin 18): Unconnected Pin. This pin is not connected
internally to the part. It is permissible to tie this pin to SW3
in order to make the SW3 PCB trace wider.
Information). In concert with WALL and ACPR, it will
regulate V to maximize battery charger efficiency
OUT
WALL(Pin27):ExternalPowerSourceSenseInput.WALL
should be connected to the output of the external high
voltage switching regulator and to the drain of an external
P-channel MOSFET if used. It is used to determine when
power is applied to the external regulator. When power
is detected, ACPR is driven low and the USB input is au-
tomatically disabled. Pulling this pin above 4.3V enables
EN3 (Pin 19): Logic Input. This logic input pin indepen-
dently enables switching regulator 3. Active high. This
pin is logically ORed with its corresponding bit in the
2
I C serial port. See Table 3. Has a 2μA internal pull-down
current source.
FB3 (Pin 20): Feedback Input for Switching Regulator 3.
Whenregulator3’scontrolloopiscomplete,thispinservos
the V pin.
C
3576f
14
LTC3576/LTC3576-1
PIN FUNCTIONS
BAT (Pin 32): Single Cell Li-Ion Battery Pin. Depending on
ACPR (Pin 28): External Power Source Present Output
(ActiveLow).ACPRindicatesthattheoutputoftheexternal
high voltage step-down switching regulator is suitable for
use by the LTC3576/LTC3576-1. It should be connected to
the gate of an external P-channel MOSFET whose source
available V
power, a Li-Ion battery on BAT will either
BUS
deliverpowertoV throughtheidealdiodeorbecharged
OUT
from V
via the battery charger.
OUT
VOUT (Pin 33): Output Voltage of the Bidirectional Pow-
erPath Switching Regulator in step-down mode and
Input Voltage of the Battery Charger. The majority of
the portable product should be powered from VOUT. The
LTC3576/LTC3576-1 will partition the available power
between the external load on VOUT and the internal bat-
tery charger. Priority is given to the external load and any
extra power is used to charge the battery. An ideal diode
from BAT to VOUT ensures that VOUT is powered even if
the load exceeds the allotted power from VBUS or if the
VBUS power source is removed. In on-the-go mode, this
pin delivers power to VBUS via the SW pin. VOUT should
be bypassed with a low impedance ceramic capacitor.
is connected to V
and whose drain is connected to
OUT
WALL. ACPR has a high level of V
and a low level of
OUT
GND. The USB bidirectional switcher is disabled when
ACPR is low.
PROG (Pin 29): Charge Current Program and Charge Cur-
rent Monitor Pin. Connecting a 1% resistor from PROG
to ground programs the charge current. If sufficient input
powerisavailableinconstant-currentmode,thispinservos
to 1V. The voltage on this pin always represents the actual
charge current by using the following formula:
VPROG
RPROG
IBAT
=
•1030
V
(Pins 34, 35): Power Pins. These pins deliver power
OUT
BUS
to V
via the SW pin by drawing controlled current from
CHRG (Pin 30): Open-Drain Charge Status Output. The
CHRG pin indicates the status of the battery charger.
Four possible charger states are represented by CHRG:
charging, not charging, unresponsive battery and battery
temperature out of range. In addition, CHRG is used to
a DC source such as a USB port or DC output wall adapter.
In on-the-go mode these pins provide power to external
loads.TiethetwoV
pinstogetheratthepartandbypass
BUS
with a low impedance multilayer ceramic capacitor.
indicate whether there is a short-circuit condition on V
BUS
SW (Pin 36): The SW pin transfers power between V
BUS
when the bidirectional switching regulator is in step-up
mode (on-the-go). CHRG is modulated at 35kHz and
switches between a low and a high duty cycle for easy
recognition by either humans or microprocessors. See
Table 1. CHRG requires a pull-up resistor and/or LED to
provide indication.
and V
via the bidirectional switching regulator. See
OUT
the Applications Information section for a discussion of
inductance value and current rating.
I
,I
(Pins37,38):I
andI
controlthecurrent
LIM0 LIM1
LIM0
LIM1
limit of the PowerPath switching regulator. See Table 1.
Both the I
and I
pins are logically ORed with their
LIM0
LIM1
2
IDGATE (Pin 31): Ideal Diode Amplifier Output. This pin
corresponding bits in the I C serial port. See Tables 3 and
6. Each has a 2μA internal pull-down current source.
controlsthegateofanoptionalexternalP-channelMOSFET
used as an ideal diode between V
and BAT. The external
OUT
Exposed Pad (Pin 39): Ground. The Exposed Pad should
be connected to a continuous ground plane on the second
layer of the printed circuit board by several vias directly
under the LTC3576/LTC3576-1.
idealdiodeoperatesinparallelwiththeinternalidealdiode.
ThesourceoftheP-channelMOSFETshouldbeconnected
to V
and the drain should be connected to BAT. If the
OUT
external ideal diode MOSFET is not used, IDGATE should
be left floating.
3576f
15
LTC3576/LTC3576-1
BLOCK DIAGRAM
V
C
26
OVSENS
OVGATE
6
OVP
5
27 WALL
V
WALL
DETECT
C
V
V
35
34
BUS
BUS
CONTROL
ACPR
28
2.25MHz
BIDIRECTIONAL
PowerPath
SWITCHING
REGULATOR
SW
36
2
LDO3V3
3.3V LDO
SUSPEND LDO
V
33
31
OUT
500μA/2.5mA
+
–
+
+
–
IDGATE
IDEAL
CC/CV
CLPROG
1
–
CHARGER
+
–
+
5.1V
NTCBIAS
NTC
3
4
BATTERY
TEMPERATURE
MONITOR
15mV
0.3V
–
+
–
+
BAT
32
29
3.6V
1.18V
OR 1.15V
PROG
CHRG 30
CHARGE
STATUS
V
8
9
IN1
ENABLE
SW1
FB1
400mA 2.25MHz
BUCK
D/A
D/A
D/A
REGULATOR
7
4
V
24
IN2
ENABLE
23 SW2
400mA 2.25MHz
BUCK
REGULATOR
FB2
25
16
4
I
LIM
DECODE
LOGIC
V
IN3
ENABLE
17 SW3
1A 2.25MHz
BUCK
REGULATOR
I
37
38
LIM0
FB3
20
21
I
LIM1
4
RST3
ENOTG 11
EN1 10
EN2 22
EN3 19
DV 12
CC
2
SDA 14
SCL 13
I C PORT
39
3576 BD
GND
3576f
16
LTC3576/LTC3576-1
TIMING DIAGRAM
SDA
t
t
t
SU,DAT
SU,STA
BUF
t
SU,STO
t
t
t
LOW
HD,STA
HD,DAT
3208 F05
SCL
t
t
SP
t
HIGH
HD,STA
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
t
r
t
f
I2C WRITE PROTOCOL
WRITE ADDRESS
R/W
SUB-ADDRESS
INPUT DATA BYTE
0
0
0
1
0
0
1
1
0
A7
1
A6
2
A5
3
A4
A3
A2
6
A1
7
A0
8
B7
1
B6
2
B5
B4
B3
B2
B1
7
B0
START
STOP
SDA
SCL
0
0
0
1
0
0
0
8
ACK
9
ACK
9
ACK
9
1
2
3
4
5
6
7
4
5
3
4
5
6
8
3576 I2C
3576f
17
LTC3576/LTC3576-1
OPERATION
Introduction
For automotive, firewire, and other high voltage applica-
tions,theLTC3576/LTC3576-1provideBat-Trackcontrolof
anexternalLTCstep-downswitchingregulatortomaximize
battery charger efficiency and minimize heat production.
WhenpowerisavailablefromboththeUSBandanauxiliary
input, the auxiliary input is given priority.
TheLTC3576/LTC3576-1arehighlyintegratedpowerman-
agement ICs designed to make optimal use of the power
availablefromavarietyofsources,whileminimizingpower
dissipation and easing thermal budgeting constraints.
They include a high efficiency bidirectional PowerPath
switching regulator, a controller for an external high volt-
age step-down switching regulator, a battery charger, an
ideal diode, an always-on LDO, an overvoltage protection
circuit and three general purpose step-down switching
regulators. The entire chip is controlled by either direct
The LTC3576/LTC3576-1 contain both an internal 180mΩ
ideal diode as well as an ideal diode controller for use
with an optional external P-channel MOSFET. The ideal
diode(s) from BAT to V
guarantee that ample power
even if there is insufficient or
OUT
is always available to V
absent power at V
OUT
2
digital control or by an I C serial port or both.
or WALL.
BUS
The innovative PowerPath architecture ensures that the
applicationispoweredimmediatelyafterexternalvoltageis
applied,evenwithacompletelydeadbattery,byprioritizing
power to the application.
An “always-on” LDO provides a regulated 3.3V from
available power at V . Drawing very little quiescent
OUT
current, this LDO will be on at all times and can be used
to supply 20mA.
When acting as a step-down converter, the LTC3576/
LTC3576-1’s bidirectional switching regulator takes
power from USB, wall adapters, or other 5V sources and
provides power to the application and efficiently charges
the battery using Bat-Track. Because power is conserved
TheLTC3576/LTC3576-1featureanovervoltageprotection
circuit which is designed to work with an external N-chan-
nel MOSFET to prevent damage to their inputs caused by
accidental application of high voltage.
To prevent battery drain when a device is connected to a
the LTC3576/LTC3576-1 allow the load current on V
to
OUT
suspended USB port, an LDO from V
to V
provides
BUS
OUT
exceed the current drawn by the USB port making maxi-
mumuseoftheallowableUSBpowerforbatterycharging.
For USB compatibility the switching regulator includes
a precision average input current limit. The PowerPath
switching regulator and battery charger communicate to
ensure that the average input current never exceeds the
USB specifications.
either low power or high power USB suspend current to
the application.
The three general purpose switching regulators can be
independently enabled either by direct digital control or
2
2
by operating the I C serial port. Under I C control, all
three switching regulators have adjustable set points so
that voltages can be reduced when high processor perfor-
manceisnotneeded. AlongwithconstantfrequencyPWM
mode, all three switching regulators have automatic Burst
Mode operation and LDO modes for significantly reduced
quiescent current under light load conditions.
Additionally, the bidirectional switching regulator can also
operate as a 5V synchronous step-up converter taking
power from V
and delivering up to 500mA to V
OUT
BUS
without the need for any additional external components.
This enables systems with USB dual-role transceivers to
function as USB on-the-go dual-role devices. True output
disconnect and average output current limit features are
included for short-circuit protection.
3576f
18
LTC3576/LTC3576-1
OPERATION
Bidirectional PowerPath Switching Regulator—
Step-Down Mode
If the combined external load plus battery charge current
is large enough to cause the switching regulator to reach
the programmed input current limit, the battery charger
will reduce its charge current by precisely the amount
necessary to enable the external load to be satisfied. Even
if the battery charge current is programmed to exceed the
allowable USB current, the USB specification for average
input current will not be violated; the battery charger will
reduce its current as needed. Furthermore, if the load cur-
The power delivered from V
to V
is controlled by
BUS
OUT
a 2.25MHz constant frequency bidirectional switching
regulator operating in step-down mode. V drives the
OUT
combination of the external load (step-down switching
regulators 1, 2 and 3) and the battery charger. To meet the
maximum USB load specification, the switching regulator
contains a measurement and control system that ensures
that the average input current remains below the level
programmed at CLPROG.
rent at V
exceeds the programmed power from V
,
OUT
BUS
load current will be drawn from the battery via the ideal
diode(s) even when the battery charger is enabled.
If the combined load does not cause the switching regu-
lator to reach the programmed input current limit, V
will track approximately 0.3V above the battery voltage.
By keeping the voltage across the battery charger at this
low level, power lost to the battery charger is minimized.
Figure 1 shows the power flow in step-down mode.
ThecurrentoutofCLPROGisaprecisefractionoftheV
BUS
OUT
current. When a programming resistor and an averaging
capacitor are connected from CLPROG to GND, the volt-
age on CLPROG represents the average input current of
the switching regulator. As the input current approaches
the programmed limit, CLPROG reaches 1.18V and power
delivered by the switching regulator is held constant.
TO AUTOMOTIVE,
FIREWIRE, ETC.
HIGH VOLTAGE
V
V
SW
FB
IN
STEP-DOWN
SWITCHING
REGULATOR
C
26
27
V
C
WALL
OVERVOLTAGE PROTECTION
OVSENS
OVGATE
–
+
+
–
+
V
6
5
OUT
3.6V
BAT + 0.3V 4.3V
ACPR
–
+
28
6V
s2
+
–
Bat-Track HV CONTROL
3.5V TO
(BAT + 0.3V)
TO SYSTEM LOAD
TO USB
OR WALL
ADAPTER
V
SW
BUS
35
34
36
33
V
BUS
V
OUT
PWM AND
GATE DRIVE
V
BUS
IDEAL
VOLTAGE
DIODE
CONTROLLER
+
–
–
IDGATE
OPTIONAL EXTERNAL
IDEAL DIODE PMOS
I
/N
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
SWITCH
OmV
31
32
–
+
5V
+
15mV
–
+
–
+
+
0.3V
CLPROG
1.18V
1
BAT
+
–
3.6V
AVERAGE V
CURRENT LIMIT
CONTROLLER
INPUT
V
VOLTAGE
BUS
OUT
CONTROLLER
+
SINGLE CELL
Li-Ion
3576 F01
USB INPUT
BATTERY POWER
HV INPUT
Figure 1. PowerPath Block Diagram—Power Available from USB/Wall Adapter
3576f
19
LTC3576/LTC3576-1
OPERATION
4.5
4.2
3.9
3.6
3.3
3.0
2.7
2.4
The input current limit is programmed by the I
and
LIM0
2
I
pins or by the I C serial port. The input current limit
LIM1
has five possible settings ranging from the USB suspend
limit of 500μA up to 1A for wall adapter applications. Two
of these settings are specifically intended for use in the
100mA and 500mA USB applications. Refer to Table 1 for
current limit settings using the I
Table 6 for current limit settings using the I C port.
NO LOAD
300mV
and I
pins and
LIM0
LIM1
2
Table 1. USB Current Limit Settings Using ILIM0 and ILIM1
I
I
USB SETTING
LIM1
LIM0
3.6
4.2
2.4
2.7
3.0
3.3
3.9
0
0
BAT (V)
1× Mode (USB 100mA Limit)
10× Mode (Wall 1A Limit)
Low Power Suspend (USB 500μA Limit)
5× Mode (USB 500mA Limit)
3576 F02
0
1
1
1
0
1
Figure 2. VOUT vs BAT
Forverylow-batteryvoltages,thebatterychargeractslikea
load and, due to limited input power, its current will tend to
When the switching regulator is activated, the average
input current will be limited by the CLPROG programming
resistor according to the following expression:
pull V
OUT
below the 3.6V “Instant On” voltage. To prevent
from falling below this level, an undervoltage circuit
OUT
V
automatically detects that V
is falling and reduces the
OUT
VCLPROG
RCLPROG
battery charge current as needed. This reduction ensures
that load current and voltage are always prioritized while
allowing as much battery charge current as possible. See
OverProgrammingtheBatteryChargerintheApplications
Information section.
IVBUS = IVBUSQ
where I
LTC3576-1, V
current limit, R
+
• h
(
+ 1
)
CLPROG
is the quiescent current of the LTC3576/
CLPROG
VBUSQ
is the CLPROG servo voltage in
is the value of the programming
is the ratio of the measured cur-
CLPROG
The voltage regulation loop is compensated by the ca-
resistor and h
rent at V
CLPROG
pacitance on V . A 10μF MLCC capacitor is required
to the sample current delivered to CLPROG.
OUT
BUS
for loop stability. Additional capacitance beyond this value
Refer to the Electrical Characteristics table for values of
, V and I . Given worst-case circuit
will improve transient response.
h
CLPROG CLPROG
VBUSQ
tolerances, the USB specification for the average input
current in 100mA or 500mA mode will not be violated,
AninternalundervoltagelockoutcircuitmonitorsV and
BUS
rises above
keeps the switching regulator off until V
BUS
provided that R
is 3.01k or greater.
CLPROG
4.30V and is about 200mV above the battery voltage.
Hysteresis on the UVLO turns off the regulator if V
While not in current limit, the switching regulator’s Bat-
Track feature will set V to approximately 300mV above
BUS
falls below 4V or to within 50mV of the battery voltage.
OUT
When this happens, system power at V
from the battery via the ideal diode(s).
will be drawn
the voltage at BAT. However, if the voltage at BAT is below
OUT
3.3V, and the load requirement does not cause the switch-
ing regulator to exceed its current limit, V
will regulate
OUT
Bidirectional PowerPath Switching Regulator—
Step-Up Mode
at a fixed 3.6V as shown in Figure 2. This “instant-on”
operation will allow a portable product to run immediately
when power is applied without waiting for the battery to
For USB on-the-go applications, the bidirectional
PowerPathswitchingregulatoractsasastep-upconverter
charge. If the load does exceed the current limit at V
OUT
,
BUS
V
will range between the no-load voltage and slightly
todeliverpowerfromV
toV .ThepowerfromV
OUT
BUS OUT
below the battery voltage, indicated by the shaded region
of Figure 2.
can come from the battery or the output of the external
3576f
20
LTC3576/LTC3576-1
OPERATION
TO AUTOMOTIVE,
FIREWIRE, ETC.
HIGH VOLTAGE
STEP-DOWN
SWITCHING
REGULATOR
V
V
SW
FB
IN
C
26
27
V
WALL
C
OVERVOLTAGE PROTECTION
OVSENS
–
+
+
–
+
V
6
5
OUT
3.6V
BAT + 0.3V 4.3V
ACPR
–
+
28
6V
OVGATE
s2
+
–
Bat-Track HV CONTROL
3.5V TO
(BAT + 0.3V)
TO SYSTEM LOAD
V
SW
OUT
BUS
TO USB
CABLE
35
34
36
33
V
BUS
V
PWM AND
GATE DRIVE
V
BUS
IDEAL
VOLTAGE
DIODE
CONTROLLER
+
–
IDGATE
OPTIONAL EXTERNAL
IDEAL DIODE PMOS
I
/N
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
SWITCH
OmV
31
32
–
+
–
5V
+
15mV
–
+
–
+
+
0.3V
CLPROG
1.15V
1
BAT
+
–
3.6V
AVERAGE V
CURRENT LIMIT
CONTROLLER
OUTPUT
V
VOLTAGE
BUS
OUT
CONTROLLER
+
SINGLE CELL
Li-Ion
3576 F03
BATTERY POWER
HV INPUT
Figure 3. PowerPath Block Diagram—USB On-the-Go
transient response. The V
3% load regulation up to an output current of 500mA. At
light loads, the switching regulator goes into Burst Mode
operation. The regulator will deliver power to V
reaches 5.1V after which the NMOS and PMOS switches
shut off. The regulator delivers power again to V
it falls below 5.1V.
voltage has approximately
high voltage switching regulator. As a step-up converter,
the bidirectional switching regulator produces 5V on
BUS
BUS
V
and is capable of delivering at least 500mA. USB
until it
on-the-go can be enabled by either the external control
BUS
2
pin, ENOTG, or via I C. Figure 3 shows the power flow
once
in step-up mode.
BUS
An undervoltage lockout circuit monitors V
and pre-
OUT
The switching regulator features both peak inductor and
average output current limit. The peak current mode
architecture limits peak inductor current on a cycle-by-
vents step-up conversion until V
rises above 2.8V. To
OUT
preventbackdrivingofV
wheninputpowerisavailable,
BUS
the V
undervoltage lockout circuit prevents step-up
BUS
cycle basis. The peak current limit is equal to V /2ꢀ to
conversion if V
is greater than 4.3V at the time step-up
BUS
BUS
a maximum of 1.8A so that in the event of a sudden short
circuit, the current limit will fold back to a lower value.
In step-up mode, the voltage on CLPROG represents the
average output current of the switching regulator when
a programming resistor and an averaging capacitor are
connected from CLPROG to GND. With a 3.01k resistor
on CLPROG, the bidirectional switching regulator has an
output current limit of 680mA. As the output current ap-
mode is enabled. The switching regulator is also designed
to allow true output disconnect by eliminating body diode
conduction of the internal PMOS switch. This allows V
BUS
to go to zero volts during a short-circuit condition or while
shut down, drawing zero current from V
.
OUT
The voltage regulation loop is compensated by the capaci-
tance on V . A 4.7μF MLCC is required for loop stability.
BUS
Additional capacitance beyond this value will improve
proachesthislimitCLPROGservosto1.15VandV
falls
BUS
3576f
21
LTC3576/LTC3576-1
OPERATION
is brought low and the Bat-Track control of the LTC3576/
rapidly to V . When V
is close to V
there may not
OUT
BUS
OUT
LTC3576-1 overdrives the local V control of the external
be sufficient negative slope on the inductor current when
the PMOS switch is on to balance the rise in the inductor
current when the NMOS switch is on. This will cause the
inductor current to run away and the voltage on CLPROG
to rise. When CLPROG reaches 1.2V the switching of the
C
high voltage step-down switching regulator. Therefore,
once the Bat-Track control is enabled, the output voltage
is set independent of the switching regulator feedback
network.
synchronous PMOS is terminated and V
is applied
OUT
Bat-Trackcontrolprovidesasignificantefficiencyadvantage
over the simple use of a 5V switching regulator output to
statically to its gate. This ensures that the inductor current
will have sufficient negative slope during the time current
is flowing to the output. The PMOS will resume switching
when CLPROG drops down to 1.15V.
drive the battery charger. With a 5V output driving V
battery charger efficiency is approximately:
,
OUT
V
5V
BAT
TheLTC3576/LTC3576-1maintainvoltageregulationeven
ηTOTAL = ηBUCK
•
if V
is above V . This is achieved by disabling the
OUT
BUS
PMOS switch. The PMOS switch is enabled when V
BUS
where
η
BUCK
istheefficiencyofthehighvoltageswitching
rises above V
+ 180mV and is disabled when it falls
OUT
regulator and 5V is the output voltage of the switching
regulator. With a typical switching regulator efficiency of
87% and a typical battery voltage of 3.8V, the total bat-
tery charger efficiency is approximately 66%. Assuming
a 1A charge current, 1.7W of power is dissipated just to
charge the battery!
below V
+ 70mV to prevent the inductor current from
OUT
running away when not in current limit. Since the PMOS
no longer acts as a low impedance switch in this mode,
there will be more power dissipation within the IC. This
will cause a sharp drop in efficiency.
If V
is less than 4V and the PMOS switch is disabled
BUS
With Bat-Track, battery charger efficiency is approxi-
mately:
for more than 7.2ms a short-circuit fault will be declared
and the part will shut off. The CHRG pin will blink at 35kHz
with a duty cycle that varies between 12% and 88% at a
4Hz rate. See Table 2. To re-enable step-up mode, the
ENOTG pin or, with ENOTG grounded, the B0 bit in the
V
BAT
ηTOTAL = ηBUCK
•
VBAT + 0.3V
2
I C port must be cycled low and then high.
With the same assumptions as above, the total battery
charger efficiency is approximately 81%. This example
works out to less than 1W of power dissipation, or almost
60% less heat.
Bat-TrackAuxiliaryHighVoltageSwitchingRegulator
Control
The WALL, ACPR and
V pins can be used in conjunction
C
See the Typical Applications section for complete circuits
using the LT3480 and the LT3653 with Bat-Track control.
with an external high voltage step-down switching regula-
tor such as the LT®3480 or the LT3653 to minimize heat
production when operating from higher voltage sources,
as shown in Figures 1 and 3. Bat-Track control circuitry
regulatestheexternalswitchingregulator’soutputvoltage
to the larger of (BAT + 300mV) or 3.6V. This maximizes
battery charger efficiency while still allowing instant-on
operation when the battery is deeply discharged.
Ideal Diode(s) from BAT to V
OUT
The LTC3576/LTC3576-1 each have an internal ideal diode
as well as a controller for an optional external ideal diode.
Both the internal and the external ideal diodes are always
on and will respond quickly whenever V
BAT.
drops below
OUT
The feedback network of the high voltage regulator
shouldbesettogenerateanoutputvoltagebetween4.5V
and 5.5V. When high voltage is applied to the external
regulator, WALLwillrisetowardthisprogrammedoutput
voltage. When WALL exceeds approximately 4.3V, ACPR
If the load current increases beyond the power allowed
from the switching regulator, additional power will be
pulled from the battery via the ideal diode(s). Further-
3576f
22
LTC3576/LTC3576-1
OPERATION
2200
2000
1800
1600
1400
1200
thisLDOonlybecomesactivewhentheswitchingconverter
is disabled (suspended). The suspendLDOsends a scaled
VISHAY Si2333
OPTIONAL EXTERNAL
IDEAL DIODE
copy of the V
current to the CLPROG pin, which will
BUS
servo to approximately 100mV in this mode. To remain
compliant with the USB specification, the input to the LDO
is current limited so that it will not exceed the low power
LTC3576/
LTC3576-1
IDEAL DIODE
1000
800
600
400
200
0
or high power suspend specification. If the load on V
OUT
ON
exceeds the suspend current limit, the additional current
SEMICONDUCTOR
MBRM120LT3
will come from the battery via the ideal diode(s).
3.3V Always-On LDO Supply
0
120 180 240 300 360 420 480
60
FORWARD VOLTAGE (mV) (BAT – V
)
OUT
The LTC3576/LTC3576-1 include a low quiescent current
low dropout regulator that is always powered. This LDO
can be used to provide power to a system pushbutton
controller, standby microcontroller or real time clock. De-
signed to deliver up to 20mA, the always-on LDO requires
at least a 1ꢁF low impedance ceramic bypass capacitor
3576 F04
Figure 4. Ideal Diode V-I Characteristics
more, if power to V
(USB or wall adapter) is removed,
BUS
then all of the application power will be provided by the
battery via the ideal diodes. The ideal diode(s) will be fast
for compensation. The LDO is powered from V , and
OUT
enough to keep V
from drooping with only the stor-
OUT
therefore will enter dropout at loads less than 20mA as
age capacitance required for the switching regulator. The
internal ideal diode consists of a precision amplifier that
activates a large on-chip P-channel MOSFET whenever
V
falls near 3.3V. If the LDO3V3 output is not used, it
OUT
should be disabled by connecting it to V
.
OUT
the voltage at V
is approximately 15mV (V
) below
OUT
FWD
Battery Charger
the voltage at BAT. Within the amplifier’s linear range, the
small-signal resistance of the ideal diode will be quite low,
keeping the forward drop near 15mV. At higher current
levels, the MOSFET will be in full conduction.
The LTC3576/LTC3576-1 include a constant-current/con-
stant-voltage battery charger with automatic recharge,
automatic termination by safety timer, low voltage trickle
charging, bad cell detection and thermistor sensor input
for out-of-temperature charge pausing.
To supplement the internal ideal diode, an external
P-channel MOSFET may be added from BAT to V . The
OUT
IDGATE pin of the LTC3576/LTC3576-1 drives the gate of
the external P-channel MOSFET for automatic ideal diode
control. The source of the external P-channel MOSFET
Battery Preconditioning
When a battery charge cycle begins, the battery charger
first determines if the battery is deeply discharged. If the
should be connected to V
and the drain should be con-
OUT
batteryvoltageisbelowV
,typically2.85V,anautomatic
nected to BAT. Capable of driving a 1nF load, the IDGATE
pin can control an external P-channel MOSFET transistor
having an on-resistance of 30mΩ or lower.
TRKL
trickle charge feature sets the battery charge current to
10% of the programmed value. If the low voltage persists
for more than 1/2 hour, the battery charger automatically
terminates and indicates via the CHRG pin that the battery
was unresponsive.
Suspend LDO
IftheLTC3576/LTC3576-1areconfiguredforUSBsuspend
mode,thebidirectionalswitchingregulatorisdisabledand
Oncethebatteryvoltageisabove2.85V,thechargerbegins
charging in full power constant-current mode. The cur-
rent delivered to the battery will try to reach 1030/R
Depending on available input power and external load
conditions, the battery charger may or may not be able
3576f
thesuspendLDOprovidespowertotheV
pin(presum-
OUT
ingthereispoweravailabletoV ). ThisLDOwillprevent
.
BUS
PROG
the battery from running down when the portable product
has access to a suspended USB port. Regulating at 4.6V,
23
LTC3576/LTC3576-1
OPERATION
to charge at the full programmed rate. The external load
will always be prioritized over the battery charge current.
Likewise, the USB current limit programming will always
be observed and only additional power will be available to
charge the battery. When system loads are light, battery
charge current will be maximized.
VPROG
RPROG
ICHG
=
•1030
Ineithertheconstant-currentorconstant-voltagecharging
modes, the voltage at the PROG pin will be proportional to
the actual charge current delivered to the battery. There-
fore, the actual charge current can be determined at any
time by monitoring the PROG pin voltage and using the
following equation:
Charge Termination
The battery charger has a built-in safety timer. When the
voltage on the battery reaches the pre-programmed float
voltage, the battery charger will regulate the battery volt-
age and the charge current will decrease naturally. Once
the battery charger detects that the battery has reached
the float voltage, the four hour safety timer is started.
After the safety timer expires, charging of the battery will
discontinue and no more current will be delivered.
VPROG
RPROG
IBAT
=
•1030
In many cases, the actual battery charge current, I , will
BAT
belowerthanI
duetolimitedinputpoweravailableand
CHG
prioritization with the system load drawn from V
.
OUT
The Battery Charger Flow Chart illustrates the battery
charger’s algorithm.
Automatic Recharge
After the battery charger terminates, it will remain off
drawing only microamperes of current from the battery.
If the portable product remains in this state long enough,
the battery will eventually self discharge. To ensure that
the battery is always topped off, a charge cycle will auto-
matically begin when the battery voltage falls below the
recharge threshold which is typically 100mV less than
the charger’s float voltage. In the event that the safety
timer is running when the battery voltage falls below the
recharge threshold, it will reset back to zero. To prevent
brief excursions below the recharge threshold from reset-
ting the safety timer, the battery voltage must be below
the recharge threshold for more than 1ms. The charge
Charge Status Indication
The CHRG pin indicates the status of the battery charger.
Four possible states are represented by CHRG which
include charging, not charging, unresponsive battery and
battery temperature out of range.
The signal at the CHRG pin can be easily recognized as
one of the above four states by either a human or a mi-
croprocessor. An open-drain output, the CHRG pin can
drive an indicator LED through a current limiting resistor
for human interfacing or simply a pull-up resistor for
microprocessor interfacing.
cycle and safety timer will also restart if the V
UVLO
BUS
To make the CHRG pin easily recognized by both humans
and microprocessors, the pin is either low for charging,
high for not charging, or it is switched at high frequency
(35kHz) to indicate the two possible faults, unresponsive
battery and battery temperature out of range.
cycles low and then high (e.g., V
is removed and then
replaced), or if the battery charger is cycled on and off
BUS
2
by the I C port.
Charge Current
When charging begins, CHRG is pulled low and remains
low for the duration of a normal charge cycle. When
charging is complete, i.e., the BAT pin reaches the float
voltage and the charge current has dropped to one-tenth
oftheprogrammedvalue, theCHRGpinisreleased(Hi-Z).
If a fault occurs, the pin is switched at 35kHz. While
The charge current is programmed using a single resis-
tor from PROG to ground. 1/1030th of the battery charge
current is sent to PROG which will attempt to servo to
1.000V. Thus, the battery charge current will try to reach
1030 times the current in the PROG pin. The program
resistor and the charge current are calculated using the
following equation:
3576f
24
LTC3576/LTC3576-1
OPERATION
Battery Charger Flow Chart
POWER ON/
ENABLE CHARGER
CLEAR EVENT TIMER
ASSERT CHRG LOW
YES
NTC OUT OF RANGE
NO
INHIBIT CHARGING
PAUSE EVENT TIMER
BAT < 2.85V
BAT > V
– E
FLOAT
BATTERY STATE
2.85V < BAT < V
– E
FLOAT
YES
CHRG CURRENTLY
HIGH-Z
CHARGE WITH
FIXED VOLTAGE
(V
CHARGE AT
100V/R (C/10 RATE)
CHARGE AT
1030V/R
RATE
PROG
PROG
)
FLOAT
NO
INDICATE
NTC FAULT
AT CHRG
RUN EVENT TIMER
PAUSE EVENT TIMER
RUN EVENT TIMER
TIMER > 4 HOURS
NO
NO
TIMER > 30 MINUTES
YES
YES
NO
INHIBIT CHARGING
STOP CHARGING
I
< C/10
YES
BAT
YES
BAT RISING
THROUGH
RECHRG
INDICATE BATTERY
FAULT AT CHRG
CHRG HIGH-Z
CHRG HIGH-Z
V
NO
BAT FALLING
THROUGH
RECHRG
NO
NO
YES
BAT > 2.85V
YES
BAT < V
RECHRG
V
YES
NO
3576 FLOW
3576f
25
LTC3576/LTC3576-1
OPERATION
switching, its duty cycle is modulated between a high
and low value at a very low frequency. The low and high
duty cycles are disparate enough to make an LED appear
to be on or off thus giving the appearance of “blinking”.
Each of the two faults has its own unique “blink” rate for
human recognition as well as two unique duty cycles for
machine recognition.
In addition to charge status, the CHRG pin is also used
to indicate whether there is a short-circuit condition on
V
when the bidirectional switching regulator is in on-
BUS
the-go mode. When a short-circuit condition is detected,
CHRG will blink with the same modulation frequency and
duty cycle as a bad battery fault. If the charger is on at the
same time that on-the-go is enabled, a 4Hz modulation of
12% and 88% duty cycles on CHRG could indicate a bad
The CHRG pin does not respond to the C/10 threshold
if the LTC3576/LTC3576-1 is in V
preventsfalseendofchargeindicationsduetoinsufficient
power available to the battery charger.
battery or a short-circuit fault on V . System software
should turn off the charger or on-the-go to determine
BUS
current limit. This
BUS
which fault has occurred.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
Table 2 illustrates the four possible states of the CHRG
pin when the battery charger is active.
Table 2. CHRG Signal
MODULATION
STATUS
Charging
FREQUENCY (BLINK) FREQUENCY
DUTY CYCLES
100%
0Hz
0Hz
0Hz (Low-Z)
0Hz (Hi-Z)
Not Charging
NTC Fault
0%
NTC Thermistor
35kHz
35kHz
1Hz at 50%
4Hz at 50%
6%, 94%
12%, 88%
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to the
battery pack.
Bad Battery
or On-The-Go
Short-Circuit
Fault
To use this feature connect the NTC thermistor, R , be-
NTC
An NTC fault is represented by a 35kHz pulse train whose
duty cycle alternates between 6% and 94% at a 1Hz rate. A
human will easily recognize the 1Hz rate as a “slow” blink-
ing which indicates the out-of-range battery temperature
while a microprocessor will be able to decode either the
6% or 94% duty cycles as an NTC fault.
tween the NTC pin and ground and a bias resistor, R
,
NOM
from NTCBIAS to NTC. R
should be a 1% 200ppm
NOM
resistor with a value equal to the value of the chosen NTC
thermistor at 25°C (R25).
The LTC3576/LTC3576-1 pauses charging when the re-
sistance of the NTC thermistor drops to 0.54 times the
value of R25 or approximately 54k for a 100k thermistor.
For a Vishay Curve 1 thermistor, this corresponds to ap-
proximately 40°C. If the battery charger is in constant
voltage (float) mode, the safety timer also pauses until the
thermistor indicates a return to a valid temperature. As the
temperature drops, the resistance of the NTC thermistor
rises. The LTC3576/LTC3576-1 are also designed to pause
charging when the value of the NTC thermistor increases
to 3.25 times the value of R25. For a Vishay Curve 1
100k thermistor, this resistance, 325k, corresponds to
approximately 0°C. The hot and cold comparators each
have approximately 3°C of hysteresis to prevent oscilla-
tion about the trip point. Grounding the NTC pin disables
all NTC functionality.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below 2.85V for 1/2 hour), the CHRG
pin gives the bad battery fault indication. For this fault, a
human would easily recognize the 4Hz “fast” blink of the
LEDwhileamicroprocessorwouldbeabletodecodeeither
the 12% or 88% duty cycles as a bad battery fault.
Note that the LTC3576/LTC3576-1 are 3-terminal Pow-
erPath products where system load is always prioritized
overbatterycharging.Duetoexcessivesystemload,there
may not be sufficient power to charge the battery beyond
the trickle charge threshold voltage within the bad battery
timeoutperiod. Inthiscase, thebatterychargerwillfalsely
indicate a bad battery. System software may then reduce
the load and reset the battery charger to try again.
3576f
26
LTC3576/LTC3576-1
OPERATION
Thermal Regulation
voltage is removed, the drain of the external MOSFET
will return to 5V.
To prevent thermal damage to the LTC3576/LTC3576-1 or
surrounding components, an internal thermal feedback
loop will automatically decrease the programmed charge
current if the die temperature rises to 105°C. This thermal
regulation technique protects the LTC3576/LTC3576-1
from excessive temperature due to high power operation
or high ambient thermal conditions, and allows the user
to push the limits of the power handling capability with
a given circuit board design. The benefit of the LTC3576/
LTC3576-1 thermal regulation loop is that charge current
can be set according to actual conditions rather than
worst-case conditions for a given application with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
The charge pump output on OVGATE has limited output
drive capability. Care must be taken to avoid leakage on
this pin as it may adversely affect operation.
SeetheApplicationsInformationsectionforresistorpower
dissipation rating calculations, a table of recommended
components, and examples of dual-input and reverse
input protection.
2
I C Interface
The LTC3576/LTC3576-1 may receive commands from a
2
host (master) using the standard 2-wire I C interface. The
Timing Diagram shows the timing relationship of the sig-
nals on the bus. The two bus lines, SDA and SCL, must be
HIGH when the bus is not in use. External pull-up resistors
Overvoltage Protection
2
or current sources, such as the LTC1694 I C accelerator,
TheLTC3576/LTC3576-1canprotectitselffromtheinadver-
are required on these lines. The LTC3576/LTC3576-1are
2
tent application of excessive voltage to V
or WALL with
BUS
receive-only slave devices. The I C control signals, SDA
just two external components: an N-channel MOSFET and
a 6.2k resistor. The maximum safe overvoltage magnitude
will be determined by the choice of the external MOSFET
and its associated drain breakdown voltage.
and SCL are scaled internally to the DV supply. DV
CC
CC
should be connected to the same power supply as the
2
microcontroller generating the I C signals.
2
The I C port has an undervoltage lockout on the DV
CC
2
The overvoltage protection module consists of two pins.
The first, OVSENS, is used to measure the externally ap-
plied voltage through an external resistor. The second,
OVGATE, is an output used to drive the gate pin of the
external MOSFET. When OVSENS is below 6V, an internal
charge pump will drive OVGATE to approximately 1.88 ×
OVSENS. This will enhance the N-channel MOSFET and
provide a low impedance connection to VBUS or WALL
which will, in turn, power the LTC3576/LTC3576-1. If
OVSENS should rise above 6V due to a fault or use of
an incorrect wall adapter, OVGATE will be pulled to GND
disabling the external MOSFET and therefore protecting
downstream circuitry. When the voltage drops below 6V
again, the external MOSFET will be re-enabled.
pin. When DV is below approximately 1V, the I C serial
CC
port is cleared and switching regulators 1, 2 and 3 are
set to full scale.
Bus Speed
2
The I C port is designed to be operated at speeds of up
to 400kHz. It has built-in timing delays to ensure correct
2
operation when addressed from an I C compliant master
device. It also contains input filters designed to suppress
glitches should the bus become corrupted.
Start and Stop Conditions
A bus master signals the beginning of a communication
to a slave device by transmitting a START condition. A
START condition is generated by transitioning SDA from
high to LOW while SCL is HIGH. When the master has
finished communicating with the slave, it issues a STOP
condition by transitioning SDA from LOW to HIGH while
SCL is high. The bus is then free for communication with
When USB on-the-go is enabled, the bidirectional switch-
ingregulatorpowersuptheovervoltageprotectioncircuit
through the body diode of the external MOSFET, thus pro-
viding protection to the part even when VBUS is sourcing
power. When high voltage is applied to the drain of the
external MOSFET, VBUS will remain at 5V. Once the high
2
another I C device.
3576f
27
LTC3576/LTC3576-1
OPERATION
Byte Format
Bus Write Operation
EachbytesenttotheLTC3576/LTC3576-1mustbeeightbits
long followed by an extra clock cycle for the acknowledge
bit. The data should be sent to the LTC3576/LTC3576-1
with the most significant bit (MSB) first.
The master initiates communication with the LTC3576/
LTC3576-1 with a START condition and a 7-bit address
followed by the R/W bit = 0. If the address matches that
oftheLTC3576/LTC3576-1,theLTC3576/LTC3576-1return
an acknowledge. The master should then deliver the sub-
address. Again the LTC3576/LTC3576-1 acknowledge and
the cycle is repeated for the data byte. The data byte is
transferredtoaninternalholdinglatchuponthereturnofits
acknowledge by the LTC3576/LTC3576-1. This procedure
must be repeated for each sub-address that requires new
data. After one or more data bytes have been transferred
to the LTC3576/LTC3576-1, the master may terminate the
communication with a STOP condition. Alternatively, a
repeated START condition can be initiated by the master
Acknowledge
The acknowledge signal is used for handshaking between
the master and the slave. An acknowledge (active low)
generatedbytheslave(LTC3576/LTC3576-1)letsthemas-
ter know that the latest byte of information was received.
The acknowledge related clock pulse is generated by the
master. The master releases the SDA line (HIGH) during
the acknowledge clock cycle. The slave-receiver must pull
down the SDA line during the acknowledge clock pulse
so that it remains a stable LOW during the HIGH period
of this clock pulse.
2
and another chip on the I C bus can be addressed. This
cyclecancontinueindefinitelyandtheLTC3576/LTC3576-1
remembers the last input of valid data that it received.
Once all chips on the bus have been addressed and sent
valid data, a global STOP condition can be sent and the
LTC3576/LTC3576-1 will update their command latches
with the data that they have received.
Slave Address
The address byte consists of the 7-bit address and the
read/write (R/W) bit. The LTC3576/LTC3576-1 respond to
onlyone7-bitaddresswhichhasbeenfactoryprogrammed
to 0001001. The R/W bit is the least significant bit of the
address byte. It must be 0 for the LTC3576/LTC3576-1 to
recognize the address since they are write only devices.
Thus the address byte is 0x12. If the correct seven bit ad-
dressisgivenbuttheR/Wbitis1,theLTC3576/LTC3576-1
will not respond.
2
In certain circumstances the data on the I C bus may
becomecorrupted. Inthesecases, theLTC3576/LTC3576-
1 respond appropriately by preserving only the last set
of complete data that they have received. For example,
assume the LTC3576/LTC3576-1 have been successfully
addressed and are receiving data when a STOP condition
mistakenlyoccurs.TheLTC3576/LTC3576-1willignorethis
STOP condition and will not respond until a new START
condition, correct address and sub-address, new set of
data and STOP condition are transmitted.
Sub-Addressed Writing
The LTC3576/LTC3576-1 have four command registers
2
for control input. They are accessed by the I C port via a
sub-addressed writing system.
Likewise, with only one exception, if the LTC3576/
LTC3576-1 were previously addressed and sent valid data
but not updated with a STOP, they will respond to any
STOP that appears on the bus, independent of the num-
ber of repeated STARTs that have occurred. If a repeated
START is given and the LTC3576/LTC3576-1 successfully
acknowledge their address and sub-address, they will not
respond to a STOP until a full byte of the new data has
been received and acknowledged.
Each write to the LTC3576/LTC3576-1 consists of three
bytes. The first byte is always the LTC3576/LTC3576-1’s
write address. The second byte represents the LTC3576/
LTC3576-1’s sub-address. The sub-address acts as
pointer to direct the subsequent data byte within the
LTC3576/LTC3576-1.Thethirdbyteconsistsofthedatato
be written to the location pointed to by the sub-address.
The LTC3576/LTC3576-1 contain four sub-addresses at
locations 0x00, 0x01, 0x02 and 0x03.
3576f
28
LTC3576/LTC3576-1
OPERATION
Input Data
sub-address 1 controls the servo voltage of switching
regulator 3 and the enable signals for all three switching
regulators, as well as the enable signal for the PowerPath
Table 3 illustrates the four data bytes that may be written
to the LTC3576/LTC3576-1.
switching regulator to power up V
for USB on-the-go.
BUS
The first byte at sub-address 0 controls the servo volt-
age for switching regulators 1 and 2. The second byte at
The servo voltages are decoded in Table 4. The default
servo voltage is 0.8V.
Table 3. I2C Serial Port Mapping*
A7
A6
A5
A4
A3
A2
A1
A0
B7
B6
B5
B4
B3
B2
B1
B0
Switching Regulator 1 Voltage
(See Table 4)
Switching Regulator 2 Voltage
(See Table 4)
Switching Regulator 3 Voltage
(See Table 4)
Reset Value
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
C7
C6
C5
C4
C3
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Switching
Switching
Switching
Input Current
Limit
(See Table 6)
Unused
Regulator 1
Modes
Regulator 2
Modes
Regulator 3
Modes
(See Table 5)
(See Table 5)
(See Table 5)
Reset Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*The A7-A0 and B7-B4 bits default to 1 and all other bits default to 0 when the chip is powered and DV = 0.
CC
Table 4. Switching Regulator Servo Voltage
A7
A3
B7
0
A6
A2
B6
0
A5
A1
B5
0
A4
A0
B4
0
Switching Regulator 1 Servo Voltage
Switching Regulator 2 Servo Voltage
Switching Regulator 3 Servo Voltage
0.425
0.450
0.475
0.500
0.525
0.550
0.575
0.600
0.625
0.650
0.675
0.700
0.725
0.750
0.775
0.800
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
3576f
29
LTC3576/LTC3576-1
OPERATION
2
Thethirddatabyteatsub-address2controlstheoperating
modes of each switching regulator as well as the input
current limit settings. Each switching regulator can be
independently set to one of three operating modes listed
in Table 5.
Disabling the I C Port
2
The I C serial port can be disabled by grounding the DV
CC
pin. In this mode, the LTC3576/LTC3576-1 are controlled
through the individual logic input pins EN1, EN2, EN3,
ENOTG, I
, I
, SDA and SCL. Some functionality is
LIM0 LIM1
The input current limit settings are decoded according
to Table 6. This table indicates the maximum current
not available in this mode such as the programmability of
switchingregulators1,2and3’soutputvoltage,thebattery
chargerdisablefeatureandthehighpowersuspendmode.
Inthismode,theprogrammableswitchingregulatorshave
a fixed servo voltage of 0.8V. Because the SDA and SCL
that will be drawn from the V
pin in the event that the
BUS
load at V
(battery charger plus system load) exceeds
OUT
the power available. Any additional power will be drawn
from the battery. The start-up state for the input current
limit setting is 00 representing the low power 100mA
USB setting.
pins have no other context when DV is grounded, these
CC
pins are re-mapped to control the switching regulator
mode bits C2 to C7. SCL maps to C2, C4 and C6 while
SDA maps to C3, C5 and C7.
The fourth and final byte of input data at sub-address 3
providesbitsfordisablingthebatterychargerandenabling
the high power suspend mode current limit of 2.5mA.
RST3 Pin
The RST3 pin is an open-drain output used to indicate that
switching regulator 3 has been enabled and has reached
itsfinalvoltage.RST3remainslowimpedanceuntilregula-
tor 3 reaches 92% of its regulation value.
Table 5. General Purpose Switching Regulator Modes
C7 (SDA)*
C6 (SCL)* Switching Regulator 1 Mode
C4 (SCL)* Switching Regulator 2 Mode
C2 (SCL)* Switching Regulator 3 Mode
C5 (SDA)*
C3 (SDA)*
A230msdelayisincludedtoallowasystemmicrocontroller
ample time to reset itself. RST3 may be used as a power-
on reset to the microprocessor powered by regulator 3
or may be used to enable regulators 1 and/or 2 for supply
sequencing. RST3 is an open-drain output and requires
a pull-up resistor to the output voltage of regulator 3 or
another appropriate power source.
0
1
1
X
0
1
Pulse Skip Mode
LDO Mode
Burst Mode Operation
*SDA and SCL take on this context only when DV = 0V.
CC
Table 6. USB Current Limit Settings
C1
LIM1
0
C0
LIM0
0
D6
X
(I
)* (I
)* USB SETTING
1x Mode (USB 100mA Limit)
Shutdown Mode
The bidirectional USB switching regulator in step-down
X
0
1
1
1
1
0
0
1
10x Mode (Wall 1A Limit)
mode is enabled whenever V
is above V
and the
BUS
UVLO
0
Low Power Suspend (USB 500μA Limit)
High Power Suspend (USB 2.5mA Limit)
5x Mode (USB 500mA Limit)
LTC3576/LTC3576-1arenotinoneofthetwoUSBsuspend
modes (500μA or 2.5mA). When power is available from
boththeUSBandauxiliaryinputs,theauxiliaryinputisgiven
priority and the USB switching regulator is disabled.
1
X
*I
and I
can only be used to enable the low power suspend mode
LIM1
LIM0
and are logically ORed with C1 and C0, respectively.
The ideal diode(s) are enabled at all times and cannot be
disabled.
3576f
30
LTC3576/LTC3576-1
OPERATION
Step-Down Switching Regulators
Step-Down Switching Regulator Operating Modes
The LTC3576/LTC3576-1 contain three general purpose
2.25MHz step-down constant-frequency current mode
switchingregulators. Tworegulatorsprovideupto400mA
and a third switching regulator can provide up to 1A.
All three switching regulators can be programmed for
a minimum start-up output voltage of 0.8V and can be
used to power a microcontroller core, microcontroller
I/O, memory, disk drive or other logic circuitry. All three
The LTC3576/LTC3576-1’s general purpose switching
regulatorsincludethreepossibleoperatingmodestomeet
the noise/power needs of a variety of applications.
In pulse skip mode, an internal latch is set at the start of
every cycle which turns on the main P-channel MOSFET
switch.Duringeachcycle,acurrentcomparatorcompares
thepeakinductorcurrenttotheoutputofanerroramplifier.
The output of the current comparator resets the internal
latch which causes the main P-channel MOSFET switch to
turn off and the N-channel MOSFET synchronous rectifier
to turn on. The N-channel MOSFET synchronous rectifier
turns off at the end of the 2.25MHz cycle or if the current
through the N-channel MOSFET synchronous rectifier
drops to zero. Using this method of operation, the error
amplifier adjusts the peak inductor current to deliver the
required output power. All necessary compensation is
internal to the switching regulator requiring only a single
ceramicoutputcapacitorforstability.AtlightloadsinPWM
mode, the inductor current may reach zero on each pulse
which will turn off the N-channel MOSFET synchronous
rectifier. In this case, the switch node (SW) goes high
impedance and the switch node voltage will “ring”. This
is discontinuous mode operation, and is normal behavior
for a switching regulator. At very light loads in pulse skip
mode, the switching regulators will automatically skip
pulses as needed to maintain output regulation.
2
switchingregulatorshaveI Cprogrammablesetpointsfor
on-the-fly power savings. They also support 100% duty
cycle operation (low dropout mode) when their input volt-
agedropsveryclosetotheiroutputvoltage.Tosuitavariety
of applications, selectable mode functions can be used to
trade off noise for efficiency. Three modes are available to
control the operation of the LTC3576/LTC3576-1’s general
purposeswitchingregulators.Atmoderatetoheavyloads,
the pulse skip mode provides the lowest noise switching
solution. At lighter loads, Burst Mode operation or LDO
mode may be selected. The switching regulators include
soft-start to limit inrush current when powering on, short-
circuit current protection and switch node slew limiting
circuitry to reduce radiated EMI. No external compensa-
tion components are required. The operating mode of the
2
regulators may be set by either I C control or by manual
2
control of the SDA and SCL pins if the I C port is not used.
Each converter may be individually enabled by either their
2
external control pins EN1, EN2, EN3 or by the I C port. All
three switching regulators have individual programmable At high duty cycles (V
> V /2) it is possible for the
INx
OUTx
2
feedback servo voltages via I C control. The switching inductorcurrenttoreverse,causingtheregulatortooperate
regulator input supplies V , V and V will generally continuouslyatlightloads.Thisisnormalandregulationis
IN1 IN2
IN3
be connected to the system load pin V
.
maintained, but the supply current will increase to several
mA due to continuous switching.
OUT
3576f
31
LTC3576/LTC3576-1
OPERATION
InBurstModeoperation,theswitchingregulatorautomati-
callyswitchesbetweenfixedfrequencyPWMoperationand
hystereticcontrolasafunctionoftheloadcurrent. Atlight
loads, the regulator operates in hysteretic mode and uses
a constant current algorithm to control the inductor cur-
rent. While in Burst Mode operation, the output capacitor
is charged to a voltage slightly higher than the regulation
point. The step-down switching regulator then goes into
sleep mode, during which the output capacitor provides
the load current. In sleep mode, most of the regulator’s
circuitry is powered down, conserving battery power.
When the output voltage drops below a pre-determined
value, the switching regulator circuitry is powered on and
another burst cycle begins. The duration for which the
regulator operates in sleep mode depends on the load
current. The sleep time decreases as the load current
increases. Burst Mode operation provides a significant
improvement in efficiency at light loads at the expense of
higher output ripple when compared to pulse skip mode.
At heavy loads Burst Mode operation functions in the
same manner as pulse skip mode.
dropoutcondition,therespectiveoutputvoltageequalsthe
regulator’s input voltage minus the voltage drops across
the internal P-channel MOSFET and the inductor.
Step-Down Switching Regulator Low Supply Operation
The LTC3576/LTC3576-1 incorporate an undervoltage
lockout circuit on V
which shuts down the general
OUT
purpose switching regulators when V
drops below
OUT
V
. This UVLO prevents unstable operation.
OUT(UVLO)
Step-Down Switching Regulator Soft-Start Operation
Soft-start is accomplished by gradually increasing the
peak inductor current for each switching regulator over a
500ꢁs period. This allows each output to rise slowly, help-
ing minimize the battery surge current. A soft-start cycle
occurs whenever a given switching regulator is enabled,
or after a fault condition has occurred (thermal shutdown
or UVLO). A soft-start cycle is not triggered by changing
operating modes. This allows seamless output operation
when transitioning between Burst Mode operation, pulse
skip mode or LDO mode.
Finally, the switching regulators have an LDO mode that
gives a DC option for regulating their output voltages. In
LDOmode,theswitchingregulatorsareconvertedtolinear
regulators and deliver continuous power from their SWx
pins through their respective inductors. This mode gives
the lowest possible output noise as well as low quiescent
current at light loads.
Step-Down Switching Regulator Switching
Slew Rate Control
The step-down switching regulators contain new patent
pending circuitry to limit the slew rate of the switch node
(SWx). This new circuitry is designed to transition the
switch node over a period of a couple of nanoseconds,
significantly reducing radiated EMI and conducted supply
noise.
Thestep-downswitchingregulatorsallowon-the-flymode
transitions,providingseamlesstransitionbetweenmodes
even under load. This allows the user to switch back and
forth between modes to reduce output ripple or increase
low current efficiency as needed.
Step-Down Switching Regulator in Shutdown
Thestep-downswitchingregulatorsareinshutdownwhen
not enabled for operation. In shutdown, all circuitry in
the step-down switching regulator is disconnected from
the switching regulator input supply leaving only a few
nanoamperesofleakagecurrent.Thestep-downswitching
regulatoroutputsareindividuallypulledtogroundthrough
a 10k resistor on their SWx pins when in shutdown.
Step-Down Switching Regulator Dropout Operation
It is possible for a switching regulator’s input voltage,
V
, to approach its programmed output voltage (e.g., a
INx
battery voltage of 3.4V with a programmed output voltage
of 3.3V). When this happens, the PMOS switch duty cycle
increasesuntilitisturnedoncontinuouslyat100%.Inthis
3576f
32
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
Bidirectional PowerPath Switching Regulator
CLPROG Resistor and Capacitor Selection
Bidirectional PowerPath Switching Regulator V
BUS
and V
Bypass Capacitor Selection
OUT
As described in the Bidirectional Switching Regulator—
Step-Down Mode section, the resistor on the CLPROG
The type and value of capacitors used with the LTC3576/
LTC3576-1 determine several important parameters such
asregulatorcontrol-loopstabilityandinputvoltageripple.
Because the LTC3576/LTC3576-1 use a bidirectional
pin determines the average V
input current limit when
BUS
the switching regulator is set to either the 1x mode (USB
100mA), the 5x mode (USB 500mA) or the 10x mode. The
switching regulator between V
and V , the V
BUS
OUT BUS
V
input current will be comprised of two components,
current waveform contains high frequency components.
It is strongly recommended that a low equivalent series
resistance (ESR) multilayer ceramic capacitor (MLCC) be
BUS
the current that is used to drive V
and the quiescent
OUT
current of the switching regulator. To ensure that the USB
specification is strictly met, both components of the input
currentshouldbeconsidered.TheElectricalCharacteristics
table gives the typical values for quiescent currents in all
settingsaswellascurrentlimitprogrammingaccuracy. To
getasclosetothe500mAor100mAspecificationsaspos-
sible, a precision resistor should be used. Recall that:
used to bypass V . Tantalum and aluminum capacitors
BUS
arenotrecommendedbecauseoftheirhighESR.Thevalue
of the capacitor on V
directly controls the amount of
BUS
input ripple for a given load current. Increasing the size
of this capacitor will reduce the input ripple.
The inrush current limit specification for USB devices is
calculatedintermsofthetotalnumberofCoulombsneeded
I
= I
+ V
/R
• (h
+1).
VBUS
VBUSQ
CLPROG CLPPROG
CLPROG
to charge the V
bypass capacitor to 5V. The maximum
BUS
An averaging capacitor is required in parallel with the
resistor so that the switching regulator can determine the
average input current. This capacitor also provides the
dominant pole for the feedback loop when current limit
is reached. To ensure stability, the capacitor on CLPROG
should be 0.1μF or larger.
inrush charge for USB on-the-go devices is 33μC. This
places a limit of 6.5μF of capacitance on V assuming
BUS
a linear capacitor. However, most ceramic capacitors have
a capacitance that varies with bias voltage. The average
capacitanceneedstobelessthan6.5μFovera0Vto5Vbias
voltagerangetomeettheinrushcurrentlimitspecification.
A 10μF capacitor in a 0805 package, such as the Murata
Bidirectional PowerPath Switching Regulator
Inductor Selection
GRM21BR71A106KE51LwouldbeasuitableV
bypass
BUS
capacitor. If more capacitance is required for better noise
performanceandstabilityitshouldbeconnecteddirectlyto
Because the input voltage range and output voltage range
of the PowerPath switching regulator are both fairly nar-
row, the LTC3576/LTC3576-1 were designed for a specific
inductance value of 3.3μH. Some inductors which may be
suitable for this application are listed in Table 7.
theV
pinwhenusingtheovervoltageprotectioncircuit.
BUS
This extra capacitance will be soft-connected over several
milliseconds to limit inrush current and avoid excessive
transient voltage drops on V
.
BUS
Table 7. Recommended PowerPath Inductors for the LTC3576
MAX MAX
To prevent large V
voltage steps during transient load
OUT
conditions, it is also recommended that an MLCC be used
INDUCTOR
TYPE
L
I
DCR SIZE IN mm
(Ω) (L × W × H) MANUFACTURER
DC
to bypass V . The output capacitor is used in the com-
OUT
(μH) (A)
pensation of the switching regulator. At least 10μF with
LPS4018
3.3 2.2 0.08
Coilcraft
www.coilcraft.com
3.9 × 3.9 × 1.7
low ESR are required on V . Additional capacitance will
OUT
improve load transient performance and stability.
D53LC
DB318C
3.3 2.26 0.034
3.3 1.55 0.070
Toko
www.toko.com
5 × 5 × 3
3.8 × 3.8 × 1.8
MLCCs typically have exceptional ESR performance.
MLCCscombinedwithatightboardlayoutandanunbroken
ground plane will yield very good performance and low
EMI emissions.
WE-TPC
Type M1
3.3 1.95 0.065
Wurth Electronik
4.8 × 4.8 × 1.8
www.we-online.com
CDRH6D12
CDRH6D38
3.3
3.3
2.2 0.063
3.5 0.020
Sumida
www.sumida.com
6.7 × 6.7 × 1.5
7 × 7 × 4
3576f
33
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
ThereareMLCCsavailablewithseveraltypesofdielectrics
each having considerably different characteristics. For
example, X7R MLCCs have the best voltage and tempera-
ture stability. X5R MLCCs have apparently higher packing
density but poorer performance over their rated voltage
and temperature ranges. Y5V MLCCs have the highest
packing density, but must be used with caution, because
of their extreme nonlinear characteristic of capacitance
versus voltage. The actual in-circuit capacitance of a
ceramic capacitor should be measured with a small AC
signal and DC bias as is expected in-circuit. Many vendors
to improve transient response for output voltages much
greater than 0.8V. A variety of capacitor sizes can be used
for C but a value of 10pF is recommended for most ap-
FB
plications. Experimentation with capacitor sizes between
2pF and 22pF may yield improved transient response.
Step-Down Switching Regulator Inductor Selection
Many different sizes and shapes of inductors are avail-
able from numerous manufacturers. Choosing the right
inductor from such a large selection of devices can be
overwhelming, but following a few basic guidelines will
make the selection process much simpler.
specify the capacitance versus voltage with a 1V
AC
RMS
test signal and, as a result, over state the capacitance that
the capacitor will present in the application. Using similar
operating conditions as the application, the user must
measureorrequestfromthevendortheactualcapacitance
to determine if the selected capacitor meets the minimum
capacitance that the application requires.
Thegeneralpurposestep-downconvertersaredesignedto
work with inductors in the range of 2ꢁH to 10ꢁH. For most
applications a 4.7ꢁH inductor is suggested for the lower
current switching regulators 1 and 2 and 2ꢁH is recom-
mendedforthehighercurrentswitchingregulator 3.Larger
valueinductorsreduceripplecurrentwhichimprovesout-
put ripple voltage. Lower value inductors result in higher
ripple current and improved transient response time. To
maximize efficiency, choose an inductor with a low DC
resistance. For a 1.2V output, efficiency is reduced about
2% for 100mꢀ series resistance at 400mA load current,
and about 2% for 300mꢀ series resistance at 100mA load
current. Choose an inductor with a DC current rating at
least 1.5 times larger than the maximum load current to
ensure that the inductor does not saturate during normal
operation. If output short circuit is a possible condition,
the inductor should be rated to handle the maximum peak
current specified for the step-down converters. Different
core materials and shapes will change the size/current
and price/current relationship of an inductor. Toroid or
shielded pot cores in ferrite or Permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. Inductors that are very thin or
have a very small volume typically have much higher
core and DCR losses, and will not give the best efficiency.
The choice of which style inductor to use often depends
more on the price vs size, performance and any radiated
EMI requirements than on what the LTC3576/LTC3576-1
require to operate.
Step-Down Switching Regulator Output Voltage
Programming
2
All three switching regulators have I C programmable
set points and can be programmed for start-up output
voltages of at least 0.8V. The full-scale output voltage for
each switching regulator is programmed using a resistor
divider from the switching regulator output connected to
the FBx pins such that:
ꢀ
ꢃ
R1
R2
VOUTx = V
FBx ꢂ
+1
ꢅ
ꢁ
ꢄ
where V ranges from 0.425V to 0.8V. See Figure 5.
FBx
Typical values for R1 are in the range of 40k to 1M. The
capacitorC cancelsthepolecreatedbyfeedbackresistors
FB
and the input capacitance of the FBx pin and also helps
V
INx
L
V
SWx
OUTx
LTC3576/
C
R1
C
OUT
FB
LTC3576-1
FBx
R2
GND
3576 F05
Figure 5. Buck Converter Application Circuit
3576f
34
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
The inductor value also has an effect on Burst Mode op-
eration. Lower inductor values will cause the Burst Mode
switching frequency to increase.
ranges than other ceramic types. A 10ꢁF output capaci-
tor is sufficient for most applications. For good transient
response and stability the output capacitor should retain
atleast4ꢁFofcapacitanceoveroperatingtemperatureand
biasvoltage.Eachswitchingregulatorinputsupplyshould
be bypassed with a 1ꢁF capacitor. Consult with capacitor
manufacturers for detailed information on their selection
and specifications of ceramic capacitors. Many manufac-
turers now offer very thin (<1mm tall) ceramic capacitors
ideal for use in height-restricted designs. Table 9 shows a
list of several ceramic capacitor manufacturers.
Table 8 shows several inductors that work well with the
LTC3576/LTC3576-1’s general purpose regulators. These
inductors offer a good compromise in current rating, DCR
and physical size. Consult each manufacturer for detailed
information on their entire selection of inductors.
Table 8. Recommended Inductors
MAX MAX
INDUCTOR
TYPE
L
I
DCR
(Ω)
SIZE IN mm
DC
(μH) (A)
(L × W × H) MANUFACTURER
Table 9. Recommended Ceramic Capacitor Manufacturers
DE2818C
4.7 1.25 0.072
3.3 1.45 0.053
4.7 0.79 0.24
3.3 0.90 0.20
2.2 1.14 0.14
Toko
www.toko.comm
3.0 × 2.8 × 1.8
3.0 × 2.8 × 1.8
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.6 × 3.6 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
3.0 × 2.8 × 1.2
AVX
www.avxcorp.com
www.murata.com
www.t-yuden.com
www.vishay.com
www.tdk.com
D312C
Murata
Taiyo Yuden
Vishay Siliconix
TDK
DE2812C
4.7
3.3
2.0
1.2 1.13*
1.4 0.10*
1.8 0.067*
CDRH3D16 4.7
0.9
0.11
Sumida
4.0 × 4.0 × 1.8
4.0 × 4.0 × 1.8
4.0 × 4.0 × 1.8
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
3.2 × 3.2 × 1.2
4.9 × 4.9 × 1.0
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.8
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
3.1 × 3.1 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.2
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
5.2 × 5.2 × 1.0
Overvoltage Protection
3.3
1.1 0.085
1.2 0.072
www.sumida.com
2.2
CDRH2D11 4.7
3.3
V
BUS
can be protected from overvoltage damage with two
0.5
0.6 0.123
0.17
additional components, a resistor R1 and an N-channel
MOSFET MN1, as shown in Figure 6. Suitable choices for
MN1 are listed in Table 10.
2.2 0.78 0.098
4.7 0.75 0.19
CLS4D09
SD3118
4.7
1.3 0.162
Cooper
www.cooperet.com
3.3 1.59 0.113
Table 10. Recommended N-Channel MOSFETs for the
Overvoltage Protection Circuit
2.2
4.7
2.0 0.074
0.8 0.246
SD3112
SD12
PART NUMBER
Si1472DH
BVDSS
30V
R
PACKAGE
SC70-6
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
WDFN6
3.3 0.97 0.165
2.2 1.12 0.14
4.7 1.29 0.117*
3.3 1.42 0.104*
2.2 1.80 0.075*
4.7 1.08 0.153*
3.3 1.31 0.108*
2.2 1.65 0.091*
ON
82mΩ
60mΩ
65mΩ
80mΩ
35mΩ
50mꢀ
35mΩ
Si2302ADS
Si2306BDS
Si2316BDS
IRLML2502
FDN372S
20V
30V
SD10
30V
20V
LPS3015
4.7
3.3
2.2
1.1
1.3
1.5
0.2
0.13
0.11
Coilcraft
www.coilcraft.com
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
3.0 × 3.0 × 1.5
30V
NTLJS4114N
30V
*Typical DCR
R1 is a 6.2k resistor and must be rated for the power dis-
sipated during maximum overvoltage. In an overvoltage
condition the OVSENS pin will be clamped at 6V. R1 must
be sized appropriately to dissipate the resultant power.
For example, a 1/10W 6.2k resistor can have at most
Step-Down Switching Regulator Input/Output Bypass
Capacitor Selection
Low ESR (equivalent series resistance) MLCCs should
be used at each switching regulator output as well as at
√P
• 6.2kꢀ = 25V applied across its terminals. With
MAX
the 6V at OVSENS, the maximum overvoltage magnitude
thatthisresistorcanwithstandis31V.A1/4W6.2kresistor
raises this value to 45V. OVSENS’s absolute maximum
each switching regulator input supply (V ). Only X5R
INx
or X7R ceramic capacitors should be used because they
retaintheircapacitanceoverwidervoltageandtemperature
3576f
35
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
MP1
MN1
MN1
USB/WALL
ADAPTER
USB/WALL
ADAPTER
V
V
BUS
BUS
D1
C1
C1
LTC3576/
LTC3576-1
LTC3576/
LTC3576-1
R1
OVGATE
OVSENS
R1
R2
OVGATE
OVSENS
3576 F06
3576 F08
V
BUS
V
BUS
POSITIVE PROTECTION UP TO BVDSS OF MN1
NEGATIVE PROTECTION UP TO BVDSS OF MP1
Figure 6. Overvoltage Protection
Figure 8. Dual Polarity Voltage Protection
current rating of 10mA imposes an upper limit of 68V
protection.
transforms the voltage at V
to a voltage just above
BUS
I
t is possible to protect both VBUS and WALL from
the level at BAT, while limiting power to less than the
amount programmed at CLPROG. The charger should be
programmed (with the PROG pin) to deliver the maximum
safe charging current without regard to the USB specifi-
cations. If there is insufficient current available to charge
the battery at the programmed rate, it will reduce charge
overvoltage damage with several additional components,
as shown in Figure 7. Schottky diodes D1 and D2 pass the
larger of V1 and V2 to R1 and OVSENS. If either V1 or V2
exceeds 6V plus VF (Schottky), OVGATE will be pulled to
GNDandboththeWALLandUSBinputswillbeprotected.
Eachinputisprotecteduptothedrain-sourcebreakdown,
BVDSS, of MN1 and MN2. R1 must also be rated for the
power dissipated during maximum overvoltage.
current until the system load on V
is satisfied and the
OUT
V
BUS
current limit is satisfied. Programming the charger
for more current than is available will not cause the aver-
age input current limit to be violated. It will merely allow
the battery charger to make use of all available power to
chargethebatteryasquicklyaspossible,andwithminimal
dissipation within the charger.
M1
V1
WALL
OVGATE
LTC3576/
LTC3576-1
BUS
V
V2
M2
D2
D1
C1
Battery Charger Stability Considerations
GND
R1
TheLTC3576/LTC3576-1’sbatterychargercontainsbotha
constant-voltage and a constant-current control loop. The
constant-voltage loop is stable without any compensation
when a battery is connected with low impedance leads.
Excessive lead length, however, may add enough series
inductance to require a bypass capacitor of at least 1μF
from BAT to GND.
OVSENS
3576 F07
Figure 7. Dual-Input Overvoltage Protection
Reverse Voltage Protection
The LTC3576/LTC3576-1 can also be easily protected
against the application of reverse voltages, as shown in
Figure 8. D1 and R1 are necessary to limit the maximum
High value, low ESR MLCCs reduce the constant-voltage
loop phase margin, possibly resulting in instability. Up
to 22μF may be used in parallel with a battery, but larger
capacitors should be decoupled with 0.2Ω to 1Ω of series
resistance.
V
seenbyMP1duringpositiveovervoltageevents.D1’s
GS
breakdownvoltagemustbesafelybelowMP1’sBVGS.The
circuit shown in Figure 8 offers forward voltage protection
up to MN1’s BVDSS and reverse voltage protection up to
MP1’s BVDSS.
Furthermore, a 100μF MLCC in series with a 0.3Ω resistor
from BAT to GND is required to prevent oscillation when
the battery is disconnected.
Battery Charger Over Programming
In constant-current mode, the PROG pin is in the feed-
back loop rather than the battery voltage. Because of the
The USB high power specification allows for up to 2.5W
to be drawn from the USB port. The LTC3576/LTC3576-1’s
bidirectional switching regulator in step-down mode
3576f
36
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
additional pole created by any PROG pin capacitance,
capacitance on this pin must be kept to a minimum. With
no additional capacitance on the PROG pin, the charger
is stable with program resistor values as high as 25k.
However, additional capacitance on this node reduces the
maximumallowedprogramresistor.Thepolefrequencyat
the PROG pin should be kept above 100kHz. Therefore, if
other trip point will be determined by the characteristics
of the thermistor. Using the bias resistor in addition to an
adjustmentresistor,boththeupperandthelowertempera-
ture trip points can be independently programmed with
the constraint that the difference between the upper and
lower temperature thresholds cannot decrease. Examples
of each technique are given below.
the PROG pin has a parasitic capacitance, C
, the fol-
PROG
NTC thermistors have temperature characteristics which
areindicatedonresistance-temperatureconversiontables.
TheVishay-DalethermistorNTHS0603N011-N1003F,used
in the following examples, has a nominal value of 100k
and follows the Vishay Curve 1 resistance-temperature
characteristic.
lowing equation should be used to calculate the maximum
resistance value for R
:
PROG
1
RPROG
≤
2π • 100kHz • CPROG
In the explanation below, the following notation is used.
R25 = Value of the Thermistor at 25°C
Alternate NTC Thermistors and Biasing
The LTC3576/LTC3576-1 provide temperature qualified
charging if a grounded thermistor and a bias resistor
are connected to NTC. By using a bias resistor whose
value is equal to the room temperature resistance of the
thermistor (R25) the upper and lower temperatures are
pre-programmed to approximately 40°C and 0°C respec-
tively assuming a Vishay Curve 1 thermistor.
R
R
= Value of thermistor at the cold trip point
= Value of the thermistor at the hot trip
NTC|COLD
NTC|HOT
point
r
r
= Ratio of R
to R25
COLD
NTC|COLD
= Ratio of R
to R25
HOT
NTC|HOT
The upper and lower temperature thresholds can be ad-
justed by either a modification of the bias resistor value
or by adding a second adjustment resistor to the circuit.
If only the bias resistor is adjusted, then either the upper
or the lower threshold can be modified but not both. The
R
– Primary thermistor bias resistor
NOM
(see Figure 9)
R1 = Optional temperature range adjustment resistor
(see Figure 10)
LTC3576/LTC3576-1
NTC BLOCK
NTCBIAS
LTC3576/LTC3576-1
NTC BLOCK
NTCBIAS
3
4
3
0.765 • NTCBIAS
R
0.765 • NTCBIAS
NOM
–
+
R
NOM
100k
105k
–
+
TOO_COLD
TOO_HOT
TOO_COLD
TOO_HOT
NTC
NTC
4
R1
12.7k
R
NTC
100k
T
–
+
–
+
R
NTC
100k
T
0.349 • NTCBIAS
0.349 • NTCBIAS
+
–
+
–
NTC_ENABLE
NTC_ENABLE
0.1V
0.1V
3576 F10
3576 F09
Figure 9. Standard NTC Configuration
Figure 10. Modified NTC Configuration
3576f
37
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
The trip points for the LTC3576/LTC3576-1’s temperature
qualificationareinternallyprogrammedat0.349•NTCBIAS
for the hot threshold and 0.765 • NTCBIAS for the cold
threshold.
From the Vishay Curve 1 R-T characteristics, r
is
HOT
0.2488 at 60°C. Using the above equation, R
should
NOM
be set to 46.4k. With this value of R
, r
is 1.436
NOM COLD
and the cold trip point is about 16°C. Notice that the span
is now 44°C rather than the previous 40°C. This is due to
the decrease in “temperature gain” of the thermistor as
absolute temperature increases.
Therefore, the hot trip point is set when:
RNTCHOT
•NTCBIAS = 0.349 •NTCBIAS
RNOM +RNTCHOT
The upper and lower temperature trip points can be inde-
pendentlyprogrammedbyusinganadditionalbiasresistor
asshowninFigure10. Thefollowingformulascanbeused
And the cold trip point is set when:
RNTCCOLD
to compute the values of R
and R1:
NOM
•NTCBIAS = 0.765 •NTCBIAS
RNOM +RNTCCOLD
rCOLD –rHOT
RNOM
=
•R25
2.714
R1= 0.536 •RNOM –rHOT •R25
Solving these equations for R
results in the following:
and R
NTC|HOT
NTC|COLD
For example, to set the trip points to 0°C and 45°C with
a Vishay Curve 1 thermistor choose:
R
= 0.536 • R
NTC|HOT
NOM
and
3.266 – 0.4368
RNOM
=
•100k = 104.2k
R
= 3.25 • R
2.714
NTC|COLD
NOM
By setting R
equal to R25, the above equations result
NOM
= 0.536 and r
the nearest 1% value is 105k:
in r
= 3.25. Referencing these ratios
HOT
COLD
R1 = 0.536 • 105k – 0.4368 • 100k = 12.6k
to the Vishay Resistance-Temperature Curve 1 chart gives
a hot trip point of about 40°C and a cold trip point of about
0°C. The difference between the hot and cold trip points
is approximately 40°C.
the nearest 1% value is 12.7k. The final solution is shown
in Figure 10 and results in an upper trip point of 45°C and
a lower trip point of 0°C.
By using a bias resistor, R
, different in value from
NOM
Hot Plugging and USB Inrush Current Limiting
R25, the hot and cold trip points can be moved in either
direction. The temperature span will change somewhat
due to the nonlinear behavior of the thermistor. The fol-
lowing equations can be used to calculate a new value for
the bias resistor:
The overvoltage protection circuit provides inrush current
limiting due to the long time it takes for OVGATE to fully
enhancetheN-channelMOSFET. Thispreventsthecurrent
from building up in the cable too quickly thus dampen-
ing out any resonant overshoot on V . It is possible to
BUS
rHOT
RNOM
RNOM
=
•R25
observe voltage overshoot on V
when connecting the
BUS
0.536
r
LTC3576/LTC3576-1toalabpowersupplyiftheovervoltage
protection circuit is not used. This overshoot is caused by
the inductance of the long leads from the power supply to
=
COLD •R25
3.25
V
. Twisting the wires together from the supply to V
BUS
BUS
where r
and r
are the resistance ratios at the de-
HOT
COLD
can greatly reduce the parasitic inductance of these long
sired hot and cold trip points. Note that these equations
are linked. Therefore, only one of the two trip points can
be chosen, the other is determined by the default ratios
designed in the IC. Consider an example where a 60°C
hot trip point is desired.
leadskeepingthevoltageatV tosafelevels.USBcables
BUS
are generally manufactured with the power leads in close
proximity, and thus have fairly low parasitic inductance.
3576f
38
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
Hot Plugging and USB On-the-Go
For V
pulsing, the limit on the V
capacitance on
BUS
BUS
the A device allows a B device to differentiate between
a powered down on-the-go device and a powered down
standardhost. TheBdevicewillsendoutapulseofcurrent
If there is more than 4.3V on V
when on-the-go is
BUS
enabled, the bidirectional switching regulator will not try
to drive V . If USB on-the-go is enabled and an external
BUS
that will raise V
connected to an on-the-go A device which must have no
more than 6.5μF. An on-the-go A device must drive V
as soon as the current pulse raises V
device is capable of responding to V
to a voltage between 2.1V and 5.25V if
BUS
supply is then connected to V , one of three things will
BUS
happen depending on the properties of the external sup-
ply. If the external supply has a regulation voltage higher
than 5.1V, the bidirectional switching regulator will stop
BUS
above 2.1V if the
pulsing.
BUS
BUS
switching and V
will be held at the regulation voltage
BUS
of the external supply. If the external supply has a lower
This same current pulse must not raise V
than 2V when connected to a standard host which must
haveatleast96μF. The96μFforastandardhostrepresents
the minimum capacitance with V
5.25V. Since the SRP pulse must not drive V
than2V, thecapacitanceseenatthesevoltagelevelscanbe
greaterthan96μF,especiallyifMLCCsareused.Therefore,
the 96μF represents a lower bound on the standard host
bypass capacitance for determining the amplitude and
duration of the current pulse. More capacitance will only
decrease the maximum level that V
given current pulse.
any higher
BUS
regulation voltage and is capable of only sourcing current
then V
will be regulated to 5.1V. The external supply
BUS
will not source current to V
.
between 4.75V and
BUS
BUS
greater
BUS
For a supply that can also sink current and has a regula-
tion voltage less than 5.1V, the bidirectional switching
regulator will source current into the external supply in an
attempt to bring V
up to 5.1V. As long as the external
BUS
supply holds V
to more than 4V or V
+ 70mV, the
BUS
OUT
bidirectional switching regulator will source up to 680mA
into the supply. If V is held to a voltage that is less than
will rise to for a
BUS
BUS
4V and V
+ 70mV then the short circuit timer will shut
OUT
off the switching regulator after 7.2ms. The CHRG pin will
Figure 11 shows an on-the-go device using the LTC3576/
LTC3576-1 acting as the A device. Additional capacitance
can be placed on the V
then blink indicating a short circuit current fault.
pin of the LTC3576/LTC3576-1
BUS
V
Bypass Capacitance and USB On-The-Go
when using the overvoltage protection circuit. A B device
may not be able to distinguish between a powered down
LTC3576/LTC3576-1 with overvoltage protection and a
powered down standard host because of this extra ca-
BUS
Session Request Protocol
Whentwoon-the-godevicesareconnected,onewillbethe
A device and the other will be the B device depending on
whether the device is connected to a micro A or micro B
plug. The A device provides power to the B device and
starts as the host. To prolong battery life, the A device can
pacitance. In addition, if the SRP pulse raises V
above
BUS
its UVLO threshold of 4.3V the LTC3576/LTC3576-1 will
assume input power is available and will not attempt to
drive V . Therefore, it is recommended that an on-
BUS
power down V
when the bus is not being used. If the A
BUS
the-go device using the LTC3576/LTC3576-1 respond to
device has powered down V , the B device can request
BUS
data-line pulsing.
the A device to power up V
and start a new session us-
BUS
ing the session request protocol (SRP). The SRP consists
of data-line pulsing and V pulsing. The B device must
When an on-the-go device using the LTC3576/LTC3576-1
becomes the B device, as in Figure 12, it must send out
BUS
+
–
first pulse the D or D data line. The B device must then
a data line pulse followed by a V
pulse to request a
BUS
pulse V only if the A device does not respond to the
session from the A device. The on-the-go device designer
can choose how much capacitance will be placed on the
BUS
data-linepulse. TheAdeviceisrequiredtorespondtoonly
one of the pulsing methods. A devices that never power
V
pin of the LTC3576/LTC3576-1 and then generate
pulse that can distinguish between a powered
BUS
down V
are not required to respond to the SRP.
a V
BUS
BUS
3576f
39
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
OVP
(OPTIONAL)
OVSENS
ON-THE-GO
POWER
MANAGER
OVGATE
LTC3576/
LTC3576-1
V
BUS
ENOTG
C
A
C
B
<6.5μF
<6.5μF
WITHOUT OVP
–
+
D
D
ON-THE-GO
TRANSCEIVER
ON-THE-GO
TRANSCEIVER
3576 F11
A DEVICE
B DEVICE
Figure 11. LTC3576/LTC3576-1 as the A Device
OVP
(OPTIONAL)
OVSENS
STANDARD
USB HOST OR
ON-THE-GO
POWER
OVGATE
LTC3576/
LTC3576-1
V
BUS
MANAGER
ENOTG
C
C
A
B
<6.5μF FOR OTG DEVICES
<6.5μF
>96μF FOR STANDARD HOST
WITHOUT OVP
–
STANDARD OR
ON-THE-GO
TRANSCEIVER
D
ON-THE-GO
TRANSCEIVER
+
D
3576 F12
B DEVICE
A DEVICE
Figure 12. LTC3576/LTC3576-1 as the B Device
down on-the-go A device and a powered down standard
host. A suitable pulse can be generated because of the
disparity in the bypass capacitances of an on-the-go A
device and a standard host even if there is somewhat
such as the V , V , V and V currents tend to find
BUS IN1 IN2 IN3
their way on the ground plane along a mirror path directly
beneath the incident path on the top of the board. If there
are slits or cuts in the ground plane due to other traces
on that layer, the current will be forced to go around the
slits. If high frequency currents are not allowed to flow
back through their natural least-area path, excessive
voltage will build up and radiated emissions will occur
(see Figure 13). There should be a group of vias directly
under the grounded backside leading directly down to an
internal ground plane. To minimize parasitic inductance,
the ground plane should be as close as possible to the
top plane of the PC board (layer 2).
more than 6.5μF capacitance connected to the V
of the LTC3576/LTC3576-1.
pin
BUS
Board Layout Considerations
The Exposed Pad on the backside of the LTC3576/
LTC3576-1 package must be securely soldered to the PC
board ground. This is the primary ground pin in the pack-
age, and it serves as the return path for both the control
circuitry and the N-channel MOSFET switches.
The IDGATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an additional offset to
theidealdiodeofapproximately10mV.Tominimizeleakage,
Furthermore, duetoitshighfrequencyswitchingcircuitry,
it is imperative that the input capacitor, inductor, and
output capacitor be as close to the LTC3576/LTC3576-1
as possible and that there be an unbroken ground plane
under the LTC3576/LTC3576-1 and all of their external
high frequency components. High frequency currents,
the trace can be guarded on the PC board by surrounding
3576f
40
LTC3576/LTC3576-1
APPLICATIONS INFORMATION
3576 F13
Figure 13. Higher Frequency Ground Current Follow Their
Incident Path. Slices in the Ground Plane Create Large Loop
Areas. The Large Loop Areas Increase the Inductance of the
Path Leading to Higher System Noise
it with V
connected metal, which should generally be
PowerPath switching regulator inductor and the output
OUT
less than one volt higher than IDGATE.
capacitor on V . The GND side of the output capacitors
OUT
should connect directly to the thermal ground plane of
the part.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3576/LTC3576-1:
4. The switching power traces connecting SW, SW1,
SW2, SW3 and the switch node of the external step-down
switchingregulatortotheirrespectiveinductorsshouldbe
minimized to reduce radiated EMI and parasitic coupling.
Due to the large voltage swing of the switching nodes,
sensitive nodes such as the feedback nodes (FB1, FB2
and FB3) should be kept far away or shielded from the
switching nodes or poor performance could result.
1. The Exposed Pad of the package (Pin 39) should con-
nect directly to a large ground plane to minimize thermal
and electrical impedance.
2. The traces connecting V , V , V , V and V of
BUS IN1 IN2 IN3
IN
theexternalstep-downswitchingregulatortotheirrespec-
tive decoupling capacitors should be as short as possible.
The GND side of these capacitors should connect directly
to the ground plane of the part. These capacitors provide
the AC current to the internal power MOSFETs and their
drivers. It is critical to minimize inductance from these
capacitors to the LTC3576/LTC3576-1 and external step-
down switching regulator.
5. Keep the feedback pin traces (FB1, FB2, FB3 and FB of
the external step-down switching regulator) as short as
possible. Minimize any parasitic capacitance between the
feedback traces and any switching node (i.e., SW, SW1,
SW2, SW3 and logic signals). If necessary shield the
feedback nodes with a GND trace
3.Connectionsbetweenthestep-downswitchingregulator
(both internal and external) inductors and their respective
output capacitors should be kept as short as possible.
Use area fills whenever possible. This also applies to the
6. Connect V , V and V to V through a short
OUT
IN1 IN2
IN3
low impedance trace.
3576f
41
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
Minimum Parts Count USB Power Manager with Low-Battery Start-Up and USB On-the-Go
USB
26
27
28
L1
ON-THE-GO
3.3μH
V
WALL ACPR
C
35
34
36
33
31
32
TO OTHER
LOADS
USB,
WALL ADAPTER
V
V
SW
OUT
BUS
BUS
C1
10μF
0805
V
C3
22μF
0805
5
6
3
OVGATE
IDGATE
BAT
OVSENS
NTCBIAS
+
Li-Ion
4
29
1
NTC
8
9
7
PROG
CLPROG
V
IN1
L2
4.7μH
1.76V TO 3.3V
400mA
C2
0.1μF
0402
MEMORY
SW1
FB1
1k
3.01k
1.02M
324k
10pF
10pF
10pF
1μF
10μF
10μF
10μF
LTC3576/LTC3576-1
LDO3V3
2
24
23
25
V
IN2
12
L3
1.61V TO 3.03V
400mA
1μF
DV
CC
4.7μH
I/O
SW2
FB2
1μF
1.02M
365k
30
PUSHBUTTON
MICROCONTROLLER
CHRG
MICROPROCESSOR
13, 14
16
17
20
2
I C
V
IN3
L4
2μH
0.8V TO 1.51V
1A
10
22
CORE
POR
SW3
FB3
EN1
751k
806k
1μF
EN2
C1: MURATA GRM21BR7A106KE51L
C3: TAIYO YUDEN JMK212BJ226MG
L1: COILCRAFT LPS4018-332LM
L2, L3: TOKO 1098AS-4R7M
19
11
37
38
EN3
10k
ENOTG
L4: TOKO 1098AS-2R0M
I
I
LIM0
LIM1
21
3576 TA02
RST3
3576f
42
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
High Efficiency USB/Automotive Power Manager with Overvoltage Protection,
Reverse-Voltage Protection, Low-Battery Start-Up and USB On-the-Go
AUTOMOTIVE
FIREWIRE, ETC.
2
M1
4
L1
V
BOOST
SW
IN
6.8μH
0.47μF
D1
3
150k
4.7μF
68nF
5
LT3480
RUN/SS
22μF
499k
100k
40.2k
8
10
R
FB
T
PG
V
GND BD SYNC
C
7
11
1
6
9
M4
USB
26
27
28
L2
ON-THE-GO
3.3μH
V
WALL ACPR
USB,
WALL
ADAPTER
C
M3
35
34
36
33
31
32
TO OTHER
LOADS
V
V
SW
OUT
BUS
BUS
M2
C1
22μF
0805
V
C3
22μF
0805
2.2k
IDGATE
BAT
M5
5
6
R1
6.2k
OVGATE
OVSENS
+
Li-Ion
30
8
3
CHRG
NTCBIAS
100k
R2
V
IN1
4
29
1
L3
4.7μH
1.76V TO 3.3V
400mA
NTC
9
7
PROG
CLPROG
MEMORY
SW1
FB1
T
1.02M
324k
10pF
1μF
C2
0.1μF
0402
100k
1k
3.01k
10μF
LTC3576/LTC3576-1
LDO3V3
2
24
23
25
V
IN2
12
L4
4.7μH
1.61V TO 3.03V
400mA
1μF
DV
CC
I/O
SW2
FB2
1μF
1.02M
365k
10pF
PUSHBUTTON
MICROCONTROLLER
10μF
MICROPROCESSOR
13, 14
16
17
20
2
I C
V
IN3
L5
2μH
0.8V TO 1.51V
1A
10
22
CORE
POR
SW3
FB3
EN1
751k
806k
10pF
1μF
EN2
19
11
37
38
10μF
EN3
10k
ENOTG
I
I
LIM0
LIM1
21
3576 TA03
RST3
C1, C3: TAYIO YUDEN JMK212BJ226MG L5: TOKO 1098AS-2R0M
D1: DIODES INC. DFLS240L
M1,M2,M4, M5: SILICONIX Si2333DS
L1: TAIYO YUDEN NP06DZB6R8M
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
M3: ON SEMICONDUCTOR NTLJS4114N
R1: 1/10W RESISTOR
R2: CURVE 1
3576f
43
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
High Efficiency USB/Automotive Power Manager with Overvoltage Protection, USB On-the-Go, Pushbutton Start,
Automatic Supply Sequencing and 10 Second Push-and-Hold Hard Shutdown
AUTOMOTIVE
FIREWIRE, ETC.
2
3
4
L1
V
BOOST
SW
IN
6.8μH
0.47μF
D1
4.7μF
150k
68nF
5
LT3480
499k
RUN/SS
22μF
100k
40.2k
8
10
R
FB
T
PG
V
GND BD SYNC
C
7
11
1
6
9
M2
USB
26
27
28
L2
ON-THE-GO
3.3μH
V
WALL ACPR
USB,
WALL
ADAPTER
C
M1
35
34
36
33
31
32
TO OTHER
LOADS
V
V
SW
OUT
BUS
BUS
C1
22μF
0805
V
C3
22μF
0805
2.2k
IDGATE
BAT
M3
5
6
R1
6.2k
OVGATE
OVSENS
+
Li-Ion
30
8
3
CHRG
NTCBIAS
100k
V
IN1
4
29
1
1.76V TO 3.3V
400mA
NTC
9
7
PROG
CLPROG
MEMORY
SW1
FB1
L3
4.7μH
R2
100k
T
1.02M
324k
10pF
1μF
C2
0.1μF
0402
1k
3.01k
10μF
LTC3576/LTC3576-1
14
13
12
16
22
17
SDA
SCL
V
IN3
0.8V TO 1.51V
1A
EN2
CORE
POR
DV
SW3
CC
L5
2μH
1μF
751k
806k
10pF
1μF
10k
20
FB3
10μF
2
LDO3V3
1k
1μF
21
24
10
23
RST3
V
IN2
1.61V TO 3.03V
400mA
EN1
1M
I/O
SW2
4.7k
EN3
M4
L4
4.7μH
1.02M
365k
10pF
1μF
5.1k 5.1k
25
11
37
38
FB2
10μF
10μF
ENOTG
SDA
SCL
10k
10μF
I
I
LIM0
LIM1
2
SEND I C CODE: “0s1201F8”
3576 TA04
C1, C3: TAYIO YUDEN JMK212BJ226MG M1: ON SEMICONDUCTOR NTLJS4114N
D1: DIODES INC. DFLS240L
L1: TAIYO YUDEN NP06DZB6R8M
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
L5: TOKO 1098AS-2R0M
M2, M3: SILICONIX Si2333DS
M4: 2N7002
R1: 1/10W RESISTOR
R2: CURVE 1
3576f
44
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
High Efficiency USB/Automotive Power Manager with Current Limiting and
Overvoltage Protection on Both Inputs, Low-Battery Start-Up and USB On-the-Go
AUTOMOTIVE
FIREWIRE, ETC.
7.5V TO 36V
TRANSIENTS TO 60V
7
8
1
3
L1
4.7μH
V
BOOST
SW
IN
0.47μF
D1
4.7μF
34.2k
LT3653
22μF
6
5
I
I
SENSE
LIM
V
OUT
V
V
GND HVOK
C
9
2
4
USB
26
28
27
L2
ON-THE-GO
3.3μH
ACPR WALL
USB,
C
M1
35
34
36
33
31
32
TO OTHER
LOADS
WALL
V
V
SW
OUT
BUS
C1
22μF
0805
ADAPTER
V
BUS
C3
22μF
0805
IDGATE
BAT
5
6
R1
6.2k
OVGATE
OVSENS
+
Li-Ion
3
NTCBIAS
8
9
7
100k
R2
V
IN1
4
29
1
L3
1.76V TO 3.3V
400mA
NTC
4.7μH
PROG
CLPROG
MEMORY
SW1
FB1
T
1.02M
10pF
1μF
C2
0.1μF
0402
100k
1k
3.01k
10μF
10μF
10μF
324k
LTC3576/LTC3576-1
LDO3V3
2
24
23
25
V
IN2
12
L4
4.7μH
1.61V TO 3.03V
400mA
1μF
DV
CC
I/O
SW2
FB2
1μF
1.02M
365k
10pF
30
PUSHBUTTON
MICROCONTROLLER
CHRG
MICROPROCESSOR
13, 14
16
17
20
2
I C
V
IN3
L5
2μH
0.8V TO 1.51V
1A
10
22
CORE
POR
SW3
FB3
EN1
751k
806k
10pF
1μF
EN2
19
11
37
38
EN3
10k
ENOTG
I
I
LIM0
LIM1
21
3576 TA05
RST3
C1, C3: TAYIO YUDEN JMK212BJ226MG M1: FAIRCHILD FDN327S
D1: DIODES INC. DFLS140
R1: 1/10W RESISTOR
R2: CURVE 1
L1: COILCRAFT MSS6132-472MLC
L2: COILCRAFT LPS4018-332LM
L3, L4: TOKO 1098AS-4R7M
L5: TOKO 1098AS-2R0M
3576f
45
LTC3576/LTC3576-1
TYPICAL APPLICATIONS
High Efficiency USB/Wall Power Manager with Dual Overvoltage Protection,
Reverse-Voltage Protection, Low-Battery Start-Up and USB On-The-Go
5V WALL
ADAPTER
M3
M4
M1
M2
C1
22μF
0805
M5
USB
5
27
28
L1
ON-THE-GO
3.3μH
OVGATE WALL ACPR
35
34
26
36
33
31
32
TO OTHER
LOADS
USB
V
V
V
SW
BUS
C2
V
BUS
C
OUT
22μF
C4
22μF
0805
0805
2.2k
IDGATE
BAT
M6
R1
6.2k
+
6
3
OVSENS
NTCBIAS
Li-Ion
30
8
CHRG
100k
R2
V
IN1
4
29
1
L2
4.7μH
1.76V TO 3.3V
400mA
NTC
9
7
PROG
CLPROG
MEMORY
SW1
FB1
T
1.02M
324k
10pF
1μF
C3
100k
1k
0.1μF
0402
3.01k
10μF
LTC3576/LTC3576-1
LDO3V3
2
24
23
25
V
IN2
12
L3
4.7μH
1.61V TO 3.03V
400mA
1μF
DV
CC
I/O
SW2
FB2
1μF
1.02M
365k
10pF
PUSHBUTTON
MICROCONTROLLER
10μF
MICROPROCESSOR
13, 14
16
17
20
2
I C
V
IN3
L4
2μH
0.8V TO 1.51V
1A
10
22
CORE
POR
SW3
FB3
EN1
751k
806k
10pF
1μF
EN2
19
11
37
38
10μF
EN3
10k
ENOTG
I
I
LIM0
LIM1
21
3576 TA07
RST3
C1, C2, C4: TAYIO YUDEN JMK212BJ226MG M1, M2, M5, M6: SILICONIX Si2333DS
L1: COILCRAFT LPS4018-332LM
L2, L3: TOKO 1098AS-4R7M
L4: TOKO 1098AS-2R0M
M3, M4: FAIRCHILD FDN327S
R1: 1/10W RESISTOR
R2: CURVE 1
3576f
46
LTC3576/LTC3576-1
PACKAGE DESCRIPTION
UFE Package
38-Lead Plastic QFN (4mm × 6mm)
(Reference LTC DWG # 05-08-1750 Rev A)
0.70 0.05
4.50 0.05
3.10 0.05
2.40 REF
2.65 0.05
4.65 0.05
PACKAGE OUTLINE
0.20 0.05
0.40 BSC
4.40 REF
5.10 0.05
6.50 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.30 OR
0.35 s 45°
CHAMFER
2.40 REF
R = 0.10
0.75 0.05
TYP
4.00 0.10
37 38
0.40 0.10
PIN 1
TOP MARK
(NOTE 6)
1
2
4.65 0.10
4.40 REF
6.00 0.10
2.65 0.10
(UFE38) QFN 0707 REV A
0.200 REF
R = 0.115
TYP
0.20 0.05
0.40 BSC
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3576f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
47
LTC3576/LTC3576-1
TYPICAL APPLICATION
Firewire/Automotive Battery Charger with Automatic USB On-the-Go and Overvoltage Protection
AUTOMOTIVE
FIREWIRE, ETC.
7.5V TO 36V
TRANSIENTS TO 60V
7
8
1
L1
4.7μH
V
IN
BOOST
SW
0.47μF
D1
4.7μF
LT3653
22μF
34.2k
6
5
3
I
I
SENSE
LIM
V
OUT
V
V
GND HVOK
C
9
2
4
USB
ON-THE-GO
M1
26
28
27
J1
L2
MICRO-AB
3.3μH
ACPR WALL
C
35
34
36
33
TO OTHER
LOADS
V
BUS
V
V
SW
BUS
C1
22μF
0805
–
D
V
BUS
OUT
C2
22μF
0805
+
D
32
5
6
ID
OVGATE
OVSENS
BAT
6.2k
+
GND
Li-Ion
3.01k
LTC3576/LTC3576-1
TO USB
TRANSCEIVER
29
1
2
LDO3V3
PROG
1μF
CLPROG
300k
C3
M2
1k
0.1μF
0402
11
ENOTG
3576 TA06
V
BUS
POWERS UP WHEN ID PIN HAS LESS THAN 10Ω TO GND (MICRO-A PLUG CONNECTED)
C1, C2: TAIYO YUDEN JMK212BJ226MG L2: COILCRAFT LPS4018-332LM
D1: DIODES INC. DFLS140
J1: HIROSE ZX62-AB-5PA
L1: COILCRAFT MSS6132-472MLC
M1: FAIRCHILD FDN372S
M2: SILICONIX Si2333DS
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
Power Management
Switching USB Power Manager with Li-Ion/Polymer
Chargers Plus Triple Buck DC/DC
Maximizes Available Power from USB Port, Bat-Track, 1.5A Max Charge
Current, 180mꢀ Ideal Diode with <50mꢀ Option, 3.3V/25mA Always-On
LDO, Two 400mA and One 1A Buck Regulators, “Instant On” Operation
(LTC3555-1), “Instant On” Operation and 4.1V Float Votlage (LTC3555-3),
4mm × 5mm 28-Pin QFN Package
LTC3555/LTC3555-1
LTC3555-3
Switching USB Power Manager with Li-Ion/Polymer
Charger Plus Dual Buck Plus Buck-Boost DC/DC
Maximizes Available Power from USB Port, Bat-Track, “Instant On”
Operation, 1.5A Max Charge Current, 180mꢀ Ideal Diode with <50mꢀ
Option, 3.3V/25mA Always-On LDO, Two 400mA Buck Regulators, One
1A Buck-Boost Regulator, 4mm × 5mm 28-Pin QFN Package
LTC3556
LTC3586
Switching USB Power Manager with Li-Ion/Polymer
Charger Plus Dual Buck Plus Buck-Boost Plus Boost
DC/DC
Maximizes Available Power from USB Port, Bat-Track, “Instant On”
Operation, 1.5A Max Charge Current, 180mꢀ Ideal Diode with <50mꢀ
Option, 3.3V/25mA Always-On LDO, Two 400mA Synchronous Buck
Regulators, One 1A Buck-Boost Regulator, One 600mA Boost Regulator,
4mm × 6mm 38-Pin QFN Package
Switching USB Power Manager and Battery Chargers
With Overvoltage Protection
Maximizes Available Power from USB Port, Bat-Track, “Instant On”
Operation, 1.5A Max Charge Current, 180mꢀ Ideal Diode with <50mꢀ
Option, Controller for External High Voltage Buck Regulator, Protection
Against Transients of Up to 60V, 3.3V/25mA Always-On LDO,4.1V Float
Voltage (LTC4098-1), 4mm × 3mm 14-Pin DFN Package
LTC4098/LTC4098-1
3576f
LT 0908 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
48
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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