LTC3728L-1_15_技术文档

LTC3728L-1

Dual, 550kHz, 2-Phase

Synchronous Regulator

FEATURES

DESCRIPTION

The LTC^®3728L-1 is a dual high performance step-down

switching regulator controller that drives all N-channel

synchronouspowerMOSFETstages.Aconstantfrequency

currentmodearchitectureallowsphase-lockablefrequency

of up to 550kHz. Power loss and noise due to the ESR of

the input capacitors are minimized by operating the two

controller output stages out of phase. The LTC3728L-1

is identical to the LTC3728L except that the LTC3728L-1

lacks the over current latchoff feature.

n

Dual, 180° Phased Controllers Reduce Required

Input Capacitance and Power Supply Induced Noise

OPTI-LOOP^®Compensation Minimizes C

n

OUT

n

1.5ꢀ Output Voltage Accuracy

Power Good Output Voltage Indicator

Phase-Lockable Fixed Frequency 250kHz to 550kHz

Over Current Latchoff Disabled

Wide V Range: 4.5V to 28V (35V for LTC3728LI-1)

IN

Operation

n

OPTI-LOOPcompensationallowsthetransientresponseto

be optimized over a wide range of output capacitance and

ESR values. The precision 0.8V reference and power good

output indicator are compatible with future microproces-

sor generations, and a wide 4.5V to 28V (30V maximum/

35V for LTC3728LI-1) input supply range encompasses

all battery chemistries.

Very Low Dropout Operation: 99% Duty Cycle

Adjustable Soft-Start Current Ramping

Foldback Output Current Limiting

Output Overvoltage Protection

Low Shutdown I : 20μA

Q

5V and 3.3V Standby Regulators

3 Selectable Operating Modes: Constant Frequency,

Burst Mode^®Operation and PWM

5mm × 5mm QFN and 28-Lead Narrow SSOP

Packages

A RUN/SS pin for each controller provides soft-start.

Current foldback limits MOSFET dissipation during short-

circuit conditions. The FCB mode pin can select among

Burst Mode operation, constant frequency mode and

continuousinductorcurrentmodeorregulateasecondary

winding. The LTC3728L-1 includes a power good output

pin that indicates when both outputs are within 7.5% of

their designed set point.

n

APPLICATIONS

n

Notebook and Palmtop Computers

Telecom Systems

Portable Instruments

Battery-Operated Digital Devices

DC Power Distribution Systems

n

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

n

Protected by U.S. Patents including 5929620, 6177787, 6144199, 5471178, 5994885, 6100678.

TYPICAL APPLICATION

V

IN

5.2V TO 28V

C

22μF

50V

1μF

CERAMIC

IN

+

4.7μF

D3

D4

V

PGOOD INTV

IN

CC

M2

M1

CERAMIC

TG1

TG2

L1

3.2μH

L2

3.2μH

BOOST1

SW1

BOOST2

SW2

C

, 0.1μF

C

, 0.1μF

B2

B1

LTC3728L-1

BG1

BG2

f

IN

500kHz

PLLIN

PGND

+

–

+

SENSE1

SENSE2

R

SENSE2

0.01Ω

SENSE1

1000pF

0.01Ω

–

SENSE1

V

I

SENSE2

V

3.3V

5A

OSENSE1

TH1

OSENSE2

I

TH2

V

OUT2

OUT1

5V

5A

R2

105k

1%

R4

63.4k

1%

C

C2

C1

220pF

C

47μF

6V

C

56μF

6V

RUN/SS1 SGND RUN/SS2

OUT1

OUT

220pF

R

C2

+

R1

20k

1%

R3

20k

1%

R

C1

C

SS2

0.1μF

SS1

0.1μF

15k

SP

M1, M2: FDS6982S

3728l1 F01

Figure 1. High Efﬁciency Dual 5V/3.3V Step-Down Converter

3728l1fc

1

LTC3728L-1

(Note 1)

ABSOLUTE MAXIMUM RATINGS

Input Supply Voltage (V ).........................30V to –0.3V

PLLIN, PLLFLTR, FCB, Voltage.............. INTV to –0.3V

CC

IN

Input Supply Voltage (V ) LTC3728LI-1....35V to –0.3V

I

, V

Voltages.... 2.7V to –0.3V

IN

TH1, TH2 OSENSE1 OSENSE2

Top Side Driver Voltages

Peak Output Current <10μs (TG1, TG2, BG1, BG2).....3A

(BOOST1, BOOST2)............................... 36V to –0.3V

(BOOST1, BOOST2) LTC3728LI-1.......... 38V to –0.3V

Switch Voltage (SW1, SW2)...........................30V to –5V

Switch Voltage (SW1, SW2) LTC3728LI-1...35V to –0.3V

INTV Peak Output Current ..................................40mA

CC

Operating Temperature Range (Note 7).... –40°C to 85°C

Junction Temperature (Note 2) ............................. 125°C

Storage Temperature Range................... –65°C to 125°C

Reﬂow Peak Body Temperature (UH Package)...... 260°C

Lead Temperature (Soldering, 10 sec)

INTV EXTV , RUN/SS1, RUN/SS2, (BOOST1-SW1),

CC,

CC

(BOOST2-SW2), PGOOD ......................... 7V to –0.3V

INTV EXTV LTC3728LI-1....................... 8V to –0.3V

GN Package ...................................................... 300°C

CC,

CC

+

–

SENSE1 , SENSE2 , SENSE1 ,

–

SENSE2 Voltages .....................(1.1)INTV to –0.3V

CC

PIN CONFIGURATION

TOP VIEW

1

2

PGOOD

TG1

28

27

26

25

24

23

22

21

20

19

18

17

16

15

RUN/SS1

+

SENSE1

–

32 31 30 29 28 27 26 25

3

SW1

SENSE

V

1

2

3

4

5

6

7

8

24 BOOST1

OSENSE1

4

BOOST1

V

OSENSE1

PLLFLTR

PLLIN

FCB

23

22

21

V

IN

5

V

IN

PLLFLTR

PLLIN

FCB

BG1

6

BG1

EXTV

CC

7

EXTV

CC

33

I

20 INTV

TH1

SGND

3.3V

CC

8

INTV

CC

I

TH1

PGND

19

9

PGND

BG2

SGND

18 BG2

OUT

10

11

12

13

14

3.3V

OUT

I

17 BOOST2

TH2

BOOST2

SW2

I

TH2

9

10 11 12 13 14 15 16

V

OSENSE2

–

TG2

SENSE2

+

RUN/SS2

UH PACKAGE

32-LEAD (5mm s 5mm) PLASTIC QFN

GN PACKAGE

28-LEAD NARROW PLASTIC SSOP

T

= 125°C, θ = 34°C/W

JA

JMAX

T

= 125°C, θ = 95°C/W

JA

EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB

JMAX

ORDER INFORMATION

LEAD FREE FINISH

LTC3728LEGN-1#PBF

LTC3728LIGN-1#PBF

LTC3728LEUH-1#PBF

LTC3728LIUH-1#PBF

LEAD BASED FINISH

LTC3728LEGN-1

TAPE AND REEL

LTC3728LEGN-1#TRPBF LTC3728LEGN-1

LTC3728LIGN-1#TRPBF LTC3728LIGN-1

LTC3728LEUH-1#TRPBF 728LE1

PART MARKING

PACKAGE DESCRIPTION

28-Lead Narrow Plastic SSOP

32-Lead (5mm × 5mm) Plastic DFN

PACKAGE DESCRIPTION

28-Lead Narrow Plastic SSOP

32-Lead (5mm × 5mm) Plastic DFN

TEMPERATURE RANGE

–40°C to 85°C

TEMPERATURE RANGE

–40°C to 85°C

LTC3728LIUH-1#TRPBF

TAPE AND REEL

3728L1

PART MARKING

LTC3728LEGN-1

LTC3728LIGN-1

728LE1

LTC3728LEGN-1#TR

LTC3728LIGN-1#TR

LTC3728LEUH-1#TR

LTC3728LIUH-1#TR

LTC3728LIGN-1

LTC3728LEUH-1

LTC3728LIUH-1

3728L1

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

3728l1fc

2

LTC3728L-1

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 15V, V_{RUN/SS1, 2}= 5V unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP

Main Control Loops

MAX

UNITS

V

Regulated Feedback Voltage

Feedback Current

(Note 3); I

Voltage = 1.2V

TH1, 2

●

0.788 0.800 0.812

V

nA

OSENSE1, 2

I

(Note 3)

–5

–50

VOSENSE1, 2

V

Reference Voltage Line Regulation

Output Voltage Load Regulation

V

= 3.6V to 30V (Note 3)

0.002

0.02

%/V

REFLNREG

LOADREG

IN

(Note 3)

Measured in Servo Loop; ΔI Voltage = 1.2V to 0.7V

Measured in Servo Loop; ΔI Voltage = 1.2V to 2.0V

●

0.1

–0.1

0.5

–0.5

%

TH

g

Transconductance Ampliﬁer g

I

= 1.2V; Sink/Source 5μA; (Note 3)

= 1.2V; (Note 3)

1.3

3

mmho

MHz

m1, 2

m

TH1, 2

Transconductance Ampliﬁer GBW

mGBW1, 2

I

Input DC Supply Current

Normal Mode

(Note 4)

IN

RUN/SS1, 2

Q

V

= 15V; EXTV Tied to V ; V = 5V

OUT1 OUT1

450

20

μA

CC

Shutdown

= 0V

35

V

Forced Continuous Threshold

Forced Continuous Pin Current

●

0.76 0.800

–0.50 –0.18

4.3

0.84

–0.1

4.8

V

μA

V

FCB

I

V

= 0.85V

FCB

V

Burst Inhibit (Constant Frequency)

Threshold

Measured at FCB pin

BINHIBIT

UVLO

Undervoltage Lockout

Feedback Overvoltage Lockout

Sense Pins Total Source Current

Maximum Duty Factor

V

Ramping Down

●

3.5

4

V

IN

V

OVL

Measured at V

0.84

–90

98

0.86

–60

99.4

1.2

0.88

OSENSE1, 2

I

(Each Channel); V

In Dropout

–

– = V + + = 0V

SENSE1 , 2

μA

%

μA

V

SENSE

SENSE1 , 2

DF

MAX

I

Soft-Start Charge Current

V

= 1.9V

RUN/SS1, 2

0.5

1.0

RUN/SS1, 2

V

ON RUN/SS Pin ON Threshold

Maximum Current Sense Threshold

V

V Rising

RUN/SS1, RUN/SS2

1.5

2.0

RUN/SS1, 2

V

= 0.7V,V

–

= 5V

65

62

75

85

88

mV

SENSE(MAX)

OSENSE1, 2

SENSE1 , 2

●

TG Transition Time:

Rise Time

Fall Time

(Note 5)

TG1, 2 t

C

= 3300pF

55

100

ns

r

f

LOAD

= 3300pF

LOAD

BG Transition Time:

Rise Time

Fall Time

(Note 5)

LOAD

BG1, 2 t

C

= 3300pF

45

100

90

ns

r

f

TG/BG t

Top Gate Off to Bottom Gate On Delay

Synchronous Switch-On Delay Time

1D

C

= 3300pF Each Driver

80

ns

LOAD

BG/TG t

Bottom Gate Off to Top Gate On Delay

Top Switch-On Delay Time

2D

= 3300pF Each Driver

80

ns

LOAD

t

Minimum On-Time

Tested with a Square Wave (Note 6)

100

ON(MIN)

INTV Linear Regulator

CC

V

Internal V Voltage

6V < V < 30V, V = 4V

EXTVCC

4.8

4.5

5.0

0.2

100

4.7

0.2

5.2

2.0

200

V

%

INTVCC

CC

IN

INT

INTV Load Regulation

I

CC

I

CC

I

CC

= 0 to 20mA, V

= 4V

EXTVCC

LDO

CC

EXT

EXTV Voltage Drop

= 20mA, V

= 5V

EXTVCC

mV

V

CC

EXTV Switchover Voltage

= 20mA, EXTV Ramping Positive

●

EXTVCC

LDOHYS

CC

EXTV Hysteresis

V

CC

Oscillator and Phase-Locked Loop

f

Nominal Frequency

Lowest Frequency

Highest Frequency

PLLIN Input Resistance

V

= 1.2V

= 0V

360

230

480

400

260

550

50

440

290

590

kHz

NOM

LOW

HIGH

PLLFLTR

≥ 2.4V

R

kꢀ

PLLIN

3728l1fc

3

LTC3728L-1

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= 15V, V_{RUN/SS1, 2}= 5V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

I

Phase Detector Output Current

Sinking Capability

Sourcing Capability

PLLFLTR

f

< f

> f

–15

15

μA

PLLIN

OSC

3.3V Linear Regulator

V

3.3V Regulator Output Voltage

3.3V Regulator Load Regulation

3.3V Regulator Line Regulation

Leakage Current in Shutdown

No Load

= 0 to 10mA

●

3.2

3.35

0.5

3.45

2

V

%

3.3OUT

3.3IL

I

3.3

6V < V < 30V

0.05

10

0.2

50

%

3.3VL

IN

I

V

= 0V; V

= 0V, V = 3V

μA

3.3LEAK

RUN/SS1

RUN/SS2

IN

PGOOD Output

V

PGOOD Voltage Low

I

= 2mA

0.1

0.3

1

V

PGL

PGOOD

I

PGOOD Leakage Current

PGOOD Trip Level, Either Controller

V

= 5V

μA

PGOOD

V

with Respect to Set Output Voltage

OSENSE

PG

OSENSE

V

Ramping Negative

Ramping Positive

–6

6

–7.5

7.5

–9.5

9.5

%

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 5: Rise and fall times are measured using 10% and 90% levels. Delay

times are measured using 50% levels.

Note 6: The minimum on-time condition is speciﬁed for an inductor

peak-to-peak ripple current ≥40% of I

(see minimum on-time

MAX

Note 2: T is calculated from the ambient temperature T and power

J

A

considerations in the Applications Information section).

dissipation P according to the following formulas:

D

Note 7: The LTC3728LE-1 are guaranteed to meet performance

speciﬁcations from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C

operating temperature range are assured by design, characterization

and correlation with statistical process controls. The LTC3728LI-1 is

guaranteed to meet performance speciﬁcations over the full –40°C to 85°C

operating temperature range

LTC3728LUH-1: T = T + (P • 34°C/W)

J

A

D

LTC3728LGN-1: T = T + (P • 95°C/W)

J

A

D

Note 3: The IC is tested in a feedback loop that servos V

speciﬁed voltage and measures the resultant V

to a

ITH1, 2

OSENSE1, 2.

Note 4: Dynamic supply current is higher due to the gate charge being

delivered at the switching frequency. See Applications Information.

TYPICAL PERFORMANCCE CHARACTERISTICS

Efﬁciency vs Output Current

and Mode (Figure 13)

Efﬁciency vs Output Current

(Figure 13)

Efﬁciency vs Input Voltage

(Figure 13)

100

90

80

70

60

50

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

Burst Mode

OPERATION

V

= 7V

IN

V

= 10V

IN

FORCED

CONTINUOUS

MODE (PWM)

V

= 15V

IN

V

IN

= 20V

CONSTANT

FREQUENCY

(BURST DISABLE)

V

I

= 5V

= 3A

V

= 15V

= 5V

OUT

IN

OUT

V

= 5V

OUT

V

f = 250kHz

5

15

25

INPUT VOLTAGE (V)

35

0.1

1

0.01

0.1

1

0.001

0.01

10

0.001

10

OUTPUT CURRENT (A)

3728L1 G03

3728L1 G02

3728L1 G01

3728l1fc

4

LTC3728L-1

TYPICAL PERFORMANCE CHARACTERISTICS

Supply Current vs Input Voltage

and Mode (Figure 13)

INTV_CCand EXTV_CCSwitch

Voltage vs Temperature

EXTV_CCVoltage Drop

200

150

100

50

1000

800

600

400

200

0

5.05

5.00

4.95

4.90

4.85

4.80

4.75

4.70

INTV VOLTAGE

CC

BOTH

CONTROLLERS ON

EXTV SWITCHOVER THRESHOLD

CC

SHUTDOWN

10

0

10

20

30

40

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

0

5

15

20

25

30

CURRENT (mA)

INPUT VOLTAGE (V)

3728L1 G05

3728L1 G06

3728L1 G04

Maximum Current Sense Threshold

vs Percent of Nominal Output

Voltage (Foldback)

Maximum Current Sense Threshold

vs Duty Factor

Internal 5V LDO Line Regulation

5.1

5.0

75

50

25

0

80

70

60

50

40

30

20

10

0

I

= 1mA

LOAD

4.9

4.8

4.7

4.6

4.5

4.4

20

INPUT VOLTAGE (V)

30

0

5

10

15

25

0

20

40

60

80

100

50

0

25

75

100

DUTY FACTOR (%)

PERCENT ON NOMINAL OUTPUT VOLTAGE (%)

3728L1 G07

3728L1 G08

3728L1 G09

Current Sense Threshold

vs I_THVoltage

Maximum Current Sense Threshold

vs V_RUN/SS(Soft-Start)

Maximum Current Sense Threshold

vs Sense Common Mode Voltage

90

80

60

40

20

80

76

72

68

64

60

V

= 1.6V

SENSE(CM)

70

60

50

40

30

20

10

0

–10

–20

–30

0

1

2

3

4

5

6

0

0.5

1

1.5

(V)

2

2.5

0

1

2

3

4

5

V

(V)

V

RUN/SS

COMMON MODE VOLTAGE (V)

ITH

3728L1 G10

3728L1 G12

3728L1 G11

3728l1fc

5

LTC3728L-1

TYPICAL PERFORMANCE CHARACTERISTICS

Load Regulation

V_ITHvs V_RUN/SS

SENSE Pins Total Source Current

0.0

–0.1

–0.2

–0.3

–0.4

2.5

2.0

1.5

1.0

100

50

FCB = 0V

= 15V

V

= 0.7V

OSENSE

V

IN

FIGURE 13

0

–50

–100

0.5

0

1

2

3

4

5

0

2

3

4

5

6

2

4

1

0

6

V

(V)

LOAD CURRENT (A)

V

COMMON MODE VOLTAGE (V)

RUN/SS

SENSE

3728L1 G13

3728L1 G14

3728L1 G15

Maximum Current Sense

Threshold vs Temperature

Dropout Voltage vs Output Current

(Figure 14)

RUN/SS Current vs Temperature

80

78

76

74

72

70

4

3

2

1

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

V

= 5V

OUT

R

= 0.015Ω

SENSE

R

= 0.010Ω

SENSE

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

OUTPUT CURRENT (A)

–50 –25

0

25

50

75 100 125

–50 –25

0

25

125

50

75 100

TEMPERATURE (°C)

3728L1 G18

3728L1 G17

3728L1 G25

Soft-Start Up (Figure 13)

Load Step (Figure 13)

V

OUT

200mV/DIV

V

OUT

200mV/DIV

5V/DIV

V

RUN/SS

5V/DIV

I

L

2A/DIV

L

2A/DIV

I

L

2A/DIV

3728L1 G20

3728L1 G21

3728L1 G19

V

= 15V

= 5V

PLLFLTR

20μs/DIV

V

= 15V

= 5V

PLLFLTR

20μs/DIV

V

= 15V

= 5V

5ms/DIV

IN

OUT

IN

OUT

IN

OUT

= 50V

LOAD STEP = 0A TO 3A

Burst Mode OPERATION

LOAD STEP = 0A TO 3A

CONTINUOUS MODE

3728l1fc

6

LTC3728L-1

TYPICAL PERFORMANCE CHARACTERISTICS

Input Source/Capacitor

Instantaneous Current (Figure 13)

Constant Frequency (Burst Inhibit)

Operation (Figure 13)

Burst Mode Operation (Figure 13)

I

IN

V

2A/DIV

V

OUT

20mV/DIV

V

IN

200mV/DIV

V

SW1

10V/DIV

V

SW2

I

L

10V/DIV

0.5A/DIV

3728L1 G24

3728L1 G22

3728L1 G23

V

I

= 15V

= 5V

PLLFLTR

2μs/DIV

V

I

= 15V

1μs/DIV

= 3.3V

V

I

= 15V

= 5V

PLLFLTR

10μs/DIV

IN

OUT

IN

OUT

= 5V, V

OUT1

PLLFLTR

= I

OUT2

= 0V

= 5V

= 20mA

= 2A

= 5V

= 20mA

FCB

OUT

OUT5 OUT3.3

FCB

OUT

Current Sense Pin Input Current

vs Temperature

EXTV_CCSwitch Resistance

vs Temperature

35

10

8

V

= 5V

OUT

33

31

29

27

25

6

4

2

0

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

3728L1 G26

3728L1 G27

Oscillator Frequency

vs Temperature

Undervoltage Lockout

vs Temperature

3.50

700

600

V

= 2.4V

PLLFLTR

3.45

3.40

3.35

500

400

300

200

100

= 1.2V

= 0V

V

PLLFLTR

3.30

3.25

3.20

0

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

50

100 125

–50 –25

0

25

75

TEMPERATURE (°C)

3728L1 G29

3728L1 G28

3728l1fc

7

LTC3728L-1

PIN FUNCTIONS

V

, V

: Error Ampliﬁer Feedback Input.

TG2, TG1: High Current Gate Drives for Top N-Channel

OSENSE1

OSENSE2

Receives the remotely-sensed feedback voltage for each

controller from an external resistive divider across the

output.

MOSFETs. These are the outputs of ﬂoating drivers with

a voltage swing equal to INTV – 0.5V superimposed on

CC

the switch node voltage SW.

PLLFLTR:FilterConnectionforPhase-LockedLoop. Alter-

natively, this pin can be driven with an AC or DC voltage

source to vary the frequency of the internal oscillator.

SW2,SW1:SwitchNodeConnectionstoInductors.Voltage

swing at these pins is from a Schottky diode (external)

voltage drop below ground to V .

IN

PLLIN: External Synchronization Input to Phase Detector.

This pin is internally terminated to SGND with 50kꢀ. The

phase-locked loop will force the rising top gate signal of

controller 1 to be synchronized with the rising edge of

the PLLIN signal.

BOOST2, BOOST1: Bootstrapped Supplies to the Top

Side Floating Drivers. Capacitors are connected between

the boost and switch pins and Schottky diodes are tied

between the boost and INTV pins. Voltage swing at the

CC

boost pins is from INTV to (V + INTV ).

CC

IN

CC

FCB: Forced Continuous Control Input. This input acts

on both controllers and is normally used to regulate a

secondary winding. Pulling this pin below 0.8V will force

continuous synchronous operation.

BG2, BG1:HighCurrentGateDrivesforBottom(Synchro-

nous) N-Channel MOSFETs. Voltage swing at these pins

is from ground to INTV .

CC

PGND: Driver Power Ground. Connects to the sources of

I

: Error Ampliﬁer Output and Switching Regulator

bottom(synchronous)N-channelMOSFETs,anodesofthe

TH1, TH2

Compensation Point. Each associated channels’ current

Schottky rectiﬁers and the (–) terminal(s) of C .

IN

comparator trip point increases with this control voltage.

INTV : Output of the Internal 5V Linear Low Dropout

CC

SGND:SmallSignalGround.Commontobothcontrollers,

this pin must be routed separately from high current

Regulator and the EXTV Switch. The driver and control

CC

circuits are powered from this voltage source. Must be

decoupled to power ground with a minimum of 4.7μF

tantalum or other low ESR capacitor.

grounds to the common (–) terminals of the C

capacitors.

OUT

3.3V : Linear Regulator Output. Capable of supplying

EXTV : External Power Input to an Internal Switch Con-

CC

OUT

10mA DC with peak currents as high as 50mA.

nected to INTV . This switch closes and supplies V

CC CC

power,bypassingtheinternallowdropoutregulator,when-

ever EXTV is higher than 4.7V. See EXTV connection

NC: No Connect.

CC

–

SENSE2 , SENSE1 : The (–) Input to the Differential Cur-

in Applications section. Do not exceed 7V on this pin.

rent Comparators.

V : Main Supply Pin. A bypass capacitor should be tied

IN

+

SENSE2 ,SENSE1 :The(+)InputtotheDifferentialCurrent

Comparators. The I pin voltage and controlled offsets

between this pin and the signal ground pin.

TH

PGOOD: Open-Drain Logic Output. PGOOD is pulled to

–

+

between the SENSE and SENSE pins in conjunction with

set the current trip threshold.

ground when the voltage on either V

within 7.5% of its set point.

pin is not

OSENSE

R

SENSE

RUN/SS2, RUN/SS1: Combination of soft-start and run

control inputs. A capacitor to ground at each of these pins

sets the ramp time to full output current. Forcing either of

these pins back below 1.0V causes the IC to shut down

the circuitry required for that particular controller.

Exposed Pad (UH Package Only): Signal Ground. Must

be soldered to the PCB, providing a local ground for the

control components of the IC, and be tied to the PGND

pin under the IC.

3728l1fc

8

LTC3728L-1

FUNCTIONAL DIAGRAM

PLLIN

INTV

V

IN

CC

F

IN

PHASE DET

D

C

B

DUPLICATE FOR SECOND

CONTROLLER CHANNEL

50k

BOOST

TG

PLLFLTR

B

DROP

OUT

+

CLK1

CLK2

–

TOP

BOT

R

LP

C

IN

D

OSCILLATOR

1

DET

BOT

FCB

C

LP

SW

TOP ON

0.86V

S

Q

+

SWITCH

LOGIC

INTV

CC

R

V

OSENSE1

PGOOD

BG

–

+

0.74V

0.86V

C

OUT

PGND

B

+

–

0.55V

–

+

V

OUT

SHDN

R

SENSE

V

OSENSE2

–

+

INTV

CC

0.74V

BINH

I1

I2

INTV

CC

3V

+

–

+

–

+

4.5V

0.8V

–

+ +

–

+

0.18μA

FCB

–

SENSE

30k

R6

3mV

0.86V

4(V

–

)

+

–

FB

FCB

R5

SLOPE

COMP

45k

2.4V

3.3V

V

OUT

OSENSE

R2

V

+

–

V

FB

REF

–

EA

+

0.80V

0.86V

R1

OV

V

IN

+

–

V

IN

C

+

–

4.8V

I

TH

5V

1.2μA

EXTV

INTV

LDO

REG

CC

SHDN

RST

RUN

SOFT

START

R

C

C2

SS

6V

4(V

)

CC

FB

5V

+

RUN/SS

INTERNAL

SUPPLY

SGND (UH PACKAGE PAD)

C

3728L1 F02

Figure 2

3728l1fc

9

LTC3728L-1

OPERATION ^{(Refer to Functional Diagram)}

Main Control Loop

by temporarily forcing continuous PWM operation on

both controllers; and 2) to select between two modes

of low current operation. When the FCB pin voltage is

below 0.8V, the controller forces continuous PWM cur-

rent mode operation. In this mode, the top and bottom

MOSFETsarealternatelyturnedontomaintaintheoutput

voltage independent of direction of inductor current.

The LTC3728L-1 is a constant frequency, current mode

step-down controller with two channels operating 180

degrees out of phase. During normal operation, each top

MOSFET is turned on when the clock for that channel sets

the RS latch, and turned off when the main current com-

parator, I , resets the RS latch. The peak inductor current

1

When the FCB pin is below V

– 2V but greater

INTVCC

at which I resets the RS latch is controlled by the voltage

1

than 0.8V, the controller enters Burst Mode operation.

Burst Mode operation sets a minimum output current

level before inhibiting the top switch and turns off the

synchronousMOSFET(s)whentheinductorcurrentgoes

negative. This combination of requirements will, at low

on the I pin, which is the output of each error ampliﬁer

TH

EA. The V

pin receives the voltage feedback signal,

OSENSE

which is compared to the internal reference voltage by the

EA. When the load current increases, it causes a slight

decrease in V

relative to the 0.8V reference, which

OSENSE

currents, force the I pin below a voltage threshold that

TH

in turn causes the I voltage to increase until the average

TH

will temporarily inhibit turn-on of both output MOSFETs

inductor current matches the new load current. After the

top MOSFET has turned off, the bottom MOSFET is turned

on until either the inductor current starts to reverse, as

until the output voltage drops. There is 60mV of hyster-

esis in the burst comparator B tied to the I pin. This

TH

hysteresis produces output signals to the MOSFETs that

turn them on for several cycles, followed by a variable

“sleep” interval depending upon the load current. The

resultant output voltage ripple is held to a very small

value by having the hysteretic comparator after the error

ampliﬁer gain block.

indicated by current comparator I , or the beginning of

2

the next cycle.

ThetopMOSFETdriversarebiasedfromﬂoatingbootstrap

capacitor C , which normally is recharged during each off

B

cycle through an external diode when the top MOSFET

turns off. As V decreases to a voltage close to V , the

IN

OUT

loop may enter dropout and attempt to turn on the top

MOSFET continuously. The dropout detector detects this

andforcesthetopMOSFEToffforabout400nseverytenth

Frequency Synchronization

The phase-locked loop allows the internal oscillator to

be synchronized to an external source via the PLLIN pin.

The output of the phase detector at the PLLFLTR pin is

also the DC frequency control input of the oscillator that

operates over a 260kHz to 550kHz range corresponding

to a DC voltage input from 0V to 2.4V. When locked, the

PLL aligns the turn on of the top MOSFET to the rising

edge of the synchronizing signal. When PLLIN is left

open, the PLLFLTR pin goes low, forcing the oscillator to

minimum frequency.

cycle to allow C to recharge.

B

The main control loop is shut down by pulling the RUN/SS

pin low. Releasing RUN/SS allows an internal 1.2μA cur-

rent source to charge soft-start capacitor C . When C

SS

TH

reaches 1.5V, the main control loop is enabled with the I

voltage clamped at approximately 30% of its maximum

value. As C continues to charge, the I pin voltage is

SS

TH

graduallyreleasedallowingnormal,full-currentoperation.

When both RUN/SS1 and RUN/SS2 are low, all controller

functions are shut down, including the 5V regulator.

Constant Frequency Operation

When the FCB pin is tied to INTV , Burst Mode opera-

CC

Low Current Operation

tion is disabled and the forced minimum output current

requirementisremoved.Thisprovidesconstantfrequency,

discontinuous current (preventing reverse inductor cur-

rent) operation over the widest possible output current

range.Thisconstantfrequencyoperationisnotasefﬁcient

The FCB pin is a multifunction pin providing two func-

tions: 1) to provide regulation for a secondary winding

3728l1fc

10

LTC3728L-1

OPERATION ^{(Refer to Functional Diagram)}

as Burst Mode operation, but does provide a lower noise,

constantfrequencyoperatingmodedowntoapproximately

1% of the designed maximum output current.

turned off within 10μs and the pin is allowed to be pulled

up by an external resistor to a source of up to 7V.

Foldback Current

Continuous Current (PWM) Operation

TheRUN/SScapacitorsareusedinitiallytolimittheinrush

currentofeachswitchingregulator.Foldbackcurrentlimit-

ing is activated when the output voltage falls below 70%

of its nominal level. If a short is present, a safe, low output

current is provided due to the internal current foldback

and actual power wasted is low due to the efﬁcient nature

of the current mode switching regulator.

Tying the FCB pin to ground will force continuous current

operation. This is the least efﬁcient operating mode, but

may be desirable in certain applications. The output can

source or sink current in this mode. When sinking current

while in forced continuous operation, the controller will

cause current to ﬂow back into the input ﬁlter capacitor.

If large enough, this element will prevent the input sup-

ply from boosting to unacceptably high levels; see C

Selection in the Applications Information Section.

OUT

THEORY AND BENEFITS OF 2-PHASE OPERATION

The LTC1628 and the LTC3728L-1 family of dual high ef-

ﬁciencyDC/DCcontrollersbringstheconsiderablebeneﬁts

of 2-phase operation to portable applications for the ﬁrst

time.Notebookcomputers,PDAs,handheldterminalsand

automotive electronics will all beneﬁt from the lower input

ﬁlteringrequirement,reducedelectromagneticinterference

(EMI) and increased efﬁciency associated with 2-phase

operation.

INTV /EXTV Power

CC

Power for the top and bottom MOSFET drivers and most

otherinternalcircuitryisderivedfromtheINTV pin.When

CC

the EXTV pin is left open, an internal 5V low dropout

CC

linear regulator supplies INTV power. If EXTV is taken

CC

above 4.7V, the 5V regulator is turned off and an internal

switch is turned on connecting EXTV to INTV . This al-

CC

Why the need for 2-phase operation? Up until the 2-phase

family, constant-frequency dual switching regulators

operated both channels in phase (i.e., single-phase

operation). This means that both switches turned on at

the same time, causing current pulses of up to twice the

amplitude of those for one regulator to be drawn from the

input capacitor and battery. These large amplitude current

pulses increased the total RMS current ﬂowing from the

input capacitor, requiring the use of more expensive input

capacitorsandincreasingbothEMIandlossesintheinput

capacitor and battery.

lowstheINTV powertobederivedfromahighefﬁciency

CC

external source such as the output of the regulator itself

or a secondary winding, as described in the Applications

Information section.

Output Overvoltage Protection

An overvoltage comparator, OV, guards against transient

overshoots (>7.5%) as well as other more serious condi-

tions that may overvoltage the output. In this case, the top

MOSFET is turned off and the bottom MOSFET is turned

on until the overvoltage condition is cleared.

With 2-phase operation, the two channels of the dual-

switchingregulatorareoperated180degreesoutofphase.

Thiseffectivelyinterleavesthecurrentpulsesdrawnbythe

switches,greatlyreducingtheoverlaptimewheretheyadd

together. The result is a signiﬁcant reduction in total RMS

input current, which in turn allows less expensive input

capacitors to be used, reduces shielding requirements for

EMI and improves real world operating efﬁciency.

Power Good (PGOOD) Pin

ThePGOODpinisconnectedtoanopendrainofaninternal

MOSFET. TheMOSFETturnsonandpullsthepinlowwhen

either output is not within 7.5% of the nominal output

levelasdeterminedbytheresistivefeedbackdivider.When

both outputs meet the 7.5% requirement, the MOSFET is

3728l1fc

11

LTC3728L-1

OPERATION ^{(Refer to Functional Diagram)}

5V SWITCH

20V/DIV

3.3V SWITCH

20V/DIV

INPUT CURRENT

5A/DIV

INPUT VOLTAGE

500mV/DIV

3728L1 F03a

3728L1 F03b

I

= 2.53A

I = 1.55A

IN(MEAS) RMS

IN(MEAS)

RMS

(a)

(b)

Figure 3. Input Waveforms Comparing Single-Phase (a) and 2-Phase (b) Operation for Dual Switching Regulators

Converting 12V to 5V and 3.3V at 3A Each. The Reduced Input Ripple with the LTC1628 2-Phase Regulator Allows

Less Expensive Input Capacitors, Reduces Shielding Requirements for EMI and Improves Efﬁciency

Figure 3 compares the input waveforms for a representa-

tive single-phase dual switching regulator to the LTC1628

2-phasedualswitchingregulator.Anactualmeasurementof

theRMSinputcurrentundertheseconditionsshowsthat2-

Of course, the improvement afforded by 2-phase opera-

tion is a function of the dual switching regulator’s relative

duty cycles which, in turn, are dependent upon the input

voltage V (Duty Cycle = V /V ). Figure 4 shows how

IN

OUT IN

phaseoperationdroppedtheinputcurrentfrom2.53A

theRMSinputcurrentvariesforsingle-phaseand2-phase

operation for 3.3V and 5V regulators over a wide input

voltage range.

RMS

to1.55A

.Whilethisisanimpressivereductioninitself,

RMS

2

rememberthatthepowerlossesareproportionaltoI

,

RMS

meaning that the actual power wasted is reduced by a fac-

tor of 2.66. The reduced input ripple voltage also means

less power is lost in the input power path, which could

include batteries, switches, trace/connector resistances

and protection circuitry. Improvements in both conducted

and radiated EMI also directly accrue as a result of the

reduced RMS input current and voltage.

Itcanreadilybeseenthattheadvantagesof2-phaseopera-

tion are not just limited to a narrow operating range, but

in fact extend over a wide region. A good rule of thumb

for most applications is that 2-phase operation will reduce

theinputcapacitorrequirementtothatforjustonechannel

operating at maximum current and 50% duty cycle.

3.0

2.5

2.0

1.5

SINGLE PHASE

DUAL CONTROLLER

2-PHASE

DUAL CONTROLLER

1.0

0.5

0

V

= 5V/3A

O1

O2

= 3.3V/3A

0

10

20

INPUT VOLTAGE (V)

30

40

3728L1 F04

Figure 4. RMS Input Current Comparison

3728l1fc

12

LTC3728L-1

APPLICATIONS INFORMATION

Figure 1 on the ﬁrst page is a basic LTC3728L-1 applica-

tion circuit. External component selection is driven by

the load requirement, and begins with the selection of

2.5

2.0

1.5

1.0

0.5

0

R

andtheinductorvalue. Next, thepowerMOSFETs

SENSE

and D1 are selected. Finally, C and C

are selected.

IN

OUT

The circuit shown in Figure 1 can be conﬁgured for

operation up to an input voltage of 28V (limited by the

external MOSFETs).

R

SENSE

Selection For Output Current

200

300

400

500

600

R

is chosen based on the required output current.

SENSE

OPERATING FREQUENCY (kHz)

The current comparator has a maximum threshold of

3728L1 F05

75mV/R

and an input common mode range of SGND

SENSE

Figure 5. PLLFLTR Pin Voltage vs Frequency

to1.1(INTV ). Thecurrentcomparatorthresholdsetsthe

CC

peak of the inductor current, yielding a maximum average

efﬁciency (see Efﬁciency Considerations). The maximum

switching frequency is approximately 550kHz.

output current I

peak-to-peak ripple current, ΔI .

equal to the peak value less half the

MAX

L

Inductor Value Calculation

Allowing a margin for variations in the IC and external

component values yields:

The operating frequency and inductor selection are inter-

related in that higher operating frequencies allow the use

of smaller inductor and capacitor values. So why would

anyone ever choose to operate at lower frequencies with

larger components? The answer is efﬁciency. A higher

frequency generally results in lower efﬁciency because

of MOSFET gate charge losses. In addition to this basic

trade-off, the effect of inductor value on ripple current and

low current operation must also be considered.

50mV

I_MAX

R_SENSE

=

When using the controller in very low dropout conditions,

the maximum output current level will be reduced due to

theinternalcompensationrequiredtomeetstabilitycriteria

for buck regulators operating at greater than 50% duty

factor. A curve is provided to estimate this reduction in

peak output current level depending upon the operating

duty factor.

The inductor value has a direct effect on ripple current.

The inductor ripple current ΔI decreases with higher

L

inductance or frequency and increases with higher V :

IN

Operating Frequency

ꢁ

ꢃ

ꢂ

_OUTꢄ

V

1

The IC uses a constant frequency phase-lockable ar-

chitecture with the frequency determined by an internal

capacitor. This capacitor is charged by a ﬁxed current plus

an additional current which is proportional to the voltage

applied to the PLLFLTR pin. Refer to Phase-Locked Loop

and Frequency Synchronization in the Applications Infor-

mation section for additional information.

ꢀI_L=

V_OUT1–

ꢆ

(f)(L)

V

IN

ꢅ

Accepting larger values of ΔI allows the use of low in-

L

ductances, but results in higher output voltage ripple and

greater core losses. A reasonable starting point for setting

ripple current is ΔI =0.3(I

). The maximum ΔI occurs

L

MAX

L

at the maximum input voltage.

A graph for the voltage applied to the PLLFLTR pin vs

frequency is given in Figure 5. As the operating frequency

isincreasedthegatechargelosseswillbehigher, reducing

The inductor value also has secondary effects. The tran-

sition to Burst Mode operation begins when the average

inductor current required results in a peak current below

3728l1fc

13

LTC3728L-1

APPLICATIONS INFORMATION

25% of the current limit determined by R

. Lower

bottom (synchronous) switch.

SENSE

inductor values (higher ΔI ) will cause this to occur at

L

The peak-to-peak drive levels are set by the INTV

CC

lower load currents, which can cause a dip in efﬁciency in

the upper range of low current operation. In Burst Mode

operation, lower inductance values will cause the burst

frequency to decrease.

voltage. This voltage is typically 5V during start-up

(see EXTV Pin Connection). Consequently, logic-level

CC

threshold MOSFETs must be used in most applications.

The only exception is if low input voltage is expected (V

IN

GS(TH)

< 5V); then, sub-logic level threshold MOSFETs (V

Inductor Core Selection

< 3V) should be used. Pay close attention to the BV

DSS

Usually, high inductance is preferred for small current

ripple and low core loss. Unfortunately, increased induc-

tance requires more turns of wire or a smaller air gap in

the inductor core, resulting in high copper loss or low

saturationcurrent. OncethevalueofLisknown, theactual

inductor must be selected. There are two popular types

of core material of commercial available inductors. Ferrite

core inductors usually have very low core loss and are

preferred at high switching frequencies, so design goals

can concentrate on copper loss and preventing satura-

tion. However, ferrite core saturates “hard”, which means

that inductance collapses abruptly when the peak design

current is exceeded. This results in an abrupt increase in

inductor ripple current and consequent output voltage

ripple. One advantage of the LTC3728L-1 is its current

mode control that detects and limits cycle-by-cycle peak

inductor current. Therefore, accurate and fast protection

is achieved if the inductor is saturated in steady state or

during transient mode.

speciﬁcation for the MOSFETs as well; most of the logic

level MOSFETs are limited to 30V or less.

SelectioncriteriaforthepowerMOSFETsincludethe“ON”

resistance R

, Miller capacitance C

, input

DS(ON)

MILLER

voltage and maximum output current. Miller capacitance,

, can be approximated from the gate charge curve

C

MILLER

usually provided on the MOSFET manufacturers’ data

sheet. C is equal to the increase in gate charge

MILLER

along the horizontal axis while the curve is approximately

ﬂat divided by the speciﬁed change in V . This result is

DS

then multiplied by the ratio of the application applied V

DS

to the Gate charge curve speciﬁed V . When the IC is

DS

operating in continuous mode the duty cycles for the top

and bottom MOSFETs are given by:

V_OUT

V

Main Switch Duty Cycle =

IN

V – V_OUT

IN

Synchronous SwitchDuty Cycle=

V

IN

Powderedironcoreinductorsusuallysaturate“soft”,which

means the inductance drops in a linear fashion when the

current increases. However, the core loss of the powder

iron inductor is usually higher than the ferrite inductor.

So designs with high switching frequency should also

address inductor core loss.

The MOSFET power dissipations at maximum output

current are given by:

V_OUT

2

P_MAIN

=

(

I

1+ ꢀ R

+

)

(

)

(

)

MAX

DS(ON)

V

IN

Inductor manufacturers usually provide inductance, DCR,

(peak) saturation current and (DC) heating current ratings

in the inductor data sheet. A good supply design should

not exceed the saturation and heating current rating of

the inductor.

I

ꢁ

_MAXꢄ

2

V

R

_DR)(

C

•

)

(

IN

ꢃ

ꢆ

MILLER

ꢂ

ꢅ

2

ꢇ

ꢊ

1

+

f

ꢌ

( )

ꢉ

V

_INTVCC– V_THMINV_THMIN

ꢈ

ꢋ

V – V_OUT

2

Power MOSFET and D1 Selection

IN

P_SYNC

=

I

(

1+ ꢀ R

DS(ON)

(

)

MAX

V

IN

Two external power MOSFETs must be selected for each

controller in the LTC3728L-1: One N-channel MOSFET for

the top (main) switch, and one N-channel MOSFET for the

3728l1fc

14

LTC3728L-1

APPLICATIONS INFORMATION

input RMS ripple current from this maximum value (see

Figure 4). The out-of-phase technique typically reduces

the input capacitor’s RMS ripple current by a factor of

30% to 70% when compared to a single phase power

supply solution.

where δ is the temperature dependency of R

DR

and

DS(ON)

R

(approximately 4ꢀ) is the effective driver resistance

at the MOSFET’s Miller threshold voltage. V

is the

THMIN

typical MOSFET minimum threshold voltage.

2

BothMOSFETshaveI RlosseswhilethetopsideN-channel

equation includes an additional term for transition losses,

The type of input capacitor, value and ESR rating have

efﬁciency effects that need to be considered in the selec-

tion process. The capacitance value chosen should be

sufﬁcient to store adequate charge to keep high peak

battery currents down. 20μF to 40μF is usually sufﬁcient

for a 25W output supply operating at 200kHz. The ESR of

the capacitor is important for capacitor power dissipation

as well as overall battery efﬁciency. All of the power (RMS

ripple current • ESR) not only heats up the capacitor but

wastes power from the battery.

which are highest at high input voltages. For V < 20V

IN

the high current efﬁciency generally improves with larger

MOSFETs, while for V > 20V the transition losses rapidly

IN

increasetothepointthattheuseofahigherR

device

DS(ON)

withlowerC

actuallyprovideshigherefﬁciency.The

MILLER

synchronous MOSFET losses are greatest at high input

voltage when the top switch duty factor is low or during

a short-circuit when the synchronous switch is on close

to 100% of the period.

Medium voltage (20V to 35V) ceramic, tantalum, OS-CON

and switcher-rated electrolytic capacitors can be used

as input capacitors, but each has drawbacks: ceramics

have very high voltage coefﬁcients and may have audible

piezoelectric effects; tantalums need to be surge-rated;

OS-CONs suffer from higher inductance, larger case size

and limited surface-mount applicability; electrolytics’

higher ESR and dryout possibility require several to be

used. Multiphase systems allow the lowest amount of

capacitance overall. As little as one 22μF or two to three

10μF ceramic capacitors are an ideal choice in a 20W to

35W power supply due to their extremely low ESR. Even

though the capacitance at 20V is substantially below their

rating at zero-bias, very low ESR loss makes ceramics

an ideal candidate for highest efﬁciency battery operated

systems. Also consider parallel ceramic and high quality

electrolytic capacitors as an effective means of achieving

ESR and bulk capacitance goals.

The term (1+δ) is generally given for a MOSFET in the

form of a normalized R

vs Temperature curve, but

DS(ON)

δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs.

The Schottky diode D1 shown in Figure 1 conducts dur-

ing the dead-time between the conduction of the two

power MOSFETs. This prevents the body diode of the

bottom MOSFET from turning on, storing charge during

the dead-time and requiring a reverse recovery period

that could cost as much as 3% in efﬁciency at high V .

IN

A 1A to 3A Schottky is generally a good compromise for

both regions of operation due to the relatively small aver-

age current. Larger diodes result in additional transition

losses due to their larger junction capacitance. Schottky

diodes should be placed in parallel with the synchronous

MOSFETs when operating in pulse-skip mode or in Burst

Mode operation.

C and C

Selection

Incontinuousmode,thesourcecurrentofthetopN-channel

IN

OUT

MOSFETisasquarewaveofdutycycleV /V .Toprevent

OUT IN

The selection of C is simpliﬁed by the multiphase ar-

IN

largevoltagetransients,alowESRinputcapacitorsizedfor

the maximum RMS current of one channel must be used.

The maximum RMS capacitor current is given by:

chitecture and its impact on the worst-case RMS current

drawnthroughtheinputnetwork(battery/fuse/capacitor).

It can be shown that the worst case RMS current occurs

when only one controller is operating. The controller with

ꢂ

ꢄ^1/2

V_OUTV ꢁ V

(

)

IN

OUT

ꢃ

ꢅ

C_INRequiredI_RMSꢀI_MAX

the highest (V )(I ) product needs to be used in the

OUT OUT

V

IN

formula below to determine the maximum RMS current

requirement. Increasing the output current, drawn from

theotherout-of-phasecontroller,willactuallydecreasethe

3728l1fc

15

LTC3728L-1

APPLICATIONS INFORMATION

This formula has a maximum at V = 2V , where I

ripple will typically be less than 50mV at the maximum

V assuming:

IN

OUT

RMS

= I /2. This simple worst case condition is commonly

OUT

IN

usedfordesignbecauseevensigniﬁcantdeviationsdonot

offermuchrelief.Notethatcapacitormanufacturer’sripple

current ratings are often based on only 2000 hours of life.

This makes it advisable to further derate the capacitor, or

to choose a capacitor rated at a higher temperature than

required.Severalcapacitorsmayalsobeparalleledtomeet

size or height requirements in the design. Always consult

the manufacturer if there is any question.

C

Recommended ESR < 2 R

SENSE

OUT

and C

> 1/(8fR

)

OUT

SENSE

TheﬁrstconditionrelatestotheripplecurrentintotheESR

oftheoutputcapacitancewhilethesecondtermguarantees

thattheoutputcapacitancedoesnotsigniﬁcantlydischarge

duringtheoperatingfrequencyperiodduetoripplecurrent.

The choice of using smaller output capacitance increases

the ripple voltage due to the discharging term but can be

compensated for by using capacitors of very low ESR to

maintain the ripple voltage at or below 50mV. The I_THpin

OPTI-LOOP compensation components can be optimized

to provide stable, high performance transient response

regardless of the output capacitors selected.

The beneﬁt of the LTC3728L-1 multiphase clocking can

be calculated by using the equation above for the higher

power controller and then calculating the loss that would

have resulted if both controller channels switched on at

the same time. The total RMS power lost is lower when

both controllers are operating due to the interleaving of

current pulses through the input capacitor’s ESR. This is

whytheinputcapacitor’srequirementcalculatedabovefor

theworst-casecontrollerisadequateforthedualcontroller

design. Remember that input protection fuse resistance,

batteryresistanceandPCboardtraceresistancelossesare

also reduced due to the reduced peak currents in a multi-

phase system. The overall beneﬁt of a multiphase design

will only be fully realized when the source impedance of

the power supply/battery is included in the efﬁciency test-

ing. The drains of the two top MOSFETS should be placed

Manufacturers such as Nichicon, Nippon Chemi-Con and

Sanyo can be considered for high performance through-

hole capacitors. The OS-CON semiconductor dielectric

capacitor available from Sanyo has the lowest (ESR)(size)

product of any aluminum electrolytic at a somewhat

higher price. An additional ceramic capacitor in parallel

with OS-CON capacitors is recommended to reduce the

inductance effects.

In surface mount applications multiple capacitors may

need to be used in parallel to meet ESR, RMS cur-

rent handling and load step requirements. Aluminum

electrolytic, dry tantalum and special polymer capaci-

tors are available in surface mount packages. Special

polymer surface mount capacitors offer very low ESR

but have lower storage capacity per unit volume than

other capacitor types. These capacitors offer a very

cost-effective output capacitor solution and are an ideal

choice when combined with a controller having high

loop bandwidth. Tantalum capacitors offer the highest

capacitance density and are often used as output capaci-

tors for switching regulators having controlled soft-start.

Several excellent surge-tested choices are the AVX TPS,

AVX TPSV or the KEMET T510 series of surface mount

tantalums, available in case heights ranging from 2mm

to 4mm. Aluminum electrolytic capacitors can be used

within 1cm of each other and share a common C (s).

IN

Separating the drains and C may produce undesirable

IN

voltage and current resonances at V .

IN

The selection of C

is driven by the required effective

OUT

series resistance (ESR). Typically once the ESR require-

ment is satisﬁed the capacitance is adequate for ﬁltering.

The output ripple (ΔV ) is determined by:

OUT

ꢂ

ꢅ

ꢇ

1

ꢀV_OUTꢁ ꢀI_LESR+

ꢄ

8fC

ꢃ

_OUTꢆ

Wheref=operatingfrequency, C

=outputcapacitance,

OUT

and ΔI = ripple current in the inductor. The output ripple

L

is highest at maximum input voltage since ΔI increases

L

with input voltage. With ΔI = 0.3I

the output

L

OUT(MAX)

3728l1fc

16

LTC3728L-1

APPLICATIONS INFORMATION

in cost-driven applications providing that consideration

is given to ripple current ratings, temperature and long

term reliability. A typical application will require several

to many aluminum electrolytic capacitors in parallel. A

combination of the above mentioned capacitors will often

result in maximizing performance and minimizing overall

cost. Other capacitor types include Nichicon PL series,

Panasonic SP, NEC Neocap, Cornell Dubilier ESRE and

Sprague 595D series. Consult manufacturers for other

speciﬁc recommendations.

pin as follows:

T = 70°C + (67mA)(24V)(34°C/W) = 125°C

J

Use of the EXTV input pin reduces the junction tem-

perature to:

CC

T = 70°C + (67mA)(5V)(34°C/W) = 81°C

J

The absolute maximum rating for the INTV Pin is 40mA.

CC

Dissipationshouldbecalculatedtoalsoincludeanyadded

current drawn from the internal 3.3V linear regulator.

To prevent maximum junction temperature from being

exceeded, the input supply current must be checked

INTV Regulator

CC

operating in continuous mode at maximum V .

IN

An internal P-channel low dropout regulator produces

5V at the INTV_CCpin from the V_INsupply pin. INTV_CC

powers the drivers and internal circuitry within the IC.

The INTV_CCpin regulator can supply a peak current of

50mA and must be bypassed to ground with a minimum

of 4.7μF tantalum, 10μF special polymer, or low ESR type

electrolytic capacitor. A 1μF ceramic capacitor placed di-

rectly adjacent to the INTV_CCand PGND IC pins is highly

recommended. Good bypassing is necessary to supply

the high transient currents required by the MOSFET gate

drivers and to prevent interaction between channels.

EXTV Connection

CC

The IC contains an internal P-channel MOSFET switch

connected between the EXTV and INTV pins. When

CC

thevoltageappliedtoEXTV risesabove4.7V, theinternal

CC

regulator is turned off and the switch closes, connecting

theEXTV pintotheINTV pintherebysupplyinginternal

CC

power. The switch remains closed as long as the voltage

applied to EXTV remains above 4.5V. This allows the

CC

MOSFET driver and control power to be derived from the

output during normal operation (4.7V < V

< 7V) and

OUT

Higher input voltage applications in which large MOSFETs

are being driven at high frequencies may cause the maxi-

mumjunctiontemperatureratingfortheICtobeexceeded.

The system supply current is normally dominated by the

gate charge current. Additional external loading of the

from the internal regulator when the output is out of regu-

lation (start-up, short-circuit). If more current is required

through the EXTV switch than is speciﬁed, an external

CC

Schottky diode can be added between the EXTV and

CC

INTV pins. Do not apply greater than 7V to the EXTV

CC

INTV and 3.3V linear regulators also needs to be taken

CC

pin and ensure that EXTV < V .

CC

IN

into account for the power dissipation calculations. The

Signiﬁcant efﬁciency gains can be realized by powering

INTV from the output, since the V current resulting

total INTV current can be supplied by either the 5V in-

CC

ternal linear regulator or by the EXTV input pin. When

CC

IN

CC

from the driver and control currents will be scaled by a

the voltage applied to the EXTV pin is less than 4.7V, all

CC

factor of (Duty Cycle)/(Efﬁciency). For 5V regulators this

of the INTV current is supplied by the internal 5V linear

CC

supply means connecting the EXTV pin directly to V

.

regulator. Power dissipation for the IC in this case is high-

CC

OUT

However, for 3.3V and other lower voltage regulators,

est: (V )(I

), and overall efﬁciency is lowered. The

IN INTVCC

additional circuitry is required to derive INTV power

gate charge current is dependent on operating frequency

as discussed in the Efﬁciency Considerations section.

The junction temperature can be estimated by using the

equations given in Note 2 of the Electrical Characteristics.

CC

from the output.

The following list summarizes the four possible connec-

tions for EXTV

CC:

For example, the IC V current is thermally limited to less

IN

1. EXTV LeftOpen(orGrounded).ThiswillcauseINTV

CC

than 67mA from a 24V supply when not using the EXTV

CC

tobepoweredfromtheinternal5Vregulatorresultinginan

efﬁciency penalty of up to 10% at high input voltages.

3728l1fc

17

LTC3728L-1

APPLICATIONS INFORMATION

2. EXTV Connected directly to V . This is the normal

V

= V + V

. The value of the boost capacitor

CC

OUT

BOOST

IN

INTVCC

connection for a 5V regulator and provides the highest

C needstobe100timesthatofthetotalinputcapacitance

B

efﬁciency.

of the topside MOSFET(s). The reverse breakdown of the

external Schottky diode must be greater than V

When adjusting the gate drive level, the ﬁnal arbiter is the

total input current for the regulator. If a change is made

and the input current decreases, then the efﬁciency has

improved. If there is no change in input current, then there

is no change in efﬁciency.

.

IN(MAX)

3. EXTV Connected to an External supply. If an external

CC

supply is available in the 5V to 7V range, it may be used to

powerEXTV providing itiscompatible withthe MOSFET

CC

gate drive requirements.

4. EXTV ConnectedtoanOutput-DerivedBoostNetwork.

CC

For 3.3V and other low voltage regulators, efﬁciency gains

Output Voltage

can still be realized by connecting EXTV to an output-

CC

derivedvoltagethathasbeenboostedtogreaterthan4.7V.

This can be done with either the inductive boost winding

as shown in Figure 6a or the capacitive charge pump

shown in Figure 6b. The charge pump has the advantage

of simple magnetics.

The output voltages are each set by an external feedback

resistivedividercarefullyplacedacrosstheoutputcapacitor.

Theresultantfeedbacksignaliscomparedwiththeinternal

precision 0.800V voltage reference by the error ampliﬁer.

The output voltage is given by the equation:

R2

R1

ꢀ

ꢁ

ꢃ

ꢄ

Topside MOSFET Driver Supply (C , D )

B

V_OUT= 0.8V 1+

ꢂ

ꢅ

External bootstrap capacitors C connected to the BOOST

B

pinssupplythegatedrivevoltagesforthetopsideMOSFETs.

where R1 and R2 are deﬁned in Figure 2.

Capacitor C in the functional diagram is charged through

B

external diode D from INTV when the SW pin is low.

+

–

B

CC

SENSE /SENSE Pins

When one of the topside MOSFETs is to be turned on,

The common mode input range of the current comparator

the driver places the C voltage across the gate-source

B

sense pins is from 0V to (1.1)INTV . Continuous linear

CC

of the desired MOSFET. This enhances the MOSFET and

operation is guaranteed throughout this range allowing

turns on the topside switch. The switch node voltage, SW,

output voltage setting from 0.8V to 7.7V, depending upon

rises to V and the BOOST pin follows. With the topside

IN

the voltage applied to EXTV . A differential NPN input

CC

MOSFET on, the boost voltage is above the input supply:

+

V

IN

1μF

OPTIONAL EXTV

CONNECTION

CC

+

5V < V

< 7V

SEC

C

IN

0.22μF

BAT85

BAT 85

V

IN

SEC

IN

LTC3728L-1

+

1μF

VN2222LL

TG1

SW

TG1

SW

R

SENSE

R

SENSE

N-CH

V

OUT

T1

1:N

L1

EXTV

CC

R6

R5

+

C

OUT

FCB

BG1

OUT

BG1

N-CH

SGND

PGND

3728L1 F06a

3728L1 F06b

Figure 6a. Secondary Output Loop & EXTV_CCConnection

Figure 6b. Capacitive Charge Pump for EXTV_CC

3728l1fc

18

LTC3728L-1

APPLICATIONS INFORMATION

stageisbiasedwithinternalresistorsfromaninternal2.4V

source as shown in the Functional Diagram. This requires

that current either be sourced or sunk from the SENSE

pinsdependingontheoutputvoltage. Iftheoutputvoltage

is below 2.4V current will ﬂow out of both SENSE pins to

the main output. The output can be easily preloaded by

taking an additional 1.25s/μF to reach full current. The

output current thus ramps up slowly, reducing the start-

ing surge current required from the input power supply.

If RUN/SS has been pulled all the way to ground there is

a delay before starting of approximately:

1.5V

1.2μA

the V

resistive divider to compensate for the current

t_DELAY

=

C_SS= 1.25s / μF C

SS

(

)

OUT

comparator’s negative input bias current. The maximum

current ﬂowing out of each pair of SENSE pins is:

3V ꢀ1.5V

1.2μA

+

–

t_IRAMP

=

C_SS= 1.25s / μF C

SS

(

)

I

+ I

= (2.4V – V )/24k

SENSE OUT

SENSE

Since V

is servoed to the 0.8V reference voltage,

OSENSE

By pulling both RUN/SS pins below 1V, the IC is put into

low current shutdown (I_Q= 20μA). The RUN/SS pins

can be driven directly from logic as shown in Figure 7.

Diode D1 in Figure 7 reduces the start delay but allows

C_SSto ramp up slowly providing the soft-start function.

Each RUN/SS pin has an internal 6V zener clamp (See

FunctionalDiagram).BecausetheLTC3728L-1isdesigned

for applications not requiring over current latchoff, no

pull-up resistor is required on the RUN/SS pin to defeat

latchoff. Refer to the LTC3728L/LTC3728LX datasheet if

this feature is required.

we can choose R1 in Figure 2 to have a maximum value

to absorb this current.

ꢀ

ꢃ

0.8V

2.4V – V

R1_(MAX)= 24k

ꢂ

ꢅ

ꢁ

_OUTꢄ

for V

< 2.4V

OUT

Regulating an output voltage of 1.8V, the maximum value

of R1 should be 32k. Note that for an output voltage above

2.4V, R1 has no maximum value necessary to absorb the

sensecurrents;however,R1isstillboundedbytheV

feedback current.

OSENSE

Fault Conditions: Current Limit and Current Foldback

The current comparators have a maximum sense volt-

age of 75mV resulting in a maximum MOSFET current

Soft-Start/Run Function

TheRUN/SS1andRUN/SS2pinsaremultipurposepinsthat

provideasoft-start functionanda meanstoshutdown the

LTC3728L-1. Soft-start reduces the input power source’s

surge currents by gradually increasing the controller’s

current limit (proportional to V ). This pin can also be

used for power supply sequencing.

of 75mV/R

. The maximum value of current limit

SENSE

generally occurs with the largest V at the highest ambi-

IN

3.3V OR 5V

RUN/SS

ITH

D1

C

SS

C

SS

Aninternal1.2μAcurrentsourcechargesuptheC capaci-

SS

torWhenthevoltageonRUN/SS1(RUN/SS2)reaches1.5V,

.

the particular controller is permitted to start operating. As

(a)

(b)

Figure 7. RUN/SS Pin Interfacing

3728L1 F07

the voltage on RUN/SS increases from 1.5V to 3.0V, the

internal current limit is increased from 25mV/R

to

SENSE

75mV/R

. The output current limit ramps up slowly,

SENSE

3728l1fc

19

LTC3728L-1

APPLICATIONS INFORMATION

ent temperature, conditions that cause the highest power

dissipation in the top MOSFET.

only latched by the overvoltage condition itself and will

thereforeallowaswitchingregulatorsystemhavingapoor

PC layout to function while the design is being debugged.

The bottom MOSFET remains on continuously for as long

Each controller includes current foldback to help further

limit load current when the output is shorted to ground.

The foldback circuit is active even when the overload

shutdown latch described above is overridden. If the

output falls below 70% of its nominal output level, then

themaximumsensevoltageisprogressivelyloweredfrom

75mV to 17mV. Under short-circuit conditions with very

low duty cycles, the controller will begin cycle skipping

in order to limit the short-circuit current. In this situation

the bottom MOSFET will be dissipating most of the power

but less than in normal operation. The short-circuit ripple

as the OV condition persists; if V

returns to a safe level,

OUT

normal operation automatically resumes. A shorted top

MOSFET will result in a high current condition which will

openthesystemfuse.Theswitchingregulatorwillregulate

properly with a leaky top MOSFET by altering the duty

cycle to accommodate the leakage.

Phase-Locked Loop and Frequency Synchronization

The IC has a phase-locked loop comprised of an internal

voltage controlled oscillator and phase detector. This al-

lows the top MOSFET turn-on to be locked to the rising

edge of an external source. The frequency range of the

voltage controlled oscillator is 50% around the center

current is determined by the minimum on-time t

ON(MIN)

of each controller (typically 100ns), the input voltage and

inductor value:

ΔI

= t

(V /L)

ON(MIN) IN

L(SC)

frequency f . A voltage of 1.2V applied to the PLLFLTR

O

The resulting short-circuit current is:

pin corresponds to a frequency of approximately 400kHz.

ThenominaloperatingfrequencyrangeoftheICis260kHz

to 550kHz.

25mV

R_SENSE

1

2

I_SC

=

– ꢀI_L(SC)

The phase detector used is an edge sensitive digital type

which provides zero degrees phase shift between the ex-

ternal and internal oscillators. This type of phase detector

willnotlockuponinputfrequenciesclosetotheharmonics

Fault Conditions: Overvoltage Protection (Crowbar)

The overvoltage crowbar is designed to blow a system

input fuse when the output voltage of the regulator rises

muchhigherthannominallevels.Thecrowbarcauseshuge

currents to ﬂow, that blow the fuse to protect against a

shortedtopMOSFETiftheshortoccurswhilethecontroller

is operating.

of the VCO center frequency. The PLL hold-in range, Δf ,

H

is equal to the capture range, Δf

C:

Δf = Δf = 0.5 f (260kHz-550kHz)

H

C

O

The output of the phase detector is a complementary pair

of current sources charging or discharging the external

ﬁlter network on the PLLFLTR pin.

A comparator monitors the output for overvoltage con-

ditions. The comparator (OV) detects overvoltage faults

greaterthan7.5%abovethenominaloutputvoltage.When

this condition is sensed, the top MOSFET is turned off and

the bottom MOSFET is turned on until the overvoltage

condition is cleared. The output of this comparator is

If the external frequency (f

) is greater than the os-

PLLIN

cillator frequency f , current is sourced continuously,

0SC

3728l1fc

20

LTC3728L-1

APPLICATIONS INFORMATION

pullingupthePLLFLTRpin.Whentheexternalfrequencyis

Theminimumon-timeforeachcontrollerisapproximately

100ns. However, as the peak sense voltage decreases the

minimum on-time gradually increases up to about 150ns.

This is of particular concern in forced continuous applica-

tions with low ripple current at light loads. If the duty cycle

drops below the minimum on-time limit in this situation,

a signiﬁcant amount of cycle skipping can occur with cor-

respondingly larger current and voltage ripple.

less than f , current is sunk continuously, pulling down

0SC

the PLLFLTR pin. If the external and internal frequencies

are the same but exhibit a phase difference, the current

sources turn on for an amount of time corresponding to

the phase difference. Thus the voltage on the PLLFLTR pin

is adjusted until the phase and frequency of the external

and internal oscillators are identical. At this stable operat-

ing point the phase comparator output is open and the

FCB Pin Operation

ﬁlter capacitor C holds the voltage. The IC’s PLLIN pin

LP

must be driven from a low impedance source such as a

logic gate located close to the pin. When using multiple

ICs for a phase-locked system, the PLLFLTR pin of the

master oscillator should be biased at a voltage that will

guarantee the slave oscillator(s) ability to lock onto the

master’s frequency. A DC voltage of 0.7V to 1.7V applied

to the master oscillator’s PLLFLTR pin is recommended

in order to meet this requirement. The resultant operating

frequency can range from 300kHz to 500kHz.

The FCB pin can be used to regulate a secondary winding

or as a logic level input. Continuous operation is forced

on both controllers when the FCB pin drops below 0.8V.

During continuous mode, current ﬂows continuously in

the transformer primary. The secondary winding(s) draw

current only when the bottom, synchronous switch is on.

When primary load currents are low and/or the V /V

IN OUT

ratio is low, the synchronous switch may not be on for a

sufﬁcientamountoftimetotransferpowerfromtheoutput

capacitortothesecondaryload.Forcedcontinuousopera-

tion will support secondary windings providing there is

sufﬁcient synchronous switch duty factor. Thus, the FCB

input pin removes the requirement that power must be

drawn from the inductor primary in order to extract power

from the auxiliary windings. With the loop in continuous

mode, the auxiliary outputs may nominally be loaded

without regard to the primary output load.

The loop ﬁlter components (C , R ) smooth out the cur-

LP LP

rent pulses from the phase detector and provide a stable

input to the voltage controlled oscillator. The ﬁlter compo-

nents C and R determine how fast the loop acquires

LP

lock. Typically R =10kꢀ and C is 0.01μF to 0.1μF.

LP

Minimum On-Time Considerations

Minimumon-timet isthesmallesttimedurationthat

ON(MIN)

each controller is capable of turning on the top MOSFET.

It is determined by internal timing delays and the gate

charge required to turn on the top MOSFET. Low duty

cycle applications may approach this minimum on-time

limit and care should be taken to ensure that

ThesecondaryoutputvoltageV isnormallysetasshown

SEC

in Figure 6a by the turns ratio N of the transformer:

V

SEC

≅ (N + 1) V

OUT

However, if the controller goes into Burst Mode operation

andhaltsswitchingduetoalightprimaryloadcurrent,then

V_OUT

V

will droop. An external resistive divider from V to

t_ON(MIN)

<

SEC

V (f)

the FCB pin sets a minimum voltage V

:

IN

SEC(MIN)

R6

R5

ꢁ

ꢂ

ꢄ

ꢅ

If the duty cycle falls below what can be accommodated

by the minimum on-time, the controller will begin to skip

cycles. The output voltage will continue to be regulated,

but the ripple voltage and current will increase.

V_SEC(MIN)ꢀ0.8V 1+

ꢃ

ꢆ

where R5 and R6 are shown in Figure 2.

3728l1fc

21

LTC3728L-1

APPLICATIONS INFORMATION

capacitance can be reduced for a particular application. A

complete explanation is included in Design Solutions 10.

(See www.linear.com)

If V

drops below this level, the FCB voltage forces

SEC

temporary continuous switching operation until V

again above its minimum.

is

SEC

In order to prevent erratic operation if no external connec-

tions are made to the FCB pin, the FCB pin has a 0.18μA

internal current source pulling the pin high. Include this

current when choosing resistor values R5 and R6.

Efﬁciency Considerations

The percent efﬁciency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efﬁciency and which change would

produce the most improvement. Percent efﬁciency can

be expressed as:

The following table summarizes the possible states avail-

able on the FCB pin:

Table 1

FCB PIN

CONDITION

%Efﬁciency = 100% – (L1 + L2 + L3 + ...)

0V to 0.75V

Forced Continuous Both Controllers

(Current Reversal Allowed—

Burst Inhibited)

where L1, L2, etc. are the individual losses as a percent-

INTV

CC

0.85V < V < 4.3V

Minimum Peak Current Induces

Burst Mode Operation

FCB

R

T2

T1

No Current Reversal Allowed

I

TH

Feedback Resistors

>4.8V

Regulating a Secondary Winding

LTC3728L-1

R

C

Burst Mode Operation Disabled

Constant Frequency Mode Enabled

No Current Reversal Allowed

No Minimum Peak Current

C

3728L1 F08

Figure 8. Active Voltage Positioning

Applied to the LTC3728L-1

Voltage Positioning

age of input power.

Voltage positioning can be used to minimize peak-to-peak

output voltage excursions under worst-case transient

loading conditions. The open-loop DC gain of the control

loop is reduced depending upon the maximum load step

speciﬁcations. Voltage positioning can easily be added

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

losses in LTC3728L-1 circuits: 1) IC V current (including

IN

loading on the 3.3V internal regulator), 2) INTV regula-

CC

2

to either or both controllers by loading the I pin with

TH

tor current, 3) I R losses, 4) Topside MOSFET transition

a resistive divider having a Thevenin equivalent voltage

source equal to the midpoint operating voltage range of

the error ampliﬁer, or 1.2V (see Figure 8).

losses.

1. The V current has two components: the ﬁrst is the DC

IN

supply current given in the Electrical Characteristics table,

which excludes MOSFET driver and control currents; the

second is the current drawn from the 3.3V linear regulator

The resistive load reduces the DC loop gain while main-

taining the linear control range of the error ampliﬁer.

The maximum output voltage deviation can theoretically

be reduced to half or alternatively the amount of output

output. V current typically results in a small (<0.1%)

IN

loss.

3728l1fc

22

LTC3728L-1

APPLICATIONS INFORMATION

2. INTV current is the sum of the MOSFET driver and

voltages (typically 15V or greater). Transition losses can

be estimated from:

CC

control currents. The MOSFET driver current results from

switching the gate capacitance of the power MOSFETs.

Each time a MOSFET gate is switched from low to high

I

ꢀ

_MAXꢃ

2

Transition Loss =

V

•

R

•

(

)

(

)

IN

ꢂ

ꢅ

DR

ꢁ

ꢄ

2

to low again, a packet of charge dQ moves from INTV

to ground. The resulting dQ/dt is a current out of INTV

that is typically much larger than the control circuit cur-

CC

ꢀ

ꢃ

ꢅ

1

C

f

+

( )

)

MILLER

ꢂ

5V – V

V

_THꢄ

ꢁ

TH

rent. In continuous mode, I

=f(Q +Q ), where Q

GATECHG

T B T

Other “hidden” losses such as copper trace and internal

battery resistances can account for an additional 5% to

10% efﬁciency degradation in portable systems. It is very

important to include these “system” level losses during

the design phase. The internal battery and fuse resistance

and Q are the gate charges of the topside and bottom

B

side MOSFETs.

Supplying INTV power through the EXTV switch input

CC

from an output-derived source will scale the V current

IN

required for the driver and control circuits by a factor of

losses can be minimized by making sure that C has ad-

IN

(Duty Cycle)/(Efﬁciency). For example, in a 20V to 5V ap-

equate charge storage and very low ESR at the switching

frequency. A 25W supply will typically require a minimum

of20μFto40μFofcapacitancehavinga maximumof20mꢀ

to 50mꢀ of ESR. The LTC3728L-1 2-phase architecture

typically halves this input capacitance requirement over

competingsolutions.OtherlossesincludingSchottkycon-

duction losses during dead-time and inductor core losses

generally account for less than 2% total additional loss.

plication,10mAofINTV currentresultsinapproximately

CC

2.5mA of V current. This reduces the mid-current loss

IN

from10%ormore(ifthedriverwaspowereddirectlyfrom

V ) to only a few percent.

IN

2

3. I R losses are predicted from the DC resistances of

the fuse (if used), MOSFET, inductor, current sense resis-

tor, and input and output capacitor ESR. In continuous

mode the average output current ﬂows through L and

Checking Transient Response

R

, but is “chopped” between the topside MOSFET

SENSE

and the synchronous MOSFET. If the two MOSFETs have

The regulator loop response can be checked by looking at

the load current transient response. Switching regulators

take several cycles to respond to a step in DC (resistive)

approximately the same R

, then the resistance of

DS(ON)

one MOSFET can simply be summed with the resistances

2

of L, R

and ESR to obtain I R losses. For example, if

load current. When a load step occurs, V

shifts by

SENSE

OUT

each R

= 30mꢀ, R = 50mꢀ, R

= 40mꢀ (sum of both input and output capacitance

= 10mꢀ and

an amount equal to ΔI

(ESR), where ESR is the ef-

DS(ON)

L

SENSE

LOAD

R

fective series resistance of C . ΔI

also begins to

ESR

OUT

LOAD

losses), then the total resistance is 130mꢀ. This results

in losses ranging from 3% to 13% as the output current

increases from 1A to 5A for a 5V output, or a 4% to 20%

loss for a 3.3V output. Efﬁciency varies as the inverse

charge or discharge C

generating the feedback error

OUT

signal that forces the regulator to adapt to the current

change and return V

this recovery time V

to its steady-state value. During

can be monitored for excessive

OUT

square of V

for the same external components and

overshoot or ringing, which would indicate a stability

problem. OPTI-LOOP compensation allows the transient

response to be optimized over a wide range of output

OUT

output power level. The combined effects of increasingly

lower output voltages and higher currents required by

high performance digital systems is not doubling but

quadrupling the importance of loss terms in the switching

regulator system!

capacitance and ESR values. The availability of the I pin

TH

not only allows optimization of control loop behavior but

also provides a DC coupled and AC ﬁltered closed loop

response test point. The DC step, rise time and settling

4. Transition losses apply only to the topside MOSFET(s),

and become signiﬁcant only when operating at high input

3728l1fc

23

LTC3728L-1

APPLICATIONS INFORMATION

at this test point truly reﬂects the closed loop response.

Assuming a predominantly second order system, phase

margin and/or damping factor can be estimated using the

percentage of overshoot seen at this pin. The bandwidth

can also be estimated by examining the rise time at the

C

to C

is greater than 1:50, the switch rise time

LOAD

OUT

should be controlled so that the load rise time is limited

to approximately 25 • C . Thus a 10μF capacitor would

LOAD

require a 250μs rise time, limiting the charging current

to about 200mA.

pin. The I external components shown in the Figure 1

TH

Automotive Considerations: Plugging into the

Cigarette Lighter

circuit will provide an adequate starting point for most

applications.

As battery-powered devices go mobile, there is a natural

interest in plugging into the cigarette lighter in order to

conserve or even recharge battery packs during opera-

tion. But before you connect, be advised: you are plug-

ging into the supply from hell. The main power line in an

automobile is the source of a number of nasty potential

transients, including load-dump, reverse-battery, and

double-battery.

The I series R -C ﬁlter sets the dominant pole-zero

TH

C

loop compensation. The values can be modiﬁed slightly

(from 0.5 to 2 times their suggested values) to optimize

transient response once the ﬁnal PC layout is done and

the particular output capacitor type and value have been

determined. The output capacitors need to be selected

because the various types and values determine the loop

gain and phase. An output current pulse of 20% to 80%

of full-load current having a rise time of 1μs to 10μs will

Load-dump is the result of a loose battery cable. When the

cable breaks connection, the ﬁeld collapse in the alterna-

tor can cause a positive spike as high as 60V which takes

several hundred milliseconds to decay. Reverse-battery is

just what it says, while double-battery is a consequence of

tow-truck operators ﬁnding that a 24V jump start cranks

cold engines faster than 12V.

produce output voltage and I pin waveforms that will

TH

give a sense of the overall loop stability without break-

ing the feedback loop. Placing a power MOSFET directly

across the output capacitor and driving the gate with an

appropriate signal generator is a practical way to produce

a realistic load step condition. The initial output voltage

step resulting from the step change in output current may

not be within the bandwidth of the feedback loop, so this

signal cannot be used to determine phase margin. This

ThenetworkshowninFigure9isthemoststraightforward

approach to protect a DC/DC converter from the ravages

of an automotive power line. The series diode prevents

current from ﬂowing during reverse-battery, while the

transient suppressor clamps the input voltage during

load-dump. Note that the transient suppressor should not

conduct during double-battery operation, but must still

clamptheinputvoltagebelowbreakdownoftheconverter.

Although the LTC3728L-1 has a maximum input voltage

of 30V, most applications will also be limited to 30V by

is why it is better to look at the I pin signal which is in

TH

the feedback loop and is the ﬁltered and compensated

control loop response. The gain of the loop will be in-

creased by increasing R and the bandwidth of the loop

C

will be increased by decreasing C . If R is increased by

C

the same factor that C is decreased, the zero frequency

C

will be kept the same, thereby keeping the phase shift the

same in the most critical frequency range of the feedback

loop. The output voltage settling behavior is related to the

stability of the closed-loop system and will demonstrate

the actual overall supply performance.

the MOSFET BVD .

SS

50A I RATING

PK

V

IN

12V

A second, more severe transient is caused by switching

in loads with large (>1μF) supply bypass capacitors. The

dischargedbypasscapacitorsareeffectivelyputinparallel

LTC3728L-1

TRANSIENT VOLTAGE

SUPPRESSOR

GENERAL INSTRUMENT

1.5KA24A

with C , causing a rapid drop in V . No regulator can

OUT

3728L1 F09

alter its delivery of current quickly enough to prevent this

sudden step change in output voltage if the load switch

resistance is low and it is driven quickly. If the ratio of

Figure 9. Automotive Application Protection

3728l1fc

24

LTC3728L-1

APPLICATIONS INFORMATION

Design Example

ꢀ

ꢃ

0.8V

2.4V – V

R1_(MAX)= 24k

= 24k

ꢂ

ꢅ

As a design example for one channel, assume V

=

IN

= 5A,

ꢁ

_OUTꢄ

12V(nominal), V = 22V(max), V

= 1.8V, I

IN

OUT

MAX

0.8V

2.4V –1.8V

ꢀ

ꢃ

ꢅ

and f = 300kHz.

= 32k

ꢂ

ꢁ

ꢄ

Theinductancevalueischosenﬁrstbasedona30%ripple

current assumption. The highest value of ripple current

occurs at the maximum input voltage. Tie the PLLFLTR

Choosing 1% resistors: R1 = 25.5k and R2 = 32.4k yields

an output voltage of 1.816V.

pin to a resistive divider from the INTV pin, generating

CC

ThepowerdissipationonthetopsideMOSFETcanbeeasily

estimated. Choosing a Fairchild FDS6982S dual MOSFET

0.7V for 300kHz operation. The minimum inductance for

30% ripple current is:

results in: R

= 0.035ꢀ/0.022ꢀ, C

= 215pF. At

DS(ON)

MILLER

V – V_OUTV_OUT

IN

L ꢀ

•

maximum input voltage with T(estimated) = 50°C:

(f)(I_RIPPLE

)

V

IN

1.8V

22V

2

P_MAIN

=

5

( )

1+(0.005)(50°C – 25°C) •

[

]

or 3.7μH. Using standard inductor values:

ꢁ

_OUTꢄ

V

5A

2

ꢁ

ꢂ

ꢄ

ꢅ

V_OUT

(f)(L)

²ꢃ

ꢆ

0.035ꢀ + 22V

) (

4ꢀ 215pF •

)(

(

)

(

)

ꢀI_L=

1–

ꢃ

ꢆ

V

ꢂ

ꢅ

IN

1

ꢇ

ꢊ

+

300kHz = 332mW

(

)

A 4.7μH inductor will produce 23% ripple current and a

3.3μH will result in 33%. The peak inductor current will be

the maximum DC value plus one half the ripple current, or

5.84A, for the 3.3μH value. Increasing the ripple current

will also help ensure that the minimum on-time of 100ns

is not violated. The minimum on-time occurs at maximum

ꢉ

ꢌ

5– 2.3 2.3

ꢈ

ꢋ

A short-circuit to ground will result in a folded back

current of:

ꢁ

ꢄ

ꢆ

25mV 1 120ns(22V)

I_SC

=

–

= 2.1A

ꢃ

V :

IN

0.01ꢀ 2ꢂ 3.3μH

ꢅ

V_OUT

_IN(MAX)f 22V(300kHz)

1.8V

t_ON(MIN)

=

= 273ns

withatypicalvalueofR

andδ=(0.005/°C)(20)=0.1.

DS(ON)

V

The resulting power dissipated in the bottom MOSFET is:

22V –1.8V

22V

The R

resistor value can be calculated by using the

2

SENSE

P_SYNC

=

2.1A 1.125 0.022ꢀ

) ( )(

(

)

maximum current sense voltage speciﬁcation with some

accommodation for tolerances:

=100mW

which is less than under full-load conditions.

C is chosen for an RMS current rating of at least 3A at

60mV

R

_SENSEꢀ

ꢁ0.01ꢂ

5.84A

IN

temperature assuming only this channel is on. C

is

OUT

Since the output voltage is below 2.4V the output resistive

divider will need to be sized to not only set the output

voltage but also to absorb the SENSE pin’s speciﬁed

input current.

chosen with an ESR of 0.02ꢀ for low output ripple. The

output ripple in continuous mode will be highest at the

3728l1fc

25

LTC3728L-1

APPLICATIONS INFORMATION

maximum input voltage. The output voltage ripple due to

ESR is approximately:

at C ? Do not attempt to split the input decoupling for

IN

the two channels as it can cause a large resonant loop.

2. Are the signal and power grounds kept separate? The

combined IC signal ground pin and the ground return of

V

= R

(ΔI ) = 0.02ꢀ(1.67A) = 33mV

ORIPPLE

ESR L P–P

PC Board Layout Checklist

C

must return to the combined C

(–) terminals.

INTVCC

OUT

The path formed by the top N-channel MOSFET, Schottky

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the IC. These items are also illustrated graphically in the

layout diagram of Figure 10. The Figure 11 illustrates the

current waveforms present in the various branches of the

2-phasesynchronousregulatorsoperatinginthecontinu-

ous mode. Check the following in your layout:

diode and the C capacitor should have short leads and

IN

PCtracelengths.Theoutputcapacitor(–)terminalsshould

be connected as close as possible to the (–) terminals

of the input capacitor by placing the capacitors next to

each other and away from the Schottky loop described

above.

3. DotheLTC3728L-1V

pins’resistivedividerscon-

OUT

OSENSE

1. Are the top N-channel MOSFETs M1 and M3 located

within 1cm of each other with a common drain connection

necttothe(+)terminalsofC ?Theresistivedividermust

R

PU

V

PULL-UP

(<7V)

PGOOD

RUN/SS1

PGOOD

TG1

L1

R

SENSE

D1

+

V

OUT1

SENSE1

–

SENSE1

SW1

R2

C

B1

R1

M1

M2

V

BOOST1

OSENSE1

PLLFLTR

PLLIN

FCB

V

IN

f

IN

C

OUT1

BG1

1μF

R

IN

CERAMIC

INTV

EXTV

CC

C

VIN

GND

LTC3728L-1

INTV

I

TH1

C

IN

V

IN

C

INTVCC

SGND

PGND

BG2

OUT2

D2

1μF

CERAMIC

3.3V

OUT

M4

M3

I

BOOST2

SW2

TH2

C

B2

V

OSENSE2

–

R

R3

R4

SENSE

V

SENSE2

TG2

OUT2

L2

+

RUN/SS2

3728L1 F10

Figure 10. LTC3728L-1 Recommended Printed Circuit Layout Diagram

3728l1fc

26

LTC3728L-1

APPLICATIONS INFORMATION

SW1

L1

R

SENSE1

V

OUT1

+

D1

CERAMIC

C

R

L1

OUT1

V

IN

R

IN

+

C

IN

SW2

L2

R

SENSE2

V

OUT2

+

D2

C

R

L2

OUT2

BOLD LINES INDICATE

HIGH SWITCHING

CURRENT. KEEP LINES

TO A MINIMUM LENGTH.

CERAMIC

3728L1 F11

Figure 11. Branch Current Waveforms

be connected between the (+) terminal of C

ground. The R2 and R4 connections should not be along

the high current input feeds from the input capacitor(s).

and signal

This capacitor carries the MOSFET drivers current peaks.

An additional 1μF ceramic capacitor placed immediately

OUT

next to the INTV and PGND pins can help improve noise

CC

performance substantially.

–

+

4. AretheSENSE andSENSE leadsroutedtogetherwith

minimum PC trace spacing? The ﬁlter capacitor between

6. Keep the switching nodes (SW1, SW2), top gate nodes

(TG1, TG2), and boost nodes (BOOST1, BOOST2) away

from sensitive small-signal nodes, especially from the

opposites channel’s voltage and current sensing feedback

pins. All of these nodes have very large and fast moving

signals and therefore should be kept on the “output side”

of the LTC3728L-1 and occupy minimum PC trace area.

+

–

SENSE and SENSE should be as close as possible to

the IC. Ensure accurate current sensing with Kelvin con-

nections at the SENSE resistor.

5. Is the INTV decoupling capacitor connected close to

CC

the IC, between the INTV and the power ground pins?

CC

3728l1fc

27

LTC3728L-1

APPLICATIONS INFORMATION

7. Use a modiﬁed “star ground” technique: a low imped-

ance,largecopperareacentralgroundingpointonthesame

sideofthePCboardastheinputandoutputcapacitorswith

to the phasing of the internal clocks and may cause minor

duty cycle jitter.

Reduce V from its nominal level to verify operation

IN

tie-ins for the bottom of the INTV decoupling capacitor,

CC

of the regulator in dropout. Check the operation of the

the bottom of the voltage feedback resistive divider and

undervoltage lockout circuit by further lowering V while

IN

the SGND pin of the IC.

monitoring the outputs to verify operation.

PC Board Layout Debugging

Investigate whether any problems exist only at higher out-

put currents or only at higher input voltages. If problems

coincide with high input voltages and low output currents,

look for capacitive coupling between the BOOST, SW, TG,

and possibly BG connections and the sensitive voltage

and current pins. The capacitor placed across the current

sensing pins needs to be placed immediately adjacent to

the pins of the IC. This capacitor helps to minimize the

effects of differential noise injection due to high frequency

capacitive coupling. If problems are encountered with

high current output loading at lower input voltages, look

Start with one controller on at a time. It is helpful to use

a DC-50MHz current probe to monitor the current in the

inductor while testing the circuit. Monitor the output

switching node (SW pin) to synchronize the oscilloscope

totheinternaloscillatorandprobetheactualoutputvoltage

as well. Check for proper performance over the operating

voltage and current range expected in the application. The

frequencyofoperationshouldbemaintainedovertheinput

voltage range down to dropout and until the output load

dropsbelowthelowcurrentoperationthreshold—typically

10% to 20% of the maximum designed current level in

Burst Mode operation.

for inductive coupling between C , Schottky and the top

IN

MOSFET components to the sensitive current and voltage

sensing traces. In addition, investigate common ground

path voltage pickup between these components and the

SGND pin of the IC.

Thedutycyclepercentageshouldbemaintainedfromcycle

tocycleinawell-designed,lownoisePCBimplementation.

Variation in the duty cycle at a subharmonic rate can sug-

gest noise pickup at the current or voltage sensing inputs

or inadequate loop compensation. Overcompensation of

the loop can be used to tame a poor PC layout if regula-

tor bandwidth optimization is not required. Only after

each controller is checked for its individual performance

should both controllers be turned on at the same time.

A particularly difﬁcult region of operation is when one

controller channel is nearing its current comparator trip

pointwhentheotherchannelisturningonitstopMOSFET.

This occurs around 50% duty cycle on either channel due

An embarrassing problem, which can be missed in an

otherwise properly working switching regulator, results

when the current sensing leads are hooked up backwards.

The output voltage under this improper hookup will still

be maintained but the advantages of current mode control

will not be realized. Compensation of the voltage loop will

be much more sensitive to component selection. This

behavior can be investigated by temporarily shorting out

the current sensing resistor—don’t worry, the regulator

will still maintain control of the output voltage.

3728l1fc

28

LTC3728L-1

TYPICAL APPLICATIONS

59k

1M

100k

MBRS1100T3

T1, 1:1.8

V

+

PULL-UP

33μF

25V

(<7V)

10μH

PGOOD

TG1

PGOOD

RUN/SS1

0.015Ω

D1

V

0.1μF

OUT1

+

5V

SENSE1

M1

3A; 4A PEAK

180pF

1000pF

8

–

SW1

SENSE1

105k, 1%

5

20k

1%

Q1

Q2

0.1μF

LT1121

ON/OFF

BOOST1

V

OSENSE1

3

2

1

220k

V

12V

120mA

OUT3

V

PLLFLTR

PLLIN

FCB

IN

150μF, 6.3V

PANASONIC SP

BG1

+

33pF

1μF

25V

10Ω

22μF

50V

100k

CMDSH-3TR

EXTV

CC

0.1μF

GND

LTC3728L-1

INTV

I

CC

TH1

1μF

10V

15k

4.7μF

180μF, 4V

PANASONIC SP

1000pF

V

PGND

BG2

SGND

IN

7V TO

28V

33pF

M2

CMDSH-3TR

3.3V

OUT

Q3

Q4

D2

BOOST2

SW2

I

TH2

15k

0.1μF

V

OSENSE2

–

20k

1%

V

OUT2

3.3V

5A; 6A PEAK

TG2

SENSE2

63.4k

1%

0.01Ω

1000pF

L1

6.3μH

+

RUN/SS2

SENSE2

180pF

0.1μF

3728L1 F12

V

: 7V TO 28V

IN

: 5V, 3A/3.3V, 6A/12V, 150mA

OUT

SWITCHING FREQUENCY = 250kHz

MI, M2: FDS6982S OR VISHAY Si4810DY

L1: SUMIDA CEP123-6R3MC

T1: 10μH 1:1.8 — DALE LPE6562-A262 GAPPED E-CORE OR BH ELECTRONICS #501-0657 GAPPED TOROID

Figure 12. LTC3728L-1 High Efﬁciency Low Noise 5V/3A, 3.3V/5A, 12V/120mA Regulator

3728l1fc

29

LTC3728L-1

TYPICAL APPLICATIONS

V

PULL-UP

(<7V)

L1

4.3μH

PGOOD

RUN/SS1

PGOOD

TG1

0.008Ω

0.1μF

V

+

–

OUT1

SENSE1

5V/4A

180pF

1000pF

105k

1%

SW1

20k

1%

0.1μF

Q1

Q2

V

BOOST1

OSENSE1

PIN 4

M1

PLLFLTR

PLLIN

FCB

V

0.01μF

1μF 50V

IN

10k

1000pF

f

SYNC

BG1

100pF

10Ω

22μF

50V

CMDSH-3TR

EXTV

INTV

CC

150μF, 6.3V

180μF, 4V

0.1μF

GND

LTC3728L-1

I

TH1

1μF 50V

8.06k

1μF

4.7μF, 10V

1500pF

1000pF

SGND

PGND

BG2

V

IN

100pF

CMDSH-3TR

7V TO

28V

3.3V

OUT

PIN 4

I

BOOST2

SW2

Q3

Q4

TH2

4.75k

0.1μF

V

OSENSE2

–

20k

1%

M2

V

OUT2

SENSE2

TG2

3.3V/5A

0.008Ω

63.4k

1%

1000pF

L2

4.3μH

+

180pF

RUN/SS2

0.1μF

: 7V TO 28V

3728L1 F13

V

SWITCHING FREQUENCY = 250kHz TO 550kHz

M1, M2: FDS6982S OR VISHAY Si4810DY

L1, L2: SUMIDA CDEP105-4R3MC-88

OUTPUT CAPACITORS: PANASONIC SP SERIES

IN

: 5V, 4A/3.3V, 5A

OUT

Figure 13. LTC3728L-1 5V/4A, 3.3V/5A Regulator with External Frequency Synchronization

3728l1fc

30

LTC3728L-1

PACKAGE DESCRIPTION

GN Package

28-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

.386 – .393*

(9.804 – 9.982)

.045 .005

.033

(0.838)

REF

28 27 26 25 24 23 22 21 20 19 18 17 1615

.254 MIN

.150 – .165

.229 – .244

.150 – .157**

(5.817 – 6.198)

(3.810 – 3.988)

.0165 .0015

.0250 BSC

1

2

3

4

5

6

7

8

9 10 11 12 13 14

RECOMMENDED SOLDER PAD LAYOUT

.015 .004

(0.38 0.10)

.0532 – .0688

(1.35 – 1.75)

.004 – .0098

(0.102 – 0.249)

× 45°

.0075 – .0098

(0.19 – 0.25)

0° – 8° TYP

.016 – .050

(0.406 – 1.270)

.008 – .012

.0250

(0.635)

BSC

GN28 (SSOP) 0204

(0.203 – 0.305)

TYP

NOTE:

1. CONTROLLING DIMENSION: INCHES

INCHES

2. DIMENSIONS ARE IN

(MILLIMETERS)

3. DRAWING NOT TO SCALE

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

UH Package

32-Lead Plastic QFN (5mm × 5mm)

(Reference LTC DWG # 05-08-1693 Rev D)

BOTTOM VIEW—EXPOSED PAD

PIN 1 NOTCH R = 0.30 TYP

R = 0.05

TYP

R = 0.115

TYP

0.75 ± 0.05

OR 0.35 × 45° CHAMFER

5.00 ± 0.10

(4 SIDES)

31 32

0.00 – 0.05

0.70 ±0.05

5.50 ±0.05

4.10 ±0.05

0.40 ± 0.10

PIN 1

TOP MARK

(NOTE 6)

1

2

3.45 ± 0.05

3.45 ± 0.10

3.50 REF

(4 SIDES)

3.50 REF

(4-SIDES)

3.45 ± 0.05

3.45 ± 0.10

PACKAGE

OUTLINE

0.200 REF

0.25 ± 0.05

0.50 BSC

0.25 ± 0.05

0.50 BSC

NOTE:

(UH32) QFN 0406 REV D

RECOMMENDED SOLDER PAD LAYOUT

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE

M0-220 VARIATION WHHD-(X) (TO BE APPROVED)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

3728l1fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

31

LTC3728L-1

TYPICAL APPLICATION

I

IN

12V

IN

C

IN

I

1

I

*

IN

0°

BUCK: 2.5V/15A

OPEN

PHASMD TG1

180°

I

1

2

3

4

2.5V /30A

O

TG2

U1

LTC3729

I

90°

2

3

I

CLKOUT

I

1.5V /15A

O

90°

BUCK: 1.5V/15A

BUCK: 1.8V/15A

TG1

270°

1.8V /15A

O

TG2

LTC3728L-1

PLLIN

U2

*INPUT RIPPLE CURRENT CANCELLATION

INCREASES THE RIPPLE FREQUENCY AND

REDUCES THE RMS INPUT RIPPLE CURRENT

THUS, SAVING INPUT CAPACITORS

I

90°

4

3728L1 F14

Figure 14. Multioutput PolyPhase Application

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LTC1628/LTC1628-PG/ 2-Phase, Dual Output Synchronous Step-Down

Reduces C and C , Power Good Output Signal, Synchronizable,

IN

OUT

LTC1628-SYNC

DC/DC Controller

3.5V ≤ V ≤ 36V, I

up to 20A, 0.8V ≤ V

≤ 5V

OUT

IN

LTC1629/

LTC1629-PG

20A to 200A PolyPhase™ Synchronous Controllers

Expandable from 2-Phase to 12-Phase, Uses All

Surface Mount Components, No Heat Sink, V up to 36V

IN

LTC1708-PG

2-Phase, Dual Synchronous Controller with Mobile VID

3.5V ≤ V ≤ 36V, VID Sets V

, PGOOD

OUT1

IN

LT1709/

LT1709-8

High Efﬁciency, 2-Phase Synchronous Step-Down

Switching Regulators with 5-Bit VID

1.3V ≤ V

≤ 3.5V, Current Mode Ensures

OUT

Accurate Current Sharing, 3.5V ≤ V ≤ 36V

IN

LTC1735

High Efﬁciency Synchronous Step-Down

Switching Regulator

Output Fault Protection, 16-Pin SSOP

LTC1736

High Efﬁciency Synchronous Controller with 5-Bit Mobile Output Fault Protection, 24-Pin SSOP,

VID Control 3.5V ≤ V ≤ 36V

IN

LTC1778/LTC1778-1

No R Current Mode Synchronous Step-Down

Up to 97% Efﬁciency, 4V ≤ V ≤ 36V, 0.8V ≤ V

≤ (0.9)(V ),

OUT IN

SENSE

IN

Controllers

I

up to 20A

OUT

LTC1929/

LTC1929-PG

2-Phase Synchronous Controllers

Up to 42A, Uses All Surface Mount Components,

No Heat Sinks, 3.5V ≤ V ≤ 36V

IN

LTC3708

LTC3711

Dual, 2-Phase, DC/DC Controller with Output Tracking

Current Mode, No R

, Up/Down Tracking, Synchronizable

SENSE

No R

Current Mode Synchronous Step-Down

Up to 97% Efﬁciency, Ideal for Pentium^®III Processors,

0.925V ≤ V ≤ 2V, 4V ≤ V ≤ 36V, I up to 20A

SENSE

Controller with Digital 5-Bit Interface

OUT

IN

OUT

LTC3728

LTC3729

Dual, 550kHz, 2-Phase Synchronous Step-Down

Controller

Dual 180° Phased Controllers, V 3.5V to 35V, 99% Duty Cycle,

IN

5x5QFN, SSOP-28

20A to 200A, 550kHz PolyPhase Synchronous Controller Expandable from 2-Phase to 12-Phase, Uses all Surface Mount

Components, V up to 36V

IN

LTC3731

LTC3802

3- to 12-Phase Step-Down Synchronous Controller

No R 2-Phase Dual Synchronous Step-Down

60A to 240A Output Current, 0.6V ≤ V

≤ 6V, 4.5V ≤ V ≤ 32V

OUT IN

330kHz to 750kHz, No Sense Resistor, Output Voltage Tracking,

Synchronizable for 4-Phase Operation

SENSE

Controller

No R

and PolyPhase are trademarks of Linear Technology Corporation.

SENSE

3728l1fc

LT 0708 REV C • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

32

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3728L-1_15
厂家：	Linear
描述：	Dual, 550kHz, 2-Phase Synchronous Regulator
文件：	总32页 (文件大小：480K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3728L-1_15 [Linear]

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