LTC3789IUFD#TRPBF [Linear]
LTC3789 - High Efficiency, Synchronous, 4-Switch Buck-Boost Controller; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C;
| 型号： | LTC3789IUFD#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC3789 - High Efficiency, Synchronous, 4-Switch Buck-Boost Controller; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C 控制器 |
| 文件： | 总32页 (文件大小：395K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3796
100V Constant-Current and
Constant-Voltage Controller
with Dual Current Sense
DESCRIPTION
FEATURES
The LT®3796 is a DC/DC controller designed to regulate a
constant-current or constant-voltage and is ideal for driv-
ing LEDs. It drives a low side external N-channel power
MOSFET from an internal regulated 7.7V supply. The fixed
frequency and current mode architecture result in stable
operation over a wide range of supply and output volt-
ages. Two ground referred voltage FB pins serve as the
input for several LED protection features, and also allow
the converter to operate as a constant-voltage source.
The LT3796 features a programmable threshold output
sense amplifier with rail-to-rail common mode range. The
LT3796 also includes a separate high side current sensing
amplifier that is gain configurable with two resistors. The
TG pin inverts and level shifts the PWM signal to drive
the gate of the external PMOS. The PWM input provides
LED dimming ratios of up to 3000:1, and the CTRL input
provides additional analog dimming capability.
n
3000:1 True Color PWM™ Dimming
n
Wide Input Voltage Range: 6V to 100V
n
Current Monitoring Up to 100V
n
High Side PMOS Disconnect and PWM Switch Driver
n
Constant-Current and Constant-Voltage Regulation
n
Dual Current Sense Amplifiers with Reporting
n
C/10 Detection for Battery and SuperCap Charging
n
Linear Current Sense Threshold Programming
n
Short-Circuit Protection
n
Adjustable Frequency: 100kHz to 1MHz
n
Frequency Synchronization
n
Programmable Open LED Protection with VMODE Flag
n
Programmable Undervoltage Lockout with Hysteresis
n
Soft-Start with Programmable Fault Restart Timer
n
Low Shutdown Current: <1μA
n
Available in 28-Lead TSSOP Package
APPLICATIONS
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and True
Color PWM is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 7199560, 7321203,
7746300.
n
High Power LED, High Voltage LED
n
Battery and SuperCap Chargers
n
Accurate Current Limited Voltage Regulators
TYPICAL APPLICATION
Boost LED Driver with Input Current Monitor
Efficiency vs VIN
22µH
50mΩ
V
IN
100
9V TO 60V
100V (TRANSIENT)
2.2µF
×4
2k
95
2.2µF
×3
1M
1M
499k
V
V
CSP
CSN
GATE
90
IN
S
13.7k
EN/UVLO
118k
85
97.6k
V
SENSE
REF
15mΩ
CTRL
80
75
70
LT3796
GND
FB1
ISP
C
SOUT
CSOUT
PWM
10nF
100k
40.2k
100k
PWM
ISMON
SYNC
0
10
20
30
(V)
40
50
60
0.1µF
620mΩ
INTV
CC
V
IN
ISN
TG
3796 TA01b
FAULT
FAULT
INTV
CC
INTV
CC
VMODE
VMODE
V
C
RT
FB2
SS
4.7µF
85V LED
400mA
31.6k
250kHz
10k
0.1µF
10nF
3796 TA01a
3796f
1
LT3796
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
V , V ....................................................................100V
IN
S
TOP VIEW
EN/UVLO.................................................................100V
ISP, ISN...................................................................100V
TG, GATE...............................................................Note 3
CSP, CSN ................................................................100V
1
2
CSOUT
CSP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ISP
ISN
3
CSN
TG
4
V
S
GND
ISMON
FB2
V - CSP, V - CSN ....................................... –0.3V to 4V
S
S
5
EN/UVLO
INTV (Note 2) .....................................8.6V, V + 0.3V
CC
IN
6
V
IN
PWM, VMODE, FAULT ...............................................12V
FB1, FB2, SYNC...........................................................8V
CTRL.........................................................................15V
SENSE......................................................................0.5V
ISMON, CSOUT...........................................................5V
7
GND
GND
FB1
29
GND
8
V
C
9
INTV
CC
CTRL
10
11
12
13
14
GATE
V
REF
SS
SENSE
GND
V , V , SS................................................................3V
C
REF
RT
RT...............................................................................2V
VMODE
FAULT
SYNC
PWM
Operating Junction Temperature Range (Note 4)
LT3796E/LT3796I ..................................–40 to 125°C
LT3796H ................................................–40 to 150°C
Storage Temperature Range ......................–65 to 150°C
FE PACKAGE
T
= 150°C, θ = 30°C/W, θ = 10°C/W
JMAX
JA JC
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LT3796EFE#PBF
LT3796IFE#PBF
LT3796HFE#PBF
TAPE AND REEL
PART MARKING*
LT3796FE
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3796EFE#TRPBF
LT3796IFE#TRPBF
LT3796HFE#TRPBF
28-Lead Plastic TSSOP
28-Lead Plastic TSSOP
28-Lead Plastic TSSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
LT3796FE
LT3796FE
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3796f
2
LT3796
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
Tied to INTV
CC
MIN
TYP
MAX
UNITS
V
V
Minimum Operating Voltage
V
6
V
IN
IN
IN
Shutdown I
EN/UVLO = 0V, PWM = 0V
EN/UVLO = 1.15V, PWM = 0V
1
12
µA
µA
Q
V
V
V
V
Operating I (Not Switching)
R = 82.5k to GND, FB1 = 1.5V
2.5
2.015
1.5
3
mA
V
IN
Q
T
l
l
Voltage
–100µA ≤ I ≤ 10µA
1.97
100
2.06
REF
REF
REF
REF
Pin Line Regulation
Pin Load Regulation
6V < V < 100V
m%/V
m%/µA
mV
IN
–100µA < I < 0µA
10
REF
SENSE Current Limit Threshold
SENSE Input Bias Current
SS Sourcing Current
113
60
125
Current Out of Pin
SS = 0V
µA
28
µA
SS Sinking Current
ISP – ISN = 1V, SS = 2V
2.8
µA
Error Amplifier
l
l
Full Scale LED Current Sense Threshold
(ISP-ISN)
ISP = 48V, CTRL ≥ 1.2V
ISP = 0V, CTRL ≥ 1.2V
243
243
250
250
257
257
mV
mV
(V
)
l
l
9/10th LED Current Sense Threshold
(V
CTRL = 1V, ISP = 48V
CTRL = 1V, ISP = 0V
220
220
225
225
230
230
mV
mV
)
(ISP-ISN)
l
l
1/2 LED Current Sense Threshold
(V
CTRL = 0.6V, ISP = 48V
CTRL = 0.6V, ISP = 0V
119
119
125
125
131
131
mV
mV
)
(ISP-ISN)
l
l
1/10th LED Current Sense Threshold
(V
CTRL = 0.2V, ISP = 48V
CTRL = 0.2V, ISP = 0V
16
16
25
25
32
32
mV
mV
)
(ISP-ISN)
l
l
ISP/ISN Current Monitor Voltage (V
)
V
V
= 250mV, ISP = 48V, –50µA < I
= 250mV, ISP = 0V, –50µA < I
< 0 µA
< 0 µA
0.96
0.96
1
1
1.04
1.04
V
V
ISMON
(ISP-ISN)
(ISP-ISN)
ISMON
ISMON
l
l
ISP/ISN Over Current Protection Threshold
(V
ISN = 48V
ISN = 0V
360
360
375
375
390
390
mV
mV
)
(ISP-ISN)
CTRL Input Bias Current
Current Out of Pin, CTRL = 1.2V
50
200
100
nA
V
ISP/ISN Current Sense Amplifier Input
Common Mode Range
0
ISP/ISN Input Current Bias Current
(Combined)
PWM = 5V (Active), ISP = 48V
PWM = 0V (Standby), ISP = 48V
700
0
µA
µA
0.1
ISP/ISN Current Sense Amplifier g
V
= 250mV
(ISP-ISN)
400
µs
kΩ
nA
m
V Output Impedance
C
2000
V Standby Input Bias Current
C
PWM = 0V
–20
20
l
FB1, FB2 Regulation Voltage (V
)
FB
ISP = ISN = 48V
ISP = ISN = 48V
1.230
1.238
1.250
1.250
1.270
1.264
V
V
FB1 Amplifier g
FB2 Amplifier g
800
130
1000
170
1200
210
µS
µS
nA
V
m
m
FB1, FB2 Pin Input Bias Current
FB1 Open LED Threshold
FB = V
100
200
FB
VMODE Falling, ISP = ISN = 48V
V
FB
– 70mV
V
– 60mV V – 50mV
FB
FB
C/10 Comparator Threshold (V
)
VMODE Falling, FB1 = 1.5V, ISP = 48V
VMODE Falling, FB1 = 1.5V, ISN = 0V
25
25
mV
mV
(ISP-ISN)
FB1 Overvoltage Threshold
FB2 Overvoltage Threshold
FAULT Falling
V
V
+ 35mV
+ 35mV
V
V
+ 50mV V + 60mV
V
V
FB
FB
FB
TG Rising
+ 50mV V + 60mV
FB
FB
FB
V Current Mode Gain (∆V /∆V )
SENSE
4.2
V/V
C
VC
3796f
3
LT3796
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current Sense Amplifier (CSA)
l
l
Power Supply Voltage Range (V )
3
100
100
V
V
S
CSA Input Voltage Common Mode Range
2.5
(V
and V
)
CSP
CSN
l
l
CSOUT Maximum Output Current
Input Voltage Offset (V
CSOUT = 10kΩ to GND
200
3
µA
mV
nA
nA
µA
µs
)
V
SNS
V
SNS
V
SNS
= 100mV, V = 48V (Note 5)
–3
0
100
0
(CSP-CSN)
S
CSP, CSN Input Bias Current
CSP, CSN Input Current Offset
= 0mV, R = R = 1k (Note 5)
IN1 IN2
= 0mV, R = R = 1k (Note 5)
IN1
IN2
V Supply Current
S
V = 48V
S
80
1
Input Step Response ( to 50% of Output Step) ∆V
= 100mV Step, R = R = 1k, R = 10k
IN1 IN2 OUT
SENSE
Linear Regulator
l
INTV Regulation Voltage
7.4
7.7
8
V
CC
–
Dropout (V INTV
)
I
= –20mA, V = 6V
400
mV
IN
CC
INTVCC
IN
INTV Current Limit
V
V
= 100V, INTV = 6V
20
85
mA
mA
CC
IN
IN
CC
= 12V, INTV = 6V
CC
INTV Shutdown Bias Current if Externally
EN/UVLO = 0V, INTV = 7V
10
µA
CC
CC
Driven to 7V
INTV Undervoltage Lockout
3.8
4
4.1
V
CC
INTV Undervoltage Lockout Hysteresis
150
mV
CC
Oscillator
l
l
l
Switching Frequency
R = 82.5k
85
340
900
105
400
1000
125
480
1150
kHz
kHz
kHz
T
R = 19.6k
T
R = 6.65k
T
Minimum Off-Time
(Note 6)
(Note 6)
190
210
ns
ns
Minimum On-Time
LOGIC Input/Outputs
l
l
PWM Input Threshold Rising
PWM Pin Bias Current
0.96
1
10
1.04
V
µA
V
EN/UVLO Threshold Voltage Falling
EN/UVLO Rising Hysteresis
EN/UVLO Input Low Voltage
EN/UVLO Pin Bias Current Low
EN/UVLO Pin Bias Current High
VMODE OUTPUT Low
1.185
1.220
20
1.250
mV
V
I
Drops Below 1µA
0.4
2.5
VIN
EN/UVLO = 1.15V
EN/UVLO = 1.30V
3
3.8
200
300
300
µA
nA
mV
mV
kΩ
V
40
I
I
= 0.5mA
VMODE
FAULT OUTPUT Low
= 0.5mA
FAULT
SYNC Pin Resistance to GND
SYNC Input Low Threshold
SYNC Input High Threshold
40
0.4
1.5
V
3796f
4
LT3796
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
Gate Driver
CONDITIONS
MIN
TYP
MAX
UNITS
t NMOS GATE Driver Output Rise Time
C = 3300pF, 10% to 90%
20
18
ns
ns
V
r
L
t NMOS GATE Driver Output Fall Time
f
C = 3300pF, 10% to 90%
L
NMOS GATE Output Low (V
)
OL
0.05
NMOS GATE Output High (V
)
OH
INTV
–
V
CC
0.05
t Top GATE Driver Output Rise Time
C = 300pF
50
100
7
ns
ns
V
r
L
t Top GATE Driver Output Fall Time
f
C = 300pF
L
Top Gate On Voltage (V -V
)
ISP = 48V
8
ISP TG
Top Gate Off Voltage (V -V
)
PWM = 0V, ISP = 48V
0
0.3
V
ISP TG
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
correlation with statistical process controls. The LT3796I is guaranteed
to meet performance specifications over the –40°C to 125°C operating
temperature range. The LT3796H is guaranteed over the full –40°C to
150° C operating junction temperature range. High junction temperatures
degrade operating lifetimes. Operating lifetime is derated at junction
temperatures greater than 125°C.
Note 2: Operating maximum for INTV is 8V.
CC
Note 3: Do not apply a positive or negative voltage source to TG and GATE
pins, otherwise permanent damage may occur.
Note 5: Measured in servo. See Figure 9 for details.
Note 6: See Duty Cycle Considerations in the Applications Information
section.
Note 4: The LT3796E is guaranteed to meet specified performance
from 0°C to 125°C. Specifications over the –40°C to 125°C operating
temperature range are assured by design, characterization and
3796f
5
LT3796
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
V(ISP-ISN) Full-Scale Threshold vs
Temperature
V(ISP-ISN) Threshold vs VCTRL
V(ISP-ISN) Threshold vs VISP
254
253
252
251
300
250
253
252
ISP = 48V
CTRL = 2V
200
150
100
251
250
249
250
249
248
247
246
50
0
248
247
50
100 125 150
0.8
(V)
1.2
1.4
60
(V)
100
–50 –25
0
25
75
0
0.2
0.4 0.6
1.0
0
20
40
80
TEMPERATURE (°C)
V
CTRL
V
ISP
3796 G03
3796 G01
3796 G02
V
(ISP-ISN) Threshold at CTRL = 0.6V
V(ISP-ISN) Threshold vs FB Voltage
VFB vs Temperature
vs Temperature
300
250
200
128
127
126
125
124
1.27
1.26
FB1
FB2
150
100
50
1.25
1.24
1.23
123
122
0
1.2
(V)
1.25
1.3
1.1
1.15
–25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G03a
–50
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G05
–50 –25
V
FB
3796 G04
ISP/ISN Overcurrent Protection
Threshold vs Temperature
ISP/ISN Input Bias Current vs
VISP , VISN
VREF Voltage vs Temperature
900
800
700
600
500
400
300
200
100
0
380
378
376
2.05
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
PWM = 5V
I
= 0µA
REF
ISP
I
= –100µA
REF
374
372
370
ISN
40
60
80
100
0
20
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G06
0
25 50 75 100 125 150
TEMPERATURE (°C)
–50 –25
–50 –25
V
, V (V)
ISP ISN
3796 G07
3796 G08
3796f
6
LT3796
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Switching Frequency vs
Temperature
V
REF vs VIN
RT vs Switching Frequency
440
430
420
410
400
390
380
370
360
2.05
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
100
10
1
R
T
= 19.6k
I
= 0µA
REF
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G11
–50 –25
0
60
(V)
80
100
0
20
40
500 600 700 800 900 1000
0
100 200 300 400
V
SWITCHING FREQUENCY (kHz)
IN
3796 G09
3796 G10
Switching Frequency vs
SS Voltage
Quiescent Current vs VIN
VISMON vs V(ISP-ISN)
450
400
350
300
2.5
2.0
1.5
2000
1800
1600
1400
1200
1000
800
250
200
150
1.0
0.5
0
600
100
50
0
400
200
PWM = 0V
0
200
300
400
500
200
400
600
800 1000 1200
0
100
0
60
(V)
80
100
0
20
40
V
(mV)
SS VOLTAGE (mV)
V
(ISP-ISN)
IN
3796 G13
3796 G11a
3796 G12
EN/UVLO Falling/Rising
Threshold vs Temperature
SENSE Current Limit Threshold vs
Temperature
EN/UVLO Hysteresis Current vs
Temperature
118
117
3.5
3.0
2.5
2.0
1.28
1.27
116
115
114
113
112
111
1.26
1.25
1.24
1.23
1.22
1.21
1.20
1.19
EN/UVLO RISING THRESHOLD
EN/UVLO FALLING THRESHOLD
1.5
1.0
0.5
0
110
109
108
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G16
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G14
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G15
–50 –25
–50 –25
3796f
7
LT3796
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
INTVCC Current Limit
vs Temperature
SENSE Current Limit Threshold vs
Duty Cycle
INTVCC Current Limit vs VIN
120
115
120
100
80
100
90
V
IN
= 24V
80
110
105
100
60
40
20
0
V
= 48V
IN
70
60
50
20
40
60
80
100
60
(V)
80
100
0
0
20
40
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G19
0
DUTY CYCLE (%)
V
IN
3796 G17
3796 G18
INTVCC Dropout Voltage vs
Current, Temperature
INTVCC vs VIN
INTVCC vs Temperature
1800
1600
1400
1200
1000
800
9
8
7
6
5
4
3
2
1
0
8.0
7.9
7.8
7.7
7.6
7.5
7.4
7.3
V
IN
= 6V
150°C
125°C
75°C
25°C
0°C
600
400
200
–55°C
–40°C
10
0
5
15
20
0
20
40
60
(V)
80
100
0
–25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G22
–50
INTV LOAD (mA)
V
CC
IN
3796 G21
3796 G20
V(CSP-CSN) Offset Voltage with
Different ICSOUT vs VS
V(CSP-CSN) Offset Voltage vs
Temperature
Current Sense Amplifier Gain
Error vs Temperature
2.0
1.5
1.0
0.5
0
2
1
0.6
0.4
I
= 100µA
CSOUT
I
= 100µA
CSOUT
I
= 10µA
CSOUT
I
= 50µA
= 10µA
I
= 100µA
CSOUT
CSOUT
I
= 50µA
CSOUT
0
–1
–2
0.2
0
I
= 50µA
CSOUT
–0.5
–1.0
–1.5
–2
I
CSOUT
I
= 10µA
CSOUT
SEE NOTE 5 FOR TEST SETUP
20 40 60
–0.2
–25
–50
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 G25
80
100
–25
–50
0
25 50 75 100 125 150
TEMPERATURE (°C)
0
V
(V)
S
3796 G23
3796 G24
3796f
8
LT3796
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Top Gate (PMOS) Rise/Fall Time
vs Capacitance
NMOS Gate Rise/Fall Time vs
Capacitance
Current Sense Amplifier Gain vs
Frequency
160
140
120
100
80
800
700
600
500
400
300
200
100
0
30
25
20
15
10
5
RISE TIME
FALL TIME
FALL TIME
0
60
–5
40
–10
–15
–20
V
= 48V, R = 1k
IN
S
RISE TIME
20
R
= 10k, V
= 100mV
OUT
SENSE
(NOTE 5)
0
10
20
30
40
50
1
2
3
4
5
6
7
8
9
10
0
0
0.1
1
10
100 1000 10000
0.01
CAPACITANCE (nF)
CAPACITANCE (nF)
FREQUENCY (kHz)
3796 G26
3796 G27
3796 G28
Top Gate Driver Rising Edge
Top Gate Driver Falling Edge
5V
0V
PWM
TG
5V
0V
PWM
TG
85V
75V
85V
75V
3796 G29
3796 G30
100ns/DIV
100ns/DIV
PMOS VISHAY SILICONIX Si7113DN
PMOS VISHAY SILICONIX Si7113DN
3796f
9
LT3796
PIN FUNCTIONS
ISP (Pin 1): Connection Point for the Positive Terminal
V (Pin 8): Transconductance Error Amplifier Output Pin.
C
of the Current Feedback Resistor (R ). Also serves as
Used to stabilize the control loop with an RC network.
This pin is high impedance when PWM is low, a feature
that stores the demand current state variable for the next
PWM high transition. Connect a capacitor between this
pin and GND; a resistor in series with the capacitor is
recommended for fast transient response. Do not leave
this pin open.
LED
positive rail for TG pin driver.
ISN (Pin 2): Connection Point for the Negative Terminal
of the Current Feedback Resistor (R ).
LED
TG(Pin3):TopGateDriverOutput.AninvertedPWMsignal
drives series PMOS device between V and (V – 7V)
ISP
ISP
if V > 7V. An internal 7V clamp protects the PMOS gate
ISP
CTRL (Pin 9): Current Sense Threshold Adjustment Pin.
by limiting VGS. Leave TG unconnected if not used.
RegulatingthresholdV
is0.25•V
CTRL
plusanoffset
(ISP-ISN)
< 1V. For V
CTRL
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29): Ground.
These pins also serve as current sense input for control
loop,sensingnegativeterminalofcurrentsenseresistorin
the source of the N-channel MOSFET. Solder the exposed
pad directly to ground plane.
for 0.1V < V
> 1.2V the current sense
CTRL
threshold is constant at the full-scale value of 250mV. For
1V < V < 1.2V, the dependence of the current sense
CTRL
threshold upon V
transitions from a linear function
CTRL
to a constant value, reaching 98% of full-scale value by
= 1.1V. Connect CTRL to V for the 250mV default
V
CTRL
REF
ISMON (Pin 5): ISP/ISN Current Report Pin. The LED
current sensed by ISP/ISN inputs is reported as V
current threshold. Do not leave this pin open. Pull CTRL
pin to GND for zero LED current.
=
ISMON
I
• R • 4. Leave ISMON pin unconnected if not used.
LED
LED
When PWM is low, ISMON is driven to ground. Bypass
V
(Pin 10): Voltage Reference Output Pin. Typically
REF
with a 47nF capacitor or higher if needed.
2.015V. This pin drives a resistor divider for the CTRL
pin, either for analog dimming or for temperature limit/
compensation of LED load. It can supply up to 100μA.
FB2 (Pin 6): Voltage Loop Feedback 2 Pin. This pin is
connectedtotheinternaltransconductanceamplifierposi-
tive input node. The internal transconductance amplifier
SS (Pin 11): Soft-Start Pin. This pin modulates oscillator
with output V regulates FB2 to 1.25V through the DC/
frequency and compensation pin voltage (V ) clamp. The
C
C
DC converter. If FB2 is driven above 1.3V, the TG pin is
pulled high to turn off the external PMOS and GATE pin is
driven to GND to turn off the external N-channel MOSFET.
Connect to GND if not used.
soft-start interval is set with an external capacitor. The pin
has a 28μA (typical) pull-up current source to an internal
2.5V rail. This pin can be used as fault timer. Provided the
SS pin has exceeded 1.7V, the pull-up current source is
disabled and a 2.8µA pull-down current enabled when any
one of the following fault conditions happen:
FB1 (Pin 7): Voltage Loop Feedback 1 Pin. FB1 is intended
forconstant-voltageregulationorforLEDprotection/open
LED detection. The internal transconductance amplifier
1. LED overcurrent
with output V regulates FB1 to 1.25V (nominal) through
2. INTV undervoltage
C
CC
the DC/DC converter. If the FB1 input is regulating the loop
3. Thermal limit
and V
is less than 25mV (normal), the VMODE
(ISP-ISN)
The SS pin must be discharged below 0.2V to reinitiate a
soft-startcycle.SwitchingisdisableduntilSSisrecharged.
pull-down is asserted. This action may signal an open
LED fault. If FB1 is driven above the 1.3V (by an external
power supply spike, for example), the FAULT pull-down is
asserted, the GATE pin is pulled low to turn off the external
N-channelMOSFETandtheTGpinisdrivenhightoprotect
the LEDs from an overcurrent event. Do not leave the FB1
pin open. If not used, connect FB1 to GND.
RT (Pin 12): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 2). Do not leave
the RT pin open.
3796f
10
LT3796
PIN FUNCTIONS
SYNC (Pin 13): The SYNC pin is used to synchronize the
INTV (Pin20):RegulatedSupplyforInternalLoads,GATE
CC
internal oscillator to an external logic level signal. If SYNC
Driver and Top Gate (PMOS) Driver. Supplied from V and
IN
is used, the R resistor should be chosen to program an
regulates to 7.7V (typical). INTV must be bypassed with
CC
T
internal switching frequency 20% slower than the SYNC
pulse frequency. Gate turn-on occurs a fixed delay after
the rising edge of SYNC. Use a 50% duty cycle waveform
to drive this pin. If not used, tie this pin to GND.
a 4.7μF capacitor placed close to the pin. Connect INTV
CC
directly to V if V is always less than or equal to 7V.
IN
IN
V (Pin 23): Input Supply Pin. Must be locally bypassed
IN
with a 0.22μF (or larger) capacitor placed close to the IC.
PWM (Pin 14): PWM Input Signal Pin. A signal low turns
EN/UVLO (Pin 24): Enable and Undervoltage Lockout
Pin. An accurate 1.22V falling threshold with externally
programmable hysteresis detects when power is OK to
enable switching. Rising hysteresis is generated by the
external resistor divider and an accurate internal 3μA
pull-down current. Above the threshold (but below 6V),
EN/UVLO input bias current is sub-μA. Below the falling
threshold, a 3μA pull-down current is enabled so the
user can define the hysteresis with the external resistor
selection. An undervoltage condition resets soft-start.
off switching, idles the oscillator, disconnects the V pin
C
from all internal loads, and makes the TG pin high.
FAULT (Pin 15): An open-collector pull-down on FAULT
asserts when any of the following conditions happen: 1.
FB1 overvoltage (V > 1.3V), 2. INTV undervoltage,
FB1
CC
3. LED overcurrent (V
> 375mV), or 4. Thermal
(ISP-ISN)
shutdown. If all faults are removed, FAULT flag returns
high. Fault status is only updated during PWM high
state and latched during PWM low state. FAULT remains
asserted until the SS pin is discharged below 0.2V for
cases 2, 3 and 4 above.
Tie to 0.4V, or less, to disable the device and reduce V
quiescent current below 1μA.
IN
VMODE(Pin16): An open-collector pull-downon VMODE
V (Pin 25): Current Sense Amplifier Power Supply Pin.
S
asserts if the FB1 input is above 1.19V (typical), and
This pin supply current to the current sense amplifier and
V
is less than 25mV (typical). To function, the
can operate from 3V to 100V.
(ISP-ISN)
pin requires an external pull-up resistor. VMODE status is
updated only during PWM high state and latched during
PWM low state.
CSN (Pin 26): Negative Current Sense Input Terminal.
CSN remains functional for voltages up to 100V. Typically
connected to V and CSP as shown in Figure 9.
S
SENSE (Pin 18): The current sense input for the control
CSP (Pin 27): Positive Current Sense Input Terminal. The
loop. Kelvin connect this pin to the positive terminal of
internalsenseamplifiersinkscurrentfromCSPtoregulate
the switch current sense resistor, R
, in the source
SENSE
it to the same potential as CSN. A resistor (R ) tied from
IN1
= V /R
of the N-channel MOSFET. The negative terminal of the
current sense resistor should be Kelvin connected to the
GND plane of the IC.
V
V
to CSP sets the output current I
SNS
.
IN
CSOUT
SNS
SNS IN1
is the voltage developed across R . See Figure 9.
CSOUT (Pin 28): Current Sense Amplifier Output. CSOUT
pin sources the current that is drawn from CSP. Typically
is output to an external resistor to GND.
GATE (Pin 19): N-Channel MOSFET Gate Driver Output.
Switches between INTV and GND. It is driven to GND
CC
during shutdown, fault or idle states.
3796f
11
LT3796
BLOCK DIAGRAM
FB1
V
TG
PWM
1.25V
V
IN
C
A1
EN/UVLO
–
+
LDO
–
+
ISP
ISP-7V
SHDN
A3
A2
gm
A4
+
–
+
–
1.22V
3µA
7.7V
INTV
CC
10µA AT
FB1 = 1.25V
OVFB1
1.3V
1.25V
0VFB
COMPARA
TOR
SHORT-CIRCUIT
DETECT
1.5V
–
+
TGOFFB
SCILMB
A5
V
LED
2.5V
ISMON
ISP
X1
10µA
gm
FAULTB
+
100mV
+
–
EAMP
GATE
DRIVER
– +
1.1V
X4
+
–
–
R
Q
A7
S
ISN
10µA AT
A6
–
+
–
A1 = A1
PWM
TOR
COMPARA
CTRL
FB2
I
LIM
113mV
+
A8
gm
A9
+
–
10µA AT
FB2 = 1.25V
–
1.25V
A16
+
–
V
S
0VFB2
1.3V
5.5V
5.5V
I
SENSE
SENSE
GND
CSP
+
–
2.5V
A10
–
28µA
THERMAL
SHDN
A11
CSN
RAMP
TOR
+
GENERA
PWM
SS
CSOUT
100kHz TO 1MHz
TOR
TGOFFB
FAULTB
5.5V
OSCILLA
VMODE
SS AND FAULT
LOGIC
FAULT
1mA
2.8µA
A12
A14
1.19V
–
OVFB1 INTV SCILMB
CC
OVFB2
1V
+
+
–
+
FB1
INTV
CC
A13
FREQ
PROG
100µA
V
V
LED
REF
–
–
+
200mV
+
A15
ARATOR
C/10 COMP
WITH 200mV
HYSTERESIS
2.015V
SS
RT
SYNC
3796 BD
LT3796 Block Diagram
3796f
12
LT3796
OPERATION
The LT3796 is a constant-frequency, current mode con-
troller with a low side NMOS gate driver. The operation of
the LT3796 is best understood by referring to the Block
Diagram. In normal operation, with the PWM pin low, the
GATE pin is driven to GND, the TG pin is pulled high to ISP
1.3V), LED over current, or INTV undervoltage (INTV
CC CC
< 4V), the GATE pin is pulled down to GND immediately.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the V pin is set
C
by the amplified difference of the internal reference of
1.25V (nominal) and the FB1 and FB2 pins. If FB1 and
FB2 are both lower than the reference voltage, the switch
current increases; if FB1 or FB2 is higher than the refer-
ence voltage, the switch demand current decreases. The
LED current sense feedback interacts with the voltage
feedback so that neither FB1 or FB2 exceeds the internal
reference and the voltage between ISP and ISN does not
exceed the threshold set by the CTRL pin. For accurate
current or voltage regulation, it is necessary to be sure
that under normal operating conditions, the appropriate
loop is dominant. To deactivate the voltage loop entirely,
FB1 and FB2 can be connected to GND. To deactivate the
LED current loop entirely, the ISP and ISN should be tied
to turn off the PMOS disconnect switch, the V pin goes
C
high impedance to store the previous switching state on
the external compensation capacitor, and the ISP and ISN
pin bias currents are reduced to leakage levels. When the
PWMpintransitionshigh,theTGpintransitionslowaftera
short delay. At the same time, the internal oscillator wakes
up and generates a pulse to set the PWM latch, turning on
the external power N-channel MOSFET switch (GATE goes
high). A voltage input proportional to the switch current,
sensed by an external current sense resistor between
the SENSE and GND input pins, is added to a stabilizing
slope compensation ramp and the resulting switch cur-
rent sense signal is fed into the negative terminal of the
PWM comparator. The current in the external inductor
increases steadily during the time the switch is on. When
the switch current sense voltage exceeds the output of the
together and the CTRL input tied to V
.
REF
Two LED specific functions featured on the LT3796 are
controlled by the voltage feedback FB1 pin. First, when
the FB1 pin exceeds a voltage 60mV lower (–5%) than
error amplifier, labeled V , the latch is reset and the switch
C
is turned off. During the switch off phase, the inductor
current decreases. At the completion of each oscillator
cycle, internal signals such as slope compensation return
to their starting points and a new cycle begins with the set
pulsefromtheoscillator.Throughthisrepetitiveaction,the
PWM control algorithm establishes a switch duty cycle to
the FB1 regulation voltage and V
is less than
(ISP-ISN)
25mV (typical), the pull-down driver on the VMODE pin
is activated. This function provides a status indicator that
the load may be disconnected and the constant-voltage
feedback loop is taking control of the switching regulator.
When the FB1 pin exceeds the FB1 regulation voltage by
50mV (4% typical), the FAULT pin is activated.
regulate a current or voltage in the load. The V signal is
C
integrated over many switching cycles and is an amplified
version of the difference between the LED current sense
voltage, measured between ISP and ISN, and the target
difference voltage set by the CTRL pin. In this manner,
the error amplifier sets the correct peak switch current
level to keep the LED current in regulation. If the error
amplifier output increases, more current is demanded in
the switch; if it decreases, less current is demanded. The
switch current is monitored during the on phase and the
voltage across the SENSE pin is not allowed to exceed the
currentlimitthresholdof113mV(typical).IftheSENSEpin
exceeds the current limit threshold, the SR latch is reset
regardless of the output state of the PWM comparator.
LT3796 features a PMOS disconnect switch driver. The
PMOSdisconnectswitchcanbeusedtoimprovethePWM
dimming ratio, and operate as fault protection as well.
Once a fault condition is detected, the TG pin is pulled high
to turnoff the PMOS switch. The action isolates the LED
array from the power path, preventing excessive current
from damaging the LEDs.
A standalone current sense amplifier is integrated in the
LT3796. It can work as input current limit or open LED
protection. The detailed information can be found in the
Application Information section.
Likewise, any fault condition, i.e. FB1 overvoltage (V
>
FB1
3796f
13
LT3796
APPLICATIONS INFORMATION
INTV Regulator Bypassing and Operation
is to allow the user to program the rising hysteresis. The
following equations should be used to determine the
values of the resistors:
CC
The INTV pin requires a capacitor for stable operation
CC
and to store the charge for the large GATE switching cur-
rents. Choose a 10V rated low ESR, X7R or X5R ceramic
capacitorforbestperformance. A4.7μFceramiccapacitor
is adequate for many applications. Place the capacitor
R1+ R2
VIN(FALLING) = 1.22•
R2
VIN(RISING) = VIN(FALLING) + 3µA •R1
close to the IC to minimize the trace length to the INTV
pin and also to the power ground.
CC
V
IN
An internal current limit on the INTV output protects the
CC
LT3796 from excessive on-chip power dissipation. The
minimum value of this current limit should be considered
when choosing the switching N-channel MOSFET and the
R1
LT3796
EN/UVLO
R2
operating frequency. I
following equation:
can be calculated from the
INTVCC
3796 F01
Figure 1.
I
= Q • f
G OSC
INTVCC
Careful choice of a lower Q MOSFET allows higher
G
LED Current Programming
switching frequencies, leading to smaller magnetics. The
The LED current is programmed by placing an appropriate
valuecurrentsenseresistorR betweentheISPandISN
INTV pin has its own undervoltage disable (UVLO) set
CC
LED
to 4V (typical) to protect the external FETs from excessive
pins. Typically, sensing of the current should be done at
the top of the LED string. If this option is not available,
thenthecurrentmaybesensedatthebottomofthestring.
The CTRL pin should be tied to a voltage higher than 1.2V
to get the full-scale 250mV (typical) threshold across the
sense resistor. The CTRL pin can also be used to dim the
LED current to zero, although relative accuracy decreases
with the decreasing voltage sense threshold. When the
CTRL pin voltage is less than 1V, the LED current is:
power dissipation caused by not being fully enhanced.
If the INTV pin drops below the UVLO threshold, the
CC
GATE pin is forced to 0V, TG pin is pulled high and the
soft-start pin will be reset. If the input voltage, V , will
IN
not exceed 7V, then the INTV pin should be connected
CC
to the input supply. Be aware that a small current (typically
10μA) loads the INTV in shutdown. If V is normally
CC
IN
above, but occasionally drops below the INTV regula-
CC
tion voltage, then the minimum operating V is close to
IN
6V. This value is determined by the dropout voltage of the
V
CTRL –100mV
linear regulator and the 4V INTV undervoltage lockout
CC
ILED
=
, 0.1V < V
≤ 1V
CTRL
threshold mentioned above.
RLED •4
I
= 0, V
= 0V
Programming the Turn-On and Turn-Off Thresholds
with the EN/UVLO Pin
LED
CTRL
When the CTRL pin voltage is between 1V and 1.2V, the
LED current varies with CTRL, but departs from the previ-
ous equation by an increasing amount as the CTRL volt-
age increases. Ultimately above 1.2V, the LED current no
ThefallingUVLOvaluecanbeaccuratelysetbytheresistor
divider. A small 3μA pull-down current is active when EN/
UVLO is below the threshold. The purpose of this current
3796f
14
LT3796
APPLICATIONS INFORMATION
longer varies with CTRL. The typical V
vs CTRL is listed in the Table 1.
threshold
have this extra comparator. The output voltage can be set
by selecting the values of R3 and R4 (see Figure 2) ac-
cording to the following equation:
(ISP-ISN)
Table 1. V(ISP-ISN) Threshold vs CTRL
V
(V)
V
(mV)
CTRL
(ISP-ISN)
R3+R4
1
225
VOUT =1.25•
R4
1.05
1.1
236
244.5
248.5
250
V
OUT
R3
1.15
1.2
LT3796
FB1/FB2
R4
When CTRL is higher than 1.2V, the LED current is regu-
lated to:
3796 F02
Figure 2. Feedback Resistor Connections for Boost and SEPIC
Applications
250mV
RLED
ILED
=
ForaboosttypeLEDdriver,settheresistorfromtheoutput
The CTRL pin should not be left open (tie to V
if not
REF
to the FB1 pin such that the expected V during normal
FB1
used). The CTRL pin can also be used in conjunction with
a thermistor to provide overtemperature protection for the
operationdoesnotexceed1.15V.ForanLEDdriverofbuck
mode or a buck-boost mode configuration, the FB voltage
is typically level shifted to a signal with respect to GND as
illustrated in Figure 3. The output can be expressed as:
LED load, or with a resistor divider to V to reduce output
IN
powerandswitchingcurrentwhenV islow.Thepresence
IN
of a time varying differential voltage signal (ripple) across
ISP and ISN at the switching frequency is expected. The
amplitude of this signal is increased by high LED load
current, low switching frequency and/or a smaller value
output filter capacitor.
R5 R6+ R7
VOUT = 1.25 •
•
R8
R6
V
S
+
Programming Output Voltage (Constant-Voltage
Regulation) or Open LED/Overvoltage Threshold
R
LED
R6
R7
LT3796
R5
V
LED
STRING
OUT
CSP
CSN
The LT3796 has two voltage feedback pins, FB1 and FB2.
EitheronecanbeusedforaboostorSEPICapplication.The
difference between these two pins is FB1 has a compara-
–
CSOUT
FB1
tor that senses when FB1 exceeds V – 60mV (VMODE
FB
threshold) and asserts the VMODE output if V
is
R8
(ISP-ISN)
3796 F03
less than 25mV. This indicates that the output is in voltage
regulation mode and not current regulation. FB2 does not
Figure 3. Feedback Resistor Connection for Buck Mode or
Buck-Boost Mode LED Driver
3796f
15
LT3796
APPLICATIONS INFORMATION
Open LED Detection
With the PNP helper, the short-circuit current can be
limited to 2A, whereas the short-circuit current can reach
to 20A without the PNP helper as shown in Figure 5 and
Figure6respectively.RefertoboostLEDdriverwithoutput
short-circuit protection and LED current monitor for the
testschematic.Notethattheimpedanceoftheshort-circuit
cable affects the peak current.
TheLT3796providesanopen-collectorstatuspin,VMODE,
that pulls low when the FB1 pin is above 1.19V and
V
is less than 25mV. If the open LED clamp volt-
(ISP-ISN)
age is programmed correctly using the resistor divider,
then the FB1 pin should never exceed 1.15V when LEDs
are connected, therefore, the only way for the FB1 pin to
be within 60mV of the 1.25V regulation voltage is for an
open LED event to have occurred.
+
LED
50V/DIV
LED Over Current Protection Feature
I
M2
TheISPandISNpinshaveashort-circuitprotectionfeature
independent ofthe LEDcurrentsense feature. This feature
preventsthedevelopmentofexcessiveswitchingcurrents
and protects the power components. The short-circuit
protection threshold (375mV, typ) is designed to be 50%
higher than the default LED current sense threshold. Once
the LED over current is detected, the GATE pin is driven
to GND to stop switching, and TG pin is pulled high to
disconnect the LED array from the power path.
10A/DIV
FAULT
10V/DIV
3796 F05
1µs/DIV
Figure 5. Short-circuit Current without PNP Helper
+
LED
50V/DIV
A typical LED short-circuit protection scheme for boost
or buck-boost mode converter is shown in Figure 4. The
Schottky diode D2 should be put close to the drain of
I
M2
1A/DIV
+
FAULT
10V/DIV
M2 on the board. It protects the LED node from swing-
ing well below ground when being shorted to ground
through a long cable. Usually, the internal protection loop
takes about 1µs to respond. Including PNP helper Q1 is
recommended to limit the transient short-circuit current.
3796 F06
1µs/DIV
Figure 6. Short-circuit Current with PNP Helper
D1
L1
V
IN
R
LED
+
V
M2
IN
LED
C1
C2
M1
V
GATE
IN
D3
Q1
LED
STRING
C2
D2
SENSE
LT3796
R
SNS
Q1
V
ISP
ISN TG
IN
–
LED
ISP
LT3796
R
LED
L1
D1
ISN
TG
M2
+
C1
M1
LED
GATE
SENSE
LED
STRING
D2
3796 F07
R
SNS
GND (BOOST) OR
(BUCK-BOOST MODE)
3796 F04
V
IN
Figure 7. The Simplified LED Short-Circuit Protection
Schematic for Buck Mode Converter
Figure 4. The Simplified LED Short-Circuit Protection
Schematic for Boost/Buck-Boost Mode LED Driver
3796f
16
LT3796
APPLICATIONS INFORMATION
Similar to boost, Schottky diodes D2, D3 and PNP transis-
tor Q1 are recommended to protect short-circuit event in
the buck mode.
increases switching losses and gate driving current, and
maynotallowsufficientlyhighorlowdutycycleoperation.
Lowerfrequencyoperationgivesbetterperformanceatthe
cost of larger external component size. For an appropriate
PWM Dimming Control for Brightness
R resistor value see Table 2. An external resistor from the
T
RT pin to GND is required—do not leave this pin open.
There are two methods to control the LED current for dim-
ming using the LT3796. One method uses the CTRL pin to
adjust the current regulated in the LEDs. A second method
uses the PWM pin to modulate the LED current between
zero and full current to achieve a precisely programmed
average current, without the possibility of color shift that
occurs at low current in LEDs. To make PWM dimming
more accurate, the switch demand current is stored on
Table 2. Typical Switching Frequency vs RT Value (1% Resistor)
f
(kHz)
osc
R (kΩ)
T
1000
6.65
7.50
8.87
10.2
12.4
15.4
19.6
26.1
39.2
82.5
900
800
700
600
500
400
300
200
100
the V node during the quiescent phase when PWM is
C
low. This feature minimizes recovery time when the PWM
signal goes high. To further improve the recovery time, a
disconnect switch should be used in the LED current path
topreventtheoutputcapacitorfromdischargingduringthe
PWM signal low phase. The minimum PWM on or off time
depends on the choice of operating frequency through the
RT input. For best current accuracy, the minimum PWM
high time should be at least three switching cycles (3μs
Frequency Synchronization
TheLT3796switchingfrequencycanbesynchronizedtoan
external clock using the SYNC pin. For proper operation,
for f = 1MHz).
SW
theR resistorshouldbechosenforaswitchingfrequency
T
A low duty cycle PWM signal can cause excessive start-up
timesifitwereallowedtointerruptthesoft-startsequence.
Therefore, once start-up is initiated by PWM > 1V, it will
ignore a logical disable by the external PWM input signal.
The device will continue to soft-start with switching and
TG enabled until either the voltage at SS reaches the 1.0V
level, or the output current reaches one-fourth of the full-
scale current. At this point the device will begin following
the dimming control as designated by PWM. If at any time
an output overcurrent is detected, GATE and TG will be
disabled even as SS continues to charge.
20% lower than the external clock frequency. The SYNC
pin is disabled during the soft-start period. Observation
of the following guidelines about the SYNC waveform will
ensure proper operation of this feature. Driving SYNC
with a 50% duty cycle waveform is always a good choice,
otherwise,maintainthedutycyclebetween20%and60%.
WhenusingbothPWMandSYNCfeatures,thePWMsignal
rising edge must have the aligned rising edges to achieve
the optimized high PWM dimming ratio. If the SYNC pin
is not used, it should be connected to GND.
Duty Cycle Considerations
Programming the Switching Frequency
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular
application. The fixed minimum on-time and minimum
The RT frequency adjust pin allows the user to program
the switching frequency from 100kHz to 1MHz to optimize
efficiency/performanceorexternalcomponentsize.Higher
frequency operation yields smaller component size but
3796f
17
LT3796
APPLICATIONS INFORMATION
off-time (see Figure 8) and the switching frequency define
the minimum and maximum duty cycle of the switch,
respectively. The following equations express the mini-
mum/ maximum duty cycle:
CSNandCSPpins.Forboostandbuck-boostapplications,
R
and C
are not required.
IN2(OPT)
OPT
–
+V
SNS
SNS
I
IN
R
V
TO LOAD
IN
Min Duty Cycle = minimum on-time • switching
frequency
R
R
IN1
IN2(OPT)
C
OPT
Max Duty Cycle = 1 – minimum off-time • switching
frequency
CSN
CSP
V
S
350
300
V
S
–
+
250
MIN ON-TIME
FB2
LT3796
CSOUT
200
150
100
50
3796 F03
MIN OFF-TIME
C
R
OUT
FILT
Figure 9. Setting Input Current Limit
0
25 50 75 100 125 150
TEMPERATURE (°C)
3796 F08
–50 –25
0
Thermal Considerations
The LT3796 is rated to a maximum input voltage of 100V.
Careful attention must be paid to the internal power dis-
sipation of the IC at higher input voltages to ensure that
a junction temperature of 150°C is not exceeded. This
junction limit is especially important when operating at
highambienttemperatures. Themajorityofthepowerdis-
sipationintheICcomesfromthesupplycurrentneededto
drivethegatecapacitanceoftheexternalpowerN-channel
MOSFET. This gate drive current can be calculated as:
Figure 8. Typical Minimum On- and Off-Time
vs Temperature
When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
at least 100ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
Setting Input Current Limit
TheLT3796hasastandalonecurrentsenseamplifier.Itcan
be used to limit the input current. As shown in Figure 9,
the input current signal is converted to voltage output at
CSOUTpin. WhentheCSOUTvoltageexceedsFB2regula-
tionvoltage,theGATEis pulledlow,andtheconverterstops
switching. The input current limit is calculated as follows:
I
= f • Q
SW G
GATE
A low Q power MOSFET should always be used when
G
operating at high input voltages, and the switching fre-
quency should also be chosen carefully to ensure that the
ICdoesnotexceedasafejunctiontemperature.Theinternal
junction temperature, T of the IC can be estimated by:
J
T = T + [V • (I + f • Q ) •θ ]
RIN1
IIN = 1.25•
J
A
IN
Q
SW
G
JA
ROUT •RSNS
whereT istheambienttemperature,I istheV operating
A
Q
IN
current of the part (2.5mA typical) and θ is the package
JA
For buck applications, filter components, R
and
IN2(OPT)
thermal impedance (30°C/W for the TSSOP package). For
C
, are recommended to be placed close to LT3796 to
OPT
example, an application with T
= 85°C, V
=
A(MAX)
IN(MAX)
suppressthesubstantialtransientsignalornoiseatacross
60V, f = 400kHz, and having a N-channel MOSFET with
SW
3796f
18
LT3796
APPLICATIONS INFORMATION
Q = 20nC, the maximum IC junction temperature will be
A 10µF input capacitor is an appropriate selection for a
400kHz buck mode converter with 24V input, 12V output
and 1A load.
G
approximately:
T = 85°C + [60V • (2.5mA + 400kHz • 20nC) • 30°C/W]
J
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through
the Schottky diode when the switch is off. It is important
to place the capacitor as close as possible to the Schottky
diode and to the GND return of the switch (i.e., the sense
resistor). It is also important to consider the ripple current
rating of the capacitor. For best reliability, this capacitor
should have low ESR and ESL and have an adequate ripple
current rating. The RMS input current for a buck mode
LED driver is:
≈ 104°C
The exposed pad on the bottom of the package must be
soldered to a ground plane. This ground should then be
connectedtoaninternalcoppergroundplanewiththermal
vias placed directly under the package to spread out the
heat dissipated by the IC.
It is best if the copper plane is extended on either the top
orbottom layer of thePCBtohavethemaximumexposure
to air. Internal ground layers do not dissipate thermals as
much as top and bottom layer copper does. See recom-
mended layout as an example.
I
= I
• √(1–D)D
LED
IN(RMS)
VLED
VIN
D =
Input Capacitor Selection
Theinputcapacitorsuppliesthetransientinputcurrentfor
the power inductor of the converter and must be placed
andsizedaccordingtothetransientcurrentrequirements.
Theswitchingfrequency,outputcurrentandtolerableinput
voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
choice since it has the least variation with temperature
and DC bias. Typically, boost and SEPIC converters re-
quire a lower value capacitor than a buck mode converter.
Assuming that a 100mV input voltage ripple is acceptable,
the required capacitor value for a boost converter can be
where D is the switch duty cycle.
Table 3. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER
TDK
WEB
www.tdk.com
www.kemet.com
www.murata.com
www.t-yuden.com
www.avx.com
Kemet
Murata
Taiyo Yuden
AVX
Output Capacitor Selection
estimated as follows (T = 1/f ):
SW
OSC
The selection of the output capacitor depends on the load
and converter configuration, i.e., step-up or step-down
and the operating frequency. For LED applications, the
equivalent resistance of the LED is typically low and the
output filter capacitor should be sized to attenuate the
current ripple. Use of an X7R type ceramic capacitor is
recommended.
V
VIN
1µF
A •µs •2.8
CIN(µF)= ILED(A)• LED • TSW(µs)•
Therefore, a 2.2µF capacitor is an appropriate selection
for a 400kHz boost regulator with 12V input, 48V output
and 500mA load.
To achieve the same LED ripple current, the required filter
capacitor is larger in the boost and buck-boost mode ap-
plications than that in the buck mode applications. Lower
operating frequencies will require proportionately higher
capacitor values.
With the same V voltage ripple of less than 100mV, the
IN
input capacitor for a buck converter can be estimated as
follows:
V
LED(VIN –VLED
)
10µF
A •µs
CIN(µF)= ILED(A)•
•TSW(µs)•
2
VIN
3796f
19
LT3796
APPLICATIONS INFORMATION
Power MOSFET Selection
increaseswiththetemperature,fromtheoutputduringthe
PWM low interval. Therefore, choose the Schottky diode
with sufficiently low leakage current. Table 5 has some
recommended component vendors.
Forapplicationsoperatingathighinputoroutputvoltages,
the power N-channel MOSFET switch is typically chosen
for drain voltage V rating and low gate charge Q .
DS
G
Consideration of switch on-resistance, R
, is usually
DS(ON)
Table 5. Schottky Rectifier Manufacturers
secondarybecauseswitchinglossesdominatepowerloss.
VENDOR
WEB
The INTV regulator on the LT3796 has a fixed current
On Semiconductor
Diodes, Inc
www.onsemi.com
www.diodes.com
www.centralsemi.com
www.rohm.com
CC
limit to protect the IC from excessive power dissipation
at high V , so the MOSFET should be chosen so that
Central Semiconductor
Rohm Semiconductor
IN
the product of Q at 7.7V and switching frequency does
G
not exceed the INTV current limit. For driving LEDs be
CC
careful to choose a switch with a V rating that exceeds
Sense Resistor Selection
DS
the threshold set by the FB pin in case of an open load
fault. Several MOSFET vendors are listed in Table 4. The
MOSFETs used in the application circuits in this data sheet
have been found to work well with the LT3796. Consult
factory applications for other recommended MOSFETs.
The resistor, R
, between the source of the external
SENSE
N-channelMOSFETandGNDshouldbeselectedtoprovide
adequate switch current to drive the application without
exceeding the 113mV (typical) current limit threshold on
the SENSE pin of LT3796. For buck mode applications,
select a resistor that gives a switch current at least 30%
greater than the required LED current. For buck mode,
select a resistor according to:
Table 4. MOSFET Manufacturers
VENDOR
WEB
Vishay Siliconix
Fairchild
www.vishay.com
www.fairchildsemi.com
www.irf.com
0.07V
ILED
International Rectifier
Infineon
RSENSE(BUCK)
≤
www.infineon.com
For buck-boost mode, select a resistor according to:
High Side PMOS Disconnect Switch Selection
A high side PMOS disconnect switch with a minimum
TH
VIN •0.07V
(VIN+ VLED)ILED
RSENSE(BUCK − BOOST)
≤
V
of –1V to –2V is recommended in most LT3796 ap-
plications to optimize or maximize the PWM dimming
ratio and protect the LED string from excessive heating
during fault conditions as well. The PMOS disconnect
For boost, select a resistor according to:
switch is typically selected for drain-source voltage V ,
DS
VIN •0.07V
VLED •ILED
and continuous drain current I . For proper operations,
RSENSE(BOOST)
≤
D
V
DS
rating must exceed the open LED regulation voltage
set by the FB1 pin, and I rating should be above I
.
D
LED
The placement of R
should be close to the source of
SENSE
the NMOS FET and GND of the LT3796. The SENSE input
Schottky Rectifier Selection
to LT3796 should be a Kelvin connection to the positive
The power Schottky diode conducts current during the
interval when the switch is turned off. Select a diode rated
forthemaximumSWvoltage. IfusingthePWMfeaturefor
dimming, it is important to consider diode leakage, which
terminal of R
.
SENSE
70mV is used in the equations above to give some margin
below the 113mV (typical) sense current limit threshold.
3796f
20
LT3796
APPLICATIONS INFORMATION
Inductor Selection
on the V pin to maintain tighter regulation of LED current
C
during fast transients on the input supply to the converter.
TheinductorusedwiththeLT3796shouldhaveasaturation
current rating appropriate to the maximum switch current
Soft-Start Capacitor Selection
selectedwiththeR
resistor.Chooseaninductorvalue
SENSE
For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltage overshoot. The soft-start interval is set by the
soft-start capacitor selection according to the equation:
based on operating frequency, input and output voltage to
provide a current mode signal on SENSE of approximately
20mV magnitude. The following equations are useful to
estimate the inductor value (T = 1/f ):
SW
OSC
T
SW •RSENSE •VLED(VIN –VLED
)
LBUCK
=
2V
TSS = CSS•
28µA
VIN •0.02V
A typical value for the soft-start capacitor is 0.1µF. The
soft-start pin reduces the oscillator frequency and the
maximum current in the switch. Soft-start also operates
as fault protection, which forces the converter into hiccup
or latchoff mode. Detailed information is provided in the
FaultProtection:HiccupModeandLatchoffModesection.
T
SW •RSENSE •VLED •VIN
(VLED + VIN)•0.02V
LBUCK, BOOST
=
T
SW •RSENSE •VIN (VLED –VIN)
LBOOST
=
VLED •0.02V
Fault Protection: Hiccup Mode and Latchoff Mode
Table 6 provides some recommended inductor vendors.
If an LED overcurrent condition, INTV undervoltage, or
CC
Table 6. Inductor Manufacturers
thermal limit happens, an open-drain pull-down on FAULT
asserts. The TG pin is pulled high to disconnect the LED
array from the power path, and the GATE pin is driven low.
If the soft-start pin is charging and still below 1.7V, then
it will continue to do so with a 28µA source. Once above
1.7V, the pull-up source is disabled and a 2.8µA pull-down
is activated. While the SS pin is discharging, the GATE is
forced low. When SS pin is discharged below 0.2V, a new
cycleisinitiated.Thisisreferredashiccupmodeoperation.
If the fault still exists when SS crosses below 0.2V, then
a full SS charge/discharge cycle has to complete before
switching is enabled and the FAULT flag is deasserted.
VENDOR
WEB
Sumida
www.sumida.com
www.we-online.com
www.cooperet.com
www.vishay.com
www.coilcraft.com
Würth Elektronik
Coiltronics
Vishay
Coilcraft
Loop Compensation
The LT3796 uses an internal transconductance error
amplifier whose V output compensates the control loop.
C
The external inductor, output capacitor and the compen-
sation resistor and capacitor determine the loop stability.
The inductor and output capacitor are chosen based on
performance, size and cost. The compensation resistor
If a resistor is placed between V pin and SS pin to hold
REF
SS pin higher than 0.2V during a fault, then the LT3796
will enter latchoff mode with GATE pin low, TG pin high
and FAULT pin low. To exit latchoff mode, the EN/UVLO
pin must be toggled low to high.
and capacitor at V are selected to optimize control loop
C
responseandstability.FortypicalLEDapplications,a22nF
compensation capacitor at V is adequate, and a series
C
resistor should always be used to increase the slew rate
3796f
21
LT3796
APPLICATIONS INFORMATION
Board Layout
capacitor for the INTV regulator should be placed near
CC
the GND of the switching path. Typically, this requirement
The high speed operation of the LT3796 demands careful
attention to board layout and component placement. The
exposed pad of the package is the GND terminal of the IC
and is also important for thermal management of the IC. It
is crucial to achieve a good electrical and thermal contact
between the exposed pad and the ground plane of the
board. To reduce electromagnetic interference (EMI), it is
important to minimize the area of the high dV/dt switching
node between the inductor, switch drain and anode of the
Schottky rectifier. Use a ground plane under the switching
node to eliminate interplane coupling to sensitive signals.
The lengths of the high dI/dt traces: 1) from the switch
node through the switch and sense resistor to GND, and
2) from the switch node through the Schottky rectifier and
filter capacitor to GND should be minimized. The ground
points of these two switching current traces should come
toacommonpointthenconnecttothegroundplaneunder
the LT3796. Likewise, the ground terminal of the bypass
results in the external switch being closest to the IC,
along with the INTV bypass capacitor. The ground for
CC
the compensation network and other DC control signals
should be star connected to the underside of the IC. Do
notextensivelyroutehighimpedancesignalssuchasFB1,
FB2, RT and V , as they may pick up switching noise.
C
Since there is a small variable DC input bias current to the
ISN and ISP inputs, resistance in series with these pins
should be minimized to avoid creating an offset in the
current sense threshold. Likewise, minimize resistance in
series with the SENSE input to avoid changes (most likely
reduction) to the switch current limit threshold.
Figure 10 is a suggested two sided layout for a boost
converter. Note that the 4-layer layout is recommended
for best performance. Please contact the factory for the
reference layout design.
3796f
22
LT3796
APPLICATIONS INFORMATION
X
V
IN
VIA
V
R
IN
SNS1
VIAS TO GROUND PLANE
X ROUTING ON THE 2nd LAYER
C1
C1
C1
X
C3
VIA FROM ISP
VIA FROM ISN
VIA FROM TG
X
X
X
1
2
28
27
LT3796
R6
R5
3
26
L1
4
25 X
24
VIA FROM V
IN
X
C4
5
R4
VIA FROM V
ISMON
VIA FROM
OUT
R7
R3
R8
6
23 X
22
IN
7
C
R
C
C
8
21
INTV VIA
CC
C5
X
GATE VIA
R2
C6
9
20
X
R1
X
V
VIA FROM V
IN
10
11
12
13
14
19
REF
1
8
7
18
29
2
3
4
17
M1
6
R
T
16
SYNC
PWM
X
5
15
R9 R10
D1
VIA FROM
GATE
X
R
SNS
VIA FROM INTV
CC
C2
C2
C2
C2
X
OUT VIA
TG VIA
5
6
7
8
4
Q1
X
3
D2
M2
2
R
LED
+
LED
1
3796 F10
ISN VIA X X ISP VIA
COMPONENT DESIGNATIONS REFER TO BOOST LED DRIVER WITH OUTPUT SHORT CIRCUIT PROTECTION AND LED CURRENT MONITOR
Figure 10. Boost Converter Suggested Layout
3796f
23
LT3796
TYPICAL APPLICATIONS
Boost LED Driver with Output Short Circuit Protection and LED Current Monitor
V
L1 22µH
D1
R
50mΩ
IN
I
SNS1
IN
9V TO 60V
100V (TRANSIENT)
C2
C1
2.2µF
×3
2.2µF
×4
100V
R7
1M
R5
2k
R1
1M
R3
499k
V
V
CSP
CSN
IN
S
R8
13.7k
R2
EN/UVLO
GATE
M1
118k
R4
97.6k
SENSE
OPTIONAL INPUT
CURRENT REPORTING
R
SNS
CTRL
15mΩ
UP TO
400mA
LT3796
GND
FB1
ISP
C
SOUT
CSOUT
PWM
C3
10nF
R6
40.2k
PWM
SYNC
SYNC
Q1
R
LED
620mΩ
LED CURRENT REPORTING
ISMON
ISN
TG
C4
0.1µF
INTV
CC
R10
100k
R9
100k
M2
FAULT
INTV
CC
FAULT
INTV
CC
VMODE
D2
VMODE
C5
4.7µF
V
REF
FB2
RT
SS
V
C
85V LED
R
T
R
C
31.6k
10k
250kHz
R11 OPTIONAL
FOR FAULT LATCHOFF
C
C6
0.1µF
C
R11 402k (OPT)
M1: INFINEON BCS160N10NS3-G
M2: VISHAY SILICONIX Si7113DN
L1: COILTRONICS DR127-220
D1: DIODES INC PDS5100
D2: VISHAY ES1C
10nF
3796 TA02a
Q1: ZETEX FMMT589
LED: CREE XLAMP XR-E
Fault (Short LED) Protection without R11: Hiccup Mode
Fault (Short LED) Protection with R11: Latchoff Mode
SS
2V/DIV
SS
2V/DIV
+
+
LED
LED
50V/DIV
50V/DIV
FAULT
10V/DIV
FAULT
10V/DIV
I
I
M2
M2
1A/DIV
1A/DIV
3796 TA02b
3796 TA02c
50ms/DIV
50ms/DIV
3796f
24
LT3796
TYPICAL APPLICATIONS
Buck LED Driver with Open LED Flag and LED Current Reporting
V
IN
24V TO 80V
R
100mΩ
ISN
+
LED
M2
LED
2.5A
R3
49.9k
R4
49.9k
R1
1M
18V
LED
C2
V
V
ISP
TG
IN
S
4.7µF
×2
25V
EN/UVLO
CSP
R5 1M
R2
61.9k
V
CSN
CSOUT
FB1
REF
CTRL
L1
33µH
R6
59k
LT3796
PWM
FB2
PWM
D1
C1
2.2µF
×3
100V
M1
GATE
LED CURRENT REPORTING
ISMON
C5
0.1µF
SENSE
INTV
CC
R
SNS
R8
100k
R9
100k
15mΩ
GND
FAULT
FAULT
VMODE
VMODE
INTV
CC
INTV
CC
C3
4.7µF
V
C
SYNC
RT
SS
R
R
T
C
C4
0.1µF
M1: VISHAY SILICONIX Si7454DP
M2: VISHAY SILICONIX Si7113DN
D1: DIODES INC PDS3100
L1: COILTRONICS HC9-220
LED: CREE XLAMP XM-L
10k
C
19.6k
400kHz
C
4.7nF
3796 TA03a
Efficiency vs VIN
100
95
90
85
80
75
70
40
50
(V)
60
70
80
20
30
V
IN
3796 TA03b
3796f
25
LT3796
TYPICAL APPLICATIONS
SEPIC LED Driver Using FB2 for Input Overvoltage Protection
C6
2.2µF
100V
L1A 33µH
D1
I
IN
R
50mΩ
SNS1
V
IN
•
8V TO 60V
C2
C1
R1
10µF
×3
R10
R6
2k
2.2µF
×3
953k
R4
L1B
909k
511k
25V
100V
R2
75k
V
V
CSP
CSN
IN
S
R11
40.2k
EN/UVLO
GATE
M1
R5
100k
R3
20k
V
SENSE
REF
R
SNS
CTRL
15mΩ
LT3796
OPTIONAL INPUT
CURRENT REPORTING
GND
FB1
ISP
FB2
UP TO
1A
C
CSOUT
PWM
SOUT
C3
0.1µF
R7
40.2k
PWM
R
LED
250mΩ
ISN
TG
ISMON
LED CURRENT REPORTING
M2
C7
0.1µF
INTV
CC
R8
100k
R9
100k
22V
LED
FAULT
FAULT
VMODE
INTV
CC
INTV
CC
VMODE
C5
4.7µF
V
C
RT
SYNC SS
M1: VISHAY SILICONIX Si7456DP
M2: ZETEX ZXMP6A13F
L1: COILTRONICS DRQ127-330
D1: DIODES INC PDS5100
LED: CREE XLAMP XR-E
R
T
R
C
19.6k
4.99k
400kHz
C
C4
0.1µF
C
10nF
3796 TA04a
Efficiency vs VIN
100
95
90
85
80
75
70
0
20
30
(V)
40
50
60
10
V
IN
3796 TA04b
3796f
26
LT3796
TYPICAL APPLICATIONS
SEPIC Sealed Lead Acid (SLA) Battery Charger
C6
V
V
= 14.6V
CHARGE
FLOAT
AT 25°C
2.2µF
OUT
BAT
= 13.5V
100V
L1A 33µH
V
D1
M2
R
50mΩ
CSN
R
SNS2
IN
8V TO 40V
I
SNS1
IN
•
+
C1
4.7µF
50V
250mΩ
100V (TRANSIENT)
D2
15V
C2
10µF
BAT
R11
R12
30.1k
R6
2k
10k
R2
R4
L1B
NTC
806k
357k
R1
10k
V
V
CSP
S
IN
R13
93.1k
R3
20k
EN/UVLO
GATE
M1
R5
100k
V
SENSE
REF
R
SNS
15mΩ
CTRL
FB2
LT3796
GND
FB1
ISP
OPTIONAL INPUT
CURRENT REPORTING
C
SOUT
CSOUT
PWM
R10
10.2k
OUT
BAT
R9
113k
C3
10nF
R7
40.2k
V
REF
ISN
M3
OUTPUT CURRENT
REPORTING
ISMON
SS
C7
0.1µF
VMODE
VMODE
C4
0.1µF
SYNC
TG
R7
49.9k
INTV
CC
INTV
CC
V
C
RT
R
19.6k
400kHz
FAULT
C5
4.7µF
R12
49.9k
M1: VISHAY SILICONIX Si7456DP
M2: VISHAY SUD19P06-60-E3
M3: ZETEX ZXM61N03F
T
R
C
499Ω
FAULT
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
D2: CENTRAL SEMI CMDZ15L
R11: MURATA NCP18XH103F03RB
C
C
10nF
3796 TA05a
VCHARGE, VFLOAT vs Temperature
17.5
V
CHARGE
14.0
13.5
13.0
12.5
V
FLOAT
–30–20–10
0
10 20 30 40 50 60 70 80
–40
TEMPERATURE (°C)
3796 TA05b
3796f
27
LT3796
TYPICAL APPLICATIONS
28VIN to 28V SuperCap Charger with Input Current Limit and Charge Done Flag
C6
10µF
L1A 33µH
V
28V
V
= 0V TO 28V
C2
D1
R
150mΩ
IN
1.33A MAX
OUT
SNS1
•
C1
4.7µF
R8
R1
10µF
L1B
×2
50V
536k
20k
CSP
V
V
CSN
IN
S
R9
EN/UVLO
ISMON
PWM
GATE
M1
24.9k
OUTPUT CURRENT REPORTING
SENSE
C7
0.1µF
R
SNS
V
REF
33mΩ
LT3796
1.67A
MAX
GND
FB1
ISP
INPUT CURRENT
REPORTING AND LIMIT
SYNC
CSOUT
FB2
C
SOUT
C3
0.1µF
R2
124k
R
SNS2
150mΩ
SS
C4
ISN
TG
0.1µF
SUPERCAP
INTV
CC
R7
100k
R6
100k
INTV
CC
C6
4.7µF
FAULT
FAULT
CHGDONE
VMODE
CTRL
V
V
C
RT
REF
R
V
C
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
M1: VISHAY SILICONIX Si7850
Q1: ZETEX FMMT591A
OUT
499Ω
R4
R3
499k
C
22nF
C
30.1k
R10
499k
Q1
R5
1M
C5
0.1µF
R
T
19.6k
400kHz
3796 TA06a
Input and Output Current vs Output Voltage
1800
I
OUT
1600
1400
1200
1000
I
IN
800
600
400
200
0
10
15
20
25
30
0
5
V
(V)
OUT
3796 TA06b
3796f
28
LT3796
TYPICAL APPLICATIONS
SEPIC Converter with RWIRE Compensation and Output Current Limit
C2
10µF
OUT
R
SNS1
L1A 22µH
1:1
V
12V
R
D1
250mΩ
IN
WIRE
V
LOAD
•
12V, 1A CURRENT LIMIT
+
C4
100µF
25V
C1
10µF
C3
10µF
M1
L1B
R
SNS
33mΩ
V
GATE SENSE GND
ISP
IN
EN/UVLO
ISMON
PWM
ISN
C8
0.1µF
R1
38.3k
R2
38.3k
V
REF
LT3796
CSN
SYNC
FB2
R3
154k
SS
C5
0.1µF
V
S
OUT
C7
1µF
CTRL
V
REF
CSP
CSOUT
FB1
INTV
CC
R4
287k
R7
100k
R6
100k
FAULT
FAULT
VMODE
RT
VMODE
TG
R5
12.4k
V
C
INTV
CC
R
T
R
C
19.6k
INTV
CC
24.9k
400kHz
C
C6
4.7µF
C
L1: WÜRTH 744871220
D1: ZETEX ZLLS2000TA
M1: VISHAY SILICONIX Si4840DY
10nF
3796 TA08a
Line Impedance Compensation
Load Step Response
13.0
12.5
12.0
11.5
11.0
10.5
10.0
R
WIRE
= 0.5Ω
V
800mA
OUT
I
OUT
500mA/DIV
V
LOAD
200mA
V
OUT
500mV/DIV
(AC)
3796 TA08c
500µs/DIV
0
200
400
600
(mA)
800 1000 1200
I
LOAD
3796 TA08b
3796f
29
LT3796
TYPICAL APPLICATIONS
Solar Panel Driven SLA Battery Charger with Maximum Power Point Tracking
V
V
= 14.6V
C6
OUT
BAT
CHARGE
FLOAT
AT 25°C
R
SNS1
= 13.5V
2.2µF 100V
L1A 33µH
1:1
R4
301k
D1
250mΩ
M2
V
IN
•
+
C1
4.7µF
50V
WÜRTH SOLAR PANEL
C2
10µF
BAT
D2
15V
R10
30.1k
R9
10k
NTC
V
V
= 37.5V
MPP
OC
= 28V
L1B
INTV
CC
R1
10k
R5
137k
R2
475k
V
V
CSN
CSP
IN
S
M1
R
GATE
EN/UVLO
R3
20k
SENSE
R11
93.1k
SNS
CTRL
15mΩ
LT3796
GND
FB1
C
CSOUT
FB2
SOUT
R6
100k
C3
0.1µF
ISP
ISN
OUT
BAT
R8
113k
R12
10.2k
PWM
V
REF
M3
ISMON
SS
C6
0.1µF
C4
0.1µF
VMODE
VMODE
SYNC
TG
R7
49.9k
INTV
CC
INTV
CC
V
C
RT
FAULT
C5
4.7µF
R12
49.9k
M1: VISHAY SILICONIX Si7456DP
M2: VISHAY SUD19P06-60-E3
M3: ZETEX ZXM61N03F
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
D2: CENTRAL SEMI CMDZ15L
R9: MURATA NCP18XH103F03RB
R
T
R
C
19.6k
499Ω
FAULT
400kHz
C
22nF
C
3796 TA09a
ICHARGE vs VIN
1.2
1.0
0.8
0.6
0.4
0.2
0
20
25
30
(V)
35
40
V
IN
3796 TA09b
3796f
30
LT3796
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev I)
Exposed Pad Variation EB
9.60 – 9.80*
(.378 – .386)
4.75
(.187)
4.75
(.187)
28 27 26 2524 23 22 21 20 1918 17 16 15
2.74
(.108)
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
6.60 ±0.10
4.50 ±0.10
SEE NOTE 4
6.40
(.252)
BSC
2.74
(.108)
0.45 ±0.05
1.05 ±0.10
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
5
7
1
2
3
4
6
8
9 10 12 13 14
11
1.20
(.047)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
FE28 (EB) TSSOP REV I 0211
0.195 – 0.30
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
2. DIMENSIONS ARE IN
FOR EXPOSED PAD ATTACHMENT
MILLIMETERS
(INCHES)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
3. DRAWING NOT TO SCALE
3796f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
31
LT3796
TYPICAL APPLICATION
Buck-Boost Mode LED Driver with Open LED Clamp and Output Voltage Limit
V
IN
L1 68µH
D1
9V TO 55V
75V (TRANSIENT)
R4
715k
R5
20k
C3
4.7µF
×2
C1
2.2µF
×2
C2
1µF
R6
200k
V
R1
1M
IN
Efficiency vs VIN
V
CSN
CSP
V
S
IN
100
PWM = V
REF
EN/UVLO
CTRL
GATE
M1
R2
187k
R7
95
90
SENSE
1M
R
SNS
V
REF
33mΩ
LT3796
R8
13.3k
GND
CSOUT
FB1
R3
249k
85
80
FB2
ISP
PWM
LED CURRENT REPORTING
INTV
PWM
ISMON
R
LED
1Ω
C4
0.1µF
75
70
ISN
TG
CC
R10
100k
R9
100k
M2
0
10
20
30
(V)
40
50
60
FAULT
FAULT
V
IN
VMODE
VMODE
V
C
INTV
CC
SS
INTV
CC
3796 TA07b
25V LED
250mA
C5
SYNC
RT
4.7µF
R
M1: FAIRCHILD SEMICONDUCTOR
FDM3622
T
C6
0.1µF
R
C
19.6k
4.99k
400kHz
M2: ZETEX ZXMP6A13F
L1: WÜRTH 744066680
D1: IRF 10BQ100
V
C
C
10nF
IN
3796 TA07a
LED: CREE XLAMP XR-E
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
V : 4.7V to 60V, V
LT3791
60V, Synchronous Buck-Boost 1MHz
LED Controller
Range: 0V to 60V, True Color PWM, Analog = 100:1, I < 1µA,
OUT SD
IN
TSSOP-38E Package
V : 4.5V to 40V, V Range: 5V to 60V, True Color PWM, Analog = 3000:1, I < 1µA,
OUT SD
LT3755/LT3755-1
LT3755-2
High Side 60V, 1MHz LED Controller
with True Color 3,000:1 PWM Dimming
IN
3mm × 3mm QFN-16, MSOP-16E Packages
LT3756/LT3756-1
LT3756-2
High Side 100V, 1MHz LED Controller
with True Color 3,000:1 PWM Dimming
V : 6V to 100V, V Range: 5V to 100V, True Color PWM, Analog = 3000:1, I < 1µA,
IN
OUT
SD
3mm × 3mm QFN-16, MSOP-16E Packages
LT3743
Synchronous Step-Down 20A LED
Driver with Three-State LED Current
Control
V : 5.5V to 36V, V Range: 5.5V to 35V, True Color PWM, Analog = 3000:1, I < 1µA,
IN
OUT
SD
4mm × 5mm QFN-28, TSSOP-28E Packages
LTC3780
High Efficiency, Synchronous, 4-Switch V : 4V to 36V, V
Range: 0.8V to 30V, I < 55µA, SSOP-24, QFN-32 Packages
SD
IN
OUT
OUT
Buck-Boost Controller
LTC3789
High Efficiency, Synchronous, 4-Switch V : 4V to 38V, V
Range: 0.8V to 38V, I < 40µA, 4mm × 5mm QFN-28, SSOP-28
SD
IN
Packages
Buck-Boost Controller
LT3517
1.3A, 2.5MHz High Current LED Driver
with 3,000:1 Dimming
V : 3V to 30V, True Color PWM, Analog = 3000:1, I < 1µA, 4mm × 4mm QFN-16
IN
SD
Package
LT3518
2.3A, 2.5MHz High Current LED Driver
with 3,000:1 Dimming
V : 3V to 30V, True Color PWM, Analog = 3000:1, I < 1µA, 4mm × 4mm QFN-16
IN
SD
Package
LT3474/LT3474-1
LT3475/LT3475-1
36V, 1A (ILED), 2MHz, Step-Down LED V : 4V to 36V, V
Range = 13.5V, True Color PWM = 400:1, I < 1µA, TSSOP-16E
SD
IN
OUT
Package
Driver
Dual 1.5A(ILED), 36V, 2MHz, Step-Down V : 4V to 36V, V
Range = 13.5V, True Color PWM, Analog = 3000:1, I < 1µA,
IN
OUT
SD
TSSOP-20E Package
LED Driver
3796f
LT 0412 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
32
●
●
LINEAR TECHNOLOGY CORPORATION 2012
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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