LTC4006 [Linear]
4A, High Efficiency, Standalone Li Battery Charger; 4A ,高效,独立的锂电池充电器型号: | LTC4006 |
厂家: | Linear |
描述: | 4A, High Efficiency, Standalone Li Battery Charger |
文件: | 总20页 (文件大小:242K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Final Electrical Specifications
LTC4007
4A, High Efficiency,
Standalone Li Battery Charger
January 2003
U
FEATURES
DESCRIPTION
The LTC®4007 is a complete constant-current/constant-
voltage charger controller for 3- or 4-cell lithium-ion
batteries.ThePWMcontrollerusesasynchronous,quasi-
constant frequency, constant off-time architecture that
will not generate audible noise even when using ceramic
capacitors. Charging current is programmable to ±5%
accuracyusingaprogrammingresistor.Chargingcurrent
can also be monitored as a voltage across the program-
ming resistor.
■
Complete Charger Controller for 3- or 4-Cell
Lithium-Ion Batteries
■
High Conversion Efficiency: Up to 96%
■
Output Currents Exceeding 4A
±0.8% Charging Voltage Accuracy
Built-In Charge Termination for Li-Ion Batteries
■
■
■
AC Adapter Current Limiting Maximizes Charge Rate*
Thermistor Input for Temperature Qualified Charging
Wide Input Voltage Range: 6V to 28V
0.5V Dropout Voltage; Maximum Duty Cycle: 98%
Programmable Charge Current: ±5% Accuracy
Indicator Outputs for Charging, C/10 Current
Detection, AC Adapter Present, Low Battery, Input
Current Limiting and Faults
■
■
■
■
■
The output float voltage is pin programmed for cell count
(3 cells or 4 cells) and chemistry (4.2V/4.1V). A timer,
programmed by an external resistor, sets the total charge
time.Chargingisautomaticallyrestartedwhencellvoltage
falls below 3.9V/cell.
■
■
Charging Current Monitor Output
Available in a 24-Pin Narrow SSOP Package
LTC4007 includes a thermistor input, which suspends
charging if an unsafe temperature condition is detected. If
the cell voltage is less than 2.5V, a low-battery indicator
asserts and can be used to program a trickle charge cur-
rent to safely charge depleted batteries. The FAULT pin is
also asserted and charging terminates if the low-battery
conditionpersistsformorethan1/4ofthetotalchargetime.
U
APPLICATIO S
■
Notebook Computers
■
Portable Instruments
■
Battery-Backup Systems
Standalone Li-Ion Chargers
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
*U.S. Patent No. 5,723,970
U
TYPICAL APPLICATIO
12.6V, 4A Li-Ion Battery Charger
INPUT SWITCH
DCIN
0V TO 28V
0.1µF
4.9k
3C4C
DCIN
INFET
CLP
V
LOGIC
0.025Ω
15nF
100k
100k 100k
CHEM
LOBAT
SYSTEM
LOAD
LOBAT
I
I
LTC4007 CLN
TGATE
CL
CL
20µF
ACP
SHDN
FAULT
CHG
ACP
Q1
10µH
0.025Ω
SHDN
BGATE
Li-Ion
BATTERY
Q2
FAULT
CHG
PGND
CSP
20µF
3.01k
FLAG
FLAG
NTC
BAT
32.4k
3.01k
PROG
ITH
CHARGING
CURRENT
MONITOR
R
T
THERMISTOR
0.0047µF
0.47µF
GND
6.04k
0.12µF
10k
NTC
Q1: Si4431DY
Q2: FDC6459
TIMING RESISTOR
(~2 HOURS)
26.7k
309k
4007 TA01
4007i
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will notinfringe onexisting patent rights.
1
LTC4007
W W U W
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
TOP VIEW
Voltage from DCIN, CLP, CLN to GND ....... +32V/–0.3V
PGND with Respect to GND ................................. ±0.3V
CSP, BAT to GND....................................... +28V/–0.3V
CHEM, 3C4C, RT to GND .............................. +7V/–0.3V
NTC ............................................................ +10V/–0.3V
ACP, SHDN, CHG, FLAG,
FAULT, LOBAT, ICL .............................................. +32V/–0.3V
Operating Ambient Temperature Range
(Note 4) ............................................. –40°C to 85°C
Operating Junction Temperature ......... –40°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
1
2
SHDN
INFET
BGATE
PGND
TGATE
CLN
24
23
22
21
20
19
18
17
16
15
14
13
DCIN
CHG
ACP
LTC4007EGN
3
4
R
T
5
FAULT
GND
3C4C
LOBAT
NTC
6
7
CLP
8
FLAG
CHEM
BAT
9
10
11
12
ITH
CSP
PROG
NC
I
CL
GN PACKAGE
24-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 90°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL PARAMETER
DCIN Operating Range
CONDITIONS
MIN
TYP
MAX
28
UNITS
V
6
I
Operating Current
Sum of Current from CLP, CLN , DCIN
3
5
mA
Q
V
Charge Voltage Accuracy
Nominal Values: 12.3V, 12.6V, 16.4V, 16.8V
(Note 2)
–0.8
–1.0
0.8
1.0
%
%
TOL
●
●
I
Charge Current Accuracy (Note 3)
V
– V
Target = 100mV
–4
–5
–60
–35
4
5
60
35
%
%
%
%
TOL
CSP
BAT
V
< 6V, V
– V
Target = 10mV
BAT
BAT
CSP
6V ≤ V
≤ V
, V
– V
BAT
LOBAT CSP BAT
Target = 10mV
T
Termination Timer Accuracy
Battery Leakage Current
R
= 270k
●
–15
15
%
TOL
RT
Shutdown
DCIN = 0V
SHDN = 3V
●
●
15
30
10
µA
µA
–10
4.2
1
UVLO
Undervoltage Lockout Threshold
Shutdown Threshold at SHDN
SHDN Pin Current
DCIN Rising, V
= 0
●
●
4.7
1.6
–10
2
5.5
2.5
V
V
BAT
µA
mA
Operating Current in Shutdown
V
= 0V, Sum of Current from CLP,
3
SHDN
CLN, DCIN
Current Sense Amplifier, CA1
Input Bias Current Into BAT Pin
CA1/I Input Common Mode Low
11.67
µA
V
CMSL
CMSH
●
●
0
1
CA1/I Input Common Mode High
V
– 0.2
CLN
V
1
4007i
2
LTC4007
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL PARAMETER
Current Comparators I
CONDITIONS
MIN
TYP
MAX
UNITS
and I
CMP
REV
I
I
Maximum Current Sense Threshold (V
– V
)
BAT
V = 2.4V
ITH
●
140
165
–30
200
mV
mV
TMAX
TREV
CSP
Reverse Current Threshold (V
– V
)
BAT
CSP
Current Sense Amplifier, CA2
Transconductance
Source Current
1
mmho
µA
Measured at I , V = 1.4V
–40
40
TH ITH
Sink Current
Measured at I , V = 1.4V
µA
TH ITH
Current Limit Amplifier
Transconductance
1.4
100
100
mmho
mV
V
Current Limit Threshold
CLP Input Bias Current
●
93
107
110
CLP
CLP
I
nA
Voltage Error Amplifier, EA
Transconductance
Sink Current
1
mmho
µA
Measured at I , V = 1.4V
36
TH ITH
OVSD
Overvoltage Shutdown Threshold as a Percent
of Programmed Charger Voltage
●
●
102
0
107
%
Input P-Channel FET Driver (INFET)
DCIN Detection Threshold (V
– V
)
CLN
DCIN Voltage Ramping Up
0.17
0.25
50
V
DCIN
from V
– 0.1V
CLN
Forward Regulation Voltage (V
– V
)
●
●
●
25
–25
5.8
mV
mV
V
DCIN
CLN
Reverse Voltage Turn-Off Voltage (V
– V
)
DCIN Voltage Ramping Down
–60
5
DCIN
CLN
INFET “On” Clamping Voltage (V
INFET “Off” Clamping Voltage (V
– V
– V
)
I
I
= 1µA
6.5
DCIN
DCIN
INFET
INFET
INFET
)
= –25µA
0.25
V
INFET
Thermistor
NTCVR
Reference Voltage During Sample Time
High Threshold
4.5
V
V
V
NTC
V
NTC
V
NTC
Rising
Falling
≤ 10V
●
●
NTCVR NTCVR NTCVR
• 0.48 • 0.5 • 0.52
Low Threshold
NTCVR NTCVR NTCVR
• 0.115 • 0.125 • 0.135
V
Thermistor Disable Current
10
µA
Indicator Outputs (ACP, CHG, FLAG, LOBAT, I , FAULT
CL
C10TOL
LBTOL
FLAG (C/10) Accuracy
Voltage Falling at PROG
●
0.375
0.397
0.420
V
LOBAT Threshold Accuracy
3C4C = 0V, CHEM = 0V
●
●
●
●
7.10
7.27
9.46
9.70
7.32
7.50
9.76
10
7.52
7.71
10.10
V
V
V
V
3C4C = 0V, CHEM = Open
3C4C = Open, CHEM = 0V
3C4C = Open, CHEM = Open
10.28
RESTART Threshold Accuracy
3C4C = 0V, CHEM = 0V
●
●
●
●
11.13
11.40
14.84
15.20
11.42
11.70
15.23
15.60
11.65
11.94
15.54
15.92
V
V
V
V
3C4C = 0V, CHEM = Open
3C4C = Open, CHEM = 0V
3C4C = Open, CHEM = Open
I
Threshold Accuracy
83
93
1O5
mV
CL
4007i
3
LTC4007
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range (Note 4), otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT = 12V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Low Logic Level of ACP, CHG, FLAG, LOBAT,
, FAULT
I
= 100µA
●
●
0.5
V
OL
OL
I
CL
V
High Logic Level of CHG, LOBAT, I
I
= –1µA
2.7
–1
V
µA
µA
V
OH
OFF
PO
CL
OH
I
I
Off State Leakage Current of ACP, FLAG, FAULT
V
= 3V
1
OH
Pull-Up Current on CHG, LOBAT, I
Timer Defeat Threshold at CHG
V = 0V
–10
CL
1
1
Programming Inputs (CHEM and 3C4C)
V
IH
V
IL
High Logic Level
Low Logic Level
Pull-Up Current
●
●
3.3
345
V
V
I
V = 0V
–14
µA
PI
Oscillator
f
f
Regulator Switching Frequency
255
20
300
25
kHz
kHz
%
OSC
MIN
Regulator Switching Frequency in Drop Out
Regulator Maximum Duty Cycle
Duty Cycle ≥ 98%
DC
V
= V
BAT
98
99
MAX
CSP
Gate Drivers (TGATE, BGATE)
V
TGATE
V
BGATE
V
TGATE
V
BGATE
High (V
High
– V
)
I
= –1mA
= 3000pF
= 3000pF
= 1mA
50
10
10
50
mV
V
CLN
TGATE
TGATE
C
C
4.5
4.5
5.6
5.6
LOAD
Low (V
Low
– V
)
V
CLN
TGATE
LOAD
I
mV
BGATE
TGATE Transition Time
TGATE Rise Time
TGATE Fall Time
TGTR
TGTF
C
LOAD
C
LOAD
= 3000pF, 10% to 90%
= 3000pF, 10% to 90%
50
50
110
100
ns
ns
BGATE Transition Time
BGATE Rise Time
BGATE Fall Time
BGTR
BGTF
C
LOAD
C
LOAD
= 3000pF, 10% to 90%
= 3000pF, 10% to 90%
40
40
90
80
ns
ns
V
TGATE
V
BGATE
at Shutdown (V
at Shutdown
– V
)
I
I
= –1µA, DCIN = 0V, CLN = 12V
= 1µA, DCIN = 0V, CLN = 12V
100
100
mV
mV
CLN
TGATE
TGATE
BGATE
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: See Test Circuit.
Note 3: Does not include tolerance of current sense resistor or current
Note 4: The LTC4007E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
programming resistor.
4007i
4
LTC4007
U
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PI FU CTIO S
DCIN (Pin 1): External DC Power Source Input. Bypass
thispinwithatleast0.01µF. SeeApplicationsInformation.
NTC (Pin 9): A thermistor network is connected from NTC
to GND. This pin determines if the battery temperature is
safe for charging. The charger and timer are suspended
and the FAULT pin is driven low if the thermistor indicates
a temperature that is unsafe for charging. The thermistor
functionmaybedisabledwitha300kto500kresistorfrom
DCIN to NTC.
CHG (Pin 2): Charge Status Output. When the battery is
being charged, the CHG pin is pulled low by an internal
N-channel MOSFET. Internal 10µA pull-up to 3.5V. If
V
LOGIC is greater than 3.3V, add an external pull-up. The
timerfunctioncanbedefeatedbyforcingthispinbelow1V
(or connecting it to GND).
ITH (Pin 10): Control Signal of the Inner Loop of the
Current Mode PWM. Higher ITH voltage corresponds to
higherchargingcurrentinnormaloperation. A6kresistor,
in series with a capacitor of at least 0.1µF to GND provides
loop compensation. Typical full-scale output current is
40µA. Nominal voltage range for this pin is 0V to 3V.
ACP(Pin 3): Open-Drain output to indicate if the AC
adapter voltage is adequate for charging. This pin is pulled
low by an internal N-channel MOSFET if DCIN is below
BAT. A pull-up resistor is required. The pin is capable of
sinking at least 100µA.
PROG (Pin 11): Current Programming/Monitoring Input/
Output. An external resistor to GND programs the peak
charging current in conjunction with the current sensing
resistor. The voltage at this pin provides a linear indication
of charging current. Peak current is equivalent to 1.19V.
Zero current is approximately 0.3V. A capacitor from
PROG to ground is required to filter higher frequency
components. The maximum resistance to ground is 100k.
Values higher than 100k can cause the charger to shut
down.
RT (Pin 4): Timer Resistor. The timer period is set by
placing a resistor, RRT , to GND. This resistor is always
required.
The timer period is tTIMER = (1hour • RRT/154K).
FAULT (Pin 5): Active low open-drain output that indi-
cates charger operation has stopped due to a low-battery
conditioningerror, orthatchargeroperationissuspended
due to the thermistor exceeding allowed values. A pull-up
resistor is required if this function is used. The pin is
capable of sinking at least 100µA.
NC (Pin 12): No Connect.
GND (Pin 6): Ground for Low Power Circuitry.
ICL (Pin 13): Input Current Limit Indicator. Active low
digital output. Internal 10µA pull-up to 3.5V. Pulled low if
the charger current is being reduced by the input current
limiting function. The pin is capable of sinking at least
100µA. If VLOGIC is greater than 3.3V, add an external
pull-up.
3C4C (Pin 7): Select 3-cell or 4-cell float voltage by
connecting this pin to GND or open, respectively. Internal
14µA pull-up to 5.3V. This pin can also be driven with
open-collector/drain logic levels. High: 4 cell. Low: 3 cell.
LOBAT (Pin 8): Low-Battery Indicator. Active low digital
output. Internal 10µA pull-up to 3.5V. If the battery
voltage is below 2.5V/cell (or 2.44V/cell for 4.1V chemis-
try batteries) LOBAT will be low. The pin is capable of
sinking at least 100µA. If VLOGIC is greater than 3.3V, add
an external pull-up.
CSP (Pin 14): Current Amplifier CA1 Input. The CSP and
BAT pins measure the voltage across the sense resistor,
RSENSE, to provide the instantaneous current signals re-
quired for both peak and average current mode operation.
4007i
5
LTC4007
U
U
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PI FU CTIO S
BAT (Pin 15): Battery Sense Input and the Negative
Reference for the Current Sense Resistor. A precision
internal resistor divider sets the final float potential on this
pin.Theresistordividerisdisconnectedduringshutdown.
CLN (Pin 19): Negative Reference for the Input Current
Limit Amplifier, CL1. This pin also serves as the power
supply for the IC. A 10µF to 22µF bypass capacitor should
be connected as close as possible to this pin.
CHEM (Pin 16):Select 4.1V or 4.2V cell chemistry by
connecting the pin to GND or open, respectively. Internal
14µA pull-up to 5.3V. Can also be driven with open-
collector/drain logic levels.
TGATE(Pin20):DrivesthetopexternalP-channelMOSFET
of the battery charger buck converter.
PGND (Pin 21):HighCurrentGroundReturnfortheBGATE
Driver.
FLAG (Pin 17): Active low open-drain output that indi-
cates when charging current has declined to 10% of
maximum programmed current. A pull-up resistor is
required if this function is used. The pin is capable of
sinking at least 100µA.
BGATE (Pin 22): Drives the bottom external N-channel
MOSFET of the battery charger buck converter.
INFET(Pin23):DrivestheGateoftheExternalInputPFET.
SHDN (Pin 24):Charger is shut down and timer is reset
when this pin is HIGH. Internal 10µA pull-up to 3.5V. This
pin can also be used to reset the charger by applying a
positive pulse that is a minimum of 0.1µs long.
CLP (Pin 18): Positive input to the supply current limiting
amplifier, CL1. The threshold is set at 100mV above the
voltage at the CLN pin. When used to limit supply current,
a filter is needed to filter out the switching noise. If no
current limit function is desired, connect this pin to CLN.
4007i
6
LTC4007
W
BLOCK DIAGRA
0.1µF
V
IN
DCIN
1
5.8V
INFET
Q3
23
3
CLN
2
4
CHG
ACP
R
RT
R
T
OSCILLATOR
TIMER/CONTROLLER
SHDN 24
FAULT
5
32.4k
TBAD
NTC
RESTART
THERMISTOR
9
10k
NTC
0.47µF
–
397mV
C/10
FLAG 17
+
35mV
GND
6
–
+
11.67µA
3C4C
7
MUX
3k
3k
BAT
CSP
CHEM 16
15
14
–
+
–
+
R
SENSE
20µF
+
–
CA1
LOBAT
8
1.105V
708mV
1.19V
Ω
+
–
g
= 1m
m
EA
5k
CLP
CLN
Ω
g
= 1.4m
18
–
+
m
9k
R
CL
15nF
CL1
100mV
Ω
–
+
g
m
= 1m
19
13
CA2
I
CL
1.19V
DCIN
ITH
OSCILLATOR
WATCHDOG
DETECT
10
6K
20µF
t
OFF
+
–
0.12µF
BUFFERED ITH
÷5
OV
1.28V
CLN
TGATE
S
+
–
+
20
–
Q1
Q2
Q
I
R
CMP
BGATE
PGND
CHARGE
PWM
LOGIC
22
21
–
+
I
REV
17mV
PROG
11
0.0047µF
L1
R
PROG
26.7k
4007 BD
4007i
7
LTC4007
TEST CIRCUIT
LTC4007
CHEM
3C4C
V
16
7
+
–
REF
DIVIDER/
MUX
EA
BAT
ITH
10
15
+
–
LT1055
0.6V
4007 TC
U
OPERATIO
C/10 comparator will indicate this condition by latching
the FLAG pin low. The charge timer is also reset to 1/4 of
thetotalchargetimewhenFLAGgoeslow.Ifthiscondition
is caused by an input current limit condition, described
below, then the FLAG indicator will be inhibited. When a
time-out occurs, charging is terminated immediately and
the CHG pin is forced to a high impedance state. The
charger will automatically restart if the cell voltage is
below3.9V(or3.81VifCHEMislow).Torestartthecharge
cycle manually, simply remove the input voltage and
reapply it, or set the SHDN pin high momentarily. When
the input voltage is not present, the charger goes into a
sleep mode, dropping battery current drain to 15µA. This
greatly reduces the current drain on the battery and
increases the standby time. The charger is inhibited any
time the SHDN pin is high.
Overview
The LTC4007 is a synchronous current mode PWM step-
down (buck) switcher battery charger controller. The
charge current is programmed by the combination of a
program resistor (RPROG) from the PROG pin to ground
and a sense resistor (RSENSE) between the CSP and BAT
pins. The final float voltage is programmed to one of four
values (12.3V, 12.6V, 16.4V, 16.8V) with ±1% maximum
accuracy using pins 3C4C and CHEM. Charging begins
when the potential at the DCIN pin rises above the voltage
atBAT(andtheUVLOvoltage)andtheSHDNpinislow;the
CHG pin is set low. At the beginning of the charge cycle, if
the cell voltage is below 2.5V (2.44V if CHEM is low), the
LOBAT pin will be low. The LOBAT indicator can be used
to reduce the charging current to a low value, typically
10% of full scale. If the cell voltage stays below 2.5V for
25% of the total charge time, the charge sequence will be
terminated immediately and the FAULT pin will be set low.
Input FET
The input FET circuit performs two functions. It enables
the charger if the input voltage is higher than the CLN pin
and provides the logic indicator of AC present on the ACP
pin. It controls the gate of the input FET to keep a low
forward voltage drop when charging and also prevents
reverse current flow through the input FET.
An external thermistor network is sampled at regular
intervals. If the thermistor value exceeds design limits,
charging is suspended and the FAULT pin is set low. If the
thermistor value returns to an acceptable value, charging
resumesandtheFAULTpinissethigh.Anexternalresistor
on the RT pin sets the total charge time. The timer can be
defeated by forcing the CHG pin to a low voltage.
If the input voltage is less than VCLN, it must go at least
170mVhigherthanVCLN toactivatethecharger.Whenthis
occurs the ACP pin is released and pulled up with an
external load to indicate that the adapter is present. The
As the battery approaches the final float voltage, the
charge current will begin to decrease. When the current
drops to 10% of the full-scale charge current, an internal
4007i
8
LTC4007
U
OPERATIO
Table 1. Truth Table For Indicator States
TIMER
STATE
MODE
DCIN
<BAT
>BAT
>BAT
>BAT
>BAT
SHDN
LOW
LOW
LOW
LOW
LOW
ACP**
LOW
LOBAT FLAG** FAULT**
I
CHG**
HIGH
LOW
LOW
LOW
LOW
CL
Shut down by low adapter voltage
Charging a low bat
LOW
LOW
HIGH
HIGH
X
HIGH
HIGH* HIGH*
HIGH HIGH*
HIGH* HIGH*
HIGH
LOW
HIGH*
HIGH*
LOW
Reset
HIGH
HIGH
HIGH
HIGH
Running
Running
Running
Paused
Normal charging
Input current limited charging
Charger paused due to thermistor out of range
X
LOW
(from
NTC)
HIGH
Shut down by SHDN pin
X
HIGH
LOW
X
X
HIGH
HIGH
LOW
LOW
LOW
Reset
>T/4
HIGH
Terminated by low-battery fault (Note 1)
>BAT
HIGH
LOW
HIGH*
HIGH
(Faulted)
Timer is reset when FLAG goes low, then
terminates after 1/4 T
>BAT
LOW
HIGH
HIGH
HIGH
HIGH
LOW
HIGH
HIGH
LOW
>T/4
after
FLAG =
HIGH
(Waiting
for Restart)
LOW
Terminated by expired timer
>BAT
X
LOW
HIGH
LOW
>T
HIGH
(Waiting
for Restart
Timer defeated
X
X
X
X
X
X
X
Forced LOW
HIGH*
Shut down by undervoltage lockout
>BAT
LOW
HIGH
HIGH
HIGH
HIGH*
LOW
Reset
+ <UVL
*Most probable condition X = Don’t care, ** Open-drain output HIGH = OPEN with pull-up
Note 1: If a depleted battery is inserted while the charger is in this state, the
charger must be reset to initiate charging.
gateoftheinputFETisdriventoavoltagesufficienttokeep
a low forward voltage drop from drain to source. If the
voltage between DCIN and CLN drops to less than 25mV,
the input FET is turned off slowly. If the voltage between
DCIN and CLN is ever less than –25mV, then the input FET
is turned off in less than 10µs to prevent significant
reverse current from flowing in the input FET. In this
condition, the ACP pin is driven low and the charger is
disabled.
IREV or the beginning of the next cycle. The oscillator uses
the equation:
VDCIN – VBAT
VDCIN • fOSC
tOFF
=
to set the bottom MOSFET on time. The result is a nearly
constant switching frequency over a wide input/output
voltage range. This activity is diagrammed in Figure 1.
OFF
TGATE
ON
Battery Charger Controller
The LTC4007 charger controller uses a constant off-time,
current mode step-down architecture. During normal op-
eration, the top MOSFET is turned on each cycle when the
oscillator sets the SR latch and turned off when the main
currentcomparatorICMP resetstheSRlatch. Whilethetop
MOSFET is off, the bottom MOSFET is turned on until
either the inductor current trips the current comparator
ON
t
BGATE
OFF
OFF
TRIP POINT SET BY ITH VOLTAGE
INDUCTOR
CURRENT
4006 F01
Figure 1
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LTC4007
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OPERATIO
The peak inductor current, at which ICMP resets the SR
latch, is controlled by the voltage on ITH. ITH is in turn
controlled by several loops, depending upon the situation
at hand. The average current control loop converts the
voltage between CSP and BAT to a representative current.
Error amp CA2 compares this current against the desired
current programmed by RPROG at the PROG pin and
adjusts ITH until:
voltage,therebyreducingchargingcurrent.TheICL indica-
tor output will go low when this condition is detected and
the FLAG indicator will be inhibited if it is not already LOW.
If the charging current decreases below 10% to 15% of
programmed current while engaged in input current lim-
iting, BGATEwillbeforcedlowtopreventthechargerfrom
discharging the battery. Audible noise can occur in this
mode of operation.
VREF
RPROG
VCSP – VBAT +11.67µA •3kΩ
3kΩ
An overvoltage comparator guards against voltage tran-
sient overshoots (>7% of programmed value). In this
case, both MOSFETs are turned off until the overvoltage
condition is cleared. This feature is useful for batteries
which “load dump” themselves by opening their protec-
tion switch to perform functions such as calibration or
pulse mode charging.
=
therefore,
VREF
RPROG
3kΩ
RSENSE
ICHARGE(MAX)
=
– 11.67µA •
The voltage at BAT is divided down by an internal resistor
divider and is used by error amp EA to decrease ITH if the
divider voltage is above the 1.19V reference. When the
charging current begins to decrease, the voltage at PROG
will decrease in direct proportion. The voltage at PROG is
then given by:
PWM Watchdog Timer
There is a watchdog timer that observes the activity on the
BGATE and TGATE pins. If TGATE stops switching for
more than 40µs, the watchdog activates and turns off the
top MOSFET for about 400ns. The watchdog engages to
prevent very low frequency operation in dropout—a po-
tential source of audible noise when using ceramic input
and output capacitors.
RPROG
3kΩ
VPROG = ICHARGE •RSENSE +11.67µA •3kΩ •
(
)
VPROG is plotted in Figure 2.
The amplifier CL1 monitors and limits the input current,
normally from the AC adapter to a preset level (100mV/
RCL). At input current limit, CL1 will decrease the ITH
Charger Start-Up
When the charger is enabled, it will not begin switching
until the ITH voltage exceeds a threshold that assures
initial current will be positive. This threshold is 5% to 15%
of the maximum programmed current. After the charger
beginsswitching,thevariousloopswillcontrolthecurrent
at a level that is higher or lower than the initial current. The
duration of this transient condition depends upon the loop
compensation, but is typically less than 100µs.
1.2
1.0
0.8
0.6
0.4
0.2
0
1.19V
Thermistor Detection
0.309V
The thermistor detection circuit is shown in Figure 3. It
requires an external resistor and capacitor in order to
function properly.
60
80
0
20
40
100
I
(% OF MAXIMUM CURRENT)
CHARGE
4007 F02
Thethermistordetectorperformsasample-and-holdfunc-
tion. An internal clock, whose frequency is determined by
Figure 2. VPROG vs ICHARGE
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LTC4007
U
OPERATIO
the timing resistor connected to RT, keeps switch S1
closed to sample the thermistor:
tHOLD = 10 • RRT • 17.5pF = 64µs,
for RRT = 309k
tSAMPLE = 127.5 • 20 • RRT • 17.5pF = 16.2ms,
When the tHOLD interval ends the result of the thermistor
testing is stored in the D flip-flop (DFF). If the voltage at
NTC is within the limits provided by the resistor divider
feeding the comparators, then the NOR gate output will be
low and the DFF will set TBAD to zero and charging will
continue. If the voltage at NTC is outside of the resistor
dividerlimits, thentheDFFwillsetTBAD toone, thecharger
will be shut down, FAULT pin is set low and the timer will
be suspended until TBAD returns to zero (see Figure 4).
for RRT = 309k
The external RC network is driven to approximately 4.5V
and settles to a final value across the thermistor of:
4.5V •RTH
VRTH(FINAL)
=
R
TH + R9
This voltage is stored by C7. Then the switch is opened for
a short period of time to read the voltage across the
thermistor.
LTC4007
CLK
R9
–
32.4k
NTC
6
R
S1
TH
C7
0.47µF
+
~4.5V
10k
NTC
60k
+
–
45k
15k
–
+
TBAD
D
C
Q
4007 F03
Figure 3
CLK
(NOT TO
SCALE)
t
SAMPLE
t
HOLD
VOLTAGE ACROSS THERMISTOR
COMPARATOR HIGH LIMIT
COMPARATOR LOW LIMIT
V
NTC
4007 F04
Figure 4
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Battery Detection
LTC4007
PROG
11
It is generally not good practice to connect a battery while
the charger is running. The timer is in an unknown state
and the charger could provide a large surge current into
the battery for a brief time. The Figure 5 circuit keeps the
chargershutdownandthetimerresetwhileabatteryisnot
connected.
R
Z
C
PROG
R
PROG
102k
5V
0V
Q1
2N7002
4007 F06
LTC4007
ADAPTER
Figure 6. PWM Current Programming
1
DCIN
POWER
increased to reduce the ripple caused by the RPROG
switching. The compensation capacitor at ITH will prob-
ably need to be increased also to improve stability and
prevent large overshoot currents during start-up condi-
tions. Charging current will be proportional to the duty
cycleoftheswitchwithfullcurrentat100%dutycycleand
zero current when Q1 is off.
24 SHDN
SWITCH CLOSED
WHEN BATTERY
CONNECTED
4007 F05
Figure 5
Charger Current Programming
The basic formula for charging current is:
Maintaining C/10 Accuracy
The C/10 comparator threshold that drives the FLAG pin
has a fixed threshold of approximately VPROG = 400mV.
This threshold works well when RPROG is 26.7k, but will
not yield a 10% charging current indication if RPROG is a
different value. There are situations where a standard
valueofRSENSE willnotallowthedesiredvalueofcharging
current when using the preferred RPROG value. In these
cases, wherethefull-scalevoltageacrossRSENSE iswithin
±20mV of the 100mV full-scale target, the input resistors
connected to CSP and BAT can be adjusted to provide the
desired maximum programming current as well as the
correct FLAG trip point.
VREF •3kΩ /RPROG – 0.035V
ICHARGE(MAX)
=
RSENSE
VREF = 1.19V
This leaves two degrees of freedom: RSENSE and RPROG
.
The 3k input resistors must not be altered since internal
currents and voltages are trimmed for this value. Pick
RSENSE by setting the average voltage between CSP and
BAT to be close to 100mV during maximum charger
current. Then RPROG can be determined by solving the
above equation for RPROG
.
VREF •3kΩ
RSENSE •ICHARGE(MAX) + 0.035V
For example, the desired max charging current is 2.5A but
the best RSENSE value is 0.033Ω. In this case, the voltage
across RSENSE at maximum charging current is only
82.5mV, normally RPROG would be 30.1k but the nominal
FLAG trip point is only 5% of maximum charging current.
If the input resistors are reduced by the same amount as
the full-scale voltage is reduced then, R4 = R5 = 2.49k and
RPROG
=
Table 2. Recommended RSNS and RPROG Resistor Values
(A) (Ω) 1% (W) (kΩ) 1%
I
R
R
SENSE
R
PROG
MAX
SENSE
1.0
0.100
0.25
0.25
0.5
26.7
2.0
3.0
4.0
0.050
0.033
0.025
26.7
26.7
26.7
R
PROG =26.7k, themaximumchargingcurrentisstill2.5A
0.5
but the FLAG trip point is maintained at 10% of full scale.
There are other effects to consider. The voltage across the
current comparator is scaled to obtain the same values as
the 100mV sense voltage target, but the input referred
Charging current can be programmed by pulse width
modulating RPROG with a switch Q1 to RPROG at a fre-
quency higher than a few kHz (Figure 6). CPROG must be
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200
sense voltage is reduced, causing some careful consider-
ation of the ripple current. Input referred maximum com-
paratorthresholdis117mV,whichisthesameratioof1.4x
the DC target. Input referred IREV threshold is scaled back
to –24mV. The current at which the switcher starts will be
reduced as well so there is some risk of boost activity.
Theseconcernscanbeaddressedbyusingaslightlylarger
inductor to compensate for the reduction of tolerance to
ripple current.
180
160
140
120
100
80
60
40
20
0
100
300
400 450
500
150 200 250
350
Charger Voltage Programming
R
(kΩ)
RT
4007 F07
PinsCHEMandC3C4areusedtoprogramthechargerfinal
output voltage. The CHEM pin programs Li-Ion battery
chemistry for 4.1V/cell (low) or 4.2V/cell (high). The C3C4
pin selects either 3 series cells (low) or 4 series cells
(high). It is recommended that these pins be shorted to
ground (logic low) or left open (logic high) to effect the
desired logic level. Use open-collector or open-drain out-
puts when interfacing to the CHEM and 3C4C pins from a
logic control circuit.
Figure 7. tTIMER vs RRT
current starts ramping up when ITH voltage reaches 0.8V
and full current is achieved with ITH at 2V. With a 0.12µF
capacitor, time to reach full charge current is about 2ms
and it is assumed that input voltage to the charger will
reach full value in less than 2ms. The capacitor can be
increased up to 1µF if longer input start-up times are
needed.
Table 3. Charger Voltage Programming
V
(V)
3C4C
LOW
LOW
HIGH
HIGH
CHEM
LOW
HIGH
LOW
HIGH
FINAL
Input and Output Capacitors
12.3
12.6
16.4
16.8
The input capacitor (C2) is assumed to absorb all input
switching ripple current in the converter, so it must have
adequate ripple current rating. Worst-case RMS ripple
currentwillbeequaltoonehalfofoutputchargingcurrent.
Actual capacitance value is not critical. Solid tantalum low
ESR capacitors have high ripple current rating in a rela-
tively small surface mount package, but caution must be
used when tantalum capacitors are used for input or
output bypass. High input surge currents can be created
when the adapter is hot-plugged to the charger or when a
batteryisconnectedtothecharger. Solidtantalumcapaci-
tors have a known failure mechanism when subjected to
very high turn-on surge currents. Only Kemet T495 series
of “Surge Robust” low ESR tantalums are rated for high
surge conditions such as battery to ground.
Setting the Timer Resistor
The charger termination timer is designed for a range of
1hour to 3 hour with a ±15% uncertainty. The timer is
programmed by the resistor RRT using the following
equation:
tTIMER = 227 • RRT • 175pF
It is important to keep the parasitic capacitance on the RT
pin to a minimum. The trace connecting RT to RRT should
be as short as possible.
Soft-Start
The relatively high ESR of an aluminum electrolytic for C1,
The LTC4007 is soft started by the 0.12µF capacitor on the located at the AC adapter input terminal, is helpful in
ITH pin. On start-up, ITH pin voltage will rise quickly to reducing ringing during the hot-plug event. Refer to AN88
0.5V, then ramp up at a rate set by the internal 40µA pull- for more information.
up current and the external capacitor. Battery charging
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Highest possible voltage rating on the capacitor will mini-
mizeproblems. Consultwiththemanufacturerbeforeuse.
Alternatives include new high capacity ceramic (at least
20µF) from Tokin, United Chemi-Con/Marcon, et al. Other
alternative capacitors include OS-CON capacitors from
Sanyo.
∆IL exceed 0.6(IMAX) due to limits imposed by IREV and
CA1. Remember the maximum ∆IL occurs at the maxi-
mum input voltage. In practice 10µH is the lowest value
recommended for use.
Lower charger currents generally call for larger inductor
values. Use Table 4 as a guide for selecting the correct
inductor value for your application.
The output capacitor (C3) is also assumed to absorb
output switching current ripple. The general formula for
capacitor current is:
Table 4
MAX AVERAGE
CURRENT (A)
MINIMUM INDUCTOR
INPUT VOLTAGE (V)
VALUE (µH)
VBAT
VDCIN
0.29 V
1–
1
1
2
2
3
3
4
4
≤20
>20
≤20
>20
≤20
>20
≤20
>20
40 ±20%
56 ±20%
20 ±20%
30 ±20%
15 ±20%
20 ±20%
10 ±20%
15 ±20%
(
)
BAT
IRMS
=
L1 f
( )( )
For example:
VDCIN = 19V, VBAT = 12.6V, L1 = 10µH, and
f = 300kHz, IRMS = 0.41A.
EMI considerations usually make it desirable to minimize
ripple current in the battery leads, and beads or inductors
maybeaddedtoincreasebatteryimpedanceatthe300kHz
switching frequency. Switching ripple current splits be-
tween the battery and the output capacitor depending on
the ESR of the output capacitor and the battery imped-
ance. If the ESR of C3 is 0.2Ω and the battery impedance
is raised to 4Ω with a bead or inductor, only 5% of the
current ripple will flow in the battery.
Charger Switching Power MOSFET
and Diode Selection
Two external power MOSFETs must be selected for use
with the charger: a P-channel MOSFET for the top (main)
switch and an N-channel MOSFET for the bottom (syn-
chronous) switch.
The peak-to-peak gate drive levels are set internally. This
voltageistypically6V.Consequently,logic-levelthreshold
MOSFETs must be used. Pay close attention to the BVDSS
specification for the MOSFETs as well; many of the logic
level MOSFETs are limited to 30V or less.
Inductor Selection
Higher operating frequencies allow the use of smaller
inductor and capacitor values. A higher frequency gener-
ally results in lower efficiency because of MOSFET gate
charge losses. In addition, the effect of inductor value on
ripple current and low current operation must also be
considered. The inductor ripple current ∆IL decreases
with higher frequency and increases with higher VIN.
SelectioncriteriaforthepowerMOSFETsincludethe“ON”
resistance RDS(ON), total gate capacitance QG, reverse
transfer capacitance CRSS, input voltage and maximum
output current. The charger is operating in continuous
mode at moderate to high currents so the duty cycles for
the top and bottom MOSFETs are given by:
1
VOUT
V
IN
∆IL =
VOUT 1–
f L
( )( )
Main Switch Duty Cycle = VOUT/VIN
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆IL = 0.4(IMAX). In no case should
Synchronous Switch Duty Cycle = (VIN – VOUT)/VIN.
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The MOSFET power dissipations at maximum output
Calculating IC Power Dissipation
current are given by:
The power dissipation of the LTC4007 is dependent upon
the gate charge of the top and bottom MOSFETs (QG1 &
QG2 respectively) The gate charge is determined from the
manufacturer’sdatasheetandisdependentuponboththe
gate voltage swing and the drain voltage swing of the
MOSFET. Use 6V for the gate voltage swing and VDCIN for
the drain voltage swing.
PMAIN = VOUT/VIN(IMAX)2(1 + δ∆T)RDS(ON)
+ k(VIN)2(IMAX)(CRSS)(fOSC
)
PSYNC = (VIN – VOUT)/VIN(IMAX)2(1 + δ∆T)RDS(ON)
Where δ∆T is the temperature dependency of RDS(ON) and
k is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the PMAIN equation
includesanadditionaltermfortransitionlosses,whichare
highest at high input voltages. For VIN < 20V the high
currentefficiencygenerallyimproveswithlargerMOSFETs,
while for VIN > 20V the transition losses rapidly increase
to the point that the use of a higher RDS(ON) device with
lower CRSS actually provides higher efficiency. The syn-
chronous MOSFET losses are greatest at high input volt-
age or during a short circuit when the duty cycle in this
switch in nearly 100%. The term (1 + δ∆T) is generally
given for a MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but δ = 0.005/°C can be used as an
approximationforlowvoltageMOSFETs.CRSS =QGD/∆VDS
is usually specified in the MOSFET characteristics. The
constant k = 2 can be used to estimate the contributions of
the two terms in the main switch dissipation equation.
PD = VDCIN • (fOSC (QG1 + QG2) + IQ)
Example:
V
DCIN = 19V, fOSC = 345kHz, QG1 = QG2 = 15nC.
PD = 235mW
Adapter Limiting
An important feature of the LTC4007 is the ability to
automatically adjust charging current to a level which
avoids overloading the wall adapter. This allows the prod-
uct to operate at the same time that batteries are being
charged without complex load management algorithms.
Additionally, batteries will automatically be charged at the
maximum possible rate of which the adapter is capable.
This feature is created by sensing total adapter output
current and adjusting charging current downward if a
preset adapter current limit is exceeded. True analog
control is used, with closed-loop feedback ensuring that
adapter load current remains within limits. Amplifier CL1
in Figure 8 senses the voltage across RCL, connected
If the charger is to operate in low dropout mode or with a
high duty cycle greater than 85%, then the topside
P-channel efficiency generally improves with a larger
MOSFET.UsingasymmetricalMOSFETsmayachievecost
savings or efficiency gains.
The Schottky diode D1, shown in the Typical Application
on the back page, conducts during the dead-time between
the conduction of the two power MOSFETs. This prevents
thebodydiodeofthebottomMOSFETfromturningonand
storing charge during the dead-time, which could cost as
much as 1% in efficiency. A 1A Schottky is generally a
good size for 4A regulators due to the relatively small
average current. Larger diodes can result in additional
transition losses due to their larger junction capacitance.
LTC4007
100mV
CLP
+
18
–
15nF
5k
CL1
+
AC ADAPTER
INPUT
R
*
CL
CLN
V
IN
19
+
C
IN
100mV
ADAPTER CURRENT LIMIT
*R
CL
=
4007 F08
The diode may be omitted if the efficiency loss can be
tolerated.
Figure 8. Adapter Current Limiting
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betweentheCLPandCLNpins. Whenthisvoltageexceeds
100mV, the amplifier will override programmed charging
current to limit adapter current to 100mV/RCL. A lowpass
filter formed by 5kΩ and 15nF is required to eliminate
switchingnoise.Ifthecurrentlimitisnotused,CLPshould
be connected to DCIN.
network; the thermistor must have a HIGH/LOW resis-
tance ratio of 1:7. If this happy circumstance is true for
you, then simply set R9 = RTH(LOW)
If you are using a thermistor that doesn’t have a 1:7 HIGH/
LOW ratio, or you wish to set the HIGH/LOW limits to
different temperatures, then the more generic network in
Figure 10 should work.
Note that the ICL pin will be asserted when the voltage
across RCL is 93mV, before the adapter limit regulation
threshold.
LTC4007
R9
NTC
9
Setting Input Current Limit
C7
R
TH
To set the input current limit, you need to know the
minimum wall adapter current rating. Subtract 5% for the
input current limit tolerance and use that current to deter-
mine the resistor value.
4007 F09
Figure 9. Voltage Divider Thermistor Network
RCL = 100mV/ILIM
ILIM = Adapter Min Current –
(Adapter Min Current • 5%)
LTC4007
R9
NTC
9
C7
R9A
R
TH
Table 5. Common RCL Resistor Values
4007 F10
ADAPTER
RATING (A)
R
VALUE*
CL
(Ω) 1%
R
POWER
R
POWER
CL
CL
DISSIPATION (W)
RATING (W)
Figure 10. General Thermistor Network
1.5
1.8
2
0.06
0.05
0.135
0.25
0.162
0.25
Once the thermistor, RTH, has been selected and the
thermistor value is known at the temperature limits, then
resistors R9 and R9A are given by:
0.045
0.039
0.036
0.033
0.03
0.18
0.25
2.3
2.5
2.7
3
0.206
0.25
0.225
0.5
For NTC thermistors:
0.241
0.5
0.27
0.5
R9 = 6 RTH(LOW) • RTH(HIGH)/(RTH(LOW) – RTH(HIGH)
)
* Values shown above are rounded to nearest standard value.
R9A=6RTH(LOW) •RTH(HIGH)/(RTH(LOW) –7•RTH(HIGH)
For PTC thermistors:
)
As is often the case, the wall adapter will usually have at
least a +10% current limit margin and many times one can
simply set the adapter current limit value to the actual
adapter rating (see Table 5).
R9 = 6 RTH(LOW) • RTH(HIGH)/(RTH(HIGH) – RTH(LOW)
)
R9A =6RTH(LOW)•RTH(HIGH)/(RTH(HIGH)–7• RTH(LOW)
)
Designing the Thermistor Network
Example #1: 10kΩ NTC with custom limits
There are several networks that will yield the desired
function of voltage vs temperature needed for proper
operation of the thermistor. The simplest of these is the
voltage divider shown in Figure 9. Unfortunately, since the
HIGH/LOW comparator thresholds are fixed internally,
there is only one thermistor type that can be used in this
TLOW = 0°C, THIGH = 50°C
RTH = 10k at 25°C,
RTH(LOW) = 32.582k at 0°C
RTH(HIGH) = 3.635k at 50°C
R9 = 24.55k → 24.3k (nearest 1% value)
R9A = 99.6k → 100k (nearest 1% value)
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Example #2: 100kΩ NTC
charge depleted batteries using the circuit in Figure 11. If
the battery voltage is less than 2.5V/cell (2.44V/cell if
CHEM is low) then the LOBAT indicator will be low and Q4
isoff.ThisprogramsthechargingcurrentwithRPROG =R6
+ R14. Charging current is approximately 300mA. When
the cell voltage becomes greater than 2.5V the LOBAT
indicator goes high, Q4 shorts out R13, then RPROG = R6.
Charging current is then equal to 3A.
TLOW = 5°C, THIGH = 50°C
RTH = 100k at 25°C,
R
TH(LOW) = 272.05k at 5°C
RTH(HIGH) = 33.195k at 50°C
R9 = 226.9k → 226k (nearest 1% value)
R9A = 1.365M → 1.37M (nearest 1% value)
Example #3: 22kΩ PTC
PCB Layout Considerations
TLOW = 0°C, THIGH = 50°C
RTH = 22k at 25°C,
RTH(LOW) = 6.53k at 0°C
RTH(HIGH) = 61.4k at 50°C
R9 = 43.9k → 44.2k (nearest 1% value)
R9A = 154k
For maximum efficiency, the switch node rise and fall
times should be minimized. To prevent magnetic and
electricalfieldradiationandhighfrequencyresonantprob-
lems,properlayoutofthecomponentsconnectedtotheIC
is essential. (See Figure 12.) Here is a PCB layout priority
list for proper layout. Layout the PCB using this specific
order.
Sizing the Thermistor Hold Capacitor
During the hold interval, C7 must hold the voltage across
the thermistor relatively constant to avoid false readings.
A reasonable amount of ripple on NTC during the hold
interval is about 10mV to 15mV. Therefore, the value of C7
is given by:
1. Inputcapacitorsneedtobeplacedascloseaspossible
to switching FET’s supply and ground connections.
Shortest copper trace connections possible. These
parts must be on the same layer of copper. Vias must
not be used to make this connection.
C7 = tHOLD/(R9/7 • –ln(1 – 8 • 15mV/4.5V))
= 10 • RRT • 17.5pF/(R9/7 • –ln(1 – 8 • 15mV/4.5V)
Example:
2. ThecontrolICneedstobeclosetotheswitchingFET’s
gate terminals. Keep the gate drive signals short for a
clean FET drive. This includes IC supply pins that con-
nect to the switching FET source pins. The IC can be
placedontheoppositesideofthePCBrelativetoabove.
R9 = 24.3k
RRT = 309k (~2 hour timer)
C7 = 0.51µF → 0.56µF (nearest value)
3. Place inductor input as close as possible to switching
FET’s output connection. Minimize the surface area of
this trace. Make the trace width the minimum amount
needed to support current—no copper fills or pours.
Avoid running the connection using multiple layers in
parallel. Minimize capacitance from this node to any
other trace or plane.
Disabling the Thermistor Function
If the thermistor is not needed, connecting a resistor
between DCIN and NTC will disable it. The resistor should
besizedtoprovideatleast10µAwiththeminimumvoltage
applied to DCIN and 10V at NTC. Generally, a 301k resistor
will work for DCIN less than 15V. A 499k resistor is
recommended for DCIN greater than 15V.
4. Place the output current sense resistor right next to
the inductor output but oriented such that the IC’s
currentsensefeedbacktracesgoingtoresistorarenot
long. The feedback traces need to be routed together
asasinglepaironthesamelayeratanygiventimewith
smallest trace spacing possible. Locate any filter
componentonthesetracesnexttotheICandnotatthe
sense resistor location.
Conditioning Depleted Batteries
Severelydepletedbatteries,withlessthan2.5V/cell,should
be conditioned with a trickle charge to prevent possible
damage. This trickle charge is typically 10% of the 1C rate
of the battery. The LTC4007 can automatically trickle
4007i
17
LTC4007
W U U
U
APPLICATIO S I FOR ATIO
5. Place output capacitors next to the sense resistor
9. A good rule of thumb for via count for a given high
current path is to use 0.5A per via. Be consistent.
output and ground.
6. Output capacitor ground connections need to feed
into same copper that connects to the input capacitor
ground before tying back into system ground.
10. If possible, place all the parts listed above on the same
PCB layer.
11. Copper fills or pours are good for all power connec-
tionsexceptasnotedaboveinRule3.Youcanalsouse
copper planes on multiple layers in parallel too—this
helps with thermal management and lower trace in-
ductance improving EMI performance further.
General Rules
7. Connection of switching ground to system ground or
internal ground plane should be single point. If the
system has an internal system ground plane, a good
way to do this is to cluster vias into a single star point
to make the connection.
12. For best current programming accuracy provide a
Kelvin connection from RSENSE to CSP and BAT. See
Figure 12 as an example.
8. Route analog ground as a trace tied back to IC ground
(analog ground pin if present) before connecting to
any other ground. Avoid using the system ground
plane. CAD trick: make analog ground a separate
ground net and use a 0Ω resistor to tie analog ground
to system ground.
It is important to keep the parasitic capacitance on the RT,
CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.
Q3
INPUT SWITCH
DCIN
0V TO 20V
3A
C1
R1
4.9k
1%
0.1µF
3C4C
DCIN
INFET
CLP
V
*
*
LOGIC
R
CL
R10
R11
R12
0.033Ω
C4
15nF
CHEM
LOBAT
100k 100k 100k
1%
SYSTEM
LOAD
LOBAT
C2
20µF
LTC4007
I
I
CLN
CL
CL
R
SENSE
L1
0.033Ω
ACP
SHDN
FAULT
CHG
ACP
TGATE
BGATE
PGND
CSP
Q1
Q2
15µH 3A
1%
BAT
SHDN
FAULT
CHG
D1
C3
R4
3.01k
1%
20µF
FLAG
FLAG
NTC
BAT
R9 32.4k 1%
R5 3.01k 1%
PROG
ITH
R
T
MONITOR
(CHARGING
CURRENT
MONITOR)
C7
0.47µF
R6
26.7k
1%
R7
*PIN OPEN
D1: MBRM140T3
Q1: Si4431ADY
Q2: FDC645N
Q4: 2N7002 OR BSS138
GND
THERMISTOR
C5
6.04k
0.0047µF
1%
R
T
309k
1%
TIMING RESISTOR
(~2 HOURS)
R14
73.2k
1%
C6
0.12µF
Q4
4007 F11
Figure 11. Circuit Application (16.8V/3A) to Automatically Trickle Charge Depleted Batteries
4007i
18
LTC4007
W U U
U
APPLICATIO S I FOR ATIO
SWITCH NODE
L1
DIRECTION OF CHARGING CURRENT
V
BAT
HIGH
FREQUENCY
CIRCULATING
PATH
R
SENSE
C2
D1
V
IN
C3
BAT
4007 F13
BAT
CSP
4007 F12
Figure 12. High Speed Switching Path
Figure 13. Kelvin Sensing of Charging Current
U
PACKAGE DESCRIPTION
GN Package
24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.337 – .344*
(8.560 – 8.738)
.033
(0.838)
REF
24 23 22 21 20 19 18 17 16 15 14 13
.045 ±.005
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.254 MIN
.150 – .165
1
2
3
4
5
6
7
8
9 10 11 12
.0165 ±.0015
.0250 TYP
RECOMMENDED SOLDER PAD LAYOUT
.015 ± .004
(0.38 ± 0.10)
.053 – .068
(1.351 – 1.727)
.004 – .0098
(0.102 – 0.249)
× 45°
.007 – .0098
(0.178 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.008 – .012
(0.203 – 0.305)
.0250
(0.635)
BSC
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
GN24 (SSOP) 0502
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
4007i
19
LTC4007
U
TYPICAL APPLICATIO
12.6V, 4A Li-Ion Battery Charger
Q3
INPUT SWITCH
DCIN
0V TO 20V
3A
C1
R1
0.1µF
4.9k
1%
3C4C
DCIN
INFET
CLP
V
LOGIC
R
CL
R10
R11
R12
0.033Ω
C4
15nF
CHEM
LOBAT
*
100k 100k 100k
1%
SYSTEM
LOAD
LOBAT
C2
20µF
LTC4007
I
I
CLN
CL
CL
R
SENSE
L1
10µH 4A
0.025Ω
ACP
SHDN
FAULT
CHG
ACP
TGATE
BGATE
PGND
CSP
Q1
Q2
1%
BAT
SHDN
FAULT
CHG
D1
C3
20µF
R4
3.01k 1%
FLAG
FLAG
NTC
BAT
R9 32.4k 1%
R5 3.01k 1%
PROG
ITH
CHARGING
CURRENT
MONITOR
R
T
THERMISTOR
C7
0.47µF
C5
0.0047µF
R7
10k
NTC
GND
6.04k
*PIN OPEN
1%
C6
0.12µF
R
D1: MBRS130T3
Q1: Si4431ADY
Q2: FDC645N
R
RT
PROG
26.7k
1%
TIMING RESISTOR
(~2 HOURS)
309k
1%
4007 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT®1511
Constant-Current/Constant-Voltage 3A Battery
Charger with Input Current Limiting
High Efficiency Current Mode PWM with 4A Internal Switch
LT1513
SEPIC Constant- or Programmable-Current/
Constant-Voltage Battery Charger
Charger Input Voltage May Be Higher, Equal to or Lower Than Battery Voltage;
Charges Any Number of Cells Up to 20V, 500kHz Switching Frequency
LT1571
1.5A Switching Charger
1- or 2-Cell Li-Ion, 500kHz or 200kHz Switching Frequency, Termination Flag
LTC1628-PG
LTC1709
2-Phase, Dual Synchronous Step-Down Controller
Minimizes C and C , Power Good Output, 3.5V ≤ V ≤ 36V
IN OUT IN
2-Phase, Dual Synchronous Step-Down Controller
with VID
Up to 42A Output, Minimum C and C , Uses Smallest Components for
IN OUT
Intel and AMD Processors
LTC1729
LT1769
2A Switching Battery Charger
Constant-Current/Constant-Voltage Switching Regulator, Input Current
Limiting Maximizes Charge Current
LTC1778
LTC1960
LTC3711
LTC4006
Wide Operating Range, No R
Step-Down Controller
Synchronous
2% to 90% Duty Cycle at 200kHz, Stable with Ceramic C
OUT
SENSE
Dual Battery Charger/Selector with SPI Interface
Simultaneous Charge or Discharge of Two Batteries, DAC Programmable
Current and Voltage, Input Current Limiting Maximizes Charge Current
No R
TM Synchronous Step-Down Controller
3.5V ≤ V ≤ 36V, 0.925V ≤ V
≤ 2V, for Transmeta, AMD and Intel
SENSE
with VID
IN
OUT
Mobile Processors
Small, High Efficiency, Fixed Voltage,
Lithium-Ion Battery Charger
Constant-Current/Constant-Voltage Switching Regulator with Termination
Timer, AC Adapter Current Limit and Thermistor Sensor in a Small
16-Pin Package
LTC4008
High Efficiency, Programmable Voltage/Current
Battery Charger
Constant-Current/Constant-Voltage Switching Regulator, Resistor Voltage/
Current Programming, AC Adapter Current Limit and Thermistor Sensor
No R
is a trademark of Linear Technology Corporation.
SENSE
4007i
LT/TP 0103 1.5K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
LINEAR TECHNOLOGY CORPORATION 2003
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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