LTC4263IDE-1-PBF [Linear]
High Power Single PSE Controller with Internal Switch; 高功率单PSE控制器，内置开关
| 型号： | LTC4263IDE-1-PBF |
| 厂家： | 
Linear |
| 描述： | High Power Single PSE Controller with Internal Switch |
| 文件： | 总20页 (文件大小：286K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4263-1
High Power
Single PSE Controller
with Internal Switch
FEATURES
DESCRIPTION
The LTC®4263-1 is a high power, single PSE controller for
use in Power over Ethernet systems. The internal current
limit and short-circuit protection are designed to provide
up to 30W of PSE output power for power hungry PoE
applications such as WAPs, security cameras and RFID
readers.
n
30W PSE Output Power
IEEE 802®.3af Compatible
n
n
Operation from a Single 56V Supply
n
Fully Autonomous Operation Without a
Microcontroller
n
Internal MOSFET with Thermal Protection
n
Precision Inrush Control with Internal Sense Resistor
TheLTC4263-1includesIEEE802.3afcompliantPDdetec-
tion circuitry along with selectable AC and DC disconnect
sensing, allowing seamless operation in conventional
IEEE 802.3af systems as well as propriety, high power
applications. The LTC4263-1 simplifies PSE implementa-
tion, needing only a single supply and a small number of
passivesupportcomponents.Onboardcontrolalgorithms
provide complete PSE functionality without the need of a
microcontrollerandbuilt-infoldbackandthermalshutdown
provide comprehensive fault protection. An LED pin indi-
cates the state of the port and detection backoff timing is
configurable for either endpoint or midspan operation.
n
Forced Current PD Detection for Noise Immunity
n
AC and DC Disconnect Sensing
n
Legacy PD Detection
n
Robust Short-Circuit Protection
n
Pin-Selectable Detection Backoff for Midspan PSEs
n
LED Driver Indicates Port On and Blinks
Status Codes
n
Available in a Miniature14-Pin 4mm × 3mm DFN
Package
APPLICATIONS
n
High Power Endpoint/Midspan PSEs
The LTC4263-1 is available in a miniature 14-pin 4mm ×
3mm DFN package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
n
Single-Port or Multi-Port Power Injectors
n
Low Port Count PSEs
n
Environment B PSEs
n
Standalone PSEs
TYPICAL APPLICATION
Single-Port Fully Autonomous High Power PSE
1A
+
0.1μF
100V
0.1μF
100V
LTC4263-1
LED
V
DD5
ISOLATED
56V SUPPLY
TO PORT
MAGNETICS
0.1μF
LEGACY
MIDSPAN
V
SS
SMAJ58A
SD
DD48
OUT
V
V
V
V
SS
SS
SS
–
42631 TA01
OUT
ACOUT
OSC
42631fa
1
LTC4263-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1, Note 2)
TOP VIEW
Supply Voltages
V
V
– V
........................................... 0.3V to –80V
SS
DD5
DD48
LED
LEGACY
1
2
3
4
5
6
7
14
13
V
V
DD5
........................................V – 0.3V to V + 6V
SS
SS
SS
MIDSPAN
12 SD
11
10 OUT
Pin Voltages and Currents
LEGACY, MIDSPAN, SD, OSC ..V – 0.3V to V +6V
15
V
SS
V
SS
V
SS
V
DD48
SS
SS
LED.......................................V – 0.3V to V + 80V
SS
SS
9
8
OUT
OUT, ACOUT............................................ (See Note 3)
OSC
ACOUT
Operating Ambient Temperature Range
DE14 PACKAGE
14-LEAD (4mm s 3mm) PLASTIC DFN
LTC4263CDE-1............................................ 0°C to 70°C
LTC4263IDE-1......................................... –40°C to 85°C
Junction Temperature (Note 4) ............................. 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
T
JMAX
= 125°C, θ = 43°C/W, θ = 4.3°C/W
JA JC
EXPOSED PAD (PIN 15) IS V , MUST BE SOLDERED TO PCB
SS
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4263CDE-1#PBF
LTC4263IDE-1#PBF
LTC4263CDE-1#TRPBF
LTC4263IDE-1#TRPBF
42631
42631
0°C to 70°C
–40°C to 85°C
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD48 – VSS = 48V and VDD5 not driven externally. All voltages are
relative to VSS unless otherwise noted. (Note 2, Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Power Supplies
l
V
Supply Voltage
V
– V
SS
33
48
56
66
V
V
SUPPLY
DD48
30W Output Power
l
l
l
l
l
l
V
V
V
V
V
UVLO Turn-Off Voltage
UVLO Hysteresis
V
– V Decreasing
29
0.1
66
31
33
1
V
V
V
V
V
V
UVLO_OFF
UVLO_HYS
OVLO_OFF
OVLO_HYS
DD5
DD48
DD48
SS
OVLO Turn-Off Voltage
OVLO Hysteresis
V
– V Increasing
70
74
2
SS
0.2
4.5
4.3
V
DD5
V
DD5
V
DD48
Supply Voltage
Internal Supply
Driven Externally
Driven Internally
5
5.5
4.5
4.4
l
l
I
I
Supply Current
V
– V = 5V
1
2
1
2
4
2
mA
mA
mA
DD48
DD5
SS
Internal V
DD5
l
V
DD5
Supply Current
V
DD5
– V = 5V
DD5
SS
42631fa
2
LTC4263-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD48 – VSS = 48V and VDD5 not driven externally. All voltages are
relative to VSS unless otherwise noted. (Note 2, Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Power MOSFET
R
On-Resistance
I = 350mA, Measured From OUT to V
1.5
2.4
3.0
10
Ω
Ω
μA
ON
SS
l
l
I
OUT Pin Leakage
V
OUT
– V = V
– V = 57V
1
OUT_LEAK
SS
DD48
SS
l
R
OUT Pin Pull-Up Resistance to V
0V ≤ (V
– V ) ≤ 5V
360
540
500
640
kΩ
PU
DD48
DD48
OUT
Current Control
l
I
I
Overload Current Threshold
Short-Circuit Current Limit
570
600
mA
CUT
LIM
l
l
V
V
– V = 5V
DD48
615
615
645
645
675
675
mA
mA
OUT
SS
– V
= 30V
OUT
l
l
I
Foldback Current Limit
V
DD48
V
DD48
– V
– V
= 0V (Note 6)
= 10V
45
165
90
220
180
275
mA
mA
FB
OUT
OUT
l
l
I
I
DC Disconnect Current Threshold
High Speed Fault Current Limit
5.2
7.5
9.8
mA
mA
MIN
(Note 7)
750
1000
1200
FAULT
Detection
l
l
I
Detection Current
First Point, V
– V = 10V
OUT
DD48
235
160
255
180
275
200
μA
μA
DET
DD48
Second Point, V
– V
= 3.5V
OUT
l
V
Detection Voltage Compliance
V
DD48
V
DD48
– V , Open Port
21
V
DET
OUT
– V = 57V
SS
l
l
l
R
R
R
Minimum Valid Signature Resistance
Maximum Valid Signature Resistance
Open-Circuit Threshold
15.5
27.5
500
17
18.5
32
kΩ
kΩ
kΩ
DETMIN
DETMAX
OPEN
29.7
2000
AC Disconnect
l
l
l
l
l
l
l
R
OSC Pin Input Impedance
OSC Pin Output Current
2V ≤ (V
– V ) ≤ 3V
175
–140
103
0.95
–1
250
325
140
115
1.05
1
kΩ
μA
Hz
OSC
OSC
SS
I
f
V
– V = 2V
SS
OSC
OSC
OSC
OSC
OSC Pin Frequency
V
– V = 2V
110
1.0
SS
A
VACD
Voltage Gain OSC to ACOUT
AC Disconnect Output Current
Remain Connected AC Pin Current
AC Disconnect Enable Signal
2V ≤ (V
– V ) ≤ 3V
V/V
mA
μA
V
OSC
SS
I
I
V
OSC
V
OSC
V
OSC
– V = 2V, 0V ≤ (V
– V ) ≤ 4V
ACOUT SS
ACDMAX
ACDMIN
SS
– V = 2V
130
1.5
160
1.1
190
SS
V
– V , Port On
SS
ACDEN
Digital Interface (Note 8)
l
V
OLED
V
ILD
LED Output Low Voltage
Digital Input Low Voltage
I
= 10mA
2.2
V
LED
l
l
MIDSPAN, SD
LEGACY
0.8
0.4
V
V
l
l
V
Digital Input High Voltage
MIDSPAN, SD
LEGACY
2.2
2.2
V
V
IHD
l
l
l
V
Voltage of Legacy Pin if Left Floating
Current In/Out of Legacy Pin
1.1
–60
–10
1.25
1.4
60
10
V
μA
μA
OZ
I
I
0V ≤ (V – V ) ≤ 5V
LEGACY SS
OLEG
FLT
Maximum Allowed Leakage at Legacy
Pin When Floating
42631fa
3
LTC4263-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD48 – VSS = 48V and VDD5 not driven externally. All voltages are
relative to VSS unless otherwise noted. (Note 2, Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Timing Characteristics
l
l
l
l
t
t
t
t
Detection Time
Beginning to End of Detection
270
300
135
40
290
310
620
155
ms
ms
ms
μs
DET
Detection Delay
PD Insertion to Detection Complete
End of Valid Detect to Application of Power
DETDLY
PON
Power Turn-On Delay
Turn-On Rise Time
145
170
V
C
– V : 10% to 90%
OUT
RISE
DD48
PSE
= 0.1μF
l
l
l
t
t
t
Overload/Short-Circuit Time Limit
Error Delay
52
3.8
320
62
4.0
350
72
4.2
380
ms
s
OVLD
I
Fault to Next Detect
ED
CUT
Maintain Power Signature (MPS)
Disconnect Delay
PD Removal to Power Removal
ms
MPDO
l
t
MPS Minimum Pulse Width
PD Minimum Current Pulse Width
Required to Stay Connected (Note 9)
20
ms
MPS
l
l
t
t
Midspan Mode Detection Backoff
Power Removal Detection Delay
3.0
0.8
3.2
3.4
1.1
s
s
R
PORT
= 15.5kΩ
DBO
0.95
DISDLY
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 6: In order to reduce power dissipated in the switch while charging
the PD, the LTC4263-1 reduces the current limit when V – V is large.
Refer to the Typical Performance Characteristics for more information.
OUT
SS
Note 7: The LTC4263-1 includes a high-speed current limit circuit
Note 2: All currents into device pins are positive; all currents out of device
intended to protect against faults. The fault protection is activated
pins are negative. All voltages are referenced to V unless otherwise
for port current in excess of I . After the high-speed current limit
FAULT
SS
specified.
activates, the short-circuit current limit (I ) engages and restricts
current to IEEE 802.3af levels.
LIM
Note 3: 80mA of current may be pulled from the OUT or ACOUT pin
without damage whether the LTC4263-1 is powered or not. These pins will
also withstand a positive voltage of V + 80V.
Note 8: The LTC4263-1 digital interface operates with respect to V
.
SS
All logic levels are measured with respect to V
.
SS
SS
Note 9: The IEEE 802.3af specification allows a PD to present its
Maintain Power Signature (MPS) on an intermittent basis without being
disconnected. In order to stay powered, the PD must present the MPS for
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
t
within any t
time window.
MPS
MPDO
Note 5: The LTC4263-1 operates with a negative supply voltage. To avoid
confusion, voltages in this data sheet are referred to in terms of absolute
magnitude.
42631fa
4
LTC4263-1
TYPICAL PERFORMANCE CHARACTERISTICS
Powering a Legacy PD with
470μF Bypass Capacitor
Overload Restart Delay
Powering an IEEE 802.3af PD
V
V
V
DD48
DD48
DD48
POWER
ON
V
OUT
t
ED
20V/DIV
DETECTION DETECTION
PHASE 1 PHASE 2
V
OUT
V
SS
V
OUT
10V/DIV
LOAD
570mA CURRENT LIMIT
FOLDBACK
10V/DIV
FULLY
600mA
I
300mA/DIV
CHARGED
V
OUT
V
SS
SS
I
PORT
0mA
1A/DIV
42631 G10
42631 G01
42631 G02
100ms/DIV
500ms/DIV
25ms/DIV
Response to PD Removal with
AC Disconnect Enabled
Midspan Backoff with Invalid PD
Overcurrent Response Time
V
V
V
DD48
DD48
DD48
t
DBO
V
OUT
20V/DIV
PORT OFF
V
OUT
V
SS
10V/DIV
V
OUT
2V/DIV
PD REMOVAL
PORT OFF
600mA
OUT
300mA/DIV
0mA
I
t
V
OVLD
SS
t
LOAD
MPDO
R
PORT
= 15.5k
APPLIED
42631 G11
42631 G12
42631 G13
500ms/DIV
10ms/DIV
50ms/DIV
Rapid Response to
Momentary 33Ω Short
Rapid Response to 1Ω Short
V
V
DD48
DD48
V
V
OUT
OUT
20V/DIV
20V/DIV
I
= CURRENT IN
V
V
PORT
SS
SS
33Ω SHORT APPLIED
1Ω RESISTOR APPLIED
TO OUTPUT OF CIRCUIT
ON FRONT PAGE
SHORT
REMOVED
CURRENT
LIMIT ACTIVE
600mA
PORT
300mA/DIV
0mA
1Ω SHORT
APPLIED
I
20A
I
PORT
20A/DIV
0A
FOLDBACK CURRENT LIMIT
100μs/DIV
42631 G14
42631 G15
1μs/DIV
I
= CURRENT IN 33Ω RESISTOR APPLIED
PORT
TO OUTPUT OF CIRCUIT ON FRONT PAGE
42631fa
5
LTC4263-1
TYPICAL PERFORMANCE CHARACTERISTICS
IDD48 DC Supply Current vs Supply
Voltage with Internal VDD5
LED Pin Pull-Down
Current Limit and Foldback
vs Load Current
675
600
525
450
375
300
225
150
75
4
3
2
1
0
2.5
2.0
1.5
1.0
0.5
0
T
= 25°C
T
= 25°C
A
A
25k LOAD WITH
AC ENABLED
INTERNAL V
DD5
NO LOAD
0
0
5
10 15 20 25
50
0
10
20
30
40
50
0
10
20
30
40
50
60
30 35 40 45
(V)
V
– V
I
LOAD CURRENT (mA)
V
(V)
DD48
LED
DD48
OUT
42631 G03
42631 G04
42631 G07
IDD48 DC Supply Current vs
Supply Voltage with VDD5 = 5V
IDD5 DC Supply Current
vs Supply Voltage
1.2
2
1
25k LOAD WITH
AC ENABLED
T
= 25°C
V
= 48V
A
DD48
25k LOAD WITH
AC ENABLED
1.0
0.8
0.6
0.4
0.2
0
NO LOAD
0
NO LOAD
–1
–2
–3
0
10
20
30
40
50
60
4.0
4.5
5.0
(V)
5.5
6.0
V
(V)
V
DD48
DD5
42631 G08
42631 G09
RON vs Temperature
Legacy Pin Current vs Voltage
2.0
1.8
1.6
1.4
1.2
1.0
40
20
LEGACY MODE
FORCE POWER ON MODE
0
–20
–40
COMPLIANT DETECTION MODE
0
1
2
3
4
5
–40 –20
0
20
40
60
80 100
TEMPERATURE (°C)
V
(V)
LEGACY
42631 G17
42631 G16
42631fa
6
LTC4263-1
TEST TIMING
Detect and Turn-On Timing
Current Limit Timing
PD
INSERTED
I
LIM
I
CUT
I
OUT
t
V
OVLD
DD48
V
DD48
t
V
DET
OUT
42631 TT02
V
SS
V
OUT
PORT
TURN-ON
t
t
PON
DETDLY
42631 TT01
DC Disconnect Timing
AC Disconnect Timing
I
I
V
V
MIN
OUT
OSC
V
V
DD48
DD48
V
V
OUT
OUT
SS
t
t
MPDO
MPS
V
SS
42631 TT03
I
ACDMIN
I
ACOUT
PD REMOVED
t
MPDO
42631 TT04
42631fa
7
LTC4263-1
PIN FUNCTIONS
LED (Pin 1): Port State LED Drive. This pin is an open-
drain output that pulls down when the port is powered.
Under port fault conditions, the LED will flash in patterns
toindicatethenatureoftheportfault. SeetheApplications
Information section for a description of these patterns.
When the LTC4263-1 is operated from a single 48V sup-
ply, this pin is pulsed low with a 6% duty cycle during
the periods when the LED should be on. This allows use
of a simple inductor, diode, and resistor circuit to avoid
ACOUT (Pin 8): AC Disconnect Sense. Senses the port
to determine whether a PD is still connected when in AC
disconnect mode. If port capacitance drops below about
0.15μF for longer than T
the port is turned off. If
MPDO
AC disconnect is used, connect this pin to the port with
a series combination of a 1k resistor and a 0.47μF 100V
X7R capacitor. See the Applications Information section
for more information.
OUT (Pins 9, 10): Port Output. If DC disconnect is used,
these pins are connected to the port. If AC disconnect is
used,thesepinsareconnectedtotheportthroughaparallel
combination of a 1A diode and a 500k resistor. Pins 9 and
10shouldbetiedtogetheronthePCB.SeetheApplications
Information section for more information.
excess heating due to the large voltage drop from V
See the Applications Information section for details on
this circuit.
.
DD48
LEGACY (Pin 2): Legacy Detect. This pin controls whether
legacy detect is enabled. If held at V , legacy detect is
DD5
enabled and testing for a large capacitor is performed to
detect the presence of a legacy PD on the port. See the
ApplicationsInformationsectionfordescriptionsoflegacy
V
(Pin 11): Power Return for V . Must be bypassed
SS
DD48
witha0.1μFcapacitortoV .Foroptimumpowerdelivery,
SS
supply voltage should be maximized. See Applications
Information section for more information.
PDs that can be detected. If held at V , only IEEE 802.3af
SS
compliant PDs are detected. If left floating, the LTC4263-1
enters force-power-on mode and any PD that generates
between 1V and 10V when biased with 270μA of detection
current will be powered as a legacy device. This mode is
useful if the system uses a differential detection scheme
to detect legacy devices.
SD (Pin 12): Shutdown. If held low, the LTC4263-1 is
preventedfromperformingdetectionorpoweringtheport.
Pulling SD low will turn off the port if it is powered. When
released, a 4-second delay will occur before detection is
attempted. If not used, tie to V
.
DD5
V
(Pin 14): Logic Power Supply. Apply 5V referenced
SS
MIDSPAN(Pin3):MidspanEnable.Ifthispinisconnected
DD5
to V , if such a supply is available, or place a 0.1μF
to V , Midspan backoff is enabled and a 3.2 second
DD5
bypass capacitor to V to enable the internal regulator.
delay occurs after every failed detect cycle unless the
SS
When the internal regulator is used, this pin should only
result is open circuit. If held at V , no delay occurs after
SS
be connected to the bypass capacitor and to any logic pins
failed detect cycles.
of the LTC4263-1 that are being held at V
.
DD5
V
SS
(Pins 4, 5, 6, 13): Negative Power Supply. Pins 4, 5,
Exposed Pad (Pin 15): V . Must be connected to V
6 and 13 should be tied together on the PCB. For optimum
power delivery, supply voltage should be maximized. See
Applications Information section for more information.
SS
SS
on the PCB. The Exposed Pad acts as a heat sink for the
internal MOSFET.
OSC (Pin 7) Oscillator for AC Disconnect. If AC discon-
nect is used, connect a 0.1μF X7R capacitor from OSC to
V . Tie OSC to V to disable AC disconnect and enable
SS
SS
DC disconnect.
42631fa
8
LTC4263-1
BLOCK DIAGRAM
1A
V
DD48
11
14
SD
12
2
0.1μF
V
DD5
5V REG
INT5 EXT5
V
DD5
R
LED
LEGACY
MIDSPAN
3
+
56V
–
1
3
LED
TO PORT
MAGNETICS
500k
CONTROL
+
5V
–
SMAJ58A
I
DET
Hot SwapTM
500k
13
4
9
5
6
10
V
OUT
SS
0.47μF
0.1μF
1k
7
8
OSC
ACOUT
42631 BD
BOLD LINES INDICATE HIGH CURRENT
Hot Swap IS A TRADEMARK OF LINEAR TECHNOLOGY CORPORATION
42631fa
9
LTC4263-1
APPLICATIONS INFORMATION
POE OVERVIEW
A PSE is required to provide 44V to 57V DC between
either the signal pairs or the spare pairs as shown in
Figure 1. The power is applied as a voltage between two
of the pairs, typically by powering the center taps of the
isolation transformers used to couple the differential
data signals to the wire. Since Ethernet data is trans-
former coupled at both ends and is sent differentially,
a voltage difference between the transmit pairs and the
receive pairs does not affect the data. A 10Base-T/
100Base-TXEthernetconnectiononlyusestwoofthefour
pairs in the cable. The unused or spare pairs can option-
ally be powered directly, as shown in Figure 1, without
affecting the data. 1000Base-T uses all four pairs and
power must be connected to the transformer center taps
if compatibility with 1000Base-T is required.
Overtheyears,twisted-pairEthernethasbecomethemost
commonly used method for local area networking. The
IEEE 802.3 group, the originator of the Ethernet standard,
has defined an extension to the standard, IEEE 802.3af,
which allows DC power to be delivered simultaneously
over the same cable used for data communication. This
has enabled a whole new class of Ethernet devices, in-
cluding IP telephones, wireless access points, and PDA
charging stations which do not require additional AC
wiringorexternalpowertransformers, a.k.a. “wallwarts.”
Thesesmalldatadevicescannowbepowereddirectlyfrom
their Ethernet connection. Sophisticated detection and
power monitoring techniques prevent damage to legacy
data-only devices while still supplying power to newer,
Ethernet-powered devices over the twisted-pair cable.
The LTC4263-1 provides a complete high power PSE
solution for powering newer power hungry PDs such as
dual-radio wireless access points, security cameras and
RFIDreaders.Withpropersystemdesign,proprietaryhigh
powerPoEsolutionsusingtheLTC4263-1candeliver25W
(min) to a high power 2-pair PD at the end of a 100 meter
CAT5 cable and 50W (min) using a 4-pair solution.
The device that supplies power is called the Power Sourc-
ing Equipment (PSE). A device that draws power from the
wire is called a Powered Device (PD). A PSE is typically an
Ethernet switch, router, hub, or other network switching
equipment that is commonly found in the wiring closets
where cables converge. PDs can take many forms. Digital
IP telephones, wireless network access points, PDA or
notebookcomputerdockingstations,cellphonechargers,
and HVAC thermostats are examples of devices that can
draw power from the network.
The LTC4263-1 provides a high power PSE solution while
simultaneouslybeingcompatiblewithexistingIEEE802.3af
systems. By maintaining a compliant detection protocol,
the LTC4263-1 insures legacy data-only devices are not
PSE
PD
CAT 5
CABLE
RJ45
4
RJ45
4
5
5
1N4002
s4
SPARE PAIR
+
0.1μF
0.1μF
1
1
V
DD48
SMAJ58A
58V
Tx
Rx
Tx
C
≥ 5mF
IN
2
3
2
3
DATA PAIR
DATA PAIR
LTC4263-1
56V
V
DD5
0.1μF
1N4002
s4
Rx
GND
CLASS
–48V
OUT
6
6
0.1μF
R
+
SMAJ58A
58V
LTC4264-BASED
PD/SWITCHER
–
OUT
V
OUT
V
SS
OUT
7
6
7
–48V
–
IN
6
SPARE PAIR
42631 F01
Figure 1. 2-Pair High Power PoE System Diagram
42631fa
10
LTC4263-1
APPLICATIONS INFORMATION
accidentally powered. Disconnect with either AC or DC
methods using the LTC4263-1 is fully compliant and
insures safe power removal after PD disconnect. Com-
mand and control for the LTC4263-1 is handled internally
without the need of a microcontroller, thereby simplifying
system design.
255
180
FIRST
DETECTION
POINT
|
25k SLOPE
SECOND
DETECTION
POINT
VALID PD
LTC4263-1 OPERATION
Signature Detection
0V-2V
OFFSET
VOLTAGE
42631 F03
The IEEE 802.3af specification defines a specific pair-to-
pair signature resistance used to identify a device that
can accept power via its Ethernet connection. When the
port voltage is below 10V, an IEEE 802.3af compliant
PD will have an input resistance of approximately 25kΩ.
Figure 2 illustrates the relationship between the PD sig-
nature resistance and the required resistance ranges the
PSEmustacceptandreject. AccordingtotheIEEE802.3af
specification, the PSE must accept PDs with signatures
between 19kΩ and 26.5kΩ and may or may not accept
resistancesinthetworangesof15kΩto19kΩand26.5kΩ
to 33kΩ. The black box in Figure 2 represents the typical
150Ω pair-to-pair termination used in Ethernet devices
like a computer’s network interface card (NIC) that cannot
accept power.
Figure 3. PD 2-Point Detection
The LTC4263-1 uses a force-current detection method in
ordertoreducenoisesensitivityandprovideamorerobust
detection algorithm. The first test point is taken by forcing
a test current into the port, waiting a short time to allow
the line to settle and measuring the resulting voltage. This
result is stored and the second current is applied to the
port, allowed to settle and the voltage measured.
The LTC4263-1 will not power the port if the PD has more
than5μFinparallelwithitssignatureresistorunlesslegacy
mode is enabled.
The LTC4263-1 autonomously tests for a valid PD con-
nected to the port. It repeatedly queries the port every
580ms, or every 3.2s if midspan backoff mode is active
(see below). If detection is successful, it then powers up
the port.
RESISTANCE 0Ω
10k
20k
30k
23.75k 26.25k
150Ω (NIC)
REJECT
PD
PSE
ACCEPT
REJECT
33k
15k 19k
26.5k
42631 F02
Midspan Backoff
IEEE802.3afrequiresthemidspanPSEtowaittwoseconds
after a failed detection before attempting to detect again
unless the port resistance is greater than 500kΩ. This
requirementistopreventtheconditionofanendpointPSE
andamidspanPSE, connectedtothesamePDatthesame
time, from each corrupting the PD signature and prevent-
ing power-on. After the first corrupted detection cycle, the
midspan PSE waits while the endpoint PSE completes
detection and turns the port on. If the midspan mode of
the LTC4263-1 is enabled by connecting the MIDSPAN
Figure 2. IEEE 802.3af Signature Resistance Ranges
The LTC4263-1 checks for the signature resistance by
forcing two test currents on the port in sequence and
measuringtheresultingvoltages. Itthensubtractsthetwo
V-I points to determine the resistive slope while remov-
ing voltage offset caused by any series diodes or current
offset caused by leakage at the port (see Figure 3). The
LTC4263-1willtypicallyacceptanyPDresistancebetween
17kΩ and 29.7kΩ as a valid PD. Values outside this range
(excluding open and short-circuits) are reported to the
user by a code flashed via the LED pin.
pin to V , a 3.2 second delay occurs after every failed
DD5
detect cycle unless the result is an open circuit.
42631fa
11
LTC4263-1
APPLICATIONS INFORMATION
Power Control
riseuntilthePDreachesitsinputturn-onthreshold.Atthis
point, the PD begins to draw current to charge its bypass
capacitance, slowing the rate of port voltage increase.
The primary function of the LTC4263-1 is to control the
delivery of power to the PSE port. In order to provide
a robust solution, a variety of current limit and current
monitoring functions are needed, as shown in Figure 4. All
control circuitry is integrated and the LTC4263-1 requires
no external MOSFET, sense resistor, or microcontroller.
If at any time the port is shorted or an excessive load
is applied, the LTC4263-1 limits port current to avoid a
hazardous condition. The current is limited to I for port
LIM
voltages above 30V and is reduced for lower port voltages
(see the Foldback section). Inrush and short-circuit cur-
rent limit are allowed to be active for 62ms (typ) before
the port is shut off.
The LTC4263-1 includes an internal MOSFET for driving
thePSEport. TheLTC4263-1drivesthegateoftheinternal
MOSFET while monitoring the current and the output volt-
age at the OUT pin. This circuitry couples the 56V input
supply to the port in a controlled manner that satisfies
the PD’s power needs while minimizing disturbances on
the 56V backplane.
Port Fault
Iftheportissuddenlyshorted, theinternalMOSFETpower
dissipationcanrisetoveryhighlevelsuntiltheshort-circuit
current limit circuit can respond. A separate high-speed
current limit circuit detects severe fault conditions
(
I
>
OUT
750mA
1000mA(typ)
)
andquicklyturnsofftheinternalMOSFETif
CURRENT LIMIT
suchaneventoccurs.ThecircuitthenlimitscurrenttoI
LIM
PORT OFF IN t
600mA
450mA
300mA
150mA
0mA
OVLD
while the t
LIM
timer increments. During a short-circuit,
OVLD
I
will be reduced by the foldback circuitry.
NORMAL
OPERATION
t
Timing
OVLD
For overload, inrush, and short-circuit conditions, the
LTC4263-1 includes a 62ms (typ) t timer to limit the
OVLD
DC DISCONNECT
PORT OFF IN t
MPDO
duration of these events. The timer is incremented when-
DC DISCONNECT CUT
(I (I
LIMIT
(I
)
)
)
LIM
42631 F07
MIN
CUT
ever current greater than I flows through the port. If
CUT
thecurrentisstillaboveI whenthet
timerexpires,
CUT
OVLD
Figure 4. Current Thresholds and Current Limits
the LTC4263-1 will turn off power to the port and flash the
LED. In this situation, the LTC4263-1 waits four seconds
and then restarts detection. If the overload condition is
Port Overload
BasedontheIEEE802.3afstandard,theLTC4263-1detects
port overload conditions by monitoring port current. This
ensures the port stays within the designed continuous
power budget while allowing for brief power surges. If
the port current exceeds 570mA (typ) for greater than
62ms (typ), power is removed and the LTC4263-1 waits
4 seconds (typ) before returning to detection mode.
removed before the t
timer expires, the port stays
OVLD
powered and the timer is reset.
Foldback
Foldback is designed to limit power dissipation in the
LTC4263-1 during power-up and momentary short-cir-
cuit conditions. At low port output voltages, the voltage
across the internal MOSFET is high, and power dissipa-
tion will be large if significant current is flowing. Foldback
Port Inrush and Short-Circuit
When 56V power is applied to the port, the LTC4263-1 is
designed to power-up the PD in a controlled manner with-
out causing transients on the input supply. To accomplish
this, the LTC4263-1 implements inrush current limit. At
turn-on, current limit will allow the port voltage to quickly
monitors the port output voltage and reduces the I
LIM
current limit level for port voltages of less than 28V, as
shown in Figure 5.
42631fa
12
LTC4263-1
APPLICATIONS INFORMATION
750
If the undercurrent condition goes away before t
MPDO
(
350ms (typ)), the timer is reset to zero. The DC discon-
600
450
nect circuit includes a glitch filter to prevent noise from
falsely resetting the timer. The current must be present for
a period of at least 20ms to guarantee reset of the timer.
To enable DC disconnect, tie the OSC pin to V .
SS
300
150
0
AC Disconnect
AC disconnect is an alternate method of sensing the pres-
enceorabsenceofaPDbymonitoringtheportimpedance.
The LTC4263-1 forces an AC signal from an internal sine
wave generator on to the port. The ACOUT pin current is
0
5
10 15 20 25 30 35 40 45 50
– V (V)
V
DD48
OUT
42631 F07
then sampled once per cycle and compared to I
.
Figure 5. Current Limit Foldback
ACDMIN
Like DC disconnect, the AC disconnect sensing circuitry
controls the t disconnect timer. When the connection
Thermal Protection
MPDO
impedance rises due to the removal of the PD, AC peak
currentfallsbelowI andthedisconnecttimerincre-
The LTC4263-1 includes thermal overload protection in
order to provide full device functionality in a miniature
package while maintaining safe operating temperatures.
Several factors create the possibility for very large power
dissipation within the LTC4263-1. At port turn-on, while
ACDMIN
ments. If the impedance remains high (AC peak current
remains below I ), the disconnect timer counts to
ACDMIN
t
and the port is turned off. If the impedance falls,
causing AC peak current to rise above I
MPDO
for two
ACDMIN
I
is active, the instantaneous power dissipated by the
LIM
consecutive samples before the maximum count of the
disconnect timer, the timer resets and the port remains
powered.
LTC4263-1 can be as high as 18W. This can cause 40ºC or
moreofdieheatinginasingleturn-onsequence.Similarly,
excessive heating can occur if an attached PD repeatedly
pushes the LTC4263-1 into I
current. Excessive heating can also occur if the V
is shorted or overloaded.
by drawing too much
LIM
TheACdisconnectcircuitrysensestheportviatheACOUT
pin
DD5
pin. Connect a 0.47μF 100V X7R capacitor (C ) and a 1k
DET
resistor (R ) from the DETECT pin to the port output as
DET
shown in Figure 6. This provides an AC path for sensing
The LTC4263-1 protects itself from thermal damage by
monitoringdietemperature.Ifthedietemperatureexceeds
the overtemperature trip point, the LTC4263-1 removes
port power and shuts down all functions including the
internal 5V regulator. Once the die cools, the LTC4263-1
waits four seconds, then restarts detection.
the port impedance. The 1k resistor, R , limits current
DET
flowingthroughthispathduringportpower-onandpower-
off. An AC blocking diode (D ) is inserted between the
AC
OUT pin and the port to prevent the AC signal from being
shorted by the LTC4263-1’s power control MOSFET. The
500k resistor across D allows the port voltage to decay
AC
after disconnect occurs.
DC Disconnect
Sizing of capacitors is critical to ensure proper function
TheDCdisconnectcircuitmonitorsportcurrentwhenever
power is on to detect continued presence of the PD. IEEE
802.3af mandates a minimum current of 10mA that the
PD must draw for periods of at least 75ms with optional
of AC disconnect. C (Figure 6) controls the connection
PSE
impedance on the PSE side. Its capacitance must be kept
low enough for AC disconnect to be able to sense the PD.
On the other hand, C
has to be large enough to pass
dropouts of no more than 250ms. The t
disconnect
DET
MPDO
the signal at 110Hz. The recommended values are 0.1μF
for C and 0.47μF for C . The sizes of C , C
timer increments whenever port current is below 7.5mA
(typ). If the timer expires, the port is turned off and the
LTC4263-1 waits 1.5 seconds before restarting detection.
,
PSE DET
PSE
DET
and R
are chosen to create an economical, physically
DET
42631fa
13
LTC4263-1
APPLICATIONS INFORMATION
1A
+
C
PSE
0.1μF
100V
0.1μF
LTC4263-1
X7R, 100V
NC
LED
V
DD5
ISOLATED
56V SUPPLY
SMAJ58A
LEGACY
V
SS
0.1μF
500k
MIDSPAN
SD
CMLSH05-4
V
V
DD48
OUT
SS
–
V
V
SS
SS
42631 F06
D
C
DET
0.47μF
X7R, 100V
OUT
AC
0.1μF
X7R
R
DET
1k
OSC
ACOUT
Figure 6. LTC4263-1 Using AC Disconnect
compact and functionally robust system. Moreover, the
completePoweroverEthernetACdisconnectsystem(PSE,
transformers,cabling,PD,etc.)iscomplex;deviatingfrom
If supplied externally, a voltage between 4.5V and 5.5V
should be applied to the V
pin to cause the internal
is to be generated inter-
DD5
regulator to shut down. If V
DD5
nally, the voltage will be 4.4V (typ) and a 0.1μF capacitor
therecommendedvaluesofC ,R andC isstrongly
DET DET
PSE
should be connected between V
and V . Do not
discouraged. Contact the Linear Technology Applications
department for additional support.
DD5
SS
connect the internally generated V
to anything other
DD5
than a bypass capacitor and the logic control pins of the
same LTC4263-1.
Internal 110Hz AC Oscillator
The LTC4263-1 includes onboard circuitry to generate
LED Flash Codes
a 110Hz (typ), 2V sine wave on its OSC pin when a
P-P
The LTC4263-1 includes a multi-function LED driver to
inform the user of the port status. The LED is turned on
when the port is connected to a PD and power is applied. If
theportisnotconnectedorisconnectedtoanon-powered
device with a 150Ω or shorted termination, the port will
not be powered and the LED will be off. For other port
conditions, the LTC4263-1 blinks a code to communicate
the status to the user as shown in Table 1. One flash indi-
cates low signature resistance, two flashes indicates high
resistance and five flashes indicates an overload fault.
0.1μF capacitor is connected between the OSC pin and
V . This sine wave is synchronized to the controller
SS
inside the LTC4263-1 and should not be externally driven.
Tying the OSC pin to V shuts down the oscillator and
SS
enables DC disconnect.
Power-On Reset and Reset/Backoff Timing
Upon startup, the LTC4263-1 waits four seconds before
starting its first detection cycle. Depending on the results
of this detection it will either power the port, repeat detec-
tion,orwait3.2secondsbeforeattemptingdetectionagain
if in midspan mode.
When active, the LED flash codes are repeated every 1.2
seconds. The duration of each LED flash is 75ms. Multiple
LED flashes occur at a 300ms interval.
The LTC4263-1 may be reset by pulling the SD pin low.
The port is turned off immediately and the LTC4263-1 sits
idle. After SD is released there will be a 4-second delay
before the next detection cycle begins.
The LTC4263-1 includes a feature for efficiently driving
the LED from a 56V power supply without the wasted
power caused by having to drop over 52V in a current limit
resistor. When operating the V
supply internally, the
DD5
LTC4263-1 drives the LED pin with a 6% duty cycle PWM
signal. This allows use of the simple LED drive circuit in
Figure 7 to minimize power dissipation. The modulation
V
Logic-Level Supply
DD5
The V
supply for the LTC4263-1 can either be supplied
DD5
externally or generated internally from the V
supply.
DD48
frequency of the LED drive is 28kHz, making the on period
42631fa
14
LTC4263-1
APPLICATIONS INFORMATION
Table 1. Port Status and LED Flash Codes
PORT STATUS
LED FLASH CODE
FLASH PATTERN
Non-Powered Device
Off
LED Off
0Ω < R
< 200Ω
PORT
Port Open
> 1MΩ
Off
LED Off
LED On
R
PORT
Port On
25kΩ
On
Low Signature Resistance
300Ω < R < 15kΩ
1 Flash
2 Flashes
5 Flashes
PORT
High Signature Resistance
33kΩ < R < 500kΩ
PORT
Port Overload Fault
EXTERNAL COMPONENT SELECTION
V
DD48
Thissectiondiscussestheotherelementsneededtomake
a system including the LTC4263-1 function correctly. It is
recommendedtoadherecloselytotheexampleapplication
circuitsprovided. ForfurtherassistancecontacttheLinear
Technology Applications department.
D1
10mH, 21mA
COILCRAFT
DS1608C-106
D2
BAS19
R
LED
1k
PoE System Power Delivery
LED
V
DD48
The LTC4263-1 can output over 30W(typ) and is designed
to deliver 25W(min) to the PD over a 100 meter CAT5
cable for high power applications such as wireless access
points, security cameras and RFID readers. There are
several parameters external to the LTC4263-1 that limit
the power available to the PD. Figure 8 provides a simple
model used to calculate this power delivery.
LTC4263-1
DD5
V
0.1μF
V
SS
4263 F07
Figure 7. LED Drive Circuit with Single 48V Supply
2.2μs. During the 2.2μs that the LED pin is pulled low, cur-
rent ramps up in the inductor, limited by R . Diode D2
completes the circuit by allowing current to circulate while
the LED pin is open circuit. Since current is only drawn
from the power supply 6% of the time, power dissipation
is substantially reduced.
LED
The primary element affecting the delivery of power to the
PD is the supply feeding the LTC4263-1. By maximizing
this voltage, the highest and most efficient power delivery
can be obtained. However, in order to adhere to common
safety requirements, the supply is normally limited to
60V and the IEEE 802.3af committee has chosen 57V as
a nominal maximum. In this example, a 56 1V power
supply output sets the lower limit to 55V. The LTC4263-1
overload current limit monitors port current and removes
When V
is powered from an external supply, the PWM
DD5
signal is disabled and the LED pin will pull down continu-
ouslywhenon.Inthismode,theLEDcanbepoweredfrom
the 5V supply with a simple series resistor.
42631fa
15
LTC4263-1
APPLICATIONS INFORMATION
P
OUT(MIN)
= 28.8W (MIN, DC DISCONNECT)
= 28.5W (MIN, AC DISCONNECT)
POWER (MIN)
= 55V (MIN) • 540mA (MIN)
= 29.7W (MIN)
CABLE LOSS (MAX)
2
= (540mA) • 12.5Ω
= 3.6W
LTC4263-1
AC
DISCONNECT
DIODE
(OPTIONAL)
POWER
SUPPLY
I
= 540mA
ON(MAX)
CUT(MIN)
R
= 3Ω
PD
100M CAT5 CABLE
12.5Ω (MAX)
V
SUPPLY
55V TO 57V
42631 F08
P
OUT(MIN)
= 25.2W (MIN, DC DISCONNECT)
= 24.9W (MIN, AC DISCONNECT)
P
LOSS_AC DIODE(MAX)
P
= 0.5V • 540mA
= 0.3W (MAX)
LOSS_4263-1(MAX)
= (540mA) • 3Ω
2
= 0.9W (MAX)
Figure 8. Example of Power Delivery Calculation Using the LTC4263-1
power if the port exceeds 540mA(min). This sets the
(4-pair). Each method provides advantages and the
system vendor needs to decide which method best suits
their application.
maximum system operating current and along with the
working voltage, limits the power available to the PD. The
power at the PSE output is reduced by the resistance of
the LTC4263-1 internal power MOSFET and the voltage
drop of the AC blocking diode if used for AC disconnect
as shown in Figure 8. The cabling can be responsible for
the largest loss. In our example based on a worst-case
100 meter CAT5 cable and connectors, the power loss can
be as much as 3.6W. Obviously for shorter cable runs the
loss is less and lower resistance cables such as CAT6 will
have correspondingly lower losses.
2-pair power is used today in IEEE 802.3af systems (see
Figure 1). One pair of conductors is used to deliver the
current and a second pair is used for the return while two
conductor pairs are not powered. This architecture offers
the simplest implementation method but suffers from
higher cable loss than an equivalent 4-pair system.
4-pair power delivers current to the PD via two conductor
pairs in parallel (Figure 9). This lowers the cable resis-
tance but raises the issue of current balance between
each conductor pair. Differences in resistance of the
transformer, cable and connectors along with differences
in diode bridge forward voltage in the PD can cause an
imbalance in the currents flowing through each pair. The
4-pair system in Figure 9 solves this problem by using
two independent DC/DC converters in the PD. Using a
2-pair architecture with the LTC4263-1 allows delivery of
25W to the PD while using a 4-pair architecture allows
delivery of 50W. Contact Linear Technology applications
support for detailed information on implementing 2-pair
and 4-pair PoE systems.
ThetotalpoweravailableatthePDcanbecalculatedtaking
in to account these losses using the formula:
P = V
•ICUT – I 2 •RON
(
)
(
)
PD
SUPPLY
CUT
– VDAC •ICUT – I 2 •RCABLE
(
)
(
)
CUT
FormanyPoEsystems,theonlyparameteraffectingpower
delivery that is under the control of the PSE designer is the
power supply. Optimum power delivery can be obtained
by maximizing this power supply voltage. 4-pair systems
can be treated as two independent 2-pair systems and
therefore the power will be twice that of the 2-pair.
Common Mode Chokes
2-Pair vs 4-Pair
Both non-powered and powered Ethernet connections
achievebestperformancefordatatransferandEMIwhena
commonmodechokeisusedoneachport.Forcostreduc-
tion reasons, some designs share a common mode choke
One of the basic architectural decisions associated with
a high power PoE system is whether to deliver power
using four conductors (2-pair) or all eight conductors
between two adjacent ports. This is not recommended.
42631fa
16
LTC4263-1
APPLICATIONS INFORMATION
PSE
PD
+
0.1μF
0.1μF
1
1
V
DD48
5μF
SMAJ58A
R
Tx
Rx
Tx
0.1μF
MIN
2
3
2
3
DATA PAIR
DATA PAIR
GND
PWRGD
56V
LTC4263-1
DC/DC
CONVERTER
CLASS
V
LTC4264
DD5
Rx
V
V
IN
OUT
6
6
0.1μF
SMAJ58A
58V
+
–
–
–
+
V
SS
OUT
V
OUT
8s B2100
–
+
5μF
MIN
0.1μF
SMAJ58A
+
0.1μF
0.1μF
GND
PWRGD
4
4
DC/DC
CONVERTER
V
DD48
R
V
CLASS
Tx
Rx
Tx
LTC4264
5
7
5
7
DATA PAIR
DATA PAIR
V
OUT
56V
LTC4263-1
IN
V
DD5
Rx
8
8
0.1μF
SMAJ58A
58V
–
42631 F
V
SS
OUT
Figure 9. 4-Pair High Power PoE Gigabit Ethernet System Diagram
Sharingacommonmodechokebetweentwoportscouples
start-up, disconnect and fault transients from one port
to the other. The end result can range from intermittent
behavior to excessive voltages that may damage circuitry
in both the PSE and PD connected to the port.
will control the current and turn off the port. However, the
high current along with the cable inductance causes a
large flyback voltage to appear across the port when the
MOSFET is turned off. In the case of a short occurring
with a minimum length cable, the instantaneous current
can be extremely high due to the lower inductance. The
LTC4263-1 has a high speed fault current limit circuit that
shuts down the port in 20μs (typ). In this case, there is
lower inductance but higher current so the event is still
severe. A transient suppressor is required to clamp the
port voltage and prevent damage to the LTC4263-1. An
SMAJ58A or equivalent device works well to maintain
port voltages within a safe range. A bidirectional transient
suppressor should not be used.
Transient Suppressor Diode
PoweroverEthernetisachallengingHotSwapapplication
because it must survive unintentional abuse by repeated
plugging in and out of devices at the port. Ethernet cables
couldpotentiallybecutorshortedtogether. Consequently,
the PSE must be designed to handle these events without
damage.
The most severe of these events is a sudden short on a
powered port. What the PSE sees depends on how much
CAT-5 cable is between it and the short. If the short oc-
curs on the far end of a long cable, the cable inductance
will prevent the current in the cable from increasing too
quicklyandtheLTC4263-1built-inshort-circuitprotection
Good layout practices place the transient voltage sup-
pressor close to the LTC4263-1, before the common
mode choke (if used) and data magnetics to enhance the
protective function.
42631fa
17
LTC4263-1
APPLICATIONS INFORMATION
If the port voltage reverses polarity and goes positive,
the OUT pin can be overstressed because this voltage is
stackedontopofthe56Vsupply. Inthiscase, thetransient
suppresser is used to clamp the voltage to a small positive
value to protect the LTC4263-1 and the PSE capacitor. For
this reason, it is critical that only a unidirectional TVS
be used.
the LTC4263-1 is the primary current limiter, its failure
could result in excess current to the port. To meet these
safety requirements, a fuse can be placed in the positive
leg of the port. The fuse must be large enough that it will
pass at least 675mA when derated for high temperature
but small enough that it will fuse at less than 2A at cold
temperature. This requirement can usually be satisfied
with a 1A fuse or PTC. Placing the fuse between the RJ-45
connector and the LTC4263-1 and its associated circuitry
provides additional protection for this circuitry. Consult
a safety requirements expert for the application specific
requirements.
Component leakages across the port can have an adverse
affect on AC disconnect and even affect DC disconnect if
theleakagebecomessevere. TheSMAJ58Aisratedatless
than 5μA leakage at 58V and works well in this applica-
tion. There is a potential for stress induced leakage, so
sufficientmarginsshouldbeusedwhenselectingtransient
suppressors for these applications.
Isolation
The IEEE 802.3af standard requires Ethernet ports to be
electrically isolated from all other conductors that are
user accessible. This includes the metal chassis, other
connectors, and the AC power line. Environment A isola-
tion is the most common and applies to wiring within a
single building serviced by a single AC power system.
For this type of application, the PSE isolation requirement
can be met with the use of a single, isolated 56V supply
powering several LTC4263-1 ports. Environment B, the
stricter isolation requirement, is for networks that cross
an AC power distribution boundary. In this case, electrical
isolation must be maintained between each port in the
PSE. The LTC4263-1 can be used to build a multi-port
Environment B PSE by powering each LTC4263-1 from
a separate, isolated 56V supply. In all PSE applications,
there should be no user accessible connections to the
LTC4263-1 other than the RJ-45 port.
Capacitors
Sizing of both the C
and C
capacitors is critical for
PSE
DET
properoperationoftheLTC4263-1ACdisconnectsensing.
See the AC Disconnect section for more information. Note
that many ceramic capacitors have dramatic DC voltage
and temperature coefficients. Use 100V or higher rated
X7R capacitors for C and C , as these have reduced
DET
PSE
voltage dependence while also being relatively small and
inexpensive. Bypass the 48V supply with a 0.1μF, 100V
capacitorlocatedclosetotheLTC4263-1. TheV
also requires a 0.1μF bypass capacitor.
supply
DD5
Fuse
While the LTC4263-1 does not require a fuse for proper
operation, some safety requirements state that the output
current must be limited to less than 2A in less than 60
seconds if any one component fails or is shorted. Since
42631fa
18
LTC4263-1
PACKAGE DESCRIPTION
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 0.05
3.30 0.05
1.70 0.05
3.60 0.05
2.20 0.05
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
0.40 0.10
4.00 0.10
(2 SIDES)
8
14
R = 0.05
TYP
3.30 0.10
3.00 0.10
(2 SIDES)
1.70 0.10
PIN 1 NOTCH
R = 0.20 OR
0.35 s 45°
PIN 1
TOP MARK
(SEE NOTE 6)
CHAMFER
(DE14) DFN 0806 REV B
7
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
42631fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC4263-1
TYPICAL APPLICATION
Complete High Power Single Port Endpoint PSE
L2
•
•
•
•
6
9
1
2
+
•
•
LED1
LN1351C-TR
GRN
C3
ISOLATED
10
0.1μF
56V
–
100V
5
D1
BAS19
11
12
4
3
PHY
OUT TO
CABLE
L1
2
10mH
LTC4263-1
11
1
14
12
2
R2
1k
V
•
•
•
•
DD48
V
13
14
DD5
3
6
•
•
LED
C1
0.1μF
SD
7
OSC
C5
0.1μF
X7R
LEGACY
MIDSPAN
1
3
C7
0.47μF
F1
1A
13
4
R6
1k
100V, X7R
V
V
V
V
SS
SS
SS
SS
8
ACOUT
OUT
C4
0.1μF
D2
SMAJ58A
5
10
9
D5
CMLSHO5-4
6
4
5
100V, X7R
OUT
C8
0.01μF
200V
C9
0.01μF
200V
R5
510k
7
8
L1: COILCRAFT DS1608C-106
L2: COILCRAFT ETH1-230LD
2kV
1000pF
R7
75Ω
R8
75Ω
R9
75Ω
R10
75Ω
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ThinSOT is a trademark of Linear Technology Corporation.
42631fa
LT 1007 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2007
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LTC4263IS#TR
LTC4263 - Single IEEE 802.3af Compliant PSE Controller with Internal Switch; Package: SO; Pins: 14; Temperature Range: -40°C to 85°C
Linear
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