LTC6420IUDC-20-PBF [Linear]
Dual Matched 1.8GHz Differential Amplifi ers/ADC Drivers; 双通道匹配1.8GHz的差分功率放大器器/ ADC驱动器型号: | LTC6420IUDC-20-PBF |
厂家: | Linear |
描述: | Dual Matched 1.8GHz Differential Amplifi ers/ADC Drivers |
文件: | 总12页 (文件大小:208K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC6420-20
Dual Matched
1.8GHz Differential
Amplifiers/ADC Drivers
FEATURES
DESCRIPTION
TheLTC®6420-20isadualhigh-speeddifferentialamplifier
targeted at processing signals from DC to 300MHz. The
part has been specifically designed to drive 12-, 14- and
16-bitADCswithlownoiseandlowdistortion,butcanalso
be used as a general-purpose broadband gain block.
n
Matched Gain ±±0.dꢀ
n
Matched Phase ±±0.1 at .±±MꢁH
n
Channel Separation 8±dꢀ at .±±MꢁH
n
1.8GHz –3dB Bandwidth; Fixed Gain of 10V/V (20dB)
n
IMD3 = –84dBc at 100MHz, 2V
P-P
n
Equivalent OIP3 = 46dBm at 100MHz
The LTC6420-20 is easy to use, with minimal support
circuitry required. The output common mode voltage
is set using an external pin, independent of the inputs,
whicheliminatestheneedfortransformersorAC-coupling
capacitors in many applications. The gain is internally
fixed at 20dB (10V/V).
n
1nV/√Hz Internal Op Amp Noise
n
6.2dB Noise Figure
n
Differential Inputs and Outputs
n
Rail-to-Rail Output Swing
n
80mA Supply Current (240mW) per Amplifier
n
1.1V to 1.6V Output Common Mode Voltage,
The LTC6420-20 saves space and power compared to
alternativesolutionsusingIFgainblocksandtransformers.
The LTC6420-20 is packaged in a compact 20-lead
3mm × 4mm QFN package and operates over the –40°C
to 85°C temperature range.
Adjustable
DC- or AC-Coupled Operation
n
n
20-Lead 3mm × 4mm × 0.75mm QFN Package
APPLICATIONS
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
n
Differential ADC Driver
n
Differential Driver/Receiver
n
Single Ended to Differential Conversion
IF Sampling (Diversity) Receivers
n
TYPICAL APPLICATION
Matched Dual Amplifier with Output Common Mode ꢀiasing
Distribution of Gain Match
3V
40
35
30
25
20
15
10
5
0.1μF
1000pF
V
A
OCM
V
A
V+ A
ENABLEA
OCM
Z
IN
= 200Ω
1000Ω
0.1μF
0.1μF
100Ω
100Ω
12.5Ω
12.5Ω
–
–IN A
+OUT A
V
V
A
A
OCM
OCM
V
IN
A
+IN A
V–
+
–OUT A
V–
1000Ω
1000Ω
0
0.1dB GAIN MATCHING
0.1° PHASE MATCHING AT 100MHz
LTC6420-20
100Ω
–0.25 –0.15 –0.05
0.05
0.15
0.25
CHANNEL-TO-CHANNEL GAIN MATCH (dB)
0.1μF
0.1μF
642020 TA01b
12.5Ω
12.5Ω
+IN B
–IN B
–OUT B
+OUT B
+
V
V
B
B
OCM
OCM
V
IN
B
100Ω
–
1000Ω
Z
= 200Ω
IN
V+ B
V
V
B
B
ENABLEB
OCM
OCM
0.1μF
1000pF
642020 TA01a
3V
642020fa
1
LTC6420-20
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note .)
+
–
TOP VIEW
Supply Voltage (V – V ) .........................................3.6V
Input Current (Note 2).......................................... 10mA
Operating Temperature Range (Note 3)...–40°C to 85°C
Specified Temperature Range (Note 4) ....–40°C to 85°C
Storage Temperature Range...................–65°C to 150°C
Maximum Junction Temperature........................... 150°C
Output Short Circuit Duration........................... Indefinite
20 19 18 17
+INA
–INA
1
2
3
4
5
6
16 –OUTA
+
V
V
V
V
A
15
14
13
12
–
–
–
+
V
21
–
V
–INB
+INB
B
11 –OUTB
7
8
9 10
UDC PACKAGE
20-LEAD (3mm s 4mm) PLASTIC QFN
T
= 150°C, θ = 43°C/W, θ = 5°C/W
JA JC
JMAX
–
EXPOSED PAD (PIN 21) IS V , MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISꢁ
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LTC6420CUDC-20#PBF
LTC6420IUDC-20#PBF
LTC6420CUDC-20#TRPBF LDDM
LTC6420IUDC-20#TRPBF LDDM
0°C to 70°C
20-Lead (3mm × 4mm) Plastic QFN
20-Lead (3mm × 4mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
SELECTOR GUIDE
PART NUMꢀER
GAIN
(dꢀ)
GAIN
(V/V)
Z
IN
(DIFFERENTIAL)
SINGLE
LTC6400-8
LTC6400-14
LTC6400-20
LTC6400-26
LTC6401-8
LTC6401-14
LTC6401-20
LTC6401-26
DUAL
COMMENT
Lowest Distortion
Lowest Distortion
Lowest Distortion
Lowest Distortion
Lowest Power
(Ω)
8
2.5
5
400
200
200
50
14
20
26
8
LTC6420-20
10
20
2.5
5
400
200
200
50
14
20
26
Lowest Power
LTC6421-20
10
20
Lowest Power
Lowest Power
642020fa
2
LTC6420-20
DC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 251C0 V+ = 3V, V– = ±V, +IN = –IN = VOCM = .025V, ENABLE = ±V, No RL unless
otherwise noted0
SYMꢀOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input/Output Characteristic
l
l
l
l
l
l
l
l
l
l
l
l
l
G
Gain
V
=
100mV Differential
Channel-to-Channel
100mV Differential
19.6
20
0.1
20.4
0.25
dB
dB
DIFF
IN
ΔG
Gain Matching
Gain Temperature Drift
TC
V
IN
=
0.0015
0.2
dB/°C
V
GAIN
V
V
V
Output Swing Low (V
= 1.5V)
= 1.5V)
Each Output, V
Each Output, V
=
=
400mV Differential
400mV Differential
0.35
SWINGMIN
SWINGMAX
OUTDIFFMAX
OUT
OCM
IN
IN
Output Swing High (V
2.65
4.6
20
2.8
V
OCM
Maximum Differential Output Swing
Output Current Drive
5.2
V
P-P
I
2V
(Note 10)
mA
mV
μV/°C
V
P-P, OUT
V
OS
Input Offset Voltage
Differential
Differential
–2
0.4
1.2
2
1
TCV
Input Offset Voltage Drift
OS
VRMIN
VRMAX
I
I
Input Common Mode Voltage Range, MIN
Input Common Mode Voltage Range, MAX
Input Resistance (+IN, –IN)
Input Impedance Matching
1.6
V
R
INDIFF
Differential
170
200
0.5
1
230
2.5
ꢀ
ΔR
Channel-to-Channel
%
IN
C
Input Capacitance (+IN, –IN)
Output Resistance (+OUT, – OUT)
Common Mode Rejection Ratio
Differential, Includes Parasitic
Differential
pF
INDIFF
l
l
R
20
45
25
68
36
Ω
OUTDIFF
CMRR
Input Common Mode Voltage 1V to 1.6V
dB
Output Common Mode Voltage Control
G
Common Mode Gain
V
= 1.1V to 1.6V
= 1.25V to 1.5V
1
V/V
V
CM
OCM
OCM
l
l
l
l
l
V
V
V
Output Common Mode Range, MIN
Output Common Mode Range, MAX
Common Mode Offset Voltage
Common Mode Offset Voltage Drift
1.1
10
0
OCMMIN
OCMMAX
OSCM
1.6
V
V
–10
2
16
–3
mV
μV/°C
μA
TCV
OSCM
IV
V
OCM
Input Current
–15
2.4
OCM
ENABLEx Pins (x = A, ꢀ)
l
l
V
V
ENABLEx Input Low Voltage
ENABLEx Input High Voltage
ENABLEx Input Current
0.8
V
V
IL
IH
l
l
ENABLEx ≤ 0.8V
ENABLEx ≥ 2.4V
0.5
4
μA
μA
1.5
Power Supply
l
l
l
l
V
Operating Supply Range
Supply Current
2.85
55
3
80
1
3.5
95
3
V
mA
mA
dB
S
I
I
ENABLEx ≤ 0.8V; per Amplifier
S
Shutdown Supply Current
ENABLEx ≥ 2.4V; per Amplifier. Inputs Floating
SHDN
+
PSRR
Power Supply Rejection Ratio (Differential
Outputs)
V = 2.85V to 3.5V
86
642020fa
3
LTC6420-20
AC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 251C0 V+ = 3V, V– = ±V, VOCM = .025V, ENABLE = ±V, No RL unless otherwise noted0
SYMꢀOL
ΔG
PARAMETER
CONDITIONS
f = 100MHz (Note 9)
f = 100MHz
MIN
TYP
0.1
0.1
80
MAX
UNITS
dB
l
Gain Matching
0.25
ΔP
Phase Matching
deg
Channel Separation (Note 8)
–3dB Bandwidth
f = 100MHz
dB
–3dBBW
0.5dBBW
0.1dBBW
NF
200mV
200mV
200mV
(Note 6)
(Note 6)
(Note 6)
1.8
0.7
0.3
6.2
2.2
22
GHz
GHz
GHz
dB
P-P,OUT
P-P,OUT
P-P,OUT
Bandwidth for 0.5dB Flatness
Bandwidth for 0.1dB Flatness
Noise Figure
R = 375ꢀ (Note 5), f = 100MHz
L
e
e
Input Referred Voltage Noise Density Includes Resistors (Short Inputs), f = 100MHz
Output Referred Voltage Noise Density Includes Resistors (Short Inputs), f = 100MHz
1/f Noise Corner
nV/√Hz
nV/√Hz
kHz
IN
ON
1/f
10
SR
Slew Rate
Differential (Note 6)
2V (Note 6)
4500
0.8
4
V/μs
ns
t
t
1% Settling Time
Overdrive Recovery Time
1dB Compression Point
Turn-On Time
S1%
P-P,OUT
1.9V
(Note 6): Single Ended
P-P,OUT
ns
OVDR
P
1dB
R = 375ꢀ (Notes 5, 7), f = 100MHz
L
18
dBm
ns
t
t
+OUT, –OUT Within 10% of Final Values
82
ON
OFF
Turn-Off Time
I
Falls to 10% of Nominal
190
15
ns
CC
–3dBBW
V
Pin Small Signal –3dB BW
0.1V at V , Measured Single-Ended at
OCM
MHz
VOCM
OCM
P-P
Output (Note 6)
3rd Order Intermodulation Distortion f = 100MHz (1MHz Spacing)
= 2V Composite
IMD3
–84
46
dBc
V
OUT
P-P
OIP3
IIP3
3rd Order Output Intercept
3rd Order Input Intercept
f = 100MHz (Note 7)
dBm
f = 100MHz (Z = 50Ω)
26
20
dBm
dBm
IN
f = 100MHz (Z = 200Ω)
IN
HD
HD
2nd Order Harmonic Distortion
3rd Order Harmonic Distortion
f = 100MHz; V
f = 100MHz; V
= 2V
= 2V
–80
–88
dBc
dBc
2
3
OUT
OUT
P-P
P-P
Note .: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Input pins (+IN, –IN) are protected by steering diodes to either
supply. If the inputs go beyond either supply rail, the input current should
be limited to less than 10mA.
Note 6: Measured using Test Circuit B. R = 87.5Ω on each output.
L
Note 7: Since the LTC6420-20 is a feedback amplifier with low output
impedance, a resistive load is not required when driving an AD converter.
Therefore, typical output power is very small. In order to compare the
LTC6420-20 with amplifiers that require 50Ω output load, the output
voltage swing driving a given R is converted to OIP and P as if it were
L
3
1dB
driving a 50Ω load. Using this modified convention, 2V is by definition
P-P
equal to 10dBm, regardless of actual R .
L
Note 3: The LTC6420C and LTC6420I are guaranteed functional over the
operating temperature range of –40°C to 85°C.
Note 8: Channel separation (the inverse of crosstalk) is measured by
driving a signal into one input, while terminating the other input. Channel
separation is the ratio of the resulting output signal at the driven channel
to the channel that is not driven.
Note 9: Not production tested. Guaranteed by design and by correlation to
production tested parameters.
Note 4: The LTC6420C is guaranteed to meet specified performance from
0°C to 70°C. It is designed, characterized and expected to meet specified
performance from –40°C to 85°C but is not tested or QA sampled at these
temperatures. The LTC6420I is guaranteed to meet specified performance
from –40°C to 85°C.
Note 5: Input and output baluns used. See Test Circuit A.
Note .±: The output swing range is at least 2V differential even when
P-P
sourcing or sinking 20mA. Tested at V
= 1.5V.
OCM
642020fa
4
LTC6420-20
TYPICAL PERFORMANCE CHARACTERISTICS
Channel to Channel Gain Match
vs Frequency
Channel to Channel Group Delay
Match vs Frequency
Channel to Channel Phase Match
vs Frequency
0.5
0.4
0.5
0.4
0.5
0.4
0.3
0.3
0.3
0.2
0.2
0.2
0.1
0.1
0.1
0.0
0.0
0.0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.1
–0.2
–0.3
–0.4
–0.5
–0.1
–0.2
–0.3
–0.4
–0.5
10
100
1000 2000
10
100
1000 2000
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
642020 G01
642020 G02
642020 G03
S2. Phase and Group Delay
vs Frequency
Frequency Response
25
20
15
10
5
0
–100
–200
–300
–400
1.2
TEST CIRCUIT B
TEST CIRCUIT B
0.9
0.6
0.3
0
PHASE
GROUP DELAY
0
10
100
1000
3000
0
200
400
600
800
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
642020 G05
642020 G04
Input and Output Impedance
vs Frequency
Input and Output Reflection and
Reverse Isolation vs Frequency
250
200
150
100
50
50
0
–10
–20
–30
–40
–50
–60
–70
–80
TEST CIRCUIT B
Z
IN
30
S11
S22
Z
OUT
10
Z
IN
–10
–30
–50
PHASE
IMPEDANCE MAGNITUDE
S12
Z
OUT
0
1
10
100
1000
10
100
1000
3000
FREQUENCY (MHz)
FREQUENCY (MHz)
642020 G07
642020 G06
642020fa
5
LTC6420-20
TYPICAL PERFORMANCE CHARACTERISTICS
Noise Figure and Input Referred
Noise Voltage vs Frequency
Overdrive Transient Response
Small Signal Transient Response
1.35
1.30
1.25
1.20
1.15
15
14
13
12
11
10
9
8
7
6
5
6
4
2
2.5
2.0
1.5
1.0
0.5
0
R
= 87.5Ω PER OUTPUT
R
= 87.5Ω PER OUTPUT
L
L
+OUT
+OUT
NOISE FIGURE
e
IN
4
3
2
1
–OUT
–OUT
0
0
1000
0
2
4
6
8
10
10
100
FREQUENCY (MHz)
0
50
100
150
200
TIME (ns)
TIME (ns)
642020 G09
642020 G10
642020 G08
Third Order Intermodulation
Distortion vs Frequency
ꢁarmonic Distortion vs Frequency
–40
–50
–60
–70
–80
–90
–100
–40
DIFFERENTIAL INPUT
DRIVING LTC2285
V
= 2V
OUT
P-P
–50
–60
–70
–80
–90
HD2 NO R
L
HD2 200Ω R
L
–100
–110
HD3 NO R
HD3 200Ω R
DIFFERENTIAL INPUT
L
V
= 2V COMPOSITE
L
OUT
P-P
0
50
100
150
200
250
300
0
50
100
150
200
250
300
FREQUENCY (MHz)
FREQUENCY (MHz)
642020 G11
642020 G12
Channel Separation
vs Frequency (Note 8)
Equivalent Output Third Order
Intercept vs Frequency
120
100
80
60
40
20
0
60
50
40
30
20
10
0
DIFFERENTIAL INPUT
V
= 2V COMPOSITE
OUT
(NOTE 7)
P-P
DRIVING LTC2285
0
50
100
150
200
250
300
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
642020 G13
642020 G14
642020fa
6
LTC6420-20
PIN FUNCTIONS
+INA, –INA, –INꢀ, +INꢀ (Pins ., 2, 5, 6): Differential
Inputs of A and B channel respectively.
+
+
V A , V ꢀ (Pins .5, 2±, 7, .2 ): Positive Power Supply
(Normallytiedto3Vor3.3V).SupplypinsofAandBchannels
are internally separate. Bypass each pin with 1000pF and
0.1μF capacitors as close to the pins as possible.
–
V (Pins 3, 4, .3, .4, 2.): Negative Power Supply. All
four pins, as well as the exposed back, must be connected
to same voltage/ground.
–OUTA, +OUTA, –OUTꢀ, +OUTꢀ (Pins .6, .7, .., .±):
Differential Outputs of channels A and B respectively.
ENABLEA, ENABLEB (Pins 9, .8): Logic inputs. If low,
the amplifier is enabled. If high, the amplifier is disabled
and placed in a low power shutdown mode, making
the amplifier outputs high impedance. These pins are
internally separate. These pins should not be left floating.
V
, V
(Pins .9, 8): These pins set the output
OCMꢀ
OCMA
common mode voltage for the respective channel. They
are internally separate. A 0.1μF external bypass capacitor
is recommended.
–
Exposed Pad (Pin 2.): V . The Exposed Pad must be
connected to same voltage/ground as pins 3, 4, 13, 14.
BLOCK DIAGRAM
+
V
A
V
ENABLEA
+OUTA
17
OCMA
19
20
18
R
F
R
R
1000Ω
OUT
G
12.5Ω
100Ω
1
2
+
16
15
+INA
–INA
–OUTA
+
–
R
G
100Ω
R
OUT
12.5Ω
V
A
+
–
R
F
–
–
1000Ω
14
13
–
3
4
V
V
V
–
V
R
R
OUT
G
100Ω
12.5Ω
+
5
6
–
+
–INB
+INB
+
–
V
B
12
R
R
G
100Ω
OUT
12.5Ω
11 –OUTB
R
F
1000Ω
7
8
9
10
640020 BD
+
V
B
V
ENABLEB
+OUTB
OCMB
642020fa
7
LTC6420-20
APPLICATIONS INFORMATION
Circuit Operation
Input Impedance and Matching
Each of the two channels of the LTC6420-20 is composed
of a fully differential amplifier with on chip feedback and
outputcommonmodevoltagecontrolcircuitry.Differential
gain and input impedance are set by 100ꢀ/1000ꢀ
resistors in the feedback network. Small output resistors
of 12.5ꢀ improve the circuit stability over various load
conditions.
The differential input impedance of the LTC6420-20 is
200ꢀ. If a 200ꢀ source impedance is unavailable, then
the differential inputs may need to be terminated to a
lower value impedance, e.g. 50ꢀ, in order to provide an
impedancematchforthesource.Severalchoicesareavail-
able. One approach is to use a differential shunt resistor
(Figure 1). Another approach is to employ a wide band
transformer (Figure 2). Both methods provide a wide
band impedance match. The termination resistor or the
transformer must be placed close to the input pins in
order to minimize the reflection due to input mismatch.
Alternatively, one could apply a narrowband impedance
match at the inputs of the LTC6420-20 for frequency
selection and/or noise reduction.
The LTC6420-20 is very flexible in terms of I/O coupling. It
canbeAC-orDC-coupledattheinputs,theoutputsorboth.If
theinputsareAC-coupled,theinputcommonmodevoltage
is automatically biased close to V
and thus no external
OCM
circuitry is needed for bias. The LTC6420-20 provides an
output common mode voltage set by V , which allows
OCM
driving an ADC directly without external components such
asatransformerorACcouplingcapacitors.Theinputsignal
can be either single-ended or differential with only minor
differences in distortion performance.
ReferringtoFigure3,LTC6420-20canbeeasilyconfigured
for single-ended input and differential output without a
balun. The signal is fed to one of the inputs through a
1/2 LTC6420-20
1000Ω
1/2 LTC6420-20
1000Ω
25Ω
100Ω
25Ω
100Ω
+IN
+IN
+
–
–
+
1:4
• •
+
–
–
+
IN
IN
OUT
IN
IN
OUT
V
IN
V
IN
+
+
66.5Ω
–
–
OUT
OUT
1000Ω
1000Ω
25Ω
100Ω
25Ω
100Ω
–IN
–IN
640020 F01
640020 F02
Figure 20 Input Termination for Differential 5±ꢀ Input Impedance
Using a .:4 ꢀalun
Figure .0 Input Termination for Differential 5±ꢀ Input Impedance
Using Shunt Resistor
1/2 LTC6420-20
100Ω
R
S
0.1μF
1000Ω
50Ω
+IN
V
IN
+
–
R
T
66.5Ω
+
–
–
IN
IN
OUT
+
OUT
R //R
S
T
0.1μF
1000Ω
28.7Ω
100Ω
–IN
642020 F03
Figure 30 Input Termination for Single-Ended 5±ꢀ Input Impedance
642020fa
8
LTC6420-20
APPLICATIONS INFORMATION
matchingnetworkwhiletheotherinputisconnectedtothe
samematchingnetworkandasourceresistor.Becausethe
return ratios of the two feedback paths are equal, the two
outputshavethesamegainandthussymmetricalswing.In
general,thesingle-endedinputimpedanceandtermination
Driving A/D Converters
TheLTC6420-20hasbeenspecificallydesignedtointerface
directly with high speed A/D converters. The back page of
thisdatasheetshowstheLTC6420-20drivinganLTC2285,
which is a dual 14-bit, 125Msps ADC.
resistor R are determined by the combination of R , R
T
S
G
The V
CM
pins of the LTC6420-20 are connected to the
and R . For example, when R is 50ꢀ, it is found that the
OCM
F
S
V
pins of the LTC2285, which provide a DC voltage
single-ended input impedance is 202ꢀ and R is 66.5ꢀ
T
level of 1.5V. Both ICs are powered from the same 3V
supply voltage.
in order to match to a 50ꢀ source impedance.
The LTC6420-20 is unconditionally stable. However,
the overall differential gain is affected by both source
impedance and load impedance as follows:
TheinputstotheLTC6420-20canbeconfiguredinvarious
ways, as described in the Input Impedance and Matching
section of this data sheet. The outputs of the LTC6420-20
may be connected directly to the analog inputs of an ADC,
or a simple lowpass or bandpass filter network may be
inserted to reduce out-of-band noise.
VOUT
RL
RS + 200 25+RL
2000
AV =
=
•
V
IN
Output Impedance Match
Test Circuits
TheLTC6420-20candriveanADCdirectlywithoutexternal
output impedance matching. Alternatively, the differential
output impedance of 25ꢀ can be matched to a higher
value impedance, e.g. 50ꢀ, by series resistors or an LC
network.
Due to the fully-differential design of the LTC6420 and
its usefulness in applications with differing characteristic
specifications, two test circuits are used to generate the
information in this data sheet. Test Circuit A is DC1299, a
two-port demonstration circuit for the LTC6420/LTC6421
family.TheschematicandsilkscreenareshowninFigure4.
Thiscircuitincludesinputandoutputtransformers(baluns)
forsingle-ended-to-differentialconversionandimpedance
transformation,allowingdirecthook-uptoa2-portnetwork
analyzer. There are also series resistors at the output to
avoid loading the amplifier directly with a 50Ω load. Due
to the input and output transformers, the –3dB bandwidth
is reduced from 1.8GHz to approximately 1.3GHz.
Output Common Mode Adjustment
The output common mode voltage is set by the V
pin,
OCM
which is a high impedance input. The output common
mode voltage is capable of tracking V in a range from
OCM
1.1V to 1.6V. The bandwidth of V
control is typically
OCM
15MHz, which is dominated by a low pass filter connected
to the V pin and is aimed to reduce common mode
OCM
noise generation at the outputs. The internal common
mode feedback loop has a –3dB bandwidth of 300MHz,
allowingfastrejectionofanycommonmodeoutputvoltage
Test Circuit B uses a 4-port network analyzer to measure
S-parametersandgain/phaseresponse.Thisremovesthe
effects of the wideband baluns and associated circuitry,
for a true picture of the >1GHz S-parameters and AC
characteristics.
disturbance. The V
pin should be tied to a DC bias
OCM
voltage with a 0.1μF bypass capacitor. When interfacing
with A/D converters such as the LTC22xx families, the
V
pin can be connected to the V pin of the ADC.
OCM
CM
642020fa
9
LTC6420-20
APPLICATIONS INFORMATION
Figure 4a0 Top Silkscreen of DC.299, Test Circuit A
+
V
R1
1.21k
1%
TD4
V
OCMA
TD5
GND
+
+
ENA
V
R2
1k
1%
V
C16
JP1
0.1μF
1
2
3
C18
C19
DIS
C22
0.1μF
0.1μF
C30
0.1μF
2
C21
[1]
C17
[1]
0.1μF
EN
J1
J2
R3
1.5k
1%
J3
J4
1
1
2
1
1
+INA
R4
+OUTA
–OUTA
5
4
T1
1
2
3
R5
[2]
C25
T2
88.7
3
2
1
4
5
0.1μF
20
19
18
17
U1
[2]
R7
OPT
R5
[1]
+
R5
88.7
V A
V
OCMA
ENB +OUTA
C22
[1]
C34
[1]
• •
[2]
C22
0.1μF
R9
[2]
1
2
3
4
5
6
16
+
TCM4-19+
+INA
–OUTA
V
2
2
–INA
C43
0.1μF
15
+
C28
0.1μF
–INA
V A
C35
1000pF
14
13
12
11
–
–
V
V
1
2
LTC6420-20
C31
[1]
–
–
C35
[1]
2
V
V
+
C30
0.1μF
C39
0.1μF
C32
0.1μF
C32
1000pF
J6
J8
J5
J7
1
1
1
1
2
2
–INB
V B
–INB
+INB
–OUTB
+OUTB
T4
5
4
T3
1
2
3
R10
[2]
C34
3
4
5
+INB
–
–OUTB
0.1μF
R12
88.7
2
1
R14
[1]
R11
OPT
+
V
V B
7
V
OCMB
ENA +OUTB
C40
0.1μF
C30
0.1μF
• •
[2]
C22
[1]
21
8
9
10
R12
[2]
TCM4-19+
+
ENB
JP2
R15
88.7
R17 V
1.5k
2
C44
0.1μF
C41
[1]
1
2
3
+
1%
+
V
V
DIS
R16
1.21k
1%
C18
0.1μF
C19
0.1μF
EN
NOTES: UNLESS OTHERWISE SPECIFIED
[1] DO NOT STUFF
[2]
TD1
OCMB
TD2
V
+
V
R18
1k
1%
C42
VERSION
–C
–G
U.
R5, R9, R.±, R.3
NONE
T., T3
0.1μF
+
LTC6420CUDC-20
LTC6421CUDC-20
TCM4-19+
TCM4-19+
V
NONE
2.85V TO
3.5V
C14
4.7μF
C15
1μF
642020 F04b
TD3
GND
Figure 4b0 Demo Circuit .299 Schematic (Test Circuit A)
642020fa
10
LTC6420-20
TYPICAL APPLICATIONS
Test Circuit ꢀ, 4-Port Measurements
(Only the Signal-Path Connections Are Shown)
Parallel ADC Drivers to Reduce Wideband Noise
3.3V
3.3V
C1
0.1μF
C4
0.1μF
R5
49.9ꢀ
0.1μF
R
F
PORT 1
(50Ω)
R
R
1000Ω
OUT
G
0.1μF
0.1μF
1/2
LTC6420-20
+INA
–INA
+OUTA
–OUTA
PORT 3
(50Ω)
1/2 AGILENT
E5071C
PORT 4
(50Ω)
37.4Ω
37.4Ω
12.5Ω
R6
100Ω
R3
C2
+
49.9ꢀ
–
10ꢀ
12pF
1/2
AGILENT
E5071C
R
G
100Ω
R
OUT
200Ω
0.1μF
12.5Ω
C5
12pF
+
R4
10ꢀ
–
R
+
V
IN
LTC2208
R7
49.9ꢀ
–
F
PORT 2
(50Ω)
1000Ω
C3
12pF
V
CM
1/2
LTC6420-20
642020 TA02
R8
49.9ꢀ
(B CHANNEL NOT SHOWN)
V
–3dB FILTER BANDWIDTH = 120MHz
OCM
642020 TA03
C6
2.2μF
PACKAGE DESCRIPTION
UDC Package
2±-Lead Plastic QFN (3mm × 4mm)
(Reference LTC DWG # 05-08-1742 Rev Ø)
PIN 1 NOTCH
R = 0.20 OR 0.25
× 45° CHAMFER
0.75 ± 0.05
1.50 REF
19 20
R = 0.05 TYP
3.00 ± 0.10
0.70 ±0.05
0.40 ± 0.10
3.50 ± 0.05
2.10 ± 0.05
1.50 REF
2.65 ± 0.05
1.65 ± 0.05
1
2
PIN 1
TOP MARK
(NOTE 6)
2.65 ± 0.10
1.65 ± 0.10
4.00 ± 0.10
PACKAGE
OUTLINE
2.50 REF
0.25 ±0.05
0.50 BSC
2.50 REF
(UDC20) QFN 1106 REV
Ø
3.10 ± 0.05
4.50 ± 0.05
0.200 REF
0.00 – 0.05
0.25 ± 0.05
0.50 BSC
BOTTOM VIEW—EXPOSED PAD
R = 0.115
TYP
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
642020fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC6420-20
TYPICAL APPLICATION
Dual ADC Driver for Wideband Direct-Conversion Receivers
3V
3V
C1
0.1μF
C4
0.1μF
R1
40.2ꢀ
R3
10ꢀ
C2
12pF
1/2
LTC6420-20
+
R2
40.2ꢀ
R4
10ꢀ
V
IN
1/2 LTC2285
–
C3
12pF
V
CM
642020 TA04
–3dB FILTER BANDWIDTH = 140MHz
RELATED PARTS
PART NUMꢀER DESCRIPTION
COMMENTS
ꢁigh-Speed Differential Amplifiers/Differential Op Amps
LT®1993-2
LT1993-4
LT1993-10
LT1994
800MHz Differential Amplifier/ADC Driver
900MHz Differential Amplifier/ADC Driver
700MHz Differential Amplifier/ADC Driver
Low Noise, Low Distortion Differential Op Amp
A = 2V/V, OIP3 = 38dBm at 70MHz
V
A = 4V/V, OIP3 = 40dBm at 70MHz
V
A = 10V/V, OIP3 = 40dBm at 70MHz
V
16-Bit SNR and SFDR at 1MHz, Rail-to-Rail Outputs
LT5514
Ultralow Distortion IF Amplifier/ADC Driver with Digitally
Controlled Gain
OIP3 = 47dBm at 100MHz, Gain Control Range 10.5dB to 33dB
LT5524
Low Distortion IF Amplifier/ADC Driver with Digitally
Controlled Gain
OIP3 = 40dBm at 100MHz, Gain Control Range 4.5dB to 37dB
LT6402-6
LT6402-12
LT6402-20
LT6411
300MHz Differential Amplifier/ADC Driver
300MHz Differential Amplifier/ADC Driver
300MHz Differential Amplifier/ADC Driver
A = 6dB, Distortion < –80dBc at 25MHz
V
A = 12dB, Distortion < –80dBc at 25MHz
V
A = 20dB, Distortion < –80dBc at 25MHz
V
Low Power Differential ADC Driver/Dual Selectable Gain
Amplifier
16mA Supply Current, IMD3 = –83dBc at 70MHz, A = 1, –1 or 2
V
LTC6400-20,
LTC6400-26
Low Noise, Low Distortion, Differential ADC Drivers
A = 20dB, 26dB; Single Amplifier per IC, High Performance
V
LTC6401-8,
LTC6401-14
LTC6401-20,
LTC6401-26
Low Noise, Low Distortion, Differential ADC Drivers
A = 8dB, 14dB, 20dB, 26dB; Single Amplifier per IC, Low Power
V
LTC6404-1
LTC6406
Low Noise Rail-to-Rail Output Differential Amplifier/ADC Driver 1.5nV/√Hz, –92dB Distortion at 10MHz
3GHz Rail-to-Rail Input Differential Op Amp
1.6nV/√Hz Noise, –72dBc Distortion at 50MHz, 18mA
642020fa
LT 1008 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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