LTC6421IUDC-20#PBF [Linear]
LTC6421-20 - Dual Matched 1.3GHz Differential Amplifiers/ADC Drivers; Package: QFN; Pins: 20; Temperature Range: -40°C to 85°C;
| 型号： | LTC6421IUDC-20#PBF |
| 厂家： | 
Linear |
| 描述： | LTC6421-20 - Dual Matched 1.3GHz Differential Amplifiers/ADC Drivers; Package: QFN; Pins: 20; Temperature Range: -40°C to 85°C 放大器 |
| 文件： | 总16页 (文件大小：240K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC6421-20
Dual Matched
1.3GHz Differential
Amplifiers/ADC Drivers
FEATURES
DESCRIPTION
TheLTC®6421-20isadualhighspeeddifferentialamplifier
targeted at processing signals from DC to 140MHz. The
part has been specifically designed to drive 12-, 14- and
16-bitADCswithlownoiseandlowdistortion,butcanalso
be used as a general-purpose broadband gain block.
n
Matched Gain 0.1dB
n
Matched Phase 0.2° at 100MHz
n
Channel Separation 80dB at 100MHz
n
1.3GHz –3dB Bandwidth; Fixed Gain of 10V/V (20dB)
n
IMD = –76dBc at 100MHz, 2V
3
P-P
n
n
n
n
n
n
n
Equivalent OIP = 42dBm at 100MHz
3
The LTC6421-20 is easy to use, with minimal support
circuitry required. The output common mode voltage
is set using an external pin, independent of the inputs,
whicheliminatestheneedfortransformersorAC-coupling
capacitors in many applications. The gain is internally
fixed at 20dB (10V/V).
1nV/√Hz Internal Op Amp Noise
6.2dB Noise Figure
Differential Inputs and Outputs
Rail-to-Rail Output Swing
40mA Supply Current (120mW) per Amplifier
1V to 1.6V Output Common Mode Voltage,
Adjustable
DC- or AC-Coupled Operation
20-Lead 3mm × 4mm × 0.75mm QFN Package
The LTC6421-20 saves space and power compared to
alternativesolutionsusingIFgainblocksandtransformers.
The LTC6421-20 is packaged in a compact 20-lead
3mm × 4mm QFN package and operates over the –40°C
to 85°C temperature range.
n
n
APPLICATIONS
n
Differential ADC Driver
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
Single Ended to Differential Conversion
n
IF Sampling (Diversity) Receivers
Broadband I/Q Amplifiers
Satellite Communications
n
n
TYPICAL APPLICATION
Matched Dual Amplifiers with Output Common Mode Biasing
3V
1000pF
0.1μF
V
V
OCMA
OCMA
Distribution of Gain Match
+
V
A
ENABLEA
Z
IN
= 200Ω
0.1μF
LTC6421-20
40
35
30
25
20
15
10
5
1000Ω
100Ω
–INA
12.5Ω
+OUTA
V
V
OCMA
OCMA
V
INA
0.1μF
100Ω
12.5Ω
+INA
–OUTA
–
–
1000Ω
1000Ω
V
V
0.1dB GAIN MATCHING
0.1° PHASE MATCHING
AT 100MHz
0.1μF
0.1μF
100Ω
100Ω
12.5Ω
12.5Ω
+INB
–INB
–OUTB
+OUTB
V
V
OCMB
OCMB
V
INB
0
–0.25 –0.15 –0.05
0.05
0.15
0.25
CHANNEL-TO-CHANNEL GAIN MATCH (dB)
1000Ω
Z
= 200Ω
IN
642120 TA01b
+
V
B
V
OCMB
ENABLEB
642120 TA01a
1000pF
0.1μF
V
OCMB
3V
642120fb
1
LTC6421-20
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
+
–
Supply Voltage (V – V ).........................................3.6V
Input Current (Note 2).......................................... 10mA
Operating Temperature Range (Note 3)....–40°C to 85°C
Specified Temperature Range (Note 4) ....–40°C to 85°C
Storage Temperature Range...................–65°C to 150°C
Maximum Junction Temperature........................... 150°C
Output Short-Circuit Duration .......................... Indefinite
TOP VIEW
20 19 18 17
+INA
–INA
1
2
3
4
5
6
16 –OUTA
+
V
V
V
V
A
15
14
13
12
–
–
–
+
V
21
–
–
V
V
–INB
+INB
B
11 –OUTB
7
8
9 10
UDC PACKAGE
20-LEAD (3mm × 4mm) PLASTIC QFN
= 150°C, θ = 43°C/W, θ = 5°C/W
T
JMAX
JA
JC
–
EXPOSED PAD (PIN 21) IS V , MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LTC6421CUDC-20#PBF
LTC6421IUDC-20#PBF
LTC6421CUDC-20#TRPBF LDDN
LTC6421IUDC-20#TRPBF LDDN
0°C to 70°C
20-Lead (3mm × 4mm) Plastic QFN
20-Lead (3mm × 4mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
SELECTOR GUIDE
PART NUMBER
GAIN
(dB)
GAIN
(V/V)
Z
(DIFFERENTIAL)
IN
SINGLE
LTC6400-8
LTC6400-14
LTC6400-20
LTC6400-26
LTC6401-8
LTC6401-14
LTC6401-20
LTC6401-26
DUAL
(Ω)
COMMENT
Lowest Distortion
Lowest Distortion
Lowest Distortion
Lowest Distortion
Lowest Power
8
2.5
5
400
200
200
50
14
20
26
8
LTC6420-20
10
20
2.5
5
400
200
200
50
14
20
26
Lowest Power
LTC6421-20
10
20
Lowest Power
Lowest Power
642120fb
2
LTC6421-20
DC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, +IN = –IN = VOCM = 1.25V, ENABLE = 0V, No RL unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input/Output Characteristic
l
l
l
l
l
l
l
l
l
l
l
l
l
G
Gain
V
=
100mV Differential
Channel-to-Channel
100mV Differential
19.6
20
0.1
20.4
0.25
dB
dB
DIFF
IN
ΔG
Gain Matching
Gain Temperature Drift
TC
V
=
IN
0.0015
0.1
dB/°C
V
GAIN
V
V
V
Output Swing Low (V
= 1.5V)
= 1.5V)
Each Output, V
Each Output, V
=
=
400mV Differential
400mV Differential
0.25
SWINGMIN
SWINGMAX
OUTDIFFMAX
OUT
OCM
IN
IN
Output Swing High (V
2.75
5
2.9
V
OCM
Maximum Differential Output Swing
Output Current Drive
5.6
V
P-P
I
2V
(Note 10)
10
–2
mA
mV
μV/°C
V
P-P, OUT
V
OS
Input Offset Voltage
Differential
Differential
0.4
1.4
2
1
TCV
Input Offset Voltage Drift
OS
VRMIN
VRMAX
I
I
Input Common Mode Voltage Range, MIN
Input Common Mode Voltage Range, MAX
Input Resistance (+IN, –IN)
Input Impedance Matching
1.6
V
R
Differential
170
200
1
230
2.5
Ω
INDIFF
ΔR
Channel-to-Channel
%
IN
C
Input Capacitance (+IN, –IN)
Output Resistance (+OUT, –OUT)
Common Mode Rejection Ratio
Differential, Includes Parasitic
Differential
1
pF
INDIFF
l
l
R
20
45
25
68
36
Ω
OUTDIFF
CMRR
Input Common Mode Voltage 1V to 1.6V
dB
Output Common Mode Voltage Control
G
Common Mode Gain
V
= 1V to 1.6V
1
V/V
V
CM
OCM
OCM
l
l
l
l
l
V
V
V
Output Common Mode Range, MIN
Output Common Mode Range, MAX
Common Mode Offset Voltage
Common Mode Offset Voltage Drift
1
10
0
OCMMIN
OCMMAX
OSCM
1.6
V
V
= 1.25V to 1.5V
–10
2
6
mV
μV/°C
μA
TCV
OSCM
IV
V
Input Current
OCM
–15
2.4
–3
OCM
ENABLEx Pins (x = A, B)
l
l
V
V
ENABLEx Input Low Voltage
ENABLEx Input High Voltage
ENABLEx Input Current
0.8
V
V
IL
IH
l
l
0.5
3
μA
μA
ENABLEx ≤ 0.8V
ENABLEx ≥ 2.4V
1.5
Power Supply
l
l
l
V
Operating Supply Range
Supply Current
2.85
55
3
40
1
3.5
50
3
V
mA
mA
S
I
I
ENABLEx ≤ 0.8V; per Amplifier
S
Shutdown Supply Current
ENABLEx ≥ 2.4V; per Amplifier,
Inputs Floating
SHDN
+
l
PSRR
Power Supply Rejection Ratio (Differential
Outputs)
V
= 2.85V to 3.5V
86
dB
642120fb
3
LTC6421-20
AC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VOCM = 1.25V, ENABLE = 0V, No RL unless otherwise
noted.
SYMBOL
ΔG
PARAMETER
CONDITIONS
f = 100MHz (Note 9)
f = 100MHz
MIN
TYP
0.1
0.2
80
MAX
UNITS
dB
l
Gain Matching
0.25
ΔP
Phase Matching
deg
Channel Separation (Note 8)
–3dB Bandwidth
f = 100MHz
dB
–3dBBW
0.5dBBW
0.1dBBW
NF
200mV
200mV
200mV
(Note 6)
(Note 6)
(Note 6)
1.3
250
130
6.2
2.2
22
GHz
MHz
MHz
dB
P-P, OUT
P-P, OUT
P-P, OUT
Bandwidth for 0.5dB Flatness
Bandwidth for 0.1dB Flatness
Noise Figure
R = 375Ω (Note 5), f = 100MHz
L
e
e
Input Referred Voltage Noise Density Includes Resistors (Short Inputs), f = 100MHz
Output Referred Voltage Noise Density Includes Resistors (Short Inputs), f = 100MHz
1/f Noise Corner
nV/√Hz
nV/√Hz
kHz
IN
ON
1/f
SR
12.5
4500
2
Slew Rate
Differential (Note 6)
2V (Note 6)
V/μs
ns
t
t
1% Settling Time
Overdrive Recovery Time
1dB Compression Point
Turn-On Time
S1%
P-P, OUT
1.9V
(Note 6) Single Ended
P-P, OUT
7
ns
OVDR
P
18
dBm
ns
R = 375Ω (Notes 5, 7), f = 100MHz
L
1dB
t
t
+OUT, –OUT Within 10% of Final Values
80
ON
OFF
Turn-Off Time
I
Falls to 10% of Nominal
150
15
ns
CC
–3dBBW
V
Pin Small Signal –3dB BW
0.1V at V , Measured Single-Ended at
OCM
MHz
VOCM
OCM
P-P
Output (Note 6)
3rd Order Intermodulation Distortion f = 100MHz (1MHz Spacing),
= 2V Composite
IMD
–76
42
dBc
dBc
3
V
OUT
P-P
OIP
3rd Order Output Intercept
3rd Order Input Intercept
f = 100MHz (Note 7)
3
IIP
3
f = 100MHz (Z = 50Ω)
22
16
dBc
dBc
IN
f = 100MHz (Z = 200Ω)
IN
HD
HD
2nd Order Harmonic Distortion
3rd Order Harmonic Distortion
f = 100MHz, V
f = 100MHz, V
= 2V
= 2V
–74
–78
dBc
dBc
2
OUT
OUT
P-P
P-P
3
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Input pins (+IN, –IN) are protected by steering diodes to either
supply. If the inputs go beyond either supply rail, the input current should
be limited to less than 10mA.
Note 6: Measured using Test Circuit B. R = 87.5Ω on each output.
L
Note 7: Since the LTC6421-20 is a feedback amplifier with low output
impedance, a resistive load is not required when driving an AD converter.
Therefore, typical output power is very small. In order to compare the
LTC6421-20 with amplifiers that require 50Ω output load, the output
voltage swing driving a given R is converted to OIP and P as if it were
L
3
1dB
driving a 50Ω load. Using this modified convention, 2V is by definition
P-P
equal to 10dBm, regardless of actual R .
L
Note 3: The LTC6421C and LTC6421I are guaranteed functional over the
operating temperature range of –40°C to 85°C.
Note 8: Channel separation (the inverse of crosstalk) is measured by
driving a signal into one input, while terminating the other input. Channel
separation is the ratio of the resulting output signal at the driven channel
to the channel that is not driven.
Note 9: Not production tested. Guaranteed by design and by correlation to
production tested parameters.
Note 4: The LTC6421C is guaranteed to meet specified performance from
0°C to 70°C. It is designed, characterized and expected to meet specified
performance from –40°C to 85°C but is not tested or QA sampled at these
temperatures. The LTC6421I is guaranteed to meet specified performance
from –40°C to 85°C.
Note 5: Input and output baluns used. See Test Circuit A.
Note 10: The output swing range is at least 2V differential even when
P-P
sourcing or sinking 20mA. Tested at V
= 1.5V.
OCM
642120fb
4
LTC6421-20
TYPICAL PERFORMANCE CHARACTERISTICS
Channel-to-Channel Gain Match
vs Frequency
Channel-to-Channel Group Delay
Match vs Frequency
Channel-to-Channel Phase Match
vs Frequency
0.5
0.4
0.3
0.2
0.5
0.4
0.3
0.2
1.0
0.5
0.1
0
0.1
0
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.1
–0.2
–0.3
–0.4
–0.5
–0.5
–1.0
10
100
1000 2000
10
100
1000 2000
10
100
500
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
642120 G01
642120 G02
642120 G03
S21 Phase and Group Delay
vs Frequency
Input and Output Reflection and
Reverse Isolation vs Frequency
Frequency Response
0
25
20
15
10
5
100
0
1.5
TEST CIRCUIT B
TEST CIRCUIT B
TEST CIRCUIT B
–10
–20
–30
–40
–50
–60
–70
–80
1.2
0.9
0.6
0.3
0
S11
S22
PHASE
–100
–200
–300
–400
GROUP DELAY
S12
0
10
100
1000
3000
10
100
1000
3000
0
200
400
600
800
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
642120 G05
642120 G06
642120 G04
Input and Output Impedance
vs Frequency
Noise Figure and Input Referred
Noise Voltage vs Frequency
Small-Signal Transient Response
250
225
200
175
150
125
100
75
100
80
15
14
13
12
11
10
9
8
7
6
5
6
4
2
0
1.35
1.30
1.25
1.20
1.15
R
= 87.5Ω PER OUTPUT
L
Z
IN
60
40
+OUT
Z
OUT
20
NOISE FIGURE
0
Z
IN
–20
–40
–60
–80
–100
PHASE
IMPEDANCE MAGNITUDE
e
IN
4
3
2
1
–OUT
50
25
Z
OUT
0
0
1
10
100
1000
10
100
FREQUENCY (MHz)
1000
0
5
10
TIME (ns)
15
20
FREQUENCY (MHz)
642120 G09
642120 G07
642120 G08
642120fb
5
LTC6421-20
TYPICAL PERFORMANCE CHARACTERISTICS
Third Order Intermodulation
Distortion vs Frequency
Overdrive Transient Response
Harmonic Distortion vs Frequency
–40
–50
–40
–50
2.5
2.0
1.5
1.0
0.5
0
R
= 87.5Ω PER OUTPUT
DIFFERENTIAL INPUT
L
DIFFERENTIAL INPUT
–OUT
V
= 2V COMPOSITE
V
= 2V
OUT
P-P
OUT
P-P
DRIVING LTC2235
DRIVING LTC2285
–60
–60
–70
–70
–80
HD2
–90
HD3
–80
–90
–100
–110
–120
+OUT
50
–100
0
50
100
FREQUENCY (MHz)
150
200
0
100
TIME (ns)
150
200
0
50
100
FREQUENCY (MHz)
150
200
642120 G10
642120 G12
642120 G11
Equivalent Output Third Order
Intercept vs Frequency
Channel Separation
vs Frequency
120
70
60
50
40
30
20
10
0
DIFFERENTIAL INPUT
(NOTE 8)
V
= 2V COMPOSITE
OUT
P-P
100
80
60
40
20
40
(NOTE 7)
DRIVING LTC2285
1
10
100
1000
0
50
100
FREQUENCY (MHz)
150
200
FREQUENCY (MHz)
642120 G13
642120 G14
642120fb
6
LTC6421-20
PIN FUNCTIONS
+INA, –INA, –INB, +INB (Pins 1, 2, 5, 6): Differential
Inputs of A and B channel respectively.
–OUTA, +OUTA, –OUTB, +OUTB (Pins 16, 17, 11, 10):
Differential Outputs of channels A and B respectively.
–
V (Pins 3, 4, 13, 14, 21): Negative Power Supply. All
V
OCMA
, V
(Pins 19, 8): These pins set the output
OCMB
four pins, as well as the exposed back, must be connected
to same voltage/ground.
common mode voltage for the respective channel. They
are internally separate. A 0.1μF external bypass capacitor
is recommended.
ENABLEA, ENABLEB (Pins 9, 18): Logic inputs. If low,
the amplifier is enabled. If high, the amplifier is disabled
and placed in a low-power shutdown mode, making
the amplifier outputs high impedance. These pins are
internally separate. These pins should not be left
floating.
–
Exposed Pad (Pin 21): V . The Exposed Pad must be
connected to same voltage/ground as pins 3, 4, 13, 14.
+
+
V A , V B (Pins 15, 20, 7, 12 ): Positive Power Supply
(Normallytiedto3Vor3.3V).SupplypinsofAandBchannels
are internally separate. Bypass each pin with 1000pF and
0.1μF capacitors as close to the pins as possible.
BLOCK DIAGRAM
+
V
A
V
ENABLEA
+OUTA
17
OCMA
19
20
18
R
F
R
R
1000Ω
OUT
G
12.5Ω
100Ω
1
2
16
15
+INA
–INA
–OUTA
+
–
+
R
G
100Ω
R
OUT
12.5Ω
V
A
+
–
R
F
–
–
1000Ω
14
13
–
3
4
V
V
V
–
V
R
R
OUT
G
100Ω
12.5Ω
+
5
6
+ –
–INB
+INB
V
B
12
R
R
G
100Ω
OUT
12.5Ω
11 –OUTB
–
+
R
F
1000Ω
7
8
9
10
642120 BD
+
V
B
V
ENABLEB
+OUTB
OCMB
642120fb
7
LTC6421-20
APPLICATIONS INFORMATION
Circuit Operation
Input Impedance and Matching
Each of the two channels of the LTC6421-20 is composed
of a fully differential amplifier with on chip feedback and
outputcommonmodevoltagecontrolcircuitry.Differential
gain and input impedance are set by 100Ω/1000Ω
resistors in the feedback network. Small output resistors
of 12.5Ω improve the circuit stability over various load
conditions.
The differential input impedance of the LTC6421-20 is
200Ω. If a 200Ω source impedance is unavailable, then
the differential inputs may need to be terminated to a
lower value impedance, e.g. 50Ω, in order to provide
an impedance match for the source. Several choices
are available. One approach is to use a differential shunt
resistor (Figure 1). Another approach is to employ a wide
band transformer (Figure 2). Both methods provide a
wide band impedance match. The termination resistor or
the transformer must be placed close to the input pins in
order to minimize the reflection due to input mismatch.
Alternatively, one could apply a narrowband impedance
match at the inputs of the LTC6421-20 for frequency
selection and/or noise reduction.
The LTC6421-20 is very flexible in terms of I/O coupling.
It can be AC- or DC-coupled at the inputs, the outputs or
both.IftheinputsareAC-coupled,theinputcommonmode
voltage is automatically biased close to V
and thus
OCM
no external circuitry is needed for bias. The LTC6421-20
provides an output common mode voltage set by V
,
OCM
which allows driving an ADC directly without external
componentssuchasatransformerorACcouplingcapacitors.
The input signal can be either single-ended or differential
with only minor differences in distortion performance.
1/2 LTC6421-20
1/2 LTC6421-20
1000Ω
25Ω
100Ω
1000Ω
25Ω
100Ω
+IN
+IN
+
–
–
+
1:4
• •
+
–
–
+
IN
IN
OUT
IN
IN
OUT
V
IN
V
IN
+
+
66.5Ω
–
–
OUT
1000Ω
OUT
1000Ω
25Ω
100Ω
25Ω
100Ω
–IN
–IN
642120 F01
642120 F02
Figure 1. Input Termination for Differential 50Ω Input Impedance
Using Shunt Resistor
Figure 2. Input Termination for Differential 50Ω Input Impedance
Using a 1:4 Balun
642120fb
8
LTC6421-20
APPLICATIONS INFORMATION
Output Impedance Match
ReferringtoFigure3,LTC6421-20canbeeasilyconfigured
for single-ended input and differential output without a
balun. The signal is fed to one of the inputs through a
matchingnetworkwhiletheotherinputisconnectedtothe
samematchingnetworkandasourceresistor.Becausethe
return ratios of the two feedback paths are equal, the two
outputshavethesamegainandthussymmetricalswing.In
general,thesingle-endedinputimpedanceandtermination
TheLTC6421-20candriveanADCdirectlywithoutexternal
output impedance matching. Alternatively, the differential
output impedance of 25Ω can be matched to a higher
value impedance, e.g. 50Ω, by series resistors or an LC
network.
Output Common Mode Adjustment
resistor R are determined by the combination of R , R
T
S
G
The output common mode voltage is set by the VOCM pin,
which is a high impedance input. The output common
mode voltage is capable of tracking VOCM in a range from
1V to 1.6V. The bandwidth of VOCM control is typically
15MHz, whichisdominatedbyalowpassfilterconnected
to the VOCM pin and is aimed to reduce common mode
noise generation at the outputs. The internal common
mode feedback loop has a –3dB bandwidth of 300MHz,
allowingfastrejectionofanycommonmodeoutputvoltage
disturbance. The VOCM pin should be tied to a DC bias
and R . For example, when R is 50Ω, it is found that the
F
S
single-ended input impedance is 202Ω and R is 66.5Ω
T
in order to match to a 50Ω source impedance.
The LTC6421-20 is unconditionally stable. However,
the overall differential gain is affected by both source
impedance and load impedance as follows:
VOUT
RL
RS + 200 25+RL
2000
AV =
=
•
V
IN
LTC6421-20
100Ω
R
S
0.1μF
1000Ω
50Ω
+IN
V
IN
+
–
R
T
+
–
–
+
IN
IN
OUT
66.5Ω
OUT
1000Ω
R //R
S
T
0.1μF
28.7Ω
100Ω
–IN
642120 F03
Figure 3. Input Termination for Single-Ended 50Ω Input Impedance
642120fb
9
LTC6421-20
APPLICATIONS INFORMATION
voltage with a 0.1μF bypass capacitor. When interfacing
with A/D converters such as the LTC22xx families, the
VOCM pin can be connected to the VCM pin of the ADC.
Test Circuits
Due to the fully-differential design of the LTC6421 and
its usefulness in applications with differing characteristic
specifications, two test circuits are used to generate the
information in this data sheet. Test Circuit A is DC1299, a
two-port demonstration circuit for the LTC6420/LTC6421
family. The schematic and silkscreen are shown in Fig-
ure 4. This circuit includes input and output transformers
(baluns) for single-ended-to-differential conversion and
impedance transformation, allowing direct hook-up to a
2-port network analyzer. There are also series resistors
at the output to avoid loading the amplifier directly with a
50Ω load. Due to the input and output transformers, the
–3dBbandwidthisreducedfrom1.3GHztoapproximately
1.1GHz.
Driving A/D Converters
TheLTC6421-20hasbeenspecificallydesignedtointerface
directly with high speed A/D converters. The back page of
thisdatasheetshowstheLTC6421-20drivinganLTC2285,
which is a dual 14-bit, 125Msps ADC.
The V
CM
pins of the LTC6421-20 are connected to the
OCM
V
pins of the LTC2285, which provide a DC voltage
level of 1.5V. Both ICs are powered from the same 3V
supply voltage.
TheinputstotheLTC6421-20canbeconfiguredinvarious
ways, as described in the Input Impedance and Matching
section of this data sheet. The outputs of the LTC6421-20
may be connected directly to the analog inputs of an ADC,
or a simple lowpass or bandpass filter network may be
inserted to reduce out-of-band noise.
Test Circuit B uses a 4-port network analyzer to measure
S-parameters and gain/phase response. This removes the
effects of the wideband baluns and associated circuitry,
for a true picture of the >1GHz S-parameters and AC
characteristics.
642120fb
10
LTC6421-20
APPLICATIONS INFORMATION
Figure 4a. Top Silkscreen of DC1299 (Test Circuit A)
642120fb
11
LTC6421-20
APPLICATIONS INFORMATION
+
V
R1
1.21k
1%
TD4
V
OCMA
TD5
C16
+
R2
1k
+
ENA
V
V
0.1μF
JP1
GND
1
2
3
1%
C18
C19
DIS
C22
0.1μF
0.1μF
C30
0.1μF
2
C21
[1]
C17
[1]
0.1μF
EN
J1
J2
R3
1.5k
1%
J3
J4
1
1
2
1
1
+INA
–INA
R4
+OUTA
–OUTA
5
4
T1
1
2
3
R5
[2]
C25
T2
88.7
3
2
1
4
5
0.1μF
20
V
19
A V
18
17
U1
[2]
R7
OPT
R5
[1]
R5
88.7
+
ENABLEA +OUTA
OCMA
C22
[1]
C34
[1]
• •
[2]
C22
0.1μF
R9
[2]
1
2
16
+
TCM4-19+
+INA
–INA
–OUTA
+
V
2
2
C43
0.1μF
15
C28
0.1μF
V
V
A
–
C35
1000pF
3
4
5
6
14
13
12
11
–
V
V
1
2
LTC6421-20
C31
[1]
C35
[1]
2
–
–
V
V
C30
0.1μF
C39
0.1μF
C32
0.1μF
C32
1000pF
J6
J8
J5
J7
+
1
1
1
1
2
2
–INB
+INB
B
–INB
+INB
–OUTB
+OUTB
T4
T2
5
4
1
2
3
R10
[2]
C34
3
4
5
–OUTB
ENABLEB +OUTB
0.1μF
R12
88.7
2
1
R14
[1]
R11
OPT
+
V
7
B V
OCMB
C40
0.1μF
C30
0.1μF
• •
[2]
C22
[1]
21
8
9
10
V
R12
[2]
TCM4-19+
+
ENB
JP2
R15
88.7
R17
1.5k
1%
2
C44
0.1μF
C41
[1]
1
2
3
+
+
V
V
DIS
R16
1.21k
1%
C18
0.1μF
C19
0.1μF
EN
TD1
V
OCMB
NOTES: UNLESS OTHERWISE SPECIFIED
[1] DO NOT STUFF
[2]
R18
1k
1%
C42
0.1μF
+
V
TD2
+
V
VERSION
–A
–B
U1
R5, R9, R10, R13
NONE
T1, T3
TCM4-19+
TCM4-19+
642020 F04b
2.85V TO
3.5V
LTC6420CUDC-20
LTC6421CUDC-20
C14
4.7μF
C15
1μF
NONE
TD3
GND
Figure 4b. Demo Circuit 1299 Schematic (Test Circuit A)
642120fb
12
LTC6421-20
TYPICAL APPLICATIONS
Test Circuit B, 4-Port Measurements
(Only the Signal-Path Connections Are Shown)
0.1μF
R
F
PORT 1
R
R
10007
OUT
G
0.1μF
0.1μF
+INA
–INA
+OUTA
–OUTA
(507)
37.47
37.47
12.57
1007
PORT 3
–
+
+
1/2
AGILENT
E5071C
(507)
1/2
AGILENT
E5071C
R
G
1007
R
OUT
2007
12.57
–
PORT 4
(507)
0.1μF
R
F
10007
PORT 2
(507)
642120 F04b
(B CHANNEL NOT SHOWN)
Parallel ADC Drivers to Reduce Wideband Noise
3.3V
3.3V
C1
0.1μF
C4
0.1μF
R5
49.9Ω
1/2
LTC6421-20
R6
49.9Ω
C2
12pF
R3
10Ω
C5
12pF
+
–
R4
10Ω
V
IN
LTC2208
R7
49.9Ω
V
CM
C3
12pF
1/2
LTC6421-20
R8
49.9Ω
642120 TA02
V
–3dB FILTER BANDWIDTH = 120MHz
OCM
C6
2.2μF
642120fb
13
LTC6421-20
PACKAGE DESCRIPTION
UDC Package
20-Lead Plastic QFN (3mm × 4mm)
(Reference LTC DWG # 05-08-1742 Rev Ø)
0.70 0.05
3.50 0.05
2.10 0.05
2.65 0.05
1.50 REF
1.65 0.05
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
2.50 REF
3.10 0.05
4.50 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.20 OR 0.25
s 45° CHAMFER
0.75 0.05
1.50 REF
19 20
R = 0.05 TYP
3.00 0.10
0.40 0.10
1
2
PIN 1
TOP MARK
(NOTE 6)
2.65 0.10
1.65 0.10
4.00 0.10
2.50 REF
(UDC20) QFN 1106 REV Ø
0.200 REF
0.00 – 0.05
0.25 0.05
0.50 BSC
BOTTOM VIEW—EXPOSED PAD
R = 0.115
TYP
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
642120fb
14
LTC6421-20
REVISION HISTORY (Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
3/10
Changes to Applications
Changes to Related Parts
1
16
642120fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC6421-20
TYPICAL APPLICATION
Dual ADC Driver for Wideband Direct-Conversion Receivers
3V
3V
C1
0.1μF
C4
0.1μF
R1
40.2Ω
R3
10Ω
C2
12pF
1/2
LTC6421-20
+
R2
40.2Ω
R4
10Ω
V
IN
1/2 LTC2285
–
C3
12pF
V
CM
642120 TA03
–3dB FILTER BANDWIDTH = 140MHz
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
High-Speed Differential Amplifiers/Differential Op Amps
LT®1993-2
LT1993-4
LT1993-10
LT1994
800MHz Differential Amplifier/ADC Driver
900MHz Differential Amplifier/ADC Driver
700MHz Differential Amplifier/ADC Driver
Low Noise, Low Distortion Differential Op Amp
A = 2V/V, OIP3 = 38dBm at 70MHz
V
A = 4V/V, OIP3 = 40dBm at 70MHz
V
A = 10V/V, OIP3 = 40dBm at 70MHz
V
16-Bit SNR and SFDR at 1MHz, Rail-to-Rail Outputs
LT5514
Ultralow Distortion IF Amplifier/ADC Driver with Digitally
Controlled Gain
OIP3 = 47dBm at 100MHz, Gain Control Range 10.5dB to 33dB
LT5524
Low Distortion IF Amplifier/ADC Driver with Digitally
Controlled Gain
OIP3 = 40dBm at 100MHz, Gain Control Range 4.5dB to 37dB
LTC6400-8/
LTC6400-14/
LTC6400-20/
LTC6400-26
Low Noise, Low Distortion, Differential ADC Drivers
A = 8dB/14dB/20dB/26dB, Single Amplifier per IC, High Performance
V
LTC6401-8/
LTC6401-14/
LTC6401-20/
LTC6401-26
Low Noise, Low Distortion, Differential ADC Drivers
A = 8dB/14dB/20dB/26dB, Single Amplifier per IC, Low Power
V
LT6402-6
300MHz Differential Amplifier/ADC Driver
300MHz Differential Amplifier/ADC Driver
300MHz Differential Amplifier/ADC Driver
A = 6dB, Distortion < –80dBc at 25MHz
V
LT6402-12
LT6402-20
LTC6404-1
A = 12dB, Distortion < –80dBc at 25MHz
V
A = 20dB, Distortion < –80dBc at 25MHz
V
600MHz, Low Noise, AC Precision, Fully Differential
Input/Output Amplifier/Driver
A = Unity Gain, e = 1.5nV/Hz, Distortion < –90dBc at 10MHz
V n
LTC6404-2
LTC6404-4
900MHz, Low Noise, AC Precision, Fully Differential
Input/Output Amplifier/Driver
A = 2V/V, e = 1.5nV/Hz, Distortion < –95dBc at 10MHz
V n
1800MHz, Low Noise, AC Precision, Fully Differential
Input/Output Amplifier/Driver
A = 4V/V, e = 1.5nV/Hz, Distortion < –98dBc at 10MHz
V n
LTC6406
LT6411
3GHz Rail-to-Rail Input Differential Op Amp
1.6nV/√Hz Noise, –72dBc Distortion at 50MHz, 18mA
16mA Supply Current, IMD3 = –83dBc at 70MHz, A = 1, –1 or 2
Low Power Differential ADC Driver/Dual Selectable Gain
Amplifier
V
642120fb
LT 0310 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LTC6421IUDC-20#TR
LTC6421-20 - Dual Matched 1.3GHz Differential Amplifiers/ADC Drivers; Package: QFN; Pins: 20; Temperature Range: -40°C to 85°C
Linear
LTC6421IUDC-20#TRPBF
LTC6421-20 - Dual Matched 1.3GHz Differential Amplifiers/ADC Drivers; Package: QFN; Pins: 20; Temperature Range: -40°C to 85°C
Linear
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