LTM2882IY-5#PBF_技术文档

LTM2882

Dual Isolated RS232

µModule Transceiver + Power

DESCRIPTION

FEATURES

The LTM^®2882 is a complete galvanically isolated dual

RS232 µModule^®(micromodule)transceiver. No external

components are required. A single 3.3V or 5V supply

powers both sides of the interface through an integrated,

isolated DC/DC converter. A logic supply pin allows easy

interfacing with different logic levels from 1.62V to 5.5V,

independent of the main supply.

n

RS232 Transceiver: 2500V

for 1 Minute

RMS

File #E151738

n

UL-CSA Recognized

n

CSA Component Acceptance Notice 5A

Isolated DC Power: 5V at Up to 200mA

No External Components Required

1.62V to 5.5V Logic Supply for Flexible Digital

Interfacing

n

High Speed Operation

Coupled inductors and an isolation power transformer

1Mbps for 250pF/3kΩ Load

250kbps for 1nF/3kΩ Load

provide2500V

ofisolationbetweenthelinetransceiver

RMS

and the logic interface. This device is ideal for systems

with different grounds, allowing for large common mode

voltages. Uninterrupted communication is guaranteed for

common mode transients greater than 30kV/μs.

100kbps for 2.5nF/3kΩ TIA/EIA-232-F Load

3.3V (LTM2882-3) or 5V (LTM2882-5) Operation

No Damage or Latchup to 10kV ꢀHM ESD on

Isolated RS232 Interface or Across Isolation Harrier

ꢀigh Common Mode Transient Immunity: 30kV/μs

n

This part is compatible with the TIA/EIA-232-F standard.

Driver outputs are protected from overload and can be

shorted to ground or up to 15V without damage. An

auxiliary isolated digital channel is available. This channel

allows configuration for half-duplex operation by control-

ling the DE pin.

Maximum Continuous Working Voltage: 560V

True RS232 Compliant Output Levels

15mm × 11.25mm HGA and LGA Packages

PEAK

APPLICATIONS

n

Isolated RS232 Interface

Enhanced ESD protection allows this part to withstand up

to 10kV(humanbodymodel)onthetransceiverinterface

pins to isolated supplies and across the isolation barrier

to logic supplies without latchup or damage.

n

Industrial Communication

n

Test and Measurement Equipment

Hreaking RS232 Ground Loops

n

All registered trademarks and trademarks are the property of their respective owners.

TYPICAL APPLICATION

Isolated Dual RS232 µModule Transceiver

1Mbps Operation

ꢉ.ꢉꢊ ꢋLTM2882ꢌꢉꢍ

ꢎꢊ ꢋLTM2882ꢌꢎꢍ

Tꢄꢍ

ꢐꢅ/ꢃꢄꢅ

ꢊ

ꢏꢏ

LTM2882

L

ꢊ

ꢎꢊ

ꢏꢏ2

ꢅꢓ

ꢀꢊꢀꢆLꢀꢒLꢓ ꢏꢈꢇꢇꢓꢄTꢔ

ꢂꢎꢁmꢀ ꢋLTM2882ꢌꢎꢍ

ꢂꢁꢁmꢀ ꢋLTM2882ꢌꢉꢍ

ꢃFF ꢃꢄ

ꢃꢄ

TꢓꢈꢉT/ꢆꢓꢄꢍ

ꢓꢁꢅ/ꢃꢄꢅ

ꢅꢆꢄ

ꢅꢃꢈT

TꢂꢃꢈT

ꢇꢂꢆꢄ

T2ꢈꢉT/ꢆ2ꢄꢍ

Tꢂꢆꢄ

ꢆꢓꢈꢉT

ꢐꢅ/ꢃꢄꢅ

ꢆ2ꢈꢉT

ꢇꢂꢃꢈT

T2ꢆꢄ

T2ꢃꢈT

ꢇ2ꢆꢄ

2882 Tꢎꢁꢓꢔ

ꢀꢁꢁnꢂ/ꢃꢄꢅ

ꢇ2ꢃꢈT

ꢃꢆꢄꢅꢇꢆ ꢈꢉTꢊꢉTꢋ Tꢄꢇꢃ Tꢈ ꢆꢇꢌꢇꢄꢅꢇꢆ ꢄꢍꢊꢉTꢋ

TꢈꢉT Lꢈꢎꢃ ꢏ 2ꢐꢁꢑF ꢒ ꢆꢄꢍ

ꢆꢈꢉT Lꢈꢎꢃ ꢏ ꢓꢐꢁꢑF

ꢐꢄꢅ

ꢐꢄꢅ2

2882 Tꢀꢁꢂa

2882fh

1

For more information www.linear.com/LTM2882

LTM2882

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

Tꢠꢒ ꢀꢉꢇꢛ

V

to GND .................................................. –0.3V to 6V

CC

ꢌ

2

ꢍ

ꢎ

ꢏ

ꢐ

ꢑ

8

V to GND .................................................... –0.3V to 6V

L

ꢀ

ꢁꢁ

ꢡ2ꢠꢢT

T2ꢉꢃ ꢡꢌꢠꢢT

Tꢌꢉꢃ ꢄꢉꢃ ꢠꢃ

L

V

CC2

to GND2............................................... –0.3V to 6V

ꢅ

ꢆ

ꢁ

ꢄ

ꢇ

F

Logic Inputs

T1IN, T2IN, ON, DIN to GND........–0.3V to (V + 0.3V)

L

CC2

ꢂꢃꢄ

DE to GND2.............................–0.3V to (V

Logic Outputs

+ 0.3V)

R1OUT, R2OUT to GND...............–0.3V to (V + 0.3V)

L

CC2

DOUT to GND2........................–0.3V to (V

Driver Output Voltage

T1OUT, T2OUT to GND2...........................–15V to 15V

Receiver Input Voltage

R1IN, R2IN to GND2 ............................... –25V to 25V

Operating Temperature Range (Note 4)

+ 0.3V)

ꢂ

ꢈ

ꢉ

ꢊ

LTM2882C .........................................0°C ≤ T ≤ 70°C

A

ꢂꢃꢄ2

ꢋ

L

LTM2882I ..................................... –40°C ≤ T ≤ 85°C

A

LTM2882ꢀ.................................. –40°C ≤ T ≤ 105°C

A

Maximum Internal Operating Temperature............ 125°C

Storage Temperature Range .................. –40°C to 125°C

Peak Package Hody Reflow Temperature .............. 245°C

ꢡ2ꢉꢃ

ꢀ

ꢁꢁ2

T2ꢠꢢT ꢡꢌꢉꢃ TꢌꢠꢢT ꢄꢠꢢT ꢄꢇ

ꢆꢂꢅ ꢒꢅꢁꢋꢅꢂꢇ

ꢍ2ꢓꢒꢉꢃ ꢔꢌꢏmm × ꢌꢌ.2ꢏmm × ꢍ.ꢎ2mmꢕ

ꢗ ꢌ2ꢏꢘꢁꢙ

Lꢂꢅ ꢒꢅꢁꢋꢅꢂꢇ

ꢍ2ꢓꢒꢉꢃ ꢔꢌꢏmm × ꢌꢌ.2ꢏmm × 2.8mmꢕ

T

ꢗ ꢌ2ꢏꢘꢁꢙ

ꢊMꢅꢖ

θ

ꢗ ꢍꢟꢘꢁ/ꢛꢙ θ

ꢗ 2ꢑ.8ꢘꢁ/ꢛꢙ

θ

ꢊꢅ

ꢗ 2ꢚꢘꢁ/ꢛꢙ θ

ꢗ 2ꢑ.ꢚꢘꢁ/ꢛꢙ

ꢊꢁtoꢜ

ꢊꢅ

ꢊꢁtoꢜ

θ

ꢗ ꢌꢚ.ꢍꢘꢁ/ꢛꢙ θ ꢗ 2ꢎꢘꢁ/ꢛꢙ

θ

ꢗ ꢌ8ꢘꢁ/ꢛꢙ θ ꢗ 22.ꢑꢘꢁ/ꢛꢙ

ꢛꢇꢉꢂꢈT ꢗ ꢌ.ꢌꢞ

ꢊꢁꢝottom

ꢊꢆ

ꢊꢁꢝottom

ꢊꢆ

ꢛꢇꢉꢂꢈT ꢗ ꢌ.ꢌꢞ

2882fh

2

For more information www.linear.com/LTM2882

LTM2882

ORDER INFORMATION

http://www.linear.com/product/LTM2882#orderinfo

PART MARKING

INPUT

VOLTAGE

PAD OR BALL

FINISH

PACKAGE

TYPE

MSL

RATING

PART NUMBER

DEVICE

FINISH CODE

TEMPERATURE RANGE

0°C to 70°C

LTM2882CY-3#PHF

LTM2882IY-3#PHF

LTM2882ꢀY-3#PHF

LTM2882CY-5#PHF

LTM2882IY-5#PHF

LTM2882ꢀY-5#PHF

LTM2882CV-3#PHF

LTM2882IV-3#PHF

LTM2882CV-5#PHF

LTM2882IV-5#PHF

3V to 3.6V

LTM2882Y-3

LTM2882Y-5

–40°C to 85°C

–40°C to 105°C

0°C to 70°C

SAC305

(RoꢀS)

e1

HGA

LGA

4.5V to 5.5V

–40°C to 85°C

–40°C to 105°C

0°C to 70°C

3

3V to 3.6V

LTM2882V-3

LTM2882V-5

–40°C to 85°C

0°C to 70°C

Au (RoꢀS)

e4

4.5V to 5.5V

–40°C to 85°C

• Device temperature grade is indicated by a label on the shipping

container.

• Recommended HGA and LGA PCH Assembly and Manufacturing

Procedures: www.linear.com/umodule/pcbassembly

• Pad or ball finish code is per IPC/JEDEC J-STD-609.

• Terminal Finish Part Marking: www.linear.com/leadfree

• LGA and HGA Package and Tray Drawings: www.linear.com/packaging

• This product is moisture sensitive. For more information, go to:

www.linear.com/umodule/pcbassembly

• This product is not recommended for second side reflow. For more

information, go to: www.linear.com/HGA-assy

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. LTM2882-3 V_CC= 3.3V, LTM2882-5 V_CC= 5.0V, V_L= V_CC, and GND =

GND2 = 0V, ON = V_Lunless otherwise noted.

SYMBOL

Supplies

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Input Supply Range

LTM2882-3

LTM2882-5

3.0

4.5

3.3

5.0

3.6

5.5

10

V

CC

V

Logic Supply Range

Input Supply Current

1.62

V

L

I

ON = 0V

0

µA

mA

CC

LTM2882-3, No Load

LTM2882-5, No Load

24

17

30

l

25

mA

l

V

Regulated Output Voltage, Loaded

LTM2882-3 DE = 0V, I

LTM2882-5 DE = 0V, I

DE = 0, No Load

= 100mA

= 150mA

4.7

4.8

5.0

65

V

CC2

LOAD

Regulated Output Voltage, No Load

Efficiency

5.35

V

CC2(NOLOAD)

I

= 100mA, LTM2882-5 (Note 2)

%

CC2

I

Output Supply Short-Circuit Current

200

mA

CC2

Driver

l

V

Driver Output Voltage Low

Driver Output Voltage ꢀigh

Driver Short-Circuit Current

R = 3kΩ

–5

5

–5.7

6.2

35

V

OLD

OꢀD

OSD

OZD

L

V

R = 3kΩ

L

I

V

, V

= 0V, V

= 5.5V

15V

70

10

mA

µA

T1OUT T2OUT

CC2

Driver Three-State (ꢀigh Impedance)

Output Current

DE = 0V, V

, V

=

0.1

T1OUT T2OUT

2882fh

3

For more information www.linear.com/LTM2882

LTM2882

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. LTM2882-3 V_CC= 3.3V, LTM2882-5 V_CC= 5.0V, V_L= V_CC, and GND =

GND2 = 0V, ON = V_Lunless otherwise noted.

SYMBOL

Receiver

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Receiver Input Threshold

Input Low

Input ꢀigh

0.8

1.3

1.7

0.4

V

IR

2.5

1.0

V

ꢀYSR

Receiver Input ꢀysteresis

Receiver Input Resistance

0.1

3

l

R

–15V ≤ (V

, V ) ≤ 15V

5

7

kΩ

IN

R1IN R2IN

Logic

l

V

Logic Input Threshold Voltage

ON, T1IN, T2IN, DIN = 1.62V ≤ V < 2.35V

0.25•V

0.4

0.75•V

V

ITꢀ

L

ON, T1IN, T2IN, DIN = 2.35V ≤ V ≤ 5.5V

0.67•V

L

DE

0.4

0.67•V

1

V

CC2

I

Logic Input Current

µA

mV

INL

V

Logic Input ꢀysteresis

Logic Output ꢀigh Voltage

T1IN, T2IN, DIN (Note 2)

R1OUT, R2OUT

150

ꢀYS

Oꢀ

l

I

= –1mA (Sourcing), 1.62V ≤ V < 3.0V

V – 0.4

V

LOAD

L

= –4mA (Sourcing), 3.0V ≤ V ≤ 5.5V

V – 0.4

L

l

DOUT, I

= –4mA (Sourcing)

V

– 0.4

CC2

V

LOAD

V

Logic Output Low Voltage

R1OUT, R2OUT

OL

l

I

= 1mA (Sinking), 1.62V ≤ V < 3.0V

0.4

V

LOAD

L

= 4mA (Sinking), 3.0V ≤ V ≤ 5.5V

L

l

DOUT, I

= 4mA (Sinking)

0.4

V

LOAD

ESD (HBM) (Note 2)

RS232 Driver and Receiver Protection

(T1OUT, T2OUT, R1IN, R2IN) to (V , GND2)

10

kV

CC2

(T1OUT, T2OUT, R1IN, R2IN) to (V , V , GND)

CC

L

Isolation Houndary

(V , GND2) to (V , V , GND)

CC2 CC L

SWITCHING CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. LTM2882-3 V_CC= 3.3V, LTM2882-5 V_CC= 5.0V, V_L= V_CC, and GND =

GND2 = 0V, ON = V_Lunless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

R = 3kΩ, C = 2.5nF (Note 3)

MIN

100

250

1000

10

TYP

MAX

UNITS

kbps

l

Maximum Data Rate

(T1IN to T1OUT, T2IN to T2OUT)

L

R = 3kΩ, C = 1nF (Note 3)

kbps

L

R = 3kΩ, C = 250pF (Note 3)

kbps

L

Maximum Data Rate (DIN to DOUT)

C = 15pF (Note 3)

L

Mbps

Driver

l

Driver Slew Rate (6V/t

or t

)

TLꢀ

R = 3kΩ, C = 50pF (Figure 1)

150

0.5

V/µs

µs

TꢀL

L

t

, t

Driver Propagation Delay

Driver Skew |t – t

R = 3kΩ, C = 50pF (Figure 1)

0.2

40

PꢀLD PLꢀD

L

|

R = 3kΩ, C = 50pF (Figure 1)

ns

SKEWD

PꢀLD

PLꢀD

L

l

, t

Driver Output Enable Time

Driver Output Disable Time

DE = ↑ , R = 3kΩ, C = 50pF (Figure 2)

0.6

0.3

2

µs

PZꢀD PZLD

L

, t

DE = ↓ , R = 3kΩ, C = 50pF (Figure 2)

µs

PꢀZD PLZD

L

2882fh

4

For more information www.linear.com/LTM2882

LTM2882

SWITCHING CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. LTM2882-3 V_CC= 3.3V, LTM2882-5 V_CC= 5.0V, V_L= V_CC, and GND =

GND2 = 0V, ON = V_Lunless otherwise noted.

SYMBOL

Receiver

PARAMETER

CONDITIONS

MIN

TYP

MAX

0.4

UNITS

l

t

, t

Receiver Propagation Delay

C = 150pF (Figure 3)

L

0.2

40

60

µs

ns

PꢀLR PLꢀR

Receiver Skew |t

– t

PLꢀR

|

C = 150pF (Figure 3)

L

SKEWR

PꢀLR

, t

Receiver Rise or Fall Time

C = 150pF (Figure 3)

L

200

RR FR

Auxiliary Channel

l

t

, t

Propagation Delay

Rise or Fall Time

C = 15pF, t and t < 4ns (Figure 4)

60

100

200

ns

PꢀLL PLꢀL

L

R

F

t

, t

C = 150pF (Figure 4)

L

RL FL

Power Supply

l

Power-Up Time

ON = ↑ to V

0.2

2

ms

CC2(MIN)

ISOLATION CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. LTM2882-3 V_CC= 3.3V, LTM2882-5 V_CC= 5.0V, V_L= V_CC, and GND =

GND2 = 0V, ON = V_Lunless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

2500

4400

30

TYP

MAX

UNITS

V

ISO

Rated Dielectric Insulation Voltage

1 Minute, Derived from 1 Second Test

1 Second (Notes 5, 6)

V

RMS

V

Common Mode Transient Immunity

Maximum Working Insulation Voltage

V = ON = 3.3V, V = 1kV, ∆t = 33ns (Note 2)

L

kV/µs

CM

V

IORM

(Notes 2, 5)

560

400

V

PEAK

V

RMS

Partial Discharge

V

PR

= 1050 V

(Notes 2, 5)

5

pC

PEAK

CTI

DTI

Comparative Tracking Index

Depth of Erosion

Distance Through Insulation

IEC 60112 (Note 2)

(Note 2)

600

V

RMS

0.017

0.06

mm

9

Input to Output Resistance

Input to Output Capacitance

Creepage Distance

(Notes 2, 5)

10

Ω

6

pF

9.48

mm

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 4: This device includes over-temperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above specified maximum operating junction

temperature may result in device degradation or failure.

Note 2: Guaranteed by design and not subject to production test.

Note 5: Tests performed from GND to GND2, all pins shorted each side of

isolation barrier.

Note 3: Maximum Data Rate is guaranteed by other measured parameters

and is not tested directly.

Note 6: The rated dielectric insulation voltage should not be interpreted as

a continuous voltage rating.

2882fh

5

For more information www.linear.com/LTM2882

LTM2882

T_A= 25°C, LTM2882-3 V_CC= 3.3V, LTM2882-5

TYPICAL PERFORMANCE CHARACTERISTICS

V_CC= 5V, V_L= 3.3V, and GND = GND2 = 0V, ON = V_Lunless otherwise noted.

V_CCSupply Current vs Load

Capacitance (Dual Transceiver)

ꢎꢊꢊ

V_CCSupply Current

vs Temperature

V_CCSupply Current

vs Temperature

ꢎꢋ

2ꢊ

2ꢋ

ꢏꢊ

ꢏꢋ

ꢎꢋ

ꢏꢊ

ꢏꢋ

ꢊꢊ

ꢊꢋ

ꢐꢊ

ꢐꢋ

ꢑꢊ

ꢑꢋ

ꢍꢒ Lꢒꢃꢓ

ꢗꢊ

ꢌ

ꢔ ꢎ.ꢎꢌ

ꢇꢇ

LTM2882ꢕꢎ

2ꢏꢊꢐꢑꢒꢓꢔ LTM2882ꢕꢖ

ꢌ

ꢗ ꢑ.ꢑꢌ

ꢇꢇ

8ꢊ

ꢙꢊ

ꢚꢊ

ꢏꢊ

ꢘꢊ

ꢖꢊ

2ꢊ

LTM2882ꢝꢑ

ꢎꢊꢊꢐꢑꢒꢓꢔ LTM2882ꢕꢖ

ꢎꢗ.2ꢐꢑꢒꢓꢔ LTM2882ꢕꢖ

ꢌ

ꢔ ꢊ.ꢋꢌ

ꢇꢇ

LTM2882ꢕꢊ

ꢌ

ꢗ ꢊ.ꢋꢌ

ꢇꢇ

2ꢏꢊꢐꢑꢒꢓꢔ LTM2882ꢕꢏ

ꢎꢊꢊꢐꢑꢒꢓꢔ LTM2882ꢕꢏ

ꢎꢗ.2ꢐꢑꢒꢓꢔ LTM2882ꢕꢏ

LTM2882ꢝꢊ

TꢒꢔꢄT ꢃꢍꢕ T2ꢔꢄT

ꢖꢃꢄꢕ ꢗ ꢒꢋꢋꢘꢙꢚꢛ

ꢂ

L

ꢗ ꢑꢘꢜ ꢇ ꢗ 2.ꢊnF

L

ꢉꢊꢋ ꢉ2ꢊ

ꢋ

2ꢊ

ꢊꢋ

ꢑꢊ ꢏꢋꢋ ꢏ2ꢊ

ꢉꢊꢋ ꢉ2ꢊ

ꢋ

2ꢊ

ꢊꢋ

ꢎꢊ ꢒꢋꢋ ꢒ2ꢊ

ꢊ

ꢊ.ꢏ

ꢎ

ꢎ.ꢏ

2

2.ꢏ

TꢀMꢁꢀꢂꢃTꢄꢂꢀ ꢅꢆꢇꢈ

Lꢀꢁꢂ ꢃꢁꢄꢁꢃꢅTꢁꢆꢃꢇ ꢈnFꢉ

2882 ꢐꢋꢏ

2882 ꢓꢋ2

2882 ꢛꢊꢖ

Receiver Input Threshold

vs Temperature

V

_CCSupply Current vs Data Rate

Driver Slew Rate

(Dual Transceiver)

vs Load Capacitance

ꢒ.ꢋ

2.ꢊ

2.ꢋ

ꢓ.ꢊ

ꢓ.ꢋ

ꢋ.ꢊ

ꢋ

ꢏꢐꢊ

ꢏ2ꢊ

ꢏꢊꢊ

8ꢊ

ꢑꢊ

ꢕꢊ

ꢒꢊ

ꢔꢊ

ꢖꢊ

2ꢊ

ꢓꢊ

ꢊ

ꢕ.ꢕꢋ ꢌ ꢔ ꢏnF

L

ꢔꢕꢁꢄT ꢌꢔꢑꢌ

ꢕ.ꢕꢋ ꢌ ꢔ 2ꢓꢊꢇF

L

ꢔꢕꢁꢄT Lꢎꢖ

FꢁLLꢅꢆꢗ

ꢍꢅꢋꢅꢆꢗ

ꢑꢊ

ꢓ.ꢊꢋ ꢌ ꢔ ꢏnF

L

ꢐꢊ

ꢓ.ꢊꢋ ꢌ ꢔ 2ꢓꢊꢇF

L

2ꢊ

ꢉꢊꢋ ꢉ2ꢊ

ꢋ

2ꢊ

ꢊꢋ

ꢗꢊ ꢓꢋꢋ ꢓ2ꢊ

ꢊ

2ꢊꢊ

ꢐꢊꢊ

ꢑꢊꢊ

8ꢊꢊ

ꢏꢊꢊꢊ

ꢊ

ꢓ

2

ꢖ

ꢔ

ꢒ

TꢀMꢁꢀꢂꢃTꢄꢂꢀ ꢅꢆꢇꢈ

ꢀꢁTꢁ ꢂꢁTꢃ ꢄꢅꢆꢇꢈꢉ

Lꢀꢁꢂ ꢃꢁꢄꢁꢃꢅTꢁꢆꢃꢇ ꢈnFꢉ

2882 ꢑꢋꢊ

2882 ꢒꢊꢐ

2882 ꢗꢊꢕ

Driver Disabled Leakage Current

vs Temperature at 15V

Driver Short-Circuit Current

vs Temperature

Receiver Output Voltage

vs Load Current

ꢊꢋ

ꢒꢊ

ꢒꢋ

ꢔꢊ

ꢔꢋ

2ꢊ

2ꢋ

ꢓꢊ

ꢓꢋ

ꢏꢋꢋꢋ

ꢏꢋꢋ

ꢏꢋ

ꢎ

ꢑ

ꢐ

ꢒ

2

ꢏ

ꢊ

ꢑ

ꢓ ꢏꢊꢑ

TꢒꢄT

ꢌ

ꢔ ꢑ.ꢑꢌ

L

ꢔ ꢒ.ꢒꢌ

ꢔ ꢏ.ꢎ2ꢌ

ꢌꢐꢑꢗꢐꢑꢖ

ꢏ

ꢌꢎꢄꢂꢇꢐꢑꢖ

ꢋ.ꢏ

ꢋ.ꢋꢏ

ꢋ.ꢋꢋꢏ

ꢉꢊꢋ ꢉ2ꢊ

ꢋ

2ꢊ

ꢊꢋ

ꢕꢊ ꢓꢋꢋ ꢓ2ꢊ

ꢉꢊꢋ ꢉ2ꢊ

ꢋ

2ꢊ

ꢊꢋ

ꢐꢊ ꢏꢋꢋ ꢏ2ꢊ

ꢊ

2

ꢐ

ꢎ

8

ꢏꢊ

TꢀMꢁꢀꢂꢃTꢄꢂꢀ ꢅꢆꢇꢈ

Lꢀꢁꢂ ꢃꢄꢅꢅꢆꢇTꢈmꢁꢉ

2882 ꢖꢋꢕ

2882 ꢍꢋ8

2882 ꢍꢊꢓ

2882fh

6

For more information www.linear.com/LTM2882

LTM2882

T_A= 25°C, LTM2882-3 V_CC= 3.3V, LTM2882-5

TYPICAL PERFORMANCE CHARACTERISTICS

V_CC= 5V, V_L= 3.3V, and GND = GND2 = 0V, ON = V_Lunless otherwise noted.

Logic Input Threshold

vs V_LSupply Voltage

V_CC2Output Voltage

vs Load Current

ꢏ.ꢐ

ꢏ.ꢋ

2.ꢐ

2.ꢋ

ꢑ.ꢐ

ꢑ.ꢋ

ꢋ.ꢐ

ꢋ

ꢍ.2

ꢍ.ꢒ

ꢍ.ꢊ

ꢎ.ꢑ

ꢎ.8

ꢎ.ꢐ

ꢎ.ꢏ

ꢎ.ꢍ

ꢋ

ꢃꢃ

ꢋ

ꢃꢃ

ꢔ ꢓ.ꢊꢋ Tꢀ ꢓ.ꢏ ꢕ LTM2882ꢖꢓ

ꢔ ꢎ.ꢍꢋ Tꢀ ꢍ.ꢍ ꢕ LTM2882ꢖꢍ

5.5V

ꢔꢕꢃꢂT ꢌꢔꢇꢌ

ꢔꢕꢃꢂT Lꢅꢖ

5.0V

3.3V

ꢓ.ꢊꢋ

3.6V

4.5V

ꢋ

ꢑ

2

ꢏ

ꢒ

ꢐ

ꢓ

ꢊ

ꢍꢊ

ꢒꢊꢊ

ꢒꢍꢊ

2ꢊꢊ

2ꢍꢊ

ꢓꢊꢊ

ꢀ

ꢁꢂꢃꢃLꢄ ꢀꢅLTꢆꢇꢈ ꢉꢀꢊ

Lꢀꢁꢂ ꢃꢄꢅꢅꢆꢇT ꢈmꢁꢉ

L

2882 ꢇꢑꢋ

2882 ꢌꢒꢒ

Driver Outputs Exiting Shutdown

Driver Outputs Enable/Disable

ꢈꢊ

TꢀꢈꢉT

ꢄꢌ ꢍ ꢄꢈꢉ ꢏ

2ꢄ/ꢂꢃꢄ

ꢅꢄ/ꢂꢃꢄ

ꢂꢋ

ꢄ

ꢍ ꢆ

ꢅꢊ

L

ꢇꢆ/ꢄꢅꢆ

TꢆꢇꢈT

T2ꢈꢉT

TꢀꢈꢉT

ꢄꢌ ꢍ ꢆ

T2ꢇꢈT

ꢎꢎ2

T2ꢈꢉT

2882 ꢋꢀ2

2882 ꢉꢆꢊ

ꢀꢁꢁꢂꢃ/ꢄꢅꢆ

2ꢀꢁ/ꢂꢃꢄ

Operating Through 35kV/µs

Common Mode Transients

Tꢆꢄꢇ

TꢆꢉꢊT ꢔ ꢈꢆꢄꢇ

ꢈꢆꢉꢊT

2ꢅ/ꢃꢄꢅ

ꢋ

ꢀꢁꢁꢅ/ꢃꢄꢅ

2882 ꢒꢆꢓ

ꢀꢁnꢂ/ꢃꢄꢅ

ꢋ MꢊLTꢄꢌLꢍ ꢎꢏꢍꢍꢌꢎ ꢉF

ꢐꢉMMꢉꢇ Mꢉꢃꢍ TꢈꢑꢇꢎꢄꢍꢇTꢎ

2882fh

7

For more information www.linear.com/LTM2882

LTM2882

T_A= 25°C, LTM2882-3 V_CC= 3.3V, LTM2882-5

TYPICAL PERFORMANCE CHARACTERISTICS

V_CC= 5V, V_L= 3.3V, and GND = GND2 = 0V, ON = V_Lunless otherwise noted.

V_CC2Surplus Current

vs Temperature

V

_CC2Power Efficiency

ꢎꢋꢋ

2ꢊꢋ

2ꢋꢋ

ꢏꢊꢋ

ꢏꢋꢋ

ꢊꢋ

ꢑꢊ

ꢒꢊ

ꢔꢊ

ꢕꢊ

ꢓꢊ

2ꢊ

ꢖꢊ

ꢖ.2

ꢖ.ꢊ

LTM2882ꢘꢔ

ꢌ

ꢕ ꢊ.ꢋꢌ

ꢇꢇ

LTM2882ꢜꢊ

ꢊ.8

LTM2882ꢘꢓ

ꢊ.ꢒ

ꢊ.ꢕ

ꢊ.2

ꢌ

ꢕ ꢎ.ꢎꢌ

LTM2882ꢜꢎ

ꢇꢇ

TꢏꢒꢄT ꢃꢍꢓ T2ꢒꢄT

ꢔꢃꢄꢓ ꢕ ꢏꢋꢋꢖꢗꢘꢙ

ꢂ

ꢌ

ꢕ ꢎꢖꢚ ꢇ ꢕ 2.ꢊnF

L

ꢇꢇ2

L

ꢕ ꢛ.8ꢌ

T

ꢙ 2ꢔꢚꢃ

ꢁ

ꢋ

ꢊ

ꢉꢊꢋ ꢉ2ꢊ

ꢋ

2ꢊ

ꢊꢋ

ꢑꢊ ꢏꢋꢋ ꢏ2ꢊ

ꢊ

ꢔꢊ

ꢖꢊꢊ

ꢖꢔꢊ

2ꢊꢊ

2ꢔꢊ

ꢓꢊꢊ

TꢀMꢁꢀꢂꢃTꢄꢂꢀ ꢅꢆꢇꢈ

Lꢀꢁꢂ ꢃꢄꢅꢅꢆꢇT ꢈmꢁꢉ

2882 ꢐꢏꢊ

2882 ꢗꢖꢒ

V_CC2Load Step Response

V_CC2Ripple and Noise

2ꢁꢁmꢆ/ꢄꢅꢆ

ꢇꢁmꢈ/ꢄꢅꢆ

ꢀꢁꢁmꢆ/ꢄꢅꢆ

Tꢀꢅꢉ ꢊ 2ꢋꢁꢌꢍꢎꢃ

Tꢀꢏꢐ ꢑ T2ꢏꢐ ꢑ ꢒ ꢊ ꢓꢌ

L

2882 ꢇꢀꢈ

2882 ꢉꢀ8

ꢀꢁꢂꢃ/ꢄꢅꢆ

ꢀꢁꢁꢂꢃ/ꢄꢅꢆ

2882fh

8

For more information www.linear.com/LTM2882

LTM2882

TEST CIRCUITS

V

L

TIN

½V

L

0V

TOUT

t

PHLD

PLHD

C

TIN

R

L

V

L

OHD

3V

TOUT

0V

–3V

V

OLD

t , t ≤ 40ns

f

t

r

THL

TLH

2882 F01

Figure 1. Driver Slew Rate and Timing Measurement

V

CC2

0V

DE

TOUT

½V

CC2

t

PHZD

PZHD

V

OHD

0 OR V

TOUT

L

5V

V

– 0.5V

OHD

OLD

C

R

L

0V

t

PLZD

DE

PZLD

t , t ≤ 40ns

r

f

–5V

V

OLD

2882 F02

Figure 2. Driver Enable/Disable Times

3V

RIN

1.5V

ROUT

–3V

t

PLHR

PHLR

C

RIN

t , t ≤ 40ns

L

V

OH

10%

90%

10%

ROUT

½V

L

r

f

90%

V

OL

t

FR

t

RR

2882 F03

Figure 3. Receiver Timing Measurement

ꢏ

L

ꢂꢃꢄ

ꢎꢏ

L

ꢀꢏ

ꢂꢅꢆT

t

ꢈꢉLL

ꢈLꢉL

ꢇ

ꢂꢃꢄ

L

ꢏ

ꢅꢉ

ꢍꢀꢌ

ꢋꢀꢌ

ꢍꢀꢌ

ꢂꢅꢆT

ꢎꢏ

ꢇꢇ2

ꢏ

ꢅL

t

ꢊL

t

FL

2882 Fꢀꢁ

Figure 4. Auxiliary Channel Timing Measurement

2882fh

9

For more information www.linear.com/LTM2882

LTM2882

PIN FUNCTIONS

LOGIC SIDE

ISOLATED SIDE

R2OUT (Pin A1): Channel 2 RS232 Inverting Receiver

Output. Controlled through isolation barrier from receiver

input R2IN. Under the condition of an isolation communi-

cation failure R2OUT is in a high impedance state.

GND2 (Pins K1-K7): Isolated Side Circuit Ground. These

pads should be connected to the isolated ground and/or

cable shield.

V

(PinsK8,L7-L8):IsolatedSupplyVoltageOutput.In-

CC2

T2IN (Pin A2): Channel 2 RS232 Inverting Driver Input.

A logic low on this input generates a high on isolated

output T2OUT. A logic high on this input generates a low

on isolated output T2OUT. Do not float.

ternallygeneratedfromV byanisolatedDC/DCconverter

CC

and regulated to 5V. Supply voltage for pins R1IN, R2IN,

DE, and DOUT. Internally bypassed to GND2 with 2.2µF.

R2IN (Pin L1): Channel 2 RS232 Inverting Receiver Input.

A low on isolated input R2IN generates a logic high on

R2OUT. A high on isolated input R2IN generates a logic

low on R2OUT. Impedance is nominally 5kΩ in receive

mode or unpowered.

R1OUT (Pin A3): Channel 1 RS232 Inverting Receiver

Output. Controlled through isolation barrier from receiver

input R1IN. Under the condition of an isolation communi-

cation failure R1OUT is in a high impedance state.

T1IN (Pin A4): Channel 1 RS232 Inverting Driver Input.

A logic low on this input generates a high on isolated

output T1OUT. A logic high on this input generates a low

on isolated output T1OUT. Do not float.

T2OUT (Pin L2): Channel 2 RS232 Inverting Driver

Output. Controlled through isolation barrier from driver

input T2IN. ꢀigh impedance when the driver is disabled

(DE pin is low).

DIN (Pin A5): General Purpose Non-Inverting Logic Input.

A logic high on DIN generates a logic high on isolated

output DOUT. A logic low on DIN generates a logic low

on isolated output DOUT. Do not float.

R1IN (Pin L3): Channel 1 RS232 Inverting Receiver Input.

A low on isolated input R1IN generates a logic high on

R1OUT. A high on isolated input R1IN generates a logic

low on R1OUT. Impedance is nominally 5kΩ in receive

mode or unpowered.

ON(PinA6):Enable. Enablespoweranddatacommunica-

tion through the isolation barrier. If ON is high the part is

enabled and power and communications are functional to

the isolated side. If ON is low the logic side is held in reset

and the isolated side is unpowered. Do not float.

T1OUT (Pin L4): Channel 1 RS232 Inverting Driver

Output. Controlled through isolation barrier from driver

input T1IN. ꢀigh impedance when the driver is disabled

(DE pin is low).

V (PinA7):LogicSupply.Interfacesupplyvoltageforpins

DOUT (Pin L5): General Purpose Non-Inverting Logic

Output. Logic output connected through isolation barrier

to DIN.

L

DIN,R2OUT,T2IN,R1OUT,T1IN,andON.Operatingvoltage

is 1.62V to 5.5V. Internally bypassed to GND with 2.2µF.

V

(Pins A8, B7-B8): Supply Voltage. Operating volt-

DE (Pin L6): Driver Output Enable. A low input forces

both RS232 driver outputs, T1OUTand T2OUT, into a high

impedance state. A high input enables both RS232 driver

outputs. Do not float.

CC

age is 3.0V to 3.6V for LTM2882-3, and 4.5V to 5.5V for

LTM2882-5. Internally bypassed to GND with 2.2µF.

GND (Pins B1-B6): Circuit Ground.

2882fh

10

For more information www.linear.com/LTM2882

LTM2882

BLOCK DIAGRAM

ꢐꢃ

ꢋꢇꢅ

ꢃ

ꢄꢄ2

ꢄꢄ

2.2ꢂF

ꢃ

ꢅꢆꢁ2

ꢁꢇ

L

2.2ꢂF

ꢅꢆꢁ

ꢁꢈꢉT

ꢃ

ꢁꢁ

ꢁꢄ/ꢁꢄ

ꢄꢈꢆꢃꢇꢋTꢇꢋ

ꢃ

ꢇꢇ

ꢈꢆ

ꢁꢌꢆ

ꢃ

ꢁꢁ

TꢊꢈꢉT

ꢋꢊꢌꢆ

Tꢊꢌꢆ

ꢋꢊꢈꢉT

T2ꢌꢆ

ꢌꢍꢈLꢎTꢇꢁ

ꢄꢈMMꢉꢆꢌꢏ

ꢄꢎTꢌꢈꢆꢍ

ꢌꢍꢈLꢎTꢇꢁ

ꢄꢈMMꢉꢆꢌꢏ

ꢄꢎTꢌꢈꢆꢍ

ꢇꢇ

ꢐꢑ

ꢌꢆTꢇꢋFꢎꢄꢇ

ꢃ

ꢁꢁ

T2ꢈꢉT

ꢋ2ꢌꢆ

ꢃ

ꢇꢇ

ꢋ2ꢈꢉT

2882 ꢀꢁ

2882fh

11

For more information www.linear.com/LTM2882

LTM2882

APPLICATIONS INFORMATION

Overview

ꢏ.ꢀꢌ Tꢂ ꢏ.ꢎꢌ LTM2882ꢐꢏ

ꢑ.ꢁꢌ Tꢂ ꢁ.ꢁꢌ LTM2882ꢐꢁ

ꢊꢃꢋ ꢌꢂLTꢊꢍꢉ FꢇꢂM

ꢆ.ꢎ2ꢌ Tꢂ ꢁ.ꢁꢌ

TheLTM2882µModuletransceiverprovidesagalvanically-

isolatedrobustRS232interface,poweredbyanintegrated,

regulated DC/DC converter, complete with decoupling

capacitors. The LTM2882 is ideal for use in networks

where grounds can take on different voltages. Isolation in

the LTM2882 blocks high voltage differences, eliminates

ground loops and is extremely tolerant of common mode

transients between grounds. Error-free operation is main-

tained through common mode events greater than 30kV/

μs providing excellent noise isolation.

ꢌ

ꢓꢓ

ꢌ

LTM2882

L

ꢓꢓ2

ꢄꢉ

ꢂꢃ

ꢄꢅꢃ

ꢄꢂꢈT

TꢆꢂꢈT

ꢇꢆꢅꢃ

Tꢆꢅꢃ

ꢉꢒTꢉꢇꢃꢊL

ꢄꢉꢌꢅꢓꢉ

ꢇꢆꢂꢈT

T2ꢅꢃ

T2ꢂꢈT

ꢇ2ꢅꢃ

ꢇ2ꢂꢈT

ꢍꢃꢄ

ꢍꢃꢄ2

µModule Technology

2882 Fꢀꢁ

The LTM2882 utilizes isolator µModule technology to

translate signals and power across an isolation barrier.

Signalsoneithersideofthebarrierareencodedintopulses

and translated across the isolation boundary using core-

less transformers formed in the µModule substrate. This

system, complete with data refresh, error checking, safe

shutdown on fail, and extremely high common mode im-

munity, provides a robust solution for bidirectional signal

isolation. The µModule technology provides the means

to combine the isolated signaling with our advanced dual

RS232transceiverandpowerfulisolatedDC/DCconverter

in one small package.

Figure 5. V_CCand V_LAre Independent

The internal power solution is sufficient to support the

transceiver interface at its maximum specified load and

data rate, and has the capacity to provide additional 5V

power on the isolated side V

and GND2 pins. V and

CC2

CC

V

are each bypassed internally with 2.2µF ceramic

CC2

capacitors.

V Logic Supply

L

A separate logic supply pin V allows the LTM2882 to in-

L

terface with any logic signal from 1.62V to 5.5V as shown

DC/DC Converter

in Figure 5. Simply connect the desired logic supply to V .

L

The LTM2882 contains a fully integrated isolated DC/DC

converter, including the transformer, so that no external

components are necessary. The logic side contains a full-

bridge driver, running at about 2Mꢀz, and is AC-coupled

to a single transformer primary. A series DC blocking

capacitor prevents transformer saturation due to driver

duty cycle imbalance. The transformer scales the primary

voltage, and is rectified by a full-wave voltage doubler.

This topology eliminates transformer saturation caused

by secondary imbalances.

There is no interdependency between V and V ; they

CC

L

may simultaneously operate at any voltage within their

specified operating ranges and sequence in any order. V

is bypassed internally by a 2.2µF capacitor.

L

Hot Plugging Safely

Caution must be exercised in applications where power is

plugged into the LTM2882’s power supplies, V or V ,

CC

L

due to the integrated ceramic decoupling capacitors. The

parasitic cable inductance along with the high Q char-

acteristics of ceramic capacitors can cause substantial

ringing which could exceed the maximum voltage ratings

and damage the LTM2882. Refer to Analog Devices Ap-

plication Note 88, entitled “Ceramic Input Capacitors Can

Cause Overvoltage Transients” for a detailed discussion

and mitigation of this phenomenon.

TheDC/DCconverterisconnectedtoalowdropoutregulator

(LDO) to provide a regulated low noise 5V output, V

.

CC2

An integrated boost converter generates a 7V V supply

DD

andachargepumped–6.3VV supply.V andV power

EE

DD

EE

the output stage of the RS232 drivers and are regulated

to levels that guarantee greater than 5V output swing.

2882fh

12

For more information www.linear.com/LTM2882

LTM2882

APPLICATIONS INFORMATION

Channel Timing Uncertainty

Driver Overvoltage and Overcurrent Protection

Multiplechannelsaresupportedacrosstheisolationbound-

ary by encoding and decoding of the inputs and outputs.

ThetechniqueusedassignsT1IN/R1INthehighestpriority

such that there is no jitter on the associated output chan-

nels T1OUT/R1OUT, only delay. This preemptive scheme

will produce a certain amount of uncertainty on T2IN/

R2IN to T2OUT/R2OUT and DIN to DOUT. The resulting

pulse width uncertainty on these low priority channels is

typically 6ns, but may vary up to about 40ns.

The driver outputs are protected from short-circuits to

any voltage within the absolute maximum range of 15V

relative to GND2. The maximum current is limited to no

more than 70mA to maintain a safe power dissipation and

prevent damaging the LTM2882.

Receiver Overvoltage and Open Circuit

The receiver inputs are protected from common mode

voltages of 25V relative to GND2.

Eachreceiverinput hasanominalinput impedanceof 5kΩ

relative to GND2. An open circuit condition will generate a

logic high on each receiver’s respective output pin.

Half-Duplex Operation

The DE pin serves as a low-latency driver enable for half-

duplex operation. The DE pin can be easily driven from

the logic side by using the uncommitted auxiliary digital

channel, DIN to DOUT. Each driver is enabled and disabled

in lessthan2µs, while each receiverremains continuously

active. This mode of operation is illustrated in Figure 6.

RF, Magnetic Field Immunity

The LTM2882 has been independently evaluated and has

successfully passed the RF and magnetic field immunity

testing requirements per European Standard EN 55024,

in accordance with the following test standards:

ꢊ.ꢊꢋ ꢌLTM2882ꢍꢊꢎ

ꢏꢋ ꢌLTM2882ꢍꢏꢎ

ꢋ

ꢂꢃ

ꢋ

LTM2882

L

ꢐꢐ

ꢐꢐ2

ꢄꢉ

EN 61000-4-3

EN 61000-4-8

EN 61000-4-9

Radiated, Radio-Frequency,

Electromagnetic Field Immunity

ꢄꢅꢃ

ꢄꢂꢈT

TꢆꢂꢈT

ꢇꢆꢅꢃ

ꢇ

ꢕ

T

ꢕ

Power Frequency

Magnetic Field Immunity

Tꢆꢅꢃ

ꢇꢆꢂꢈT

T2ꢅꢃ

Pulsed Magnetic Field Immunity

T2ꢂꢈT

ꢇ2ꢅꢃ

Tests were performed using an unshielded test card de-

signed per the data sheet PCH layout recommendations.

Specific limits per test are detailed in Table 1.

ꢇ2ꢂꢈT

ꢑꢃꢄ

ꢑꢃꢄ2

2882 Fꢀꢁ

Table 1

Figure 6. Half-Duplex Configuration Using D_OUTto Drive DE

TEST

FREQUENCY

80Mꢀz to 1Gꢀz

1.4Mꢀz to 2Gꢀz

2Gꢀz to 2.7Gꢀz

50ꢀz and 60ꢀz

60ꢀz

FIELD STRENGTH

10V/m

EN 61000-4-3, Annex D

3V/m

1V/m

EN 61000-4-8, Level 4

EN 61000-4-8, Level 5

EN 61000-4-9, Level 5

*Non IEC Method

30A/m

100A/m*

1000A/m

Pulse

2882fh

13

For more information www.linear.com/LTM2882

LTM2882

APPLICATIONS INFORMATION

PCB Layout

antennastructurewhichcanradiatedifferentialvoltages

formed between GND and GND2. If ground planes are

used it is recommended to minimize their area, and

use contiguous planes as any openings or splits can

exacerbate RF emissions.

The high integration of the LTM2882 makes PCH layout

very simple. ꢀowever, to optimize its electrical isolation

characteristics, EMI, and thermal performance, some

layout considerations are necessary.

• For large ground planes a small capacitance (≤ 330pF)

from GND to GND2, either discrete or embedded within

the substrate, provides a low impedance current return

path for the module parasitic capacitance, minimizing

anyhighfrequencydifferentialvoltagesandsubstantially

reducing radiated emissions. Discrete capacitance will

notbeaseffectiveduetoparasiticESL.Inaddition,volt-

age rating, leakage, and clearance must be considered

for component selection. Embedding the capacitance

withinthePCHsubstrateprovidesanearidealcapacitor

and eliminates component selection issues; however,

the PCH must be 4 layers. Care must be exercised in

applying either technique to insure the voltage rating

of the barrier is not compromised.

• Under heavily loaded conditions V and GND current

CC

can exceed 300mA. Sufficient copper must be used

on the PCH to insure resistive losses do not cause the

supply voltage to drop below the minimum allowed

level. Similarly, the V

and GND2 conductors must

CC2

be sized to support any external load current. These

heavy copper traces will also help to reduce thermal

stress and improve the thermal conductivity.

• InputandOutputdecouplingisnotrequired,sincethese

components are integrated within the package. An ad-

ditional bulk capacitor with a value of 6.8µF to 22µF is

recommended. The high ESR of this capacitor reduces

boardresonancesandminimizesvoltagespikescaused

by hot plugging of the supply voltage. For EMI sensitive

applications,anadditionallowESLceramiccapacitorof

1µF to 4.7µF, placed as close to the power and ground

terminalsaspossible, isrecommended. Alternatively, a

numberofsmallervalueparallelcapacitorsmaybeused

to reduce ESL and achieve the same net capacitance.

The PCH layout in Figures 7a to 7e show the low EMI

demo board for the LTM2882. The demo board uses a

combination of EMI mitigation techniques, including both

embedded PCH bridge capacitance and discrete GND to

GND2 capacitors. Two safety rated type Y2 capacitors

are used in series, manufactured by Murata, part number

GA342QR7GF471KW01L. The embedded capacitor ef-

fectively suppresses emissions above 400Mꢀz, whereas

the discrete capacitors are more effective below 400Mꢀz.

• Do not place copper on the PCH between the inner col-

umnsofpads. Thisareamustremainopentowithstand

the rated isolation voltage.

• The use of solid ground planes for GND and GND2

is recommended for non-EMI critical applications to

optimize signal fidelity, thermal performance, and to

minimize RF emissions due to uncoupled PCH trace

conduction. The drawback of using ground planes,

where EMI is of concern, is the creation of a dipole

EMI performance is shown in Figure 8, measured using

a Gigahertz Transverse Electromagnetic (GTEM) cell and

method detailed in IEC 61000-4-20, “Testing and Mea-

surement Techniques – Emission and Immunity Testing

in Transverse Electromagnetic Waveguides.”

2882fh

14

For more information www.linear.com/LTM2882

LTM2882

APPLICATIONS INFORMATION

TECHNOLOGY

Figure 7a. Low EMI Demo Board Layout

Figure 7b. Low EMI Demo Board Layout (DC1747A), Top Layer

Figure 7c. Low EMI Demo Board Layout (DC1747A), Inner Layer 1

2882fh

15

For more information www.linear.com/LTM2882

LTM2882

APPLICATIONS INFORMATION

Figure 7d. Low EMI Demo Board Layout (DC1747A), Inner Layer 2

Figure 7e. Low EMI Demo Board Layout (DC1747A), Bottom Layer

ꢐꢋ

ꢘꢁTꢁꢅTꢙꢀ ꢚ ꢂꢛaꢜiꢝeaꢞ

ꢀ

ꢚ ꢕ2ꢋꢞꢈꢉ

ꢚ ꢓꢋꢋꢞꢈꢉ

ꢍꢟ

ꢑꢋ

ꢒꢋ

ꢏ

ꢠꢟꢁꢁꢝ TꢡMꢁ ꢚ ꢕꢖꢜec

ꢓꢋ

2ꢋ

ꢕꢋ

ꢋ

ꢔꢕꢋ

ꢔ2ꢋ

ꢔꢓꢋ

ꢘꢅꢕꢖꢒꢖꢢꢣꢢ

ꢘꢅꢕꢖꢒꢖꢢꢣꢍ

ꢅꢡꢠꢝꢀ 22 ꢅLꢢꢠꢠ 8 LꢡMꢡT

ꢋ

ꢕꢋꢋ 2ꢋꢋ ꢓꢋꢋ ꢒꢋꢋ ꢑꢋꢋ ꢐꢋꢋ ꢖꢋꢋ 8ꢋꢋ ꢗꢋꢋꢕꢋꢋꢋ

Fꢀꢁꢂꢃꢁꢄꢅꢆ ꢇMꢈꢉꢊ

2882 Fꢋ8

Figure 8. Low EMI Demo Board Emissions

2882fh

16

For more information www.linear.com/LTM2882

LTM2882

TYPICAL APPLICATIONS

ꢊ.ꢊꢋ ꢌLTM2882ꢍꢊꢎ

ꢏꢋ ꢌLTM2882ꢍꢏꢎ

ꢋ

ꢐꢐ

LTM2882

L

ꢂꢃ

ꢄꢉ

ꢄꢅꢃ

ꢄꢂꢈT

ꢇ

T

ꢖ

Tꢆꢅꢃ

TꢆꢂꢈT

ꢇꢆꢅꢃ

ꢊ.ꢊꢒ

ꢇꢆꢂꢈT

T2ꢅꢃ

T2ꢂꢈT

ꢇ2ꢅꢃ

ꢇ2ꢂꢈT

ꢑꢃꢄ

ꢑꢃꢄ2

2882 Fꢀꢁ

Figure 9. Single Line Dual Half-Duplex

Isolated Transceiver

ꢉ.ꢉꢊ ꢋLTM2882ꢌꢉꢍ

ꢎꢊ ꢋLTM2882ꢌꢎꢍ

ꢊ

L

ꢊ

ꢏꢏ

LTM2882

ꢂꢃ

ꢄꢈ

ꢄꢅꢃ

ꢄꢂꢇT

Tꢀꢅꢃ

TꢀꢂꢇT

ꢆꢀꢅꢃ

ꢆꢀꢂꢇT

T2ꢅꢃ

ꢉꢔ

ꢏ

L

T2ꢂꢇT

ꢆ2ꢅꢃ

ꢆ2ꢂꢇT

DATA RATE

(kbps)

C

(nF)

ꢐꢃꢄ

ꢐꢃꢄ2

L

2882 Fꢀꢁ

ꢀꢁꢁ

2ꢎꢁ

ꢎ

2

ꢀꢁꢁꢁ

ꢁ.ꢎ

Figure 10. Driving Larger Capacitive Loads

2882fh

17

For more information www.linear.com/LTM2882

LTM2882

TYPICAL APPLICATIONS

ꢍ.ꢍꢊ ꢎLTM2882ꢏꢍꢐ

ꢑꢊ ꢎLTM2882ꢏꢑꢐ

ꢋ.ꢋꢈ ꢌLTM2882ꢍꢋꢎ

ꢏꢈ ꢌLTM2882ꢍꢏꢎ

ꢀ.8ꢊ

ꢏꢈ

ꢅꢇꢊꢆLꢐTꢇꢃ

ꢊ

ꢁꢂ

ꢊ

ꢋꢋ

ꢈ

ꢁꢂ

ꢈ

ꢉꢉ

ꢈ

ꢉꢉ2

LTM2882

ꢀꢏꢑmꢐ ꢌLTM2882ꢍꢏꢎ

ꢀꢑꢑmꢐ ꢌLTM2882ꢍꢋꢎ

L

ꢁFF ꢁꢂ

ꢃꢇ

ꢃꢄꢂ

ꢃꢁꢆT

ꢃꢄꢂ

ꢃꢁꢆT

Tꢀꢄꢂ

TꢀꢁꢆT

ꢅꢀꢄꢂ

Tꢀꢄꢂ

TꢀꢁꢆT

ꢅꢀꢄꢂ

ꢈꢉ

ꢅꢀꢁꢆT

T2ꢄꢂ

ꢅꢀꢁꢆT

T2ꢄꢂ

T2ꢁꢆT

ꢅ2ꢄꢂ

T2ꢁꢆT

ꢅ2ꢄꢂ

ꢅ2ꢁꢆT

ꢌꢂꢃ

ꢌꢂꢃ2

ꢊꢂꢃ

ꢊꢂꢃ2

2882 Fꢀꢀ

2882 Fꢀ2

Figure 11. 1.8V Microprocessor Interface

Figure 12. Isolated 5V Power Supply

ꢍꢉ

ꢁ.ꢁꢉ ꢊLTM2882ꢋꢁꢌ

ꢍꢉ ꢊLTM2882ꢋꢍꢌ

ꢆꢈꢎꢇLꢏTꢈꢄ

ꢉ

ꢓꢓ

ꢉ

ꢓꢓ2

LTM2882

L

ꢂꢃ

ꢄꢈ

ꢄꢅꢃ

ꢄꢂꢇT

ꢂFF ꢂꢃ

Tꢀꢅꢃ

TꢀꢂꢇT

ꢆꢀꢅꢃ

ꢐꢉ

ꢑꢒꢅTꢓꢔꢈꢄ

ꢆꢀꢂꢇT

T2ꢅꢃ

T2ꢂꢇT

ꢆ2ꢅꢃ

ꢕꢖ.ꢁꢉ

ꢑꢒꢅTꢓꢔꢈꢄ

ꢆ2ꢂꢇT

ꢎꢃꢄ

ꢎꢃꢄ2

2882 Fꢀꢁ

ꢆꢈTꢇꢆꢃ

Figure 13. Isolated Multirail Power Supply

with Switched Outputs

2882fh

18

For more information www.linear.com/LTM2882

LTM2882

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTM2882#packaging for the most recent package drawings.

ꢛ

/ / ꢧ ꢧ ꢧ

ꢛ

ꢎ . ꢎ ꢎ ꢏ

ꢕ . ꢅ ꢡ ꢏ

ꢅ . ꢑ ꢔ ꢏ

ꢔ . ꢥ ꢕ ꢏ

ꢔ . ꢔ ꢔ ꢔ

ꢅ . ꢑ ꢔ ꢏ

ꢕ . ꢅ ꢡ ꢏ

ꢎ . ꢎ ꢎ ꢏ

a a a

ꢛ

2882fh

19

For more information www.linear.com/LTM2882

LTM2882

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTM2882#packaging for the most recent package drawings.

ꢔ

ꢟ ꢟ ꢟ

ꢔ

ꢎ . ꢎ ꢎ ꢏ

ꢘ . ꢅ ꢧ ꢏ

ꢅ . ꢑ ꢝ ꢏ

ꢝ . ꢕ ꢘ ꢏ

ꢅ . ꢑ ꢝ ꢏ

ꢘ . ꢅ ꢧ ꢏ

ꢎ . ꢎ ꢎ ꢏ

a a a

ꢔ

2882fh

20

For more information www.linear.com/LTM2882

LTM2882

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

A

3/10

Changes to Features

1

2, 15

2

Add HGA Package to Pin Configuration, Order Information and Package Description Sections

Changes to LGA Package in Pin Configuration Section

Update to Pin Functions

9

Update to RF, Magnetic Field Immunity Section

“PCH Layout Isolation Considerations” Section Replaced

ꢀ-Grade parts added. Reflected throughout the data sheet.

12

13

H

C

D

E

3/11

1/12

1-20

MP-Grade parts added. Reflected throughout the data sheet.

1-24

2

11/12 Storage temperature range updated.

5/14

Removed ꢀ-grade and MP-grade parts throughout the data sheet.

Reduced Maximum Internal Operating Temperature and Storage Temperature Range.

Added CTI and DTI parameters.

1-22

2

5

3

F

9/14

4/16

Revised Output Supply Short-Circuit Current (I

Added CSA information

)

CC2

G

1

3

Revised I (LTM2882-5) limit

CC

ꢀ

2/18

ꢀ-Grade parts added. Reflected throughout the data sheet.

1-22

2882fh

Information furnished by Analog Devices is believed to be accurate and reliable. ꢀowever, no responsibility is assumed by Analog

Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications

subject to change without notice. No liceFnoser mis ogrraentinedfobrymimatpiloicnatwiown owr.lointheearwr.cisoemun/LdTeMr a2n8y8p2atent or patent rights of Analog Devices.

21

LTM2882

TYPICAL APPLICATIONS

ꢔ.ꢔꢎ ꢕLTM2882ꢖꢔꢗ

ꢘꢎ ꢕLTM2882ꢖꢘꢗ

ꢌ.ꢌꢉ ꢍLTM2882ꢎꢌꢏ

ꢁꢉ ꢍLTM2882ꢎꢁꢏ

ꢀ.ꢐ2ꢉ Tꢂ ꢁ.ꢁꢉ

ꢂFF ꢂꢃ

ꢉ

L

ꢉ

ꢊꢊ

ꢎ

ꢂꢃ

ꢎ

ꢊꢊ

ꢎ

LTM2882

L

ꢊꢊ2

ꢄꢈ

ꢉꢊ

ꢋꢈꢆꢅꢋꢌꢈꢆꢍL

ꢂꢃ

ꢄꢈ

ꢄꢅꢃ

ꢄꢂꢇT

ꢄꢅꢃ

ꢄꢂꢇT

TꢀꢂꢇT

ꢆꢀꢅꢃ

Tꢀꢅꢃ

TꢀꢂꢇT

ꢆꢀꢅꢃ

Tꢀꢅꢃ

T ꢄ

ꢏ

ꢆ

ꢏ

ꢆꢀꢂꢇT

T2ꢅꢃ

ꢆ2ꢂꢇT

T2ꢅꢃ

ꢌꢉ Tꢂ 2ꢁꢉ

ꢉ

L

ꢆ ꢄ

T

ꢏ

ꢔꢉ

ꢕ2ꢁꢉ Tꢂ ꢔꢉ

T2ꢂꢇT

ꢆ2ꢅꢃ

T2ꢂꢇT

ꢆ2ꢅꢃ

ꢋ

ꢆTꢐ

ꢊTꢐ

ꢑ

ꢆ2ꢂꢇT

ꢋ

ꢒ

ꢋꢃꢄ

ꢋꢃꢄ2

ꢓꢃꢄ

ꢓꢃꢄ2

2882 Fꢀꢁ

Figure 14. Isolated RS232 Interface with Handshaking

Figure 15. Isolated Dual Inverting Level Translator

ꢎ.ꢎꢉ ꢔLTM2882ꢕꢎꢖ

ꢗꢉ ꢔLTM2882ꢕꢗꢖ

ꢀꢏ

ꢌꢉ

ꢍ

ꢉ

ꢂꢃ

ꢉ

ꢊꢊ

ꢉ

LTM2882

L

ꢊꢊ2

ꢄꢈ

ꢄꢅꢃ

ꢄꢂꢇT

TꢀꢂꢇT

ꢆꢀꢅꢃ

ꢆꢈꢍꢈT

Tꢀꢅꢃ

ꢚꢛMꢘ

ꢚꢛMꢙ

Lꢂꢋꢅꢊ

LꢈꢉꢈL

FꢈTꢍ

ꢆꢀꢂꢇT

T2ꢅꢃ

FꢘꢇLT

T2ꢂꢇT

ꢆ2ꢅꢃ

ꢆ2ꢂꢇT

ꢅꢆLMLꢁꢐꢑ2

ꢅꢆLML2ꢐꢑ2

ꢋꢃꢄ

ꢋꢃꢄ2

ꢊMꢚT2ꢎꢁꢞꢕLTꢉ

ꢀꢏ

ꢎꢏ

ꢐꢒꢑꢓF

ꢐꢒꢓF

ꢆ

ꢅLꢅM

ꢜ ꢑ.ꢁ/Mꢘꢝ ꢊꢇꢆꢆꢈꢃT

2882 Fꢀꢁ

Figure 16. Isolated Gate Drive with Overcurrent Detection

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

20Mbps, 15kV ꢀHM ESD, 2500V

LTM2881

Isolated RS485/RS422 µModule Transceiver with

Low EMI Integrated DC/DC Converter

Isolation with 1W Power

RMS

LTC2870/LTC2871 RS232/RS485 Multiprotocol Transceivers with

Integrated Termination

20Mbps RS485 and 500kbps RS232, 26kV ESD, 3V to 5V Operation

LTC2804

LTC1535

LTM2883

1Mbps RS232 Transceiver

Isolated RS485 Transceiver

Dual Channel, Full-Duplex, 10kV ꢀHM ESD

2500 V

Isolation with External Transformer Driver

Isolation with Power in HGA Package

RMS

2

SPI/Digital or I C Isolated µModule with Adjustable

RMS

5V and 12V Rails

2

LTM2892

SPI/Digital or I C Isolated µModule

3500 V

Isolation, 6 Channels

RMS

2882fh

LT 0218 REV H • PRINTED IN USA

www.linear.com/LTM2882

22

 ANALOG DEVICES, INC. 2010

For more information www.linear.com/LTM2882


型号：	LTM2882IY-5#PBF
厂家：	Linear
描述：	LTM2882 - Dual Isolated RS232 uModule Transceiver + Power; Package: BGA; Pins: 32; Temperature Range: -40°C to 85°C 驱动接口集成电路驱动器
文件：	总22页 (文件大小：670K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTM2882IY-5#PBF [Linear]

相关型号：

LTM2882IY-5-PBF

LTM2882_10

LTM2883

LTM2883CY-3I#PBF

LTM2883CY-3S#PBF

LTM2883CY-5S#PBF

LTM2883HY-3S#PBF

LTM2883IY-3I#PBF

LTM2883IY-3S#PBF

LTM2883IY-5I#PBF

LTM2883_1211

LTM2886CY-3I#PBF