LTM8026 [Linear]
36VIN, 5A, 2-Quadrant CVCC Step-Down; 36VIN ，5A ， 2象限CVCC降压
| 型号： | LTM8026 |
| 厂家： | 
Linear |
| 描述： | 36VIN, 5A, 2-Quadrant CVCC Step-Down |
| 文件： | 总28页 (文件大小：351K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM8052
36V , 5A, 2-Quadrant
IN
CVCC Step-Down
µModule Regulator
FeaTures
DescripTion
TheLTM®8052isa36V ,5A,2-quadrantconstant-voltage,
n
Cꢆmpꢇlnl SnlpꢃDꢆwꢄ Swinch Mꢆal Pꢆwld SQppꢇy
IN
C5CC: Cꢆꢄsnuꢄnꢃ5ꢆꢇnugl CꢆꢄsnuꢄnꢃCQddlꢄn
constant-current (CVCC) step-down μModule® regulator.
Includedinthepackagearetheswitchingcontroller,power
switches, inductor and support components. Operating
over an input voltage range of 6V to 36V, the LTM8052
supports an output voltage range of 1.2V to 24V. The
LTM8052 is able to sink or source current to maintain
voltage regulation up to the positive and negative current
limits. This output current limit can be set by a control
voltage, a single resistor or a thermistor.
n
n
ꢁꢃ-Quaduꢄn: SꢆQdcls uꢄa Siꢄks OQnpQn CQddlꢄn
n
AajQsnubꢇl OQnpQn CQddlꢄn
Wial IꢄpQn 5ꢆꢇnugl Ruꢄgl: 65 nꢆ 365
12ꢁ5 nꢆ ꢁ45 OQnpQn 5ꢆꢇnugl
Forced Continuous Operation
n
n
n
n
Selectable Switching Frequency: 100kHz to 1MHz
n
(e4) RoHS Compliant Package with Gold Pad Finish
n
Programmable Soft-Start
n
Tiny, Low Profile (11.25mm × 15mm × 2.82mm)
The LTM8052 is packaged in a thermally-enhanced, com-
pact (11.25mm × 15mm × 2.82mm) RoHS compliant,
overmolded land grid array (LGA) package suitable for au-
tomated assemblybystandard surface mount equipment.
Surface Mount LGA Package
applicaTions
n
PART NUMBER
LTM8052
BEST FOR
Constant-Frequency Voltage Regulation Even at
Sinking and Sourcing Output Current
No Load
n
LTM8026
Sourcing more than 3A of output current.
(Less than 3A maximum consider LTM8025.)
Peltier Driver
Battery Tester
Battery/Supercap Charging and Cell Balancing
Motor Drive Power Regulator
High Power LED Drive
n
n
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 7199560, 7321203 and others pending.
n
n
Typical applicaTion
±±Aꢀ ꢁ2±5 ꢂꢁꢃ-Quaduꢄnt ꢅMꢆaQꢇl 5ꢆꢇnugl RlgQꢇunꢆd
OQnpQn 5ꢆꢇnugl vs OQnpQn CQddlꢄn
3.5
V
2.5V
5A
LTM8052
OUT
V
*
IN
3.0
2.5
V
V
IN
OUT
6V TO 36V
510k
10µF
RUN
SS
V
REF
100µF
2.0
1.5
1.0
0.5
0
SYNC
CTL_I
OPTIONAL
INPUT
+
COMP
RT
CTL_T
330µF
PROTECTION
GND ADJ
90.9k
9.09k
8052 TA01a
*INPUT VOLTAGE PROTECTION MAY BE NECESSARY WHEN THE
LTM8052 IS SINKING CURRENT (SEE APPLICATIONS INFORMATION)
–5
0
10
–10
5
LOAD CURRENT (A)
8052 TA01b
8052fa
1
LTM8052
absoluTe MaxiMuM raTings
pin conFiguraTion
ꢂNꢆnl 1t
TOP VIEW
V ............................................................................40V
IN
ADJ, RT, COMP, CTL_I, CTL_T, V ...........................3V
REF
V
OUT
..........................................................................25V
8
RUN, SYNC, SS...........................................................6V
Current Into RUN Pin ............................................100µA
Internal Operating Temperature Range .. –40°C to 125°C
Solder Temperature...............................................250°C
Storage Temperature.............................. –55°C to 125°C
7
SYNC
RUN
BANK 2 GND
6
5
4
BANK 1
3
V
OUT
BANK 3
2
1
V
IN
J
K
L
A
B
C
D
E
F
G
H
LGA PACKAGE
81-LEAD (15mm × 11.25mm × 2.82mm)
= 125°C, θ = 18.6°C/W, θ = 5.4°C/W, θ = 5.6°C/W, θ
T
= 10.8°C/W
JMAX
JA
JC(bottom)
JB
JC(top)
PCB WEIGHT = 1.4 GRAMS, θ VALUES DERIVED FROM A 4-LAYER 7.62cm × 7.62cm
orDer inForMaTion
†
LEAD FREE FINISH
LTM8052EV#PBF
LTM8052IV#PBF
TRAY
PART MARKING*
LTM8052V
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LTM8052EV#PBF
LTM8052IV#PBF
81-Lead (15mm × 11.25mm × 2.82mm) LGA
81-Lead (15mm × 11.25mm × 2.82mm) LGA
LTM8052V
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
†
Refer to Note 3
elecTrical characTerisTics Thl l alꢄꢆnls nhl splcificuniꢆꢄs which uppꢇy ꢆvld nhl fQꢇꢇ iꢄnldꢄuꢇ
ꢆplduniꢄg nlmpldunQdl duꢄglꢀ ꢆnhldwisl splcificuniꢆꢄs udl un TA = ꢁ±°C2 RUN = 35ꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2 ꢂNꢆnl 3t
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
Minimum Input Voltage
Output DC Voltage
6
V
I
I
= 1A, R
= 1A, R
Open
= 499Ω
1.2
24
V
V
OUT
OUT
ADJ
ADJ
Output DC Current
CTL_T, CTL_I = 1.5V
–6
5
A
Quiescent Current Into V
V
IN
V
IN
= 12V, RUN = 0V
= 12V, No Load
0.1
17
3
30
µA
mA
IN
Line Regulation
Load Regulation
6V < V < 36V, I
= 1A
< 5A
0.1
0.7
10
%
%
IN
OUT
OUT
V
V
= 12V, 0A < I
IN
IN
Output RMS Voltage Ripple
Switching Frequency
= 12V, I
= 4.5A
mV
OUT
R = 40.2k
1000
100
kHz
kHz
T
R = 453k
T
l
Voltage at ADJ Pin
Current Out of ADJ Pin
RUN Pin Current
1.16
1.19
100
5.5
1.22
V
µA
ADJ = 0V, V
= 1V
OUT
RUN = 1.45V
µA
8052fa
2
LTM8052
elecTrical characTerisTics Thl l alꢄꢆnls nhl splcificuniꢆꢄs which uppꢇy ꢆvld nhl fQꢇꢇ iꢄnldꢄuꢇ
ꢆplduniꢄg nlmpldunQdl duꢄglꢀ ꢆnhldwisl splcificuniꢆꢄs udl un TA = ꢁ±°C2 RUN = 35ꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2 ꢂNꢆnl 3t
PARAMETER
CONDITIONS
MIN
TYP
1.55
160
MAX
UNITS
V
RUN Threshold Voltage (Falling)
RUN Input Hysteresis
CTL_I Control Range
CTL_I Pin Current
1.49
1.61
mV
V
0
1.5
1.5
µA
CTL_I Positive Current Limit
CTL_I = 1.5V
CTL_I = 0.75V
5.1
2.24
5.6
2.8
6.1
3.36
A
A
CTL_I Negative Current Limit
CTL_I = 1.5V
CTL_I = 0.75V
–8.5
–5.7
–7.7
–5.1
–6.9
–4.5
A
A
CTL_T Control Range
CTL_T Pin Current
0
1.5
1.5
V
µA
CTL_T Positive Current Limit
CTL_T = 1.5V
CTL_T = 0.75V
5.1
2.24
5.6
2.8
6.1
3.36
A
A
CTL_T Negative Current Limit
CTL_T = 1.5V
CTL_T = 0.75V
–8.5
–5.5
–7.7
–4.9
–6.9
–4.3
A
A
V
Voltage
0.5mA Load
1.93
2
2.04
0.6
1
V
µA
V
REF
SS Pin Current
11
SYNC Input Low Threshold
SYNC Input High Threshold
SYNC Bias Current
f
f
= 400kHz
= 400kHz
SYNC
1.2
V
SYNC
SYNC = 0V
µA
Nꢆnl 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Nꢆnl ꢁ: This µModule regulator includes overtemperature protection that
is intended to protect the device during momentary overload conditions.
Internal temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum internal
operating junction temperature may impair device reliability.
Nꢆnl 3: The LTM8052E is guaranteed to meet performance specifications
from 0°C to 125°C internal operating temperature. Specifications over the
full –40°C to 125°C internal operating temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTM8052I is guaranteed to meet specifications over the full –40°C
to 125°C internal operating temperature range. Note that the maximum
internal temperature is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Typical perForMance characTerisTics TA = ꢁ±°Cꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2
12ꢁ5OUT Efficilꢄcy
12±5OUT Efficilꢄcy
1285OUT Efficilꢄcy
90
85
80
75
90
85
80
75
95
90
85
80
75
70
65
60
55
50
70
65
70
65
60
55
50
60
55
50
6V
6V
6V
IN
IN
IN
12V
24V
36V
12V
24V
36V
12V
24V
36V
IN
IN
IN
IN
IN
IN
IN
IN
IN
1
2
4
0
1
2
4
0
1
2
4
0
5
5
5
3
3
3
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8052 G01
8052 G02
8052 G03
8052fa
3
LTM8052
Typical perForMance characTerisTics TA = ꢁ±°Cꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2
ꢁ2±5OUT Efficilꢄcy
3235OUT Efficilꢄcy
±5OUT Efficilꢄcy
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
95
90
85
80
75
70
65
60
55
50
6V
8V
IN
6V
IN
IN
12V
24V
36V
12V
24V
36V
12V
24V
36V
IN
IN
IN
IN
IN
IN
IN
IN
IN
0
1
2
4
0
1
2
4
5
5
3
3
0
1
2
4
5
3
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8052 G05
8052 G06
8052 G04
85OUT Efficilꢄcy
1ꢁ5OUT Efficilꢄcy
185OUT Efficilꢄcy
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
10V
IN
IN
IN
IN
15V
24V
36V
22V
24V
36V
12V
24V
36V
IN
IN
IN
IN
IN
IN
0
1
2
4
0
1
2
4
0
1
2
4
5
5
5
3
3
3
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8052 G07
8052 G08
8052 G09
ꢁ45OUT Efficilꢄcy
–3235OUT Efficilꢄcy
–±5OUT Efficilꢄcy
90
85
80
75
100
95
90
85
80
75
70
65
60
55
50
90
85
80
75
70
65
70
65
60
55
50
60
55
50
12V
12V
24V
31V
IN
IN
IN
IN
IN
IN
24V
28V
36V
IN
IN
32.5V
0
1
2
4
5
3
0
1
2
0
1
2
4
4
5
3
3
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8052 G11
8052 G10
8052 G12
8052fa
4
LTM8052
Typical perForMance characTerisTics TA = ꢁ±°Cꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
12ꢁ5OUT
–85OUT Efficilꢄcy
–1ꢁ5OUT Efficilꢄcy
1.0
90
85
80
75
90
85
80
75
0.8
0.6
0.4
0.2
70
65
70
65
0
–0.2
–0.4
60
55
50
60
55
50
12V
24V
28V
12V
24V
36V
IN
IN
IN
IN
IN
IN
12V
24V
IN
IN
–0.6
0
1
2
4
0
1
2
4
–8 –6
–4
–2
0
2
4
6
5
5
3
3
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8052 G13
8052 G14
8052 G15
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
12±5OUT
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
1285OUT
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
ꢁ2±5OUT
1.2
1.0
2.0
1.5
1.0
0.8
0.6
0.8
1.0
0.5
0.6
0.4
0.2
0.4
0.2
0
0
0
–0.2
–0.4
–0.6
–0.8
–0.5
–1.0
–0.2
–0.4
12V
24V
36V
12V
24V
36V
12V
24V
36V
IN
IN
IN
IN
IN
IN
IN
IN
IN
–1.5
–0.6
0
4
6
–8 –6
–4
–2
2
–6
–4
0
2
4
6
–8
–4
–2
0
2
6
–8
–2
–6
4
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8052 G18
8052 G16
8052 G17
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
3235OUT
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
±5OUT
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
85OUT
5
4
3
2
1
0
2
1
3
2
1
0
0
–1
–2
–3
–4
–5
–1
–2
–3
–1
12V
24V
36V
12V
24V
36V
12V
24V
36V
IN
IN
IN
IN
IN
IN
IN
IN
IN
–2
–8
–6
–4
–2
0
2
4
6
0
4
6
0
6
–8 –6
–4
–2
2
–8 –6
–4
–2
2
4
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8052 G19
8052 G20
8052 G21
8052fa
5
LTM8052
Typical perForMance characTerisTics TA = ꢁ±°Cꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
1ꢁ5OUT
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
185OUT
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
ꢁ45OUT
4
3
4
3
5
4
3
2
2
2
1
36V
IN
1
1
0
0
0
–1
–2
–3
–4
–1
–2
–3
–1
–2
–3
24V
36V
24V
36V
IN
IN
IN
IN
–4
2
6
–6
–4
–2
0
4
–5
–2
0
1
2
3
4
5
–4 –3
–1
–6
–4
–2
0
6
2
4
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8052 G22
8052 G24
8052 G23
IꢄpQn CQddlꢄn vs IꢄpQn 5ꢆꢇnugl
ꢂOQnpQn Shꢆdnlat
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
–3235OUT
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
–±5OUT
2
1
700
600
500
1.5
1.0
0.5
400
300
200
100
0
0
0
–0.5
–1.0
–1.5
–1
–2
24V
12V
IN
IN
24V
IN
IN
12V
10
20
40
–6
–4
0
2
4
0
30
–2
–6 –5 –4 –3 –2 –1
0
1
2
3
4
5
OUTPUT CURRENT (A)
INPUT VOLTAGE (V)
OUTPUT CURRENT (A)
8052 G25
8052 G27
8052 G26
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
–85OUT
IꢄpQn CQddlꢄn vs OQnpQn CQddlꢄn
–1ꢁ5OUT
MiꢄimQm RlqQidla IꢄpQn RQꢄꢄiꢄg
5ꢆꢇnugl vs Nlgunivl OQnpQn 5ꢆꢇnugl
3
2
25
20
15
10
2.0
1.5
I
I
I
I
= 4A
= 3A
= 2A
= 1A
OUT
OUT
OUT
OUT
1.0
0.5
1
0
24V
IN
0
–0.5
–1.0
–1.5
–2.0
–1
–2
–3
5
0
24V
12V
IN
IN
–2.5
–6
–4
–2
0
2
4
0
–5
–10
–15
–6
2
4
–4
–2
0
OUTPUT CURRENT (A)
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (A)
8052 G28
8052 G30
8052 G29
8052fa
6
LTM8052
Typical perForMance characTerisTics TA = ꢁ±°Cꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2
MiꢄimQm RlqQidla IꢄpQn RQꢄꢄiꢄg
5ꢆꢇnugl vs OQnpQn 5ꢆꢇnuglꢀ
IOUT = ±A
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua 3235OUT uꢄa Blꢇꢆw
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua ±5OUT
30
25
20
15
10
5
6.4
6.2
6.0
5.8
5.6
7.2
7.0
6.8
6.6
6.4
0
0
10
15
20
25
30
5
0
1
3
4
2
5
0
1
2
3
4
5
OUTPUT VOLTAGE (V)
LOAD CURRENT (A)
LOAD CURRENT (A)
8052 G33
8052 G32
8052 G31
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua 85OUT
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua 1ꢁ5OUT
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua 185OUT
10.0
9.8
9.6
9.4
9.2
9.0
14.4
14.2
21.5
21.0
20.5
20.0
19.5
19.0
14.0
13.8
13.6
13.4
13.2
0
1
2
3
4
5
0
1
2
3
4
5
0
1
2
3
4
5
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
8052 G34
8052 G35
8052 G36
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua ꢁ45OUT
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua –3235OUT
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua –±5OUT
28.0
27.5
27.0
26.5
26.0
25.5
35
30
35
30
TO START
TO RUN
TO START
TO RUN
25
20
15
10
5
25
20
15
10
5
0
0
0
1
2
3
4
5
1
2
3
5
0
4
1
2
3
5
0
4
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
8052 G3
8052 G38
8052 G39
8052fa
7
LTM8052
Typical perForMance characTerisTics TA = ꢁ±°Cꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua –85OUT
MiꢄimQm RlqQidla IꢄpQn 5ꢆꢇnugl
vs Lꢆua –1ꢁ5OUT
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
ꢁ2±5OUT
30
25
20
15
10
5
30
25
20
15
10
5
60
50
40
30
20
10
0
36V
24V
12V
TO START
TO RUN
IN
IN
IN
TO START
TO RUN
6V
IN
0
0
1
2
3
5
1
2
3
4
0
4
0
1
2
3
5
0
4
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
8052 G40
8052 G4
8052 G42
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
3235OUT
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
±5OUT
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
85OUT
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
70
60
50
40
30
20
10
0
36V
IN
36V
IN
36V
IN
24V
IN
24V
IN
24V
IN
12V
IN
12V
IN
12V
IN
6V
IN
7V
IN
0
1
2
3
5
0
4
1
2
3
5
0
4
0
4
5
1
2
3
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
8052 G43
8052 G44
8052 G45
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
1ꢁ5OUT
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
185OUT
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
ꢁ45OUT
100
90
80
70
60
50
40
30
20
10
0
120
100
80
60
40
20
0
120
100
80
60
40
20
0
36V
IN
28V
IN
36V
IN
36V
IN
24V
IN
24V
15V
IN
IN
1
2
3
5
1
2
3
5
1
3
0
4
0
4
0
2
4
5
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
8052 G46
8052 G47
8052 G48
8052fa
8
LTM8052
Typical perForMance characTerisTics TA = ꢁ±°Cꢀ Qꢄꢇlss ꢆnhldwisl ꢄꢆnla2
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
–3235OUT
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
–±5OUT
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
–85OUT
90
80
70
60
50
40
30
20
10
70
60
50
40
30
20
10
0
80
70
60
50
28V
IN
31V
IN
32.5V
IN
24V
IN
24V
IN
24V
IN
12V
IN
12V
IN
12V
IN
40
30
20
10
0
0
1
2
3
5
0
1
2
4
5
0
4
3
0
4
5
1
2
3
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
8052 G49
8052 G50
8052 G51
TlmpldunQdl Risl vs Lꢆua CQddlꢄn
–1ꢁ5OUT
Swinchiꢄg FdlqQlꢄcy vs RT 5uꢇQl
500
450
400
350
300
250
200
150
100
50
120
100
80
60
40
20
0
24V
12V
IN
IN
0
1
2
3
4
0
0.2
0.4
0.6
0.8
1.0
0
LOAD CURRENT (A)
SWITCHING FREQUENCY (MHz)
8052 G52
8052 G53
CTL_I 5ꢆꢇnugl vs MuximQm
OQnpQn CQddlꢄnꢀ CTL_T = ꢁ5
CTL_T 5ꢆꢇnugl vs MuximQm
OQnpQn CQddlꢄnꢀ CTL_I = ꢁ5
6
4
6
4
2
2
0
0
–2
–4
–6
–8
–2
–4
–6
–8
1
1.5
0
0.25
0.5
0.75
1.25
1
1.5
0
0.25
0.5
0.75
1.25
CTL_I VOLTAGE (V)
CTL_T VOLTAGE (V)
8052 G54
8052 G55
8052fa
9
LTM8052
pin FuncTions
COMP ꢂPiꢄ H8t: Compensation Pin. This pin is generally
not used. The LTM8052 is internally compensated, but
some rare situations may arise that require a modifica-
tion to the control loop. This pin connects directly to the
input PWM comparator of the LTM8052. In most cases,
no adjustment is necessary. If this function is not used,
leave this pin open.
5
ꢂBuꢄk 1t: Power Output Pins. Apply the output filter
OUT
capacitor and the output load between these pins and
GND pins. When reverse current is being driven into the
LTM8052’soutputbytheload,theenergyisdeliveredback
throughtheLTM8052andouttotheV pins.Caremustbe
IN
taken to prevent excessive voltage if other devices on the
V bus cannot absorb this energy. See Input Precautions
IN
in the Applications Information section for more details
SS ꢂPiꢄ J8t: Soft-Start Pin. Place an external capacitor to
ground to ramp the output voltage during start-up condi-
tions. The soft-start pin has an 11µA charging current.
and circuit suggestions.
GND ꢂBuꢄk ꢁt: Tie these GND pins to a local ground plane
below the LTM8052 and the circuit components. In most
applications, the bulk of the heat flow out of the LTM8052
is through these pads, so the printed circuit design has a
large impact on the thermal performance of the part. See
the PCB Layout and Thermal Considerations sections for
ADJꢂPiꢄK8t:TheLTM8052regulatesitsADJpinto1.19V.
Connect the adjust resistor from this pin to ground. The
value of R
is given by the equation:
ADJ
11.9
VOUT –1.19
RADJ
=
moredetails.Returnthefeedbackdivider(R )tothisnet.
ADJ
5 ꢂBuꢄk3t:TheV pinssupplycurrenttotheLTM8052’s
IN
IN
where R
is in kΩ.
ADJ
internal regulator and to the internal power switches. This
pin must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
RUNꢂPiꢄL6t:TheRUNpinactsasanenablepinandturns
on the internal circuitry. It may also be used to implement
a precision UVLO. See the Applications Information sec-
tion for details. The RUN pin is internally clamped, so it
may be pulled up to a voltage source that is higher than
the absolute maximum voltage of 6V through a resistor,
provided the pin current does not exceed 100µA. Do not
leave this pin open.
CTL_TꢂPiꢄD8t:Connectaresistor/NTCthermistornetwork
to the CTL_T pin to reduce the maximum regulated output
current of the LTM8052 in response to temperature. The
maximum control voltage is 1.5V. If this function is not
used, tie this pin to V
.
REF
CTL_I ꢂPiꢄ E8t: The CTL_I pin reduces the maximum
regulated output current of the LTM8052. The maximum
control voltage is 1.5V. If this function is not used, tie
SYNC ꢂPiꢄ L7t: Frequency Synchronization Pin. This pin
allows the switching frequency to be synchronized to an
external clock. The R resistor should be chosen to oper-
T
this pin to V
.
REF
ate the internal clock at 20% lower than the SYNC pulse
frequency. This pin should be grounded when not in use.
Do not leave this pin floating. When laying out the board,
avoid noise coupling to or from the SYNC trace. See the
Synchronization section in Applications Information.
5
ꢂPiꢄ F8t: Buffered 2V Reference Capable of 0.5mA
REF
Drive. It is valid when V > 6V and RUN is active high.
IN
RT ꢂPiꢄ G8t: The RT pin is used to program the switching
frequency of the LTM8052 by connecting a resistor from
thispintoground.TheApplicationsInformationsectionof
the data sheet includes a table to determine the resistance
valuebasedonthedesiredswitchingfrequency. Whenus-
ing the SYNC function, apply a resistor value equivalent to
20% lower than the clock frequency applied to the SYNC
pin. Do not leave this pin open.
8052fa
10
LTM8052
block DiagraM
2.2µH
R
SENSE
V
V
OUT
IN
0.2µF
2.2µF
10k
RUN
SS
SYNC
CURRENT
MODE
CONTROLLER
V
REF
INTERNAL
REGULATOR
V
IN
CTL_I
CTL_T
COMP
10k
2.2nF
GND
RT
ADJ
8026 BD
operaTion
TheLTM8052isastandalonenonisolatedconstant-voltage,
constant-current step-down switching DC/DC power sup-
ply that can deliver up to 5A of positive or 6A of negative
outputcurrent.ThisµModuleregulatorprovidesaprecisely
regulated output voltage programmable via one external
resistor from 1.2V to 24V. The input voltage range is 6V
to 36V. Given that the LTM8052 is a step-down converter,
make sure that the input voltage is high enough to support
the desired output voltage and load current.
the LTM8052 will sink current to keep the output voltage
in regulation.
It should be clear that the above situation is only possible
if the load is providing energy to the LTM8052 output.
The LTM8052 will be able to maintain the output voltage
at the target regulation point as long as the current from
the load does not exceed its negative current limit. If
the current does exceed the negative current limit, the
LTM8052 output will start to rise. If the output continues
to rise, the LTM8052’s output overvoltage protection
circuitry will turn off the internal power switches, and
the output will be free to rise. If this voltage rises above
the LTM8052 input voltage, current will flow through an
internal diode, and the output will be clamped to a diode
drop above the input.
The LTM8052 is a 2-quadrant device, meaning that it
can both source and sink current in order to regulate its
outputvoltage. Mosttraditionalvoltageregulatorsareone
quadrant; that is, they only source current. If the load, for
whateverreason,forcescurrentintoatraditionalregulator,
the output voltage will typically rise. In a similar situation,
8052fa
11
LTM8052
operaTion
When the LTM8052 is sinking current, it maintains its
output voltage regulation by power conversion, not power
dissipation. This means that the energy provided to the
LTM8052 is in turn delivered to its input power bus. There
must be something on this power bus to accept or use
the energy, or the LTM8052’s input voltage will rise. Left
unchecked, the energy can raise the input voltage above
theabsolutemaximumvoltageanddamagetheLTM8052.
PleaseseetheInputPrecautionssectionforfurtherdetails.
Forapplicationswhereonlysourcingcurrent(onequadrant
operation) is desired, use LTM8026.
The output current loop has two control inputs, deter-
mined by the voltage at the analog control pins, CTL_I
and CTL_T. CTL_I is typically used to set the maximum
allowable current output of the LTM8052, while CTL_T
is typically used with a NTC thermistor to reduce the
output current in response to temperature. The lower of
the two analog voltages on CTL_I and CTL_T determines
the regulated output current. The analog control range
of both the CTL_I and CTL_T pin is from 0V to 1.5V. As
shownintheTypicalPerformanceCharacteristicssection,
the positive and negative currents are not symmetric. The
negative current limit is offset by approximately 2A.
The LTM8052 operates in forced continuous mode. This
means that the part will not skip cycles when the load
approaches zero amps. This may be particularly useful in
applications where the synchronization function is used,
or any time discontinuous switching is undesirable. The
LTM8052 will not operate in forced continuous mode
when an input UVLO, output OVLO or minimum duty cycle
violation occurs.
The RUN pin functions as a precision shutdown pin. When
the voltage at the RUN pin is lower than 1.55V, switch-
ing is terminated. Below the turn-on threshold, the RUN
pin sinks 5.5µA. This current can be used with a resistor
between RUN and V to set a hysteresis. During start-
IN
up, the SS pin is held low until the part is enabled, after
which the capacitor at the soft-start pin is charged with
an 11µA current source.
As shown in the Block Diagram, the LTM8052 contains a
current mode controller, power switches, power inductor,
and a modest amount of input and output capacitance.
The LTM8052 is equipped with a thermal shutdown to
protectthedeviceduringmomentaryoverloadconditions.
It is set above the 125°C absolute maximum internal tem-
perature rating to avoid interfering with normal specified
operation, so internal device temperatures will exceed
the absolute maximum rating when the overtemperature
protection is active. So, continuous or repeated activation
of the thermal shutdown may impair device reliability.
During thermal shutdown, all switching is terminated and
the SS pin is driven low.
The LTM8052 utilizes fixed frequency, average current
mode control to accurately regulate the inductor current,
independent from the output voltage. This is an ideal solu-
tion for applications requiring a regulated current source.
The control loop will regulate the current in the internal
inductor. Once the output has reached the regulation
voltage determined by the resistor from the ADJ pin to
ground, the inductor current will be reduced by the volt-
age regulation loop.
The switching frequency is determined by a resistor at
the RT pin. The LTM8052 may also be synchronized to an
external clock through the use of the SYNC pin.
8052fa
12
LTM8052
applicaTions inForMaTion
For most applications, the design process is straight
forward, summarized as follows:
Whilethesecomponentcombinationshavebeentestedfor
proper operation, it is incumbent upon the user to verify
properoperation overthe intended system’sline, loadand
environmentalconditions. Bearinmindthatthemaximum
output current is limited by junction temperature, the
relationship between the input and output voltage mag-
nitude and polarity and other factors. Please refer to the
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended C , C , R
and R
T
IN
OUT
ADJ
values.
Tubꢇl 12 Rlcꢆmmlꢄala Cꢆmpꢆꢄlꢄn 5uꢇQls uꢄa CꢆꢄfigQduniꢆꢄ2
ꢂTA = ꢁ±°C2 Sll Typicuꢇ Pldfꢆdmuꢄcl Chuducnldisnics fꢆd Lꢆua Cꢆꢄainiꢆꢄst
5
IN
5
C
C
CERAMIC ELECTROLYTIC
C
R
f
R
f
R
TꢂMINt
OUT
IN
OUT
OUT
ADJ
OPTIMAL
TꢂOPTIMALt
MAX
6V to 36V 1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
6V to 36V 1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
6V to 36V 1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
Open 200kHz
38.3k 300kHz
19.6k 350kHz
210k
250kHz 169k
350kHz 118k
400kHz 102k
140k
118k
6V to 36V 2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
6V to 36V 3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9.09k 450kHz
5.62k 550kHz
3.09k 600kHz
90.9k
75.0k
68.1k
64.9k
61.9k
59.0k
57.6k
210k
525kHz 78.7k
625kHz 64.9k
700kHz 57.6k
750kHz 53.6k
800kHz 49.9k
900kHz 44.2k
7V to 36V
10V to 36V
5
8
10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.74k 625kHz
15V to 36V 12 10µF, 50V, 1210 47µF, 16V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.10k 650kHz
22V to 36V 18 10µF, 50V, 1210 22µF, 25V, 1210 47µF, 20V, 45mΩ, OS-CON, 20SVPS47M
28V to 36V 24 4.7µF, 50V, 1210 10µF, 50V, 1206 47µF, 35V, 30mΩ, OS-CON, 35SVPC47M
9V to 15V 1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
9V to 15V 1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
604 675kHz
523 700kHz
Open 200kHz
1MHz
39.2k
525kHz 78.7k
650kHz 61.9k
800kHz 49.9k
38.3k 300kHz
19.6k 350kHz
140k
118k
9V to 15V 1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
9V to 15V 2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9V to 15V 3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9.09k 450kHz
5.62k 550kHz
90.9k
75.0k
68.1k
64.9k
210k
1MHz
1MHz
1MHz
1MHz
250kHz 169k
350kHz 118k
400kHz 102k
39.2k
39.2k
39.2k
39.2k
9V to 15V
10V to 15V
5
8
10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 3.09k 600kHz
10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.74k 625kHz
18V to 36V 1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
18V to 36V 1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
18V to 36V 1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
Open 200kHz
38.3k 300kHz
19.6k 350kHz
140k
118k
18V to 36V 2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
18V to 36V 3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9.09k 450kHz
5.62k 550kHz
90.9k
75.0k
68.1k
64.9k
61.9k
75.0k
525kHz 78.7k
625kHz 64.9k
700kHz 57.6k
750kHz 53.6k
800kHz 49.9k
625kHz 64.9k
18V to 36V
18V to 36V
5
8
10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 3.09k 600kHz
10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.74k 625kHz
18V to 36V 12 10µF, 50V, 1210 47µF, 16V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.10k 650kHz
2.7V to
32.5V*
–3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
5.62k 550kHz
2V to 31V* –5 10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 3.09k 600kHz
2V to 28V* –8 10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.74k 625kHz
3V to 24V* –12 10µF, 50V, 1210 47µF, 16V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.10k 650kHz
68.1k
64.9k
61.9k
700kHz 57.6k
750kHz 53.6k
800kHz 49.9k
*Running voltage. See the Typical Performance Characteristics section for starting requirements.
Note: An input bulk capacitor is required.
8052fa
13
LTM8052
applicaTions inForMaTion
graphs in the Typical Performance Characteristics section
for guidance.
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot Plugging Safely section.
The maximum frequency (and attendant R value) at
T
which the LTM8052 should be allowed to switch is given
Pdꢆgdummiꢄg Swinchiꢄg FdlqQlꢄcy
in Table 1 in the f
column, while the recommended
MAX
The LTM8052 has an operational switching frequency
range between 100kHz and 1MHz. This frequency is
programmed with an external resistor from the RT pin to
ground.Donotleavethispinopenunderanycircumstance.
See Table 2 for resistor values and the corresponding
switching frequencies.
frequency (and R value) for optimal efficiency over the
T
given input condition is given in the f
column.
OPTIMAL
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Cupucinꢆd Slꢇlcniꢆꢄ Cꢆꢄsialduniꢆꢄs
Tubꢇl ꢁ2 RT Rlsisnꢆd 5uꢇQls uꢄa Thlid RlsQꢇnuꢄn Swinchiꢄg
FdlqQlꢄcils
The C and C
capacitor values in Table 1 are the
IN
OUT
SWITCHING FRE-UENCY ꢂMHzt
R ꢂkΩt
T
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
necessary. Again, it is incumbent upon the user to verify
properoperationover theintended system’s line, load and
environmental conditions.
1
39.2
53.6
82.5
140
210
453
0.75
0.5
0.3
0.2
0.1
In addition, the Typical Performance Characteristics sec-
tion contains a graph that shows the switching frequency
Ceramiccapacitorsaresmall,robustandhaveverylowESR.
However, not all ceramic capacitors are suitable. X5R and
X7Rtypesarestableovertemperature,appliedvoltageand
give dependable service. Other types, including Y5V and
Z5U have very large temperature and voltage coefficients
ofcapacitance.Inanapplicationcircuittheymayhaveonly
a small fraction of their nominal capacitance resulting in
much higher output voltage ripple than expected.
versus R value.
T
Swinchiꢄg FdlqQlꢄcy TdualꢃOffs
It is recommended that the user apply the optimal R
T
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8052isflexibleenoughtoaccommodateawiderange
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8052 in some fault conditions. A frequency that is too
low can result in a final design that has too much output
ripple or too large of an output capacitor.
Many of the output capacitances given in Table 1 specify
an electrolytic capacitor. Ceramic capacitors may also be
used in the application, but it may be necessary to use
more of them. Many high value ceramic capacitors have a
large voltage coefficient, so the actual capacitance of the
component at the desired operating voltage may be only
a fraction of the specified value. Also, the very low ESR of
ceramic capacitors may necessitate additional capacitors
for acceptable stability margin.
Swinchiꢄg FdlqQlꢄcy Syꢄchdꢆꢄizuniꢆꢄ
The nominal switching frequency of the LTM8052 is
determined by the resistor from the RT pin to GND and
may be set from 100kHz to 1MHz. The internal oscillator
may also be synchronized to an external clock through
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8052. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8052 circuit is plugged into a live supply, the
the SYNC pin. The external clock applied to the SYNC pin
8052fa
14
LTM8052
applicaTions inForMaTion
must have a logic low below 0.6V, a logic high greater
than 1.2V and frequency between 100kHz and 1MHz. The
input frequency must be 20% higher than the frequency
determined by the resistor at the RT pin. Input signals
outside of these specified parameters may cause erratic
switching behavior and subharmonic oscillations. The
SYNC pin must be tied to GND if synchronization to an
external clock is not required. When SYNC is grounded,
the switching frequency is determined by the resistor at
the RT pin.
current limit can be set as shown in Figure 1 with the
following equation:
7.467 • R2
R1+R2
IMAX
=
Amps Positive Current
(
)
7.467 • R2
R1+R2
IMAX = −
+ 2.1 Amps Negative Current
(
)
Lꢆua CQddlꢄn Dlduniꢄg Usiꢄg nhl CTL_T Piꢄ
Inhighcurrentapplications,deratingthemaximumcurrent
basedonoperatingtemperaturemaypreventdamagetothe
load.Inaddition,manyapplicationshavethermallimitations
that will require the regulated current to be reduced based
on the load and/or board temperature. To achieve this,
the LTM8052 uses the CTL_T pin to reduce the effective
regulated current in the load. While CTL_I programs the
regulated current in the load, CTL_T can be configured to
reduce this regulated current based on the analog voltage
at the CTL_T pin. The load/board temperature derating is
programmed using a resistor network with a temperature
dependant resistance (Figure 2). When the board/load
temperature rises, the CTL_T voltage will decrease. To
reduce the regulated current, the CTL_T voltage must be
Swinchiꢄg Mꢆal
The LTM8052 operates in forced continuous mode. This
means that the part will not skip cycles when the load
approaches zero amps. This may be particularly useful in
applications where the synchronization function is used,
or any time discontinuous switching is undesirable. The
LTM8052 will not operate in forced continuous mode
when an input UVLO, output OVLO or minimum duty cycle
violation occurs.
SꢆfnꢃSnudn
The soft-start function controls the slew rate of the power
supply output voltage during start-up. A controlled output
voltagerampminimizesoutputvoltageovershoot,reduces
lower than the voltage at the CTL_I pin. V
may be
CTL_T
higher than V
, but then it will have no effect.
CTL_I
inrush current from the V supply, and facilitates supply
IN
sequencing. A capacitor connected from the SS pin to
GND programs the slew rate. The capacitor is charged
froman internal11µA currentsource toproduce a ramped
output voltage.
V
2V
REF
LTM8052
CTL_I OR CTL_T
R1
R2
MuximQm OQnpQn CQddlꢄn AajQsn
8052 F01
To adjust the regulated load current, an analog voltage
is applied to the CTL_I pin or CTL_T pins. Varying the
voltage between 0V and 1.5V adjusts the maximum
current between the minimum and the maximum current,
typically 5.6A positive and 7.7A negative. Graphs of the
output current vs CTL_I and CTL_T voltages are given
in the Typical Performance Characteristics section. The
LTM8052providesa2Vreferencevoltageforconveniently
applying resistive dividers to set the current limit. The
FigQdl 12 Slnniꢄg nhl OQnpQn CQddlꢄn Limin
R
R
V
V
V
REF
R
R
R
R
R
R
X
LTM8052
NTC
NTC
X
NTC
NTC
R1
CTL_T
8052 F02
R2
(OPTION A TO D)
A
B
C
D
FigQdl ꢁ2 Lꢆua CQddlꢄn Dlduniꢄg vs
TlmpldunQdl Usiꢄg NTC Rlsisnꢆd
8052fa
15
LTM8052
applicaTions inForMaTion
5ꢆꢇnugl RlgQꢇuniꢆꢄ uꢄa OQnpQn Ovldvꢆꢇnugl Pdꢆnlcniꢆꢄ
functionality in the specified operating range. This means
that internal temperatures will exceed the 125°C absolute
maximum rating when the overtemperature protection is
active, possibly impairing the device’s reliability.
The LTM8052 uses the ADJ pin to regulate the output
voltage and to provide a high speed overvoltage lockout
to avoid high voltage conditions. If the output voltage
exceeds 125% of the regulated voltage level (1.5V at the
ADJ pin), the LTM8052 terminates switching and shuts
down switching for a brief time before restarting. The
regulated output voltage must be greater than 1.19V and
is set by the equation:
U5LO uꢄa ShQnaꢆwꢄ
TheLTM8052hasaninternalUVLOthatterminatesswitch-
ing,resetsalllogic,anddischargesthesoft-startcapacitor
whentheinputvoltageisbelow6V. TheLTM8052alsohas
a precision RUN function that enables switching when the
voltage at the RUN pin rises to 1.68V and shuts down the
LTM8052 when the RUN pin voltage falls to 1.55V. There
is also an internal current source that provides 5.5μA of
pull-downcurrenttoprogramadditionalUVLOhysteresis.
For RUN rising, the current source is sinking 5.5µA until
RUN = 1.68V, after which the current source turns off.
For RUN falling, the current source is off until the RUN =
1.55V, after which it sinks 5.5µA. The following equations
determine the voltage divider resistors for programming
10k
VOUT = 1.19V 1+
R
ADJ
where R
is shown in Figure 3.
ADJ
V
OUT
V
OUT
LTM8052
ADJ
R
ADJ
the falling UVLO voltage and rising enable voltage (V
as configured in Figure 4.
)
ENA
8052 F03
FigQdl 32 5ꢆꢇnugl RlgQꢇuniꢆꢄ uꢄa Ovldvꢆꢇnugl Pdꢆnlcniꢆꢄ
Fllabuck Cꢆꢄꢄlcniꢆꢄs
1.55V •R2
R1=
UVLO–1.55V
In situations where the output of the LTM8052 is required
to sink current (that is, the load is driving current into the
LTM8052 output), the μModule regulator will maintain
voltage regulation as long as the negative current limit is
not exceeded. If the current limit is exceeded, the output
voltage may begin to rise. If the output voltage rises more
than 125% of the target regulation voltage, the output
overvoltage protection will engage, and the LTM8052 will
stop switching. In this situation, the load will be free to
pull up the LTM8052 output. If the voltage exceeds the
LTM8052 input, an internal power diode will clamp the
output to a diode drop above the input.
V
ENA –1.084•UVLO
R2 =
5.5µA
The RUN pin has an absolute maximum voltage of 6V.
To accommodate the largest range of applications, there
is an internal Zener diode that clamps this pin, so that it
can be pulled up to a voltage higher than 6V through a
resistor that limits the current to less than 100µA. For
applications where the supply range is greater than 4:1,
size R2 greater than 375k.
V
V
IN
IN
Thldmuꢇ ShQnaꢆwꢄ
LTM8052
RUN
R2
R1
If the part is too hot, the LTM8052 engages its thermal
shutdown, terminates switching and discharges the soft-
startcapacitor.Whentheparthascooled,thepartautomati-
cally restarts. This thermal shutdown is set to engage at
temperaturesabovethe125°Cabsolutemaximuminternal
operating rating to ensure that it does not interfere with
8052 F04
FigQdl 42 U5LO CꢆꢄfigQduniꢆꢄ
8052fa
16
LTM8052
applicaTions inForMaTion
IꢄpQn PdlcuQniꢆꢄs
As mentioned, the LTM8052 sinks current by energy
conversion and not dissipation. Thus, no matter what
protectioncircuitthatisused,theamountofpowerthatthe
protection circuit must absorb depends upon the amount
of power at the input. For example, if the output voltage is
2.5V and can sink 5A, the input protection circuit should
be designed to absorb at least 7.5W. In Figures 5a and 5b,
let us say that the protection activation threshold is 30V.
Then the circuit must be designed to be able to dissipate
7.5W and accept 7.5W/30V = 250mA.
When the LTM8052 is sinking current, it maintains its
output voltage regulation by power conversion, not power
dissipation. This means that the energy provided to the
LTM8052 is in turn delivered to its input power bus.
There must be something on this power bus to accept or
use the energy, or the LTM8052’s input voltage will rise.
Left unchecked, the energy can raise the input voltage
above the absolute maximum voltage rating and damage
the LTM8052.
In many cases, the system load on the LTM8052 input
bus will be sufficient to absorb the energy delivered by the
μModule regulator. The power required by other devices
will consume more than enough to make up for what the
LTM8052 delivers. In cases where the LTM8052 is the
largest or only power converter, this may not be true and
some means may be need to be devised to prevent the
LTM8052’s input from rising too high. Figure 5a shows a
passive crowbar circuit that will dissipate energy during
momentary input overvoltage conditions. The breakdown
voltage of the zener diode is chosen in conjunction with
the resistor R to set the circuit’s trip point. The trip point
LOAD
CURRENT
V
V
OUT
IN
ZENER
DIODE
LTM8052
GND
SOURCING
LOAD
Q
R
8052 F05a
FigQdl ±u2 Thl MOSFET - Dissipunls Mꢆmlꢄnudy Eꢄldgy nꢆ
GND2 Thl Zlꢄld Diꢆal uꢄa Rlsisnꢆd Adl Chꢆslꢄ nꢆ EꢄsQdl Thun
nhl MOSFET TQdꢄs Oꢄ Abꢆvl nhl MuximQm 5IN 5ꢆꢇnugl Uꢄald
Nꢆdmuꢇ Oplduniꢆꢄ
is typically set well above the maximum V voltage under
IN
normal operating conditions. This circuit does not have a
precisionthreshold,andissubjecttobothpart-to-partand
temperaturevariations,soitisnotsuitableforapplications
where high accuracy is required or large voltage margins
are not available.
LOAD
CURRENT
V
V
V
OUT
IN
OPTIONAL
HYSTERESIS
RESISTOR
LTM8052
REF
GND
SOURCING
LOAD
The circuit in Figure 5b also dissipates energy during mo-
mentary overvoltage conditions, but is more precise than
that in Figure 5a. It uses an inexpensive comparator and
+
–
Q
the V output of the LTM8052 to establish a reference
REF
voltage.Theoptionalhysteresisresistorinthecomparator
circuit avoids MOSFET chatter. Figure 5c shows a circuit
that latches on and crowbars the input in an overvoltage
event. The SCR latches when the input voltage threshold
is exceeded, so this circuit should be used with a fuse, as
shown, or employ some other method to interrupt current
from the load.
8052 F05b
FigQdl ±b2 Thl Cꢆmpudunꢆd iꢄ This CidcQin Acnivunls nhl -
MOSFET un u Mꢆdl Pdlcisl 5ꢆꢇnugl Thuꢄ nhl Oꢄl Shꢆwꢄ iꢄ
FigQdl ±u2 Thl Rlfldlꢄcl fꢆd nhl Cꢆmpudunꢆd is Dldivla fdꢆm
nhl 5REF Piꢄ ꢆf nhl LTM80±ꢁ
8052fa
17
LTM8052
applicaTions inForMaTion
2
Figures 5a through 5c are crowbar circuits, which attempt
to prevent the input voltage from rising above some level
by clamping the input to GND through a power device. In
some cases, it is possible to simply turn off the LTM8052
when the input voltage exceeds some threshold. This
is possible when the voltage power source that drives
capacitance must absorb is 1/2 LI = 27.5μJ. Suppose
the comparator circuit in Figure 5d is set to pull the RUN
pin down when V
= 15V. The input voltage will rise
TRIP
according to the capacitor energy equation:
1
2
C(V 2− VTRIP 2) = 27.5µJ
IN
current into V
never exceeds V . An example of this
OUT
IN
circuit is shown in Figure 5d. When the power source on
If the total input capacitance is 10μF, the input voltage
will rise to:
the output drives V above a predetermined threshold,
IN
the comparator pulls down on the RUN pin and stops
switching in the LTM8052. When this happens, the input
capacitance needs to absorb the energy stored within the
LTM8052’s internal inductor, resulting in an additional
voltage rise. As shown in the Block Diagram, the internal
inductor value is 2.2uH. If the LTM8052 negative current
limit is set to 5A, for example, the energy that the input
1
2
27.5µJ = 10µF(V 2− 15V2)
IN
V = 15.2V
IN
Forapplicationswhereonlysourcingcurrent(onequadrant
operation) is desired, use LTM8026.
LOAD
CURRENT
V
V
OUT
IN
FUSE
ZENER
DIODE
LTM8052
GND
SCR
SOURCING
LOAD
8052 F05a
FigQdl ±c2 Thl SCR Lunchls Oꢄ Whlꢄ nhl Acnivuniꢆꢄ Thdlshꢆꢇa is
Rluchlaꢀ Sꢆ u FQsl ꢆd Sꢆml Onhld Mlnhꢆa ꢆf Discꢆꢄꢄlcniꢄg nhl
Lꢆua ShꢆQꢇa bl Usla
LOAD
CURRENT
V
V
OUT
IN
LTM8052
GND
RUN
SOURCING
LOAD
10µF
–
+
EXTERNAL
REFERENCE
VOLTAGE
8052 F05d
FigQdl ±a2 This Cꢆmpudunꢆd CidcQin TQdꢄs Off nhl LTM80±ꢁ if
nhl IꢄpQn Risls Abꢆvl u Pdlalnldmiꢄla Thdlshꢆꢇa2 Whlꢄ nhl
LTM80±ꢁ TQdꢄs Offꢀ nhl Eꢄldgy Snꢆdla iꢄ nhl Iꢄnldꢄuꢇ IꢄaQcnꢆd
Wiꢇꢇ Ruisl 5IN u Smuꢇꢇ AmꢆQꢄn Abꢆvl nhl Thdlshꢆꢇa2
8052fa
18
LTM8052
applicaTions inForMaTion
Nꢆ OQnpQn CQddlꢄn Shudiꢄg
3. Place the C
capacitor as close as possible to the
OUT
V
and GND connection of the LTM8052.
OUT
The LTM8052 is a two quadrant device, able to both sink
and source current to maintain voltage regulation. It is
therefore not suitable for current sharing.
4. Place the C and C
capacitors such that their
OUT
IN
ground currents flow directly adjacent or underneath
the LTM8052.
PCB LuyꢆQn
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8052.
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8052. The LTM8052 is neverthe-
less a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 6
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 6. The LTM8052 can benefit from
theheatsinkingaffordedbyviasthatconnecttointernal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
A few rules to keep in mind are:
1. Place the R and R resistors as close as possible to
ADJ
T
their respective pins.
2. Place the C capacitor as close as possible to the V
IN
IN
and GND connection of the LTM8052.
•
•
•
•
•
•
•
•
•
•
•
•
SYNC
RUN
GND
•
•
•
•
•
C
•
•
•
•
•
•
•
•
•
OUT
•
•
•
•
•
•
•
•
•
•
•
•
V
V
V
IN
OUT
GND
V
OUT
C
IN
GND
THERMAL AND INTERCONNECT VIAS
IN
8052 F06
•
FigQdl 62 LuyꢆQn Shꢆwiꢄg SQgglsnla Exnldꢄuꢇ Cꢆmpꢆꢄlꢄnsꢀ
GND Pꢇuꢄl uꢄa Thldmuꢇ 5ius2
8052fa
19
LTM8052
applicaTions inForMaTion
Hꢆn PꢇQggiꢄg Suflꢇy
For increased accuracy and fidelity to the actual applica-
tion, many designers use finite element analysis (FEA) to
predict thermal performance. To that end, Page 2 of the
data sheet typically gives four thermal coefficients:
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8052. However, these capacitors
can cause problems if the LTM8052 is plugged into a live
input supply (see Application Note 88 for a complete dis-
cussion). The low loss ceramic capacitor combined with
stray inductance in series with the power source forms an
θ
θ
– Thermal resistance from junction to ambient
JA
– Thermal resistance from junction to the
JCbottom
bottom of the product case
θ
– Thermal resistance from junction to top of the
underdamped tank circuit, and the voltage at the V pin
JCtop
product case
IN
of the LTM8052 can ring to more than twice the nominal
input voltage, possibly exceeding the LTM8052’s rating
and damaging the part. If the input supply is poorly con-
trolled or the user will be plugging the LTM8052 into an
energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
θ
– Thermal resistance from junction to the printed
JB
circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
installing a small resistor in series to V , but the most
IN
popular method of controlling input voltage overshoot is
to add an electrolytic bulk capacitor to the V net. This
θ
JA
is the natural convection junction-to-ambient air
IN
capacitor’s relatively high equivalent series resistance
damps the circuit and eliminates the voltage overshoot.
The extra capacitor improves low frequency ripple filter-
ing and can slightly improve the efficiency of the circuit,
though it is physically large.
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
Thldmuꢇ Cꢆꢄsialduniꢆꢄs
θ
is the junction-to-board thermal resistance with
JCbottom
The LTM8052 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristicssectioncanbeusedasaguide.Thesecurves
allofthecomponentpowerdissipationflowingthroughthe
bottom of the package. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient envi-
ronment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
2
were generated by the LTM8052 mounted to a 58cm
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
θ
JCtop
isdeterminedwithnearlyallofthecomponentpower
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule regulator are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc-
tion to the top of the part. As in the case of θ
, this
JCbottom
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
8052fa
20
LTM8052
applicaTions inForMaTion
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
θ
is the junction-to-board thermal resistance where
JB
almost all of the heat flows through the bottom of the
µModule regulator and into the board, and is really the
sum of the θ
A graphical representation of these thermal resistances
is given in Figure 7.
and the thermal resistance of the
JCbottom
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a 2-sided,
2-layer board. This board is described in JESD 51-9.
The blue resistances are contained within the µModule
device, and the green are outside.
The die temperature of the LTM8052 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8052. The bulk of the heat flow out of the LTM8052
is through the bottom of the module and the LGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, result-
ing in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
Giventhesedefinitions,itshouldnowbeapparentthatnone
of these thermal coefficients reflects an actual physical
operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
AMBIENT
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
CASE (BOTTOM)-TO-BOARD
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
8052 F07
µMODULE DEVICE
FigQdl 72 Thldmuꢇ Rlsisnuꢄcls Amꢆꢄg ꢅMꢆaQꢇl Dlviclꢀ
Pdiꢄnla CidcQin Bꢆuda uꢄa Eꢄvidꢆꢄmlꢄn
8052fa
21
LTM8052
Typical applicaTions
365INꢀ 3235OUT SnlpꢃDꢆwꢄ C5CC Cꢆꢄvldnld
V
3.3V
5A
LTM8052
OUT
V
IN
V
V
IN
OUT
6V TO 36V
510k
10µF
RUN
SS
+
V
REF
330µF
SYNC
CTL_I
OPTIONAL
100µF
INPUT
COMP
CTL_T
PROTECTION
RT GND ADJ
5.62k
75.0k
8052 TA02
365INꢀ LTM80±ꢁ Chudgls Twꢆ ꢁ2±5 Sldils SQpldcupucinꢆds un ±26A
V
5V
5A
LTM8052
OUT
V
IN
V
V
IN
OUT
7V TO 36V
510k
10µF
RUN
SS
2.5V
2.2F
V
REF
47µF
SYNC
CTL_I
OPTIONAL
2.5V
2.2F
INPUT
COMP
CTL_T
PROTECTION
RT GND ADJ
3.09k
68.1k
8052 TA03
8052fa
22
LTM8052
Typical applicaTions
365INꢀ 1ꢁ5OUT SnlpꢃDꢆwꢄ C5CC Cꢆꢄvldnld
V
LTM8052
OUT
V
IN
12V
V
V
IN
OUT
16V TO 36V
510k
3.5A
10µF
RUN
SS
+
V
REF
120µF
SYNC
CTL_I
OPTIONAL
47µF
INPUT
COMP
CTL_T
PROTECTION
RT GND ADJ
1.1k
61.9k
8052 TA04
365INꢀ –±5OUT Nlgunivl C5CC Cꢆꢄvldnld
LTM8052
V
IN
V
V
IN
OUT
7V TO 31V
510k
10µF
RUN
SS
+
V
120µF
REF
SYNC
CTL_I
OPTIONAL
100µF
INPUT
COMP
CTL_T
PROTECTION
RT GND ADJ
3.09k
68.1k
V
–5V
3A
OUT
8052 TA05
8052fa
23
LTM8052
Typical applicaTions
Twꢆ LTM80±ꢁs Usla nꢆ RlgQꢇunl Pꢆsinivl ꢆd Nlgunivl 5ꢆꢇnugl
ꢂuꢄa CQddlꢄnt Acdꢆss u Plꢇnild Dlvicl
V
IN
V
OUT
2V TO 8V
V
V
OUT
IN
10V TO 36V
383k
RUN
SS
LTM8052
GND
V
REF
CTL_I
CTL_T
ADJ
SYNC
COMP
RT
PELTIER
100µF
10µF
+
100µF
(OPTIONAL)
330µF
118k
1.74k to
14.7k
FIXED
5V
V
V
OUT
IN
RUN
SS
LTM8052
GND
V
REF
CTL_I
CTL_T
ADJ
SYNC
COMP
RT
100µF
10µF
+
120µF
68.1k
3.09k
8052 TA06
Snuck Twꢆ LTM80±ꢁs nꢆ Chudgl uꢄa Acnivlꢇy Buꢇuꢄcl SQpldcupucinꢆds ꢂꢆd Bunnldilst
V
IN
V
V
V
OUT
OUT
IN
8.5V TO 36V
383k
RUN
SS
LTM8052
GND
V
REF
CTL_I
CTL_T
ADJ
SYNC
COMP
RT
2.5V SUPERCAP
10µF
47µF
90.9k
9.09k
V
V
OUT
IN
RUN
SS
LTM8052
GND
10µF
V
REF
CTL_I
CTL_T
ADJ
SYNC
COMP
RT
2.5V SUPERCAP
47µF
90.9k
9.09k
8052 TA07
8052fa
24
LTM8052
package DescripTion
Pꢇlusl dlfld nꢆ hnnp://www2ꢇiꢄlud2cꢆm/alsigꢄnꢆꢆꢇs/puckugiꢄg/ fꢆd nhl mꢆsn dlclꢄn puckugl aduwiꢄgs2
Z
/ / b b b
Z
4 . 4 4 5
3 . 1 7 5
1 . 9 0 5
0 . 6 3 5
0 . 6 3 5
0 . 0 0 0
1 . 9 0 5
3 . 1 7 5
4 . 4 4 5
a a a
Z
8052fa
25
LTM8052
package DescripTion
Tubꢇl 32 Piꢄ Assigꢄmlꢄn Tubꢇl ꢂAdduꢄgla by Piꢄ NQmbldt
PIN ID
A1
FUNCTION
PIN ID
B1
FUNCTION PIN ID
FUNCTION PIN ID FUNCTION
PIN ID
E1
FUNCTION PIN ID
FUNCTION
GND
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
C1
C2
C3
C4
C5
C6
C7
C8
V
V
V
V
D1
D2
D3
D4
D5
D6
D7
D8
V
OUT
V
OUT
V
OUT
V
OUT
GND
GND
GND
GND
GND
GND
GND
CTL_I
F1
F2
F3
F4
F5
F6
F7
F8
OUT
OUT
OUT
OUT
A2
B2
E2
GND
A3
B3
E3
GND
A4
B4
E4
GND
A5
GND
GND
GND
GND
B5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
E5
GND
A6
B6
E6
GND
A7
B7
GND
E7
GND
A8
B8
CTL_T
E8
V
REF
PIN ID
G1
FUNCTION
GND
PIN ID
–
FUNCTION PIN ID
FUNCTION PIN ID FUNCTION
PIN ID
L1
FUNCTION
–
–
J1
J2
J3
–
V
IN
V
IN
V
IN
K1
K2
K3
–
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
G2
GND
–
L2
G3
GND
–
–
L3
G4
GND
–
–
–
–
–
–
G5
GND
H5
H6
H7
H8
GND
GND
GND
COMP
J5
J6
J7
J8
GND
GND
GND
SS
K5
K6
K7
K8
GND
GND
GND
ADJ
L5
GND
RUN
SYNC
GND
G6
GND
L6
G7
GND
L7
G8
RT
L8
package phoTo
8052fa
26
LTM8052
revision hisTory
RE5
DATE
DESCRIPTION
PAGE NUMBER
A
3/12
Modified the Description section.
1
2
Updated the Absolute Maximum Ratings and Pin Configuration sections.
Corrected the pin name on schematics using two LTM8052s.
Updated the Related Parts table.
24
28
8052fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTM8052
Typical applicaTion
365INꢀ 3235OUT SnlpꢃDꢆwꢄ Cꢆꢄvldnld winh 427±A AccQdunl CQddlꢄn Limin
LTM8052
V
OUT
V
IN
V
V
3.3V
IN
OUT
6V TO 36V
510k
4.75A
10µF
RUN
SS
V
REF
+
SYNC
CTL_I
100µF
330µF
OPTIONAL
INPUT
COMP
CTL_T
PROTECTION
RT GND ADJ
71.5k
127k
75k
5.62k
8052 TA08
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
6V ≤ V ≤ 36V, 1.2V ≤ V
LTM8026
36V , 5A Step-Down µModule Regulator with
≤ 24V, Adjustable Current Limit, Parallelable
OUT
IN
IN
Adjustable Current Limit
Outputs, CLK Input, 11.25mm × 15mm × 2.82mm LGA Package
LTM8025
36V , 3A Step-Down µModule Regulator
3.6V ≤ V ≤ 36V, 0.8V ≤ V
≤ 24V, CLK Input, 9mm × 15mm × 4.32mm
IN
IN
OUT
LGA Package
LTM8062/
LTM8062A
32V , 2A µModule Battery Charger with Maximum
Adjustable V
up to 14.4V (18.8V for the LTM8062A), C/10 or Timer
IN
BATT
Peak Power Tracking (MPPT)
Termination, 9mm × 15mm × 4.32mm LGA Package
LTM8027
LTM4613
60V , 4A DC/DC Step-Down µModule Regulator
IN
4.5V ≤ V ≤ 60V, 2.5V ≤ V ≤ 24V, 15mm × 15mm × 4.32mm LGA Package
IN
OUT
EN55022B Compliant 36V , 8A Step-Down µModule
5V ≤ V ≤ 36V, 3.3V ≤ V
≤ 15V, Synchronizable, Parallelable,
IN
IN
OUT
Regulator
15mm × 15mm × 4.32mm LGA Package
8052fa
LT 0312 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
LINEAR TECHNOLOGY CORPORATION 2011
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LTM8026EV#PBF
LTM8026 - 36VIN, 5A CVCC Step-Down µModule (Power Module) Regulator; Package: LGA; Pins: 81; Temperature Range: -40°C to 85°C
Linear
LTM8026IV#PBF
LTM8026 - 36VIN, 5A CVCC Step-Down µModule (Power Module) Regulator; Package: LGA; Pins: 81; Temperature Range: -40°C to 85°C
Linear
LTM8026IY#PBF
LTM8026 - 36VIN, 5A CVCC Step-Down µModule (Power Module) Regulator; Package: BGA; Pins: 81; Temperature Range: -40°C to 85°C
Linear
LTM8026MPY
LTM8026 - 36VIN, 5A CVCC Step-Down µModule (Power Module) Regulator; Package: BGA; Pins: 81; Temperature Range: -55°C to 125°C
Linear
LTM8027EV#PBF
LTM8027 - 60V, 4A DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 113; Temperature Range: -40°C to 85°C
Linear
LTM8027IV#PBF
LTM8027 - 60V, 4A DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 113; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明