LTM8028IY#PBF [Linear]
LTM8028 - 36VIN, UltraFast, Low Output Noise 5A µModule (Power Module) Regulator; Package: BGA; Pins: 114; Temperature Range: -40°C to 85°C;型号: | LTM8028IY#PBF |
厂家: | Linear |
描述: | LTM8028 - 36VIN, UltraFast, Low Output Noise 5A µModule (Power Module) Regulator; Package: BGA; Pins: 114; Temperature Range: -40°C to 85°C 开关 |
文件: | 总24页 (文件大小:355K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTM8028
36V , UltraFast,
IN
Low Output Noise 5A
µModule Regulator
FeaTures
DescripTion
The LTM®8028 is a 36V , 5A µModule® regulator, con-
n
High Performance 5A Linear Regulator with
IN
Switching Step-Down Converter for High Efficiency
sisting of an UltraFast™ 5A linear regulator preceded by a
highefficiencyswitchingregulator.Inadditiontoproviding
tight output regulation, the linear regulator automatically
controls the output voltage of the switcher to provide
optimal efficiency and headroom for dynamic response.
n
Digitally Programmable V : 0.8V to 1.8V
OUT
n
Input Voltage Range: 6V to 36V
Very Tight Tolerance Over Temperature, Line, Load
n
and Transient Response
Low Output Noise: 40μV
Parallel Multiple Devices for 10A or More
Accurate Programmable Current Limit to Allow
Asymmetric Power Sharing
Analog Output Margining: 10ꢀ Range
Synchronization Input
n
(10Hz to 100kHz)
RMS
The output voltage is digitally selectable in 50mV incre-
ments over a 0.8V to 1.8V range. An analog margining
function allows the user to adjust system output voltage
over a continuous 10ꢀ range, and a single-ended feed-
back sense line may be used to mitigate IR drops due to
parasitic resistance.
n
n
n
n
n
n
Stable with Low ESR Ceramic Output Capacitors
15mm × 15mm × 4.92mm Surface Mount
BGA Package
The LTM8028 is packaged in a compact (15mm × 15mm ×
4.92mm) overmolded ball grid array (BGA) package suit-
able for automated assembly by standard surface mount
equipment. The LTM8028 is available with SnPb (BGA) or
RoHS compliant terminal finish.
n
SnPb or RoHS Compliant Finish
applicaTions
L, LT, LTC, LTM, µModule, Linear Technology and the Linear logo are registered trademarks
and UltraFast is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
n
FPGA and DSP Supplies
n
High Speed I/O
Click to view associated TechClip Videos.
n
ASIC and Microprocessor Supplies
Servers and Storage Devices
n
Typical applicaTion
Low Output Noise, 1.2V, 5A µModule Regulator
V
OUT
20mV/DIV
LTM8028
V
1.2V
5A
OUT
V
V
OUT
IN
LINEAR
REGULATOR
V
IN
9V TO 15V
150k
0.01µF
82.5k
SENSEP
RUN
I
OUT
10µF
MARGA
IMAX
2A/DIV
BKV
∆I
= 0.5A TO 5A
OUT
1µs RISE/FALL TIME
SS
RT
PGOOD
137µF
10µs/DIV
100µF
V V V V
OB O0 O1 O2
SYNC
GND
+
FULL LOAD
NOISE AND RIPPLE
500µV/DIV
470µF
f = 500kHz
8028 TA01a
1µs/DIV
MEASURED PER AN70, 150MHz BW
8028 TA01b
8028fb
1
For more information www.linear.com/LTM8028
LTM8028
absoluTe MaxiMuM raTings
pin conFiguraTion
(Notes 1, 4)
TOP VIEW
V ............................................................................40V
OUT
IN
11
10
9
V
............................................................................3V
BANK 1
V
BANK 2
BKV
OUT
RUN, SS, SYNC ..........................................................6V
Current Into RUN ..................................................100μA
SENSEP
8
V , V , V , V , TEST,
OB O0 O1 O2
TEST
7
PGOOD, SENSEP, MARGA...........................................4V
MARGA
BANK 3
GND
PGOOD
6
RT, BKV, I
.............................................................3V
V
MAX
O0
V
O1
OB
5
Maximum Operating Junction Temperature
V
O2
V
4
3
2
1
(Note 2)................................................................. 125°C
Peak Solder Reflow Body Temperature................. 245°C
Maximum Storage Temperature............................ 125°C
SS SYNC
BANK 4
V
IN
I
RT RUN
MAX
D
A
B
C
E
F
G
H
J
K
L
BGA PACKAGE
114 PADS (15mm × 15mm × 4.92mm)
= 125°C, θ = 17.7°C/W,
T
JMAX
JA
JCtop
= 6.0°C/W
θ
= 6.0°C/W, θ
θ
= 15°C/W,
JB
JCbottom
θ VALUES DETERMINED PER JEDEC 51-9, 51-12
WEIGHT = 1.8 GRAMS
orDer inForMaTion
PART NUMBER
PAD OR BALL FINISH
PART MARKING*
PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(Note 2)
DEVICE
FINISH CODE
LTM8028EY#PBF
LTM8028IY#PBF
LTM8028IY
SAC305 (RoHS)
SAC305 (RoHS)
SnPb (63/37)
LTM8028Y
LTM8028Y
LTM8028Y
LTM8028Y
LTM8028Y
e1
e1
e0
e1
e0
BGA
BGA
BGA
BGA
BGA
3
3
3
3
3
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
–55°C to 125°C
LTM8028MPY#PBF
LTM8028MPY
SAC305 (RoHS)
SnPb (63/37)
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• Pb-free and Non-Pb-free Part Markings:
www.linear.com/leadfree
• LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
elecTrical characTerisTics The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN = 3V unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Input Voltage
Output DC Voltage
6
V
l
l
l
l
l
0.788
0.985
1.182
1.477
1.773
0.8
1.0
1.2
1.5
1.8
0.812
1.015
1.218
1.523
1.827
V
V
V
V
V
Output DC Current
V
OUT
= 1.8V
5
A
8028fb
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For more information www.linear.com/LTM8028
LTM8028
elecTrical characTerisTics The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN = 3V unless otherwise noted. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Quiescent Current Into V
RUN = 0V
No load
1
35
µA
mA
IN
l
l
l
l
l
l
Line Regulation
Load Regulation
6V < V < 36V, I
= 10mA
OUT
1
mV
IN
0.01A < I
0.01A < I
0.01A < I
0.01A < I
0.01A < I
< 5A, V
< 5A, V
< 5A, V
< 5A, V
< 5A, V
= 0.8V, BKV = 1.05V, RUN = 0V
–1.5
–2
–3
–5.5
mV
mV
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
= 1.0V, BKV = 1.25V, RUN = 0V
= 1.2V, BKV = 1.45V, RUN = 0V
= 1.5V, BKV = 1.75V, RUN = 0V
= 1.8V, BKV = 2.05V, RUN = 0V
–4
–7.5
mV
mV
–2
–4
–7.5
mV
mV
–2.5
–3
–5
–9
mV
mV
–7
–13
mV
mV
Sense Pin Current
Switching Frequency
RUN Pin Current
V
V
= 0.8V
= 1.8V
50
µA
µA
OUT
OUT
300
R = 40.2k
R = 200k
1000
200
kHz
kHz
T
T
RUN = 1.45V
5.5
1.55
130
125
µA
V
l
RUN Threshold Voltage (Falling)
RUN Input Hysteresis
1.49
1.61
mV
µA
I
I
Pin Current
I
= 0.75V
MAX
MAX
MAX
Current Limit Accuracy
I
I
= 1.5V
= 0.75V
5.0
2.20
6.1
3.6
A
A
MAX
MAX
SS Pin Current
11
µA
V
SYNC Input Threshold
SYNC Bias Current
f
= 500kHz
0.6
1.3
1
SYNC
SYNC = 0V
µA
V
V
V
V
V
V
V
Voltage
3.3
OB
Ox
Ox
Ox
Ox
Ox
l
l
l
Input Low Threshold
Input High Threshold
Input Z Range
V
V
V
= 3.3V
= 3.3V
= 3.3V
0.25
V
OB
OB
OB
3.05
0.75
V
2.4
40
40
V
Input Current High
Input Current Low
µA
µA
μA
MARGA Pin Current
PGOOD Threshold
MARGA = 0V
3.5
V
V
= 1.0V, V
= 1.0V, V
Rising
Falling
0.9
0.85
V
V
OUT(NOMINAL)
OUT(NOMINAL)
OUT
OUT
Output Voltage Noise (Note 3)
V
= 1.8V, C
= 137µF, 5A Load, BW = 10Hz to 100kHz
40
µV
RMS
OUT
OUT
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8028E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls.
The LTM8028I is guaranteed to meet specifications over the full –40°C
to 125°C internal operating temperature range. The LTM8028MP is
guaranteed to meet specifications over the full –55°C to 125°C internal
operating temperature range. Note that the maximum internal temperature
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 3: Guaranteed by design, characterization and correlation with
statistical process controls.
Note 4: Unless otherwise stated, the absolute minimum voltage is zero.
8028fb
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For more information www.linear.com/LTM8028
LTM8028
Typical perForMance characTerisTics
Power Loss vs Output Current,
0.8VOUT
Power Loss vs Output Current,
1VOUT
Power Loss vs Output Current,
1.2VOUT
5
4
3
2
1
0
5
4
3
2
1
0
5
4
3
2
1
0
36V
36V
36V
IN
IN
IN
IN
IN
IN
IN
IN
IN
24V
12V
6V
24V
12V
6V
24V
12V
6V
IN
IN
IN
0
1
2
3
4
5
0
1
2
3
4
5
0
1
2
3
4
5
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8028 G01
8028 G02
8028 G03
Power Loss vs Output Current,
1.5VOUT
Power Loss vs Output Current,
1.8VOUT
Input Current vs Output Current,
0.8VOUT
5
4
3
2
1
0
5
4
3
2
1
0
1400
1200
6V
IN
12V
24V
36V
IN
IN
IN
1000
800
600
400
200
0
36V
36V
IN
IN
IN
IN
IN
IN
24V
12V
24V
12V
6V
6V
IN
IN
1
2
3
5
1
2
3
4
5
0
1
2
3
4
5
0
4
0
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8028 G04
8028 G05
8026 G06
Input Current vs Output Current,
1VOUT
Input Current vs Output Current,
1.2VOUT
Input Current vs Output Current,
1.5VOUT
1800
2000
1800
1600
1400
1200
1000
800
1600
1400
1200
1000
6V
IN
6V
IN
6V
IN
1600
1400
1200
1000
800
12V
IN
12V
IN
12V
IN
24V
IN
24V
IN
24V
IN
36V
IN
36V
IN
36V
IN
800
600
600
600
400
200
0
400
400
200
200
0
0
1
2
4
0
5
0
1
3
4
5
3
2
0
4
5
1
2
3
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8028 G07
8028 G09
8028 G08
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For more information www.linear.com/LTM8028
LTM8028
Typical perForMance characTerisTics
Input Current vs Output Current,
1.8VOUT
Input Current vs Input Voltage,
Output Shorted
Output Current vs Input Voltage,
Output Shorted
2500
2000
1500
1000
500
6.0
5.8
5.6
5.4
1200
1000
6V
IN
12V
24V
36V
IN
IN
IN
800
600
400
200
0
5.2
5.0
0
0
1
2
3
4
5
0
12
18
24
30
36
6
0
10
20
30
40
INPUT VOLTAGE (V)
OUTPUT CURRENT (A)
INPUT VOLTAGE (V)
8028 G10
8028 G12
8038 G11
Transient Response,
Demo Board, 1V
Transient Response,
Demo Board, 1.2V
Transient Response,
Demo Board, 1.5V
V
V
V
OUT
OUT
OUT
20mV/DIV
20mV/DIV
20mV/DIV
I
OUT
I
I
OUT
OUT
2A/DIV
∆I
2A/DIV
2A/DIV
OUT
∆I
∆I
OUT
OUT
0.5A TO 5A
1µs
RISE/FALL
TIME
0.5A TO 5A
1µs
0.5A TO 5A
1µs
RISE/FALL
TIME
RISE/FALL
TIME
8028 G13
8028 G14
8028 G15
10µs/DIV
10µs/DIV
10µs/DIV
C
= 100µF + 22µF + 10µF + 4.7µF
C
= 100µF + 22µF + 10µF + 4.7µF
C
= 100µF + 22µF + 10µF + 4.7µF
OUT
OUT
OUT
Transient Response,
Demo Board, 1.8V
Output Current vs IMAX Voltage,
12VIN
Output Noise, 1.8VOUT
6
V
OUT
20mV/DIV
5
4
I
OUT
500µV/DIV
2A/DIV
∆I
OUT
0.5A TO 5A
1µs
RISE/FALL
TIME
3
2
1
0
8028 G17
8028 G16
1µs/DIV
20µs/DIV
= 100µF + 22µF + 10µF + 4.7µF
MEASURED WITH HP461A AMPLIFIER
(150MHz BW) AT J5 BNC CONNECTOR
ON DC1738 DEMO BOARD
C
OUT
f
= 500kHz
OUT
SW
C
= 137µF
5A LOAD
0
0.5
1.0
1.5
2.0
I
VOLTAGE (V)
MAX
8028 G18
8028fb
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For more information www.linear.com/LTM8028
LTM8028
Typical perForMance characTerisTics
Output Voltage Change vs MARGA
Voltage, 1VOUT
Temperature Rise
Temperature Rise
vs Output Current, 0.8VOUT
vs Output Current, 1VOUT
15
60
50
60
50
10
5
40
30
40
30
0
–5
20
10
0
20
10
0
36V
24V
12V
36V
24V
12V
IN
IN
IN
IN
IN
IN
–10
–15
6V
6V
IN
IN
0
0.3
0.6
0.9
1.2
0
1
2
3
4
5
0
1
2
3
4
5
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
MARGA VOLTAGE (V)
8028 G19
8028 G20
8028 G21
Temperature Rise
vs Output Current, 1.2VOUT
Temperature Rise
vs Output Current, 1.5VOUT
Temperature Rise
vs Output Current, 1.8VOUT
60
50
60
50
60
50
40
30
40
30
40
30
20
10
0
20
10
0
20
10
0
36V
36V
36V
IN
IN
IN
IN
IN
IN
IN
IN
IN
24V
12V
6V
24V
12V
6V
24V
12V
6V
IN
IN
IN
0
1
2
3
4
5
0
1
2
3
4
5
0
5
1
2
3
4
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8028 G22
8028 G23
8028 G24
Output Noise Spectral Density
Soft-Start Waveform vs CSS
10
1
C
= OPEN
C
= 10nF
SS
SS
C
= 100nF
SS
500mV/DIV
C
= 47nF
SS
0.1
0.01
8028 G26
2ms/DIV
5A RESISTIVE LOAD
V
IN
= 12V
C
V
= 137µF
= 1.8V
= 5A
OUT
OUT
OUT
C
C
= 4.7µF + 10µF + 22µF
= 100µF + 470µF
OUT
BKV
I
V
= 12V
IN
0.001
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
8028 G25
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For more information www.linear.com/LTM8028
LTM8028
pin FuncTions
V
(Bank 1): Power Output Pins. Apply the output filter
error at the point of load. Connecting the SENSEP pin at
OUT
capacitor and the output load between these and the GND
the load instead of directly to V
eliminates this voltage
OUT
pins.
error. The SENSEP pin input bias current depends on the
selected output voltage. SENSEP pin input current varies
BKV(Bank2):BuckRegulatorOutput.Applythestep-down
regulator’s bulk capacitance here (refer to Table 1). Do not
connect this to the load. Do not drive a voltage into BKV.
from 50μA typically at V
OUT
locally or remotely.
= 0.8V to 300μA typically at
OUT
V
= 1.8V. SENSEP must be connected to V , either
OUT
GND (Bank 3): Tie these GND pins to a local ground plane
below the LTM8028 and the circuit components. In most
applications, the bulk of the heat flow out of the LTM8028
is through these pads, so the printed circuit design has a
large impact on the thermal performance of the part. See
the PCB Layout and Thermal Considerations sections for
more details.
V
(Pin B5): Bias for V , V , V . This is a 3.3V source
O0 O1 O2
OB
to conveniently pull up the V , V , V pins, if desired.
O0 O1 O2
If not used, leave this pin floating.
PGOOD (Pin B7): Power Good. Open drain signal that will
be high impedance if:
• The output rises above 90ꢀ of the target voltage
• The output stays above 85ꢀ of target voltage
• The output linear regulator does not overheat
V (Bank4):TheV pinsuppliescurrenttotheLTM8028’s
IN
IN
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
Please see the Application Information section for more
details. If not used, tie PGOOD to GND.
V , V , V (Pin A6, Pin B6, Pin A5): Output Voltage
O0 O1 O2
Select. These three-statepinscombinetoselecta nominal
outputvoltagefrom0.8Vto1.8Vinincrementsof50mV.See
Table2intheApplicationsInformationsectionthatdefines
I
(Pin D1): Sets the Maximum Output Current. Con-
MAX
nect a resistor/ NTC thermistor network to the I
pin
MAX
to reduce the maximum regulated output current of the
LTM8028inresponsetotemperature. Thispinisinternally
pulled up to 2V through a 10k resistor, and the control
voltage range is 0V to 1.5V.
theV ,V andV settingsversusV .
O2 O1
O0
OUT
MARGA (Pin A7): Analog Margining: This pin margins the
output voltage over a continuous analog range of 10ꢀ.
Tying this pin to GND adjusts output voltage by –10ꢀ.
Driving this pin to 1.2V adjusts output voltage by 10ꢀ. A
voltage source or a voltage output DAC is ideal for driving
this pin. If the MARGA function is not used, either float
this pin or terminate with a 1nF capacitor to GND.
SS(PinD2):TheSoft-StartPin.Placeanexternalcapacitor
to ground to limit the regulated current during start-up
conditions.Thesoft-startpinhasan11μAchargingcurrent.
RT (Pin E1): The RT pin is used to program the switching
frequency of the LTM8028’s buck regulator by connect-
ing a resistor from this pin to ground. The Applications
Information section of the data sheet includes a table
to determine the resistance value based on the desired
switching frequency. When using the SYNC function,
set the frequency to be 20ꢀ lower than the SYNC pulse
frequency. Do not leave this pin open.
TEST (Pin A8): Factory Test. Leave this pin open.
SENSEP (Pin A9): Kelvin Sense for V . The SENSEP
OUT
pin is the inverting input to the error amplifier. Optimum
regulation is obtained when the SENSEP pin is connected
totheV
pinsoftheregulator.Incriticalapplications,the
OUT
resistanceofPCBtracesbetweentheregulatorandtheload
can cause small voltage drops, creating a load regulation
8028fb
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For more information www.linear.com/LTM8028
LTM8028
pin FuncTions
SYNC (Pin E2): Frequency Synchronization Pin. This pin
allows the switching frequency to be synchronized to an
external clock. The RT resistor should be chosen to oper-
ate the internal clock at 20ꢀ slower than the SYNC pulse
frequency. This pin should be grounded when not in use.
Do not leave this pin floating. When laying out the board,
avoid noise coupling to or from the SYNC trace. See the
Synchronization section in Applications Information.
RUN (Pin F1): The RUN pin acts as an enable pin and
turns off the internal circuitry at 1.55V. The pin does not
have any pull-up or pull-down, requiring a voltage bias for
normal part operation. The RUN pin is internally clamped,
so it may be pulled up to a voltage source that is higher
than the absolute maximum voltage of 6V, provided the
pin current does not exceed 100μA.
block DiagraM
BKV
2.2µH
V
IN
V
OUT
10Ω
SENSEP
0.2µF
10µF
5A LINEAR
REGULATOR
TEST
MARGA
PGOOD
RUN
INPUT-OUTPUT
CONTROL
SYNC
CURRENT
MODE
I
MAX
CONTROLLER
SS
RT
INTERNAL
POWER
V
IN
V
OB
V
O2
V
O1
V
O0
GND
8028 BD
8028fb
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For more information www.linear.com/LTM8028
LTM8028
operaTion
Current generation FPGA and ASIC processors place
stringent demands on the power supplies that power the
core, I/O and transceiver channels. Power supplies that
power these processors have demanding output voltage
specifications, especially at low voltages, where they
require tight tolerances, small transient response excur-
sions, low noise and high bandwidth to achieve the lowest
bit-error rates. This can be accomplished with some high
performance linear regulators, but this can be inefficient
for high current and step-down ratios.
the LTM8028 only loses 4W, while the traditional linear
regulator theoretically dissipates over 110W.
The LTM8028 switching buck converter utilizes fixed-
frequency, forced continuous current mode control to
regulate its output voltage. This means that the switching
regulator will stay in fixed frequency operation even as the
LTM8028 output current falls to zero. The LTM8028 has
an analog control pin, I
, to set the maximum allow-
MAX
able current output of the LTM8028. The analog control
range of I is from 0V to 1.5V. The RUN pin functions
MAX
The LTM8028 is a 5A high efficiency, UltraFast transient
responselinearregulator.Itintegratesabuckregulatorwith
a high performance linear regulator, providing a precisely
regulatedoutputvoltagedigitallyprogrammablefrom0.8V
to 1.8V. As shown in the Block Diagram, the LTM8028
contains a current mode controller, power switches,
power inductor, linear regulator, and a modest amount
of capacitance. To achieve high efficiency, the integrated
buck regulator is automatically controlled (Input-Output
Control on the Block Diagram) to produce the optimal
voltage headroom to balance efficiency, tight regulation
and transient response at the linear regulator output.
as a precision shutdown pin. When the voltage at the RUN
pin is lower than 1.55V, switching is terminated. Below
this threshold, the RUN pin sinks 5.5µA. This current can
be used with a resistor between RUN and V to set the
IN
hysteresis. During start-up, the SS pin is held low until the
part is enabled, after which the capacitor at the soft-start
pin is charged with an 11μA current source. The switching
frequency is determined by a resistor at the RT pin. The
LTM8028 may also be synchronized to an external clock
through the use of the SYNC pin.
The output linear regulator supplies up to 5A of output
current with a typical dropout voltage of 85mV. Its high
bandwidthprovidesUltraFasttransientresponseusinglow
ESR ceramic output capacitors, saving bulk capacitance,
PCB area and cost. The output voltage for the LTM8028
is digitally selectable in 50mV increments over a 0.8V to
1.8Vrange, andanalogmarginingfunctionallowstheuser
to adjust system output voltage over a continuous 10ꢀ
range. It also features a remote sense pin for accurate
regulation at the load, and a PGOOD circuit that indicates
whethertheoutputisinoroutofregulationorifaninternal
fault has occurred.
Figure 1 is a composite graph of the LTM8028’s power
losscomparedtothetheoreticalpowerlossofatraditional
linear regulator. Note that the power loss (left hand Y axis)
is plotted on the log scale. For 1.2V
at 5A and 24V
OUT
IN
1000
60
55
50
45
TRADITIONAL LINEAR
REGULATOR POWER LOSS
100
10
0
TEMPERATURE RISE
POWER LOSS
The LTM8028 is equipped with a thermal shutdown to
protectthedeviceduringmomentaryoverloadconditions.
It is set above the 125°C absolute maximum internal tem-
perature rating to avoid interfering with normal specified
operation, so internal device temperatures will exceed
the absolute maximum rating when the overtemperature
protection is active. So, continuous or repeated activation
of the thermal shutdown may impair device reliability.
During thermal shutdown, all switching is terminated and
the SS pin is driven low.
40
35
30
0
10
20
30
40
INPUT VOLTAGE (V)
8028 F01
Figure 1. This Graph Shows the Full Load Power Loss and
Temperature Rise of the LTM8028 over a Range of Input
Voltages. Compare These Numbers to a Traditional Linear
Regulator Powering the Same Load an Operating Condition.
Note the Log Scale for Power Loss.
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For most applications, the design process is straight
forward, summarized as follows:
verify proper operation over the intended system’s line,
load and environmental conditions. Bear in mind that the
maximum output current is limited by junction tempera-
ture, therelationshipbetweentheinputandoutputvoltage
magnitude and polarity and other factors. Please refer to
the graphs in the Typical Performance Characteristics
section for guidance.
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply 10μF to V and the recommended R value
IN
T
(R
in Table 1). Lower R values (resulting in
T(OPTIMAL)
T
a higher operating frequency) may be used to reduce
The maximum frequency (and attendant R value) at
T
the output ripple. Do not use values below R
.
T(MIN)
which the LTM8028 should be allowed to switch is given
3. Apply a parallel combination of a 100μF ceramic and
a 470μF electrolytic to BKV. The Sanyo OS-CON 6SEP-
C470MorUnitedChemi-ConAPXF6R3ARA471MH80G
workwellfortheelectrolyticcapacitor,butotherdevices
with an ESR about 10mΩ may be used.
in Table 1 in the f
column, while the recommended
MAX
frequency (and R value) for optimal efficiency over the
T
given input condition is given in the f
column.
OPTIMAL
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
4. Apply a minimum of 37μF to V . As shown in Table 1,
OUT
this is usually a parallel combination of 4.7μF, 10μF and
Programming Output Voltage
22μF capacitors.
Threetri-levelinputpins,V ,V andV ,selectthevalue
O2 O1
O0
5. Apply an additional 100µF capacitor to V
small (2ꢀ) transient response is required.
if very
OUT
of output voltage. Table 2 illustrates the 3-bit digital word-
to-output voltage resulting from setting these pins high,
low or allowing them to float. These pins may be tied high
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
or low by either pin-strapping them to V or driving them
OB
Table 1: Recommended Component Values and Configuration (TA = 25°C)
V
V
f
R
f
R
T(MIN)
IN
OUT
OPTIMAL
T(OPTIMAL)
MAX
6V to 36V
6V to 36V
6V to 36V
6V to 36V
6V to 36V
9V to 15V
9V to 15V
9V to 15V
9V to 15V
9V to 15V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
0.8V
1.0V
1.2V
1.5V
1.8V
0.8V
1.0V
1.2V
1.5V
1.8V
0.8V
1.0V
1.2V
1.5V
1.8V
200kHz
250kHz
200k
250kHz
280kHz
315kHz
333kHz
385kHz
650kHz
750kHz
800kHz
1MHz
165k
150k
133k
127k
107k
61.9k
53.6k
49.9k
40.2k
40.2k
165k
150k
133k
127k
107k
165k
165k
165k
133k
165k
150k
143k
133k
118k
200k
165k
165k
165k
133k
250kHz
250kHz
315kHz
250kHz
280kHz
300kHz
315kHz
350kHz
1MHz
200kHz
250kHz
280kHz
315kHz
333kHz
385kHz
250kHz
250kHz
250kHz
315kHz
C :
IN
10µF, 50V, 1210
C
C
C
:
100µF, 6.3V, 1210 + 470µF, 6.3V Low ESR Electrolytic
4.7µF, 4V, 0603 + 10µF, 10V, 0805 + 22µF, 10V, 0805
100µF, 6.3V, 1210
BKV
OUT
OUT
:
(Optional):
Note: An input bulk capacitor is required.
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with digital ports. Pins that float may either actually float
or require logic that has Hi-Z output capability. This allows
theoutputvoltagetobedynamicallychangedifnecessary.
The output voltage is selectable from a minimum of 0.8V
to a maximum of 1.8V in increments of 50mV.
The output capacitance for BKV given in Table 1 specifies
an electrolytic capacitor. Ceramic capacitors may also be
used in the application, but it may be necessary to use
more of them. Many high value ceramic capacitors have
a large voltage coefficient, so the actual capacitance of
the component at the desired operating voltage may be
only a fraction of the specified value. Also, the very low
ESR of ceramic capacitors may necessitate an additional
capacitor for acceptable stability margin.
Table 2. VO2 to VO0 Setting vs Output Voltage
V
V
V
V
V
V
V
V
OUT(NOM)
O2
O1
O0
OUT(NOM)
O2
O1
O0
0
0
0
0
0
0
0
0
0
Z
Z
0
0
0
Z
Z
Z
1
1
1
0
0
0
Z
1
0
Z
1
0
Z
1
0
Z
0.80V
Z
Z
Z
Z
Z
Z
Z
1
1
1
0
Z
Z
Z
1
1
1
X
X
X
1
0
Z
1
0
Z
1
0
Z
1
1.35V
0.85V
0.90V
0.95V
1.00V
1.05V
1.10V
1.15V
1.20V
1.25V
1.30V
1.40V
1.45V
1.50V
1.55V
1.60V
1.65V
1.70V
1.75V
1.80V
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8028. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8028 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
Why Do Multiple, Small Value Output Capacitors
Connected in Parallel Work Better?
X = Don’t Care, 0 = Low, Z = Float, 1 = High
Capacitor Selection Considerations
The parasitic series inductance (ESL) and resistance
(ESR) of a capacitor can have a detrimental impact on the
transient and ripple/noise response of a linear regulator.
Employing a number of capacitors in parallel will reduce
this parasitic impedance and improve the performance of
thelinearregulator.Inaddition,PCBviascanaddsignificant
inductance,sothefundamentaldecouplingcapacitorsmust
be mounted on the same copper plane as the LTM8028.
The C , C
and C
capacitor values in Table 1 are the
OUT
IN BKV
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
The most area efficient parallel capacitor combination is
a graduated 4/2/1 scale capacitances of the same case
size, such as the 37μF combination in Table 1, made up
of 22μF, 10μF and 4.7μF capacitors in parallel. Capacitors
with small case sizes have larger ESR, while those with
larger case sizes have larger ESL. As seen in Table 1, the
optimum case size is 0805, followed by a larger, fourth
bulk energy capacitor, case sized 1210. In general, the
largefourthcapacitorisrequiredonlyifverytighttransient
response is required.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal
capacitanceresultinginmuchhigheroutputvoltageripple
than expected.
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Output Voltage Margining
damaging the load. If the SENSEP signal is inadvertently
disconnected from the load, internal safety circuits in the
LTM8028 prevent the output from running away. This also
limits the amount of correction to about 0.2V.
The LTM8028’s analog margining pin, MARGA, provides a
continuous output voltage adjustment range of 10ꢀ. It
margins V
by adjusting the internal 600mV reference
OUT
voltage up and down. Driving MARGA with 600mV to
1.2V provides 0ꢀ to 10ꢀ of adjustment. Driving MARGA
with 600mV to 0V provides 0ꢀ to –10ꢀ of adjustment.
If unused, allow MARGA to float or bypass this pin with
a 1nF capacitor to GND. Note that the analog margining
function does not adjust the PGOOD threshold. Therefore,
negativeanalogmarginingmaytripthePGOODcomparator
and toggle the PGOOD flag.
Bear in mind that the linear regulator of the LTM8028
is a high bandwidth power device. If the load is very far
from the LTM8028, the parasitic impedance of the remote
connection may interfere with the internal control loop
and adversely affect stability. If SENSEP is connected to
a remote load, the user must evaluate the load regulation
and dynamic load response of the LTM8028.
Short-Circuit and Overload Recovery
Power Good
LikemanyICpowerregulators,theinternallinearregulator
has safe operating area (SOA) protection. The safe area
protection decreases current limit as input-to-output volt-
age increases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage
up to the absolute maximum voltage rating.
PGOOD pin is an open-drain NMOS digital output that ac-
tively pulls low if any one of these fault modes is detected:
• V
is less than 90ꢀ of V
on the rising
OUT
edge of V
OUT(NOMINAL)
drops below 85ꢀ of V
OUT(NOMINAL)
.
OUT
• V
for more than
OUT
UndermaximumI
andmaximumV -V conditions,
IN OUT
LOAD
25μs.
the internal linear regulator’s power dissipation peaks at
about 1.5W. If ambient temperature is high enough, die
junction temperature will exceed the 125°C maximum
operating temperature. If this occurs, the LTM8028 relies
on two additional thermal safety features. At about 145°C,
the device is designed to make the PGOOD output pull
low providing an early warning of an impending thermal
shutdown condition. At 165°C typically, the LTM8028 is
designed to engage its thermal shutdown and the output
is turned off until the IC temperature falls below the
thermal hysteresis limit. The SOA protection decreases
current limit as the in-to-out voltage increases and keeps
the power dissipation at safe levels for all values of input-
to-output voltage.
• Internal faults such as loss of internal housekeeping
voltageregulation,reverse-currentonthepowerswitch
and excessive temperature.
SENSEP and Load Regulation
TheLTM8028providesaKelvinsensepinforV ,allowing
OUT
the application to correct for parasitic package and PCB
IR drops. If the load is far from the LTM8028, running a
separate line from SENSEP to the remote load will correct
forIRvoltagedropsandimproveloadregulation. SENSEP
is the only voltage feedback that the LTM8028 uses to
regulatetheoutput,soitmustbeconnectedtoV ,either
OUT
locally or at the load. In some systems, a loss of feedback
signal equates to a loss of output control, potentially
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Reverse Voltage
Switching Frequency Synchronization
The LTM8028 incorporates a circuit that detects if BKV
The nominal switching frequency of the LTM8028 is
determined by the resistor from the RT pin to GND and
may be set from 200kHz to 1MHz. The internal oscillator
may also be synchronized to an external clock through
the SYNC pin. The external clock applied to the SYNC pin
musthavealogiclowbelow0.25Vandalogichighgreater
than 1.25V. The input frequency must be 20ꢀ higher than
the frequency determined by the resistor at the RT pin.
The duty cycle of the input signal needs to be greater than
10ꢀ and less than 90ꢀ. Input signals outside of these
specifiedparameterswillcauseerraticswitchingbehavior
and subharmonic oscillations. When synchronizing to an
external clock, please be aware that there will be a fixed
delay from the input clock edge to the edge of switch. The
SYNC pin must be tied to GND if the synchronization to an
external clock is not required. When SYNC is grounded,
the switching frequency is determined by the resistor at
the RT pin.
decreasesbelowV .Ifthisvoltageconditionisdetected,
OUT
internal circuitry turns off the drive to the internal linear
regulator’s pass transistor, thereby turning off the output.
Thiscircuit’sintentistolimitandpreventback-feedcurrent
from V
to V if the input voltage collapses due to a
OUT
IN
fault or overload condition. Do not apply a voltage to BKV.
Programming Switching Frequency
TheLTM8028hasanoperationalswitchingfrequencyrange
between200kHzand1MHz.Thisfrequencyisprogrammed
with an external resistor from the RT pin to ground. Do
not leave this pin open under any condition. The RT pin
is also current limited to 60μA. See Table 3 for resistor
values and the corresponding switching frequencies.
Table 3. RT Resistor Values and Their Resultant Switching
Frequencies
SWITCHING FREQUENCY (MHz)
R (kΩ)
T
1
0.750
0.5
0.3
0.2
40.2
53.6
82.5
143
200
Soft-Start
The soft-start function controls the slew rate of the power
supply output voltage during start-up. A controlled output
voltagerampminimizesoutputvoltageovershoot,reduces
inrush current from the V supply, and facilitates supply
IN
Switching Frequency Trade-Offs
sequencing. A capacitor connected from the SS pin to
GND programs the slew rate. The capacitor is charged
fromaninternal11μAcurrentsourcetoproducearamped
output voltage.
ItisrecommendedthattheuserapplytheoptimalR value
T
given in Table 1 for the input and output operating condi-
tion. System level or other considerations, however, may
necessitateanotheroperatingfrequency.Ahigherswitching
frequency, for example, will yield a smaller output ripple,
while a lower frequency will reduce power loss. Switch-
ing too fast, however, can generate excessive heat and
even possibly damage the LTM8028 in fault conditions.
Switching too slow can result in a final design that has too
muchoutputcapacitanceorsub-harmonicoscillationsthat
cause excessive ripple. In all cases, stay below the stated
Maximum Output Current Adjust
To adjust the regulated load current, an analog voltage
is applied to the I
0V and 1.5V adjusts the maximum current between the
minimum and the maximum current, 5.6A typical. Above
1.5V, the control voltage has little effect on the regulated
inductorcurrent.AgraphoftheoutputcurrentversusI
voltageisgivenintheTypicalPerformanceCharacteristics
pin. Varying the voltage between
MAX
MAX
maximum frequency (f
) given in Table 1.
MAX
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section. There is a 10k resistor internally connected from
LTM8028 when the RUN pin voltage falls to 1.55V. There
is also an internal current source that provides 5.5μA of
pull-downcurrenttoprogramadditionalUVLOhysteresis.
For RUN rising, the current source is sinking 5.5µA until
RUN = 1.68V, after which it turns off. For RUN falling, the
current source is off until the RUN = 1.55V, after which it
sinks5.5µA.Thefollowingequationsdeterminethevoltage
dividerresistorsforprogrammingthefallingUVLOvoltage
a 2V reference to the I
pin, so the current limit can
MAX
be set as shown in Figure 2 with the following equation:
10•IMAX
7.467–IMAX
RIMAX
=
kΩ
LTM8028
and rising enable voltage (V ) as configured in Figure 3.
ENA
I
MAX
R
IMAX
1.55•R2
UVLO–1.55
R1=
R2=
8028 F02
Figure 2. Setting The Output Current Limit, IMAX
VENA –1.084•UVLO
5.5µA
Thermal Shutdown
At about 145°C, the LTM8028 is designed to make the
PGOOD output pull low providing an early warning of
an impending thermal shutdown condition. At 165°C
typically, the LTM8028 is designed to engage its thermal
shutdown, discharge the soft-start capacitor and turn off
the output until the internal temperature falls below the
thermalhysteresislimit.Whentheparthascooled,thepart
automatically restarts. Note that this thermal shutdown is
set to engage at temperatures above the 125°C absolute
maximum internal operating rating to ensure that it does
not interfere with functionality in the specified operating
range.Thismeansthatinternaltemperatureswillexceedthe
125°Cabsolutemaximumratingwhentheovertemperature
protection is active, so repeated or prolonged operation
under these conditions may impair the device’s reliability.
V
V
IN
IN
R2
R1
LTM8028
RUN
8028 F03
Figure 3. UVLO Configuration
The RUN pin has an absolute maximum voltage of 6V.
To accommodate the largest range of applications, there
is an internal Zener diode that clamps this pin, so that it
can be pulled up to a voltage higher than 6V through a
resistor that limits the current to less than 100µA. For
applications where the supply range is greater than 4:1,
size R2 greater than 375k.
UVLO and Shutdown
PCB Layout
TheLTM8028hasaninternalUVLOthatterminatesswitch-
ing,resetsalllogic,anddischargesthesoft-startcapacitor
for input voltages below 4.2V. The LTM8028 also has a
precision RUN function that enables switching when the
voltage at the RUN pin rises to 1.68V and shuts down the
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8028. The LTM8028 is neverthe-
less a switching power supply, and care must be taken to
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minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 4
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8028.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 4. The LTM8028 can benefit from
theheatsinkingaffordedbyviasthatconnecttointernal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
A few rules to keep in mind are:
1. Place the R resistor as close as possible to its respec-
T
tive pins.
2. Place the C capacitor as close as possible to the V
IN
IN
and GND connection of the LTM8028.
3. Place the C
capacitors as close as possible to the
OUT
V
and GND connection of the LTM8028.
OUT
4. Place the C , C
and C
capacitors such that their
IN BKV
OUT
ground current flow directly adjacent or underneath the
LTM8028.
GND
C
C
BKV
OUT
BKV
V
OUT
SENSEP
TEST
MARGA
PGOOD
GND
V
V
O0
O2
(OUTPUT IS
SET TO 1.55V)
V
O1
OB
V
SS SYNC
I
RT RUN
MAX
GND
THERMAL VIAS
V
IN
C
IN
8028 F04
Figure 4. Layout Showing Suggested External Components, GND Plane and Thermal Vias
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Load Sharing
Hot-Plugging Safely
Each LTM8028 features an accurate current limit that en-
ables the use of multiple devices to power a load heavier
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8028. However, these capacitors
can cause problems if the LTM8028 is plugged into a live
input supply (see Application Note 88 for a complete dis-
cussion). The low loss ceramic capacitor combined with
stray inductance in series with the power source forms an
than 5A. This is accomplished by simply tying the V
OUT
terminals of the LTM8028s together, and set the outputs of
the parallel units to the same voltage. There is no need to
powertheμModuleregulatorsfromthesamepowersupply.
That is, the application can use multiple LTM8028s, each
powered from separate input voltage rails and contribute
a different amount of current to the load as dictated by the
programmedcurrentlimit.Keepinmindthattheparalleled
LTM8028swillnotsharecurrentequally.Inmostcases,one
LTM8028 will provide almost all the load until its current
limit is reached, and then the other unit or units will start
to provide current. This might be an unacceptable operat-
ing condition in other power regulators, but the accurate
current loop of the LTM8028 controls the electrical and
thermalperformanceofeachindividualμModuleregulator.
This prevents the oscillations, thermal runaway and other
issues that other regulators might suffer. An example of
two LTM8028s connected in parallel to deliver 1.8V at
10A, while powered from two disparate power sources,
is given in the Typical Applications section. A graph of the
output current delivered from each μModule regulator is
given below in Figure 5.
underdamped tank circuit, and the voltage at the V pin
IN
of the LTM8028 can ring to more than twice the nominal
input voltage, possibly exceeding the LTM8028’s rating
and damaging the part. If the input supply is poorly con-
trolled or the user will be plugging the LTM8028 into an
energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
installing a small resistor in series to V , but the most
IN
popular method of controlling input voltage overshoot is
to add an electrolytic bulk capacitor to the V net. This
IN
capacitor’s relatively high equivalent series resistance
damps the circuit and eliminates the voltage overshoot.
The extra capacitor improves low frequency ripple filter-
ing and can slightly improve the efficiency of the circuit,
though it is physically large.
6
5
4
3
2
1
0
1
2
4
6
8
10
TOTAL LOAD CURRENT (A)
8028 F05
Figure 5. In Most Cases Where Paralleled LTM8028s are
Used, One µModule Will Deliver All of The Load Current Until
Its Current Limit Is Reached, Then The Other Unit(s) Will
Provide Current. The Tightly Controlled Output Current Prevents
Oscillations and Thermal Runaway Observed In Other Types of
Regulators
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Thermal Considerations
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
TheLTM8028reliesontwothermalsafetyfeatures.Atabout
145°C, the device is designed to pull the PGOOD output
low providing an early warning of an impending thermal
shutdown condition. At 165°C typically, the LTM8028 is
designedtoengageitsthermalshutdownandtheoutputis
turned off until the IC temperature falls below the thermal
hysteresis limit. Note that these temperature thresholds
are above the 125°C absolute maximum rating to avoid
interfering with normal operation. Thus, prolonged or
repetitiveoperationunderaconditioninwhichthethermal
shutdown activates may damage or impair the reliability
of the device.
θ
is the natural convection junction-to-ambient air
JA
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θ
is the junction-to-board thermal resistance with
JCbottom
allofthecomponentpowerdissipationflowingthroughthe
bottom of the package. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient envi-
ronment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
The LTM8028 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristicssectioncanbeusedasaguide.Thesecurves
2
were generated by the LTM8028 mounted to a 58cm
θ
isdeterminedwithnearlyallofthecomponentpower
JCtop
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule regulator are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc-
tion to the top of the part. As in the case of θ
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
, this
JCbottom
Forincreasedaccuracyandfidelitytotheactualapplication,
manydesignersusefiniteelementanalysis(FEA)topredict
thermal performance. To that end, the Pin Configuration
of the data sheet typically gives four thermal coefficients:
θ
is the junction-to-board thermal resistance where
JB
almost all of the heat flows through the bottom of the
θ
θ
– Thermal resistance from junction to ambient
µModule regulator and into the board, and is really the
sum of the θ
JA
and the thermal resistance of the
JCbottom
–Thermalresistancefromjunctiontothebottom
JCbottom
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a 2-sided,
2-layer board. This board is described in JESD 51-9.
of the product case
θ
– Thermal resistance from junction to top of the
JCtop
product case
θ
– Thermal resistance from junction to the printed
JBoard
circuit board.
8028fb
17
For more information www.linear.com/LTM8028
LTM8028
applicaTions inForMaTion
Giventhesedefinitions,itshouldnowbeapparentthatnone
of these thermal coefficients reflects an actual physical
operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
The blue resistances are contained within the µModule
regulator, and the green are outside.
The die temperature of the LTM8028 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8028. The bulk of the heat flow out of the LTM8028
is through the bottom of the module and the LGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, result-
ing in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
A graphical representation of these thermal resistances
is given in Figure 6:
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
AMBIENT
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
CASE (BOTTOM)-TO-BOARD
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
8028 F06
µMODULE DEVICE
Figure 6. Thermal Model of µModule
Typical applicaTions
Transient Response from 0.5A to 5A, 1µs
Load Current Rise and Fall Time, 12VIN
1V at 5A Regulator with 2% Transient Response
LTM8028
V
1V
5A
OUT
V
V
OUT
IN
LINEAR
V
IN
LOAD
CURRENT
2A/DIV
REGULATOR
6V TO 36V
402k
0.01µF
165k
SENSEP
RUN
MARGA
IMAX
10µF
BKV
SS
RT
PGOOD
137µF*
V
OUT
20mV/DIV
100µF
V V V V
OB O0 O1 O2
SYNC
GND
+
470µF
8028 TA03
1µs/DIV
8028 TA02
*137µF = 4.7µF + 10µF + 22µF +100µF IN PARALLEL
8028fb
18
For more information www.linear.com/LTM8028
LTM8028
Typical applicaTions
Output Voltage vs Current
1.8V Regulator with 3.5A Current Limit
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
LTM8028
V
1.8V
3.5A
OUT
V
V
OUT
IN
LINEAR
V
IN
REGULATOR
6V TO 36V
402k
10k
SENSEP
RUN
MARGA
10µF
BKV
IMAX
SS
PGOOD
37µF*
0.01µF
133k
100µF
RT
V V V V
OB O0 O1 O2
SYNC
GND
+
470µF
8028 TA04
*37µF = 4.7µF + 10µF + 22µF IN PARALLEL
0
1
2
3
4
OUTPUT CURRENT (A)
8028 TA05
1.8V, 10A with Two LTM8028s Powered from Two Different Sources Each µModule Regulator
Is Limited to Provide a Maximum of 5A
LTM8028
V
1.8V
10A
OUT
V
V
OUT
IN
LINEAR
REGULATOR
V
IN
24V
402k
SENSEP
RUN
MARGA
10µF
20.5k
BKV
IMAX
SS
PGOOD
17µF*
0.01µF
133k
100µF
RT
V
V
V
V
SYNC
GND
OB O0 O1 O2
+
330µF
LTM8028
V
V
OUT
IN
LINEAR
REGULATOR
V
IN
12V
150k
SENSEP
RUN
MARGA
10µF
20.5k
BKV
IMAX
SS
PGOOD
17µF*
0.01µF
133k
100µF
RT
V V V V
OB O0 O1 O2
SYNC
GND
+
330µF
8028 TA06
*17µF = 2.2µF + 4.7µF + 10µF IN PARALLEL
8028fb
19
For more information www.linear.com/LTM8028
LTM8028
Typical applicaTions
Low Noise LTM8028 Powering 16-Bit, 125Msps ADC
LTM8028
V
1.8V
5A
OUT
V
V
OUT
IN
LINEAR
REGULATOR
V
IN
6V TO 36V
402k
SENSEP
RUN
MARGA
IMAX
10µF
V
OV
DD
DD
BKV
+
0.01µF
A
IN
LTC®2185 ADC
SS
RT
PGOOD
137µF*
–
133k
A
IN
100µF
+
–
V V V V
OB O0 O1 O2
SYNC
GND
ENC ENC GND
+
1.8V
0V
470µF
8028 TA08a
*137µF = 4.7µF + 10µF + 22µF + 100µF IN PARALLEL
32k-Point FFT, fIN = 70.3MHz, –1dBFS, 100Msps
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10
20
30
40
50
FREQUENCY (MHz)
8028 TA08b
8028fb
20
For more information www.linear.com/LTM8028
LTM8028
package DescripTion
Table 3. Pin Assignment Table
(Arranged by Pin Number)
PIN
A1
NAME
GND
GND
GND
GND
PIN
B1
NAME
GND
GND
GND
GND
PIN
NAME
GND
GND
GND
GND
GND
GND
GND
GND
GND
PIN
NAME
PIN
E1
NAME
RT
PIN
F1
NAME
RUN
GND
GND
GND
GND
GND
GND
GND
GND
C1
D1
I
MAX
A2
B2
C2
D2
SS
E2
SYNC
GND
GND
GND
GND
GND
GND
GND
F2
A3
B3
C3
D3
GND
GND
GND
GND
GND
GND
GND
E3
F3
A4
B4
C4
D4
E4
F4
A5
V
O2
V
O0
B5
V
OB
V
O1
C5
D5
E5
F5
A6
B6
C6
D6
E6
F6
A7
MARGA
TEST
B7
PGOOD
GND
C7
D7
E7
F7
A8
B8
C8
D8
E8
F8
A9
SENSEP
B9
GND
C9
D9
E9
F9
A10
A11
V
OUT
V
OUT
B10
B11
V
V
C10
C11
V
V
D10
D11
V
OUT
V
OUT
E10
E11
V
V
F10
D11
V
OUT
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PIN
G1
NAME
–
PIN
H1
NAME
PIN
J1
NAME
PIN
K1
NAM
PIN
L1
NAME
V
V
V
IN
V
IN
V
IN
V
IN
V
V
IN
IN
IN
IN
G2
–
H2
J2
K2
L2
G3
–
H3
–
J3
–
K3
–
L3
–
G4
GND
GND
GND
GND
GND
GND
GND
GND
H4
GND
GND
GND
GND
GND
GND
GND
GND
J4
GND
GND
GND
GND
GND
BKV
BKV
BKV
K4
GND
GND
GND
GND
GND
BKV
BKV
BKV
L4
GND
GND
GND
GND
GND
BKV
BKV
BKV
G5
H5
J5
K5
L5
G6
H6
J6
K6
L6
G7
H7
J7
K7
L7
G8
H8
J8
K8
L8
G9
H9
J9
K9
L9
G10
G11
H10
H11
J10
J11
K10
K11
L10
L11
package phoTo
8028fb
21
For more information www.linear.com/LTM8028
LTM8028
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
/ / b b b
Z
6 . 3 5 0
5 . 0 8 0
3 . 8 1 0
2 . 5 4 0
1 . 2 7 0
0 . 0 0 0
1 . 2 7 0
2 . 5 4 0
3 . 8 1 0
5 . 0 8 0
6 . 3 5 0
a a a
Z
8028fb
22
For more information www.linear.com/LTM8028
LTM8028
revision hisTory
REV
DATE
2/14
5/14
DESCRIPTION
PAGE NUMBER
A
Added SnPb BGA package option
1, 2
B
SYNC Input Threshold MIN: from 0.8V to 0.6V; MAX: from 1.2V to 1.3V
Add PGOOD description
3
7
8028fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTM8028
Typical applicaTion
1V at 5A Regulator
LTM8028
LINEAR
V
1V
5A
OUT
V
V
OUT
IN
V
IN
REGULATOR
6V TO 36V
402k
0.01µF
165k
SENSEP
RUN
MARGA
IMAX
10µF
BKV
SS
RT
PGOOD
37µF*
100µF
V V V V
OB O0 O1 O2
SYNC
GND
+
470µF
8028 TA07
*37µF = 4.7µF + 10µF + 22µF IN PARALLEL
relaTeD parTs
PART NUMBER
LTM8032
LTM4613
LTM8027
LTM8048
LTM4615
LTM4620
DESCRIPTION
COMMENTS
Step-Down µModule Regulator, EN55022B Compliant
Step-Down µModule Regulator, EN55022B Compliant
60V, 4A Step-Down µModule Regulator
3.6V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V, 2A
OUT
IN
5V ≤ V ≤ 36V, 3.3V ≤ V
≤ 15V, 8A
OUT
IN
4.5V ≤ V ≤ 60V, 2.5V ≤ V
≤ 24V, 4A
OUT
IN
Isolated µModule Converter
725V Isolation, 3.1V ≤ V ≤ 32V, 1.2V ≤ V
≤ 12V, 300mA
OUT
IN
Triple Output Step-Down µModule Regulator
Dual 13A, Single 26A Step-Down µModule Regulator
2.375V ≤ V ≤ 5.5V, 0.8V ≤ V
≤ 5.5V, 4A, 4A, 1.5A
OUT
IN
4.5V ≤ V ≤ 16V, 0.6V ≤ V
≤ 2.5V, Up to 100A Current Sharing
OUT
IN
8028fb
LT 0614 REV B • PRINTED IN USA
24 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTM8028
LINEAR TECHNOLOGY CORPORATION 2013
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