LTM8047MPY [Linear]
LTM8047 - 3.1VIN to 32VIN Isolated µModule (Power Module) DC/DC Converter; Package: BGA; Pins: 45; Temperature Range: -55°C to 125°C;
| 型号： | LTM8047MPY |
| 厂家： | 
Linear |
| 描述： | LTM8047 - 3.1VIN to 32VIN Isolated µModule (Power Module) DC/DC Converter; Package: BGA; Pins: 45; Temperature Range: -55°C to 125°C 开关 |
| 文件： | 总18页 (文件大小：259K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM8047
3.1V to 32V Isolated
IN
IN
µModule DC/DC Converter
FEATURES
DESCRIPTION
n
Complete Switch Mode Power Supply
The LTM®8047 is an isolated flyback µModule DC/DC
converter.TheLTM8047hasanisolationratingof725VDC.
For a similar product with LDO post regulator, see the
LTM8048. Included in the package are the switching
controller, power switches, transformer, and all support
components.Operatingoveraninputvoltagerangeof3.1V
to 32V, the LTM8047 supports an output voltage range of
2.5V to 12V, set by a single resistor. Only output, input,
and bypass capacitors are needed to finish the design.
Other components may be used to control the soft-start
control and biasing.
n
725VDC Isolation
n
Wide Input Voltage Range: 3.1V to 32V
n
Up to 440mA Output Current (V
2.5V to 12V Output Voltage
Current Mode Control
= 2.5V)
OUT
n
n
n
n
n
n
Programmable Soft-Start
User Configurable Undervoltage Lockout
SnPb or RoHS Compliant Finish
Low Profile (11.25mm × 9mm × 4.92mm) Surface
Mount BGA Package
The LTM8047 is packaged in a thermally enhanced, com-
pact (11.25mm × 9mm × 4.92mm) over-molded ball grid
array (BGA) package suitable for automated assembly by
standardsurfacemountequipment.TheLTM8047isavail-
able with SnPb (BGA) or RoHS compliant terminal finish.
APPLICATIONS
n
Industrial Sensors
n
Industrial Switches
n
Ground Loop Mitigation
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Maximum Load vs VIN
725V DC Isolated Low Noise µModule Regulator
400
LTM8047
V
V
350
300
250
200
150
100
IN
OUT
V
V
IN
OUT
3.1V TO 29V
5V
2.2µF
RUN
BIAS
280mA
(15V
)
IN
4.7µF
22µF
6.98k
ADJ
SS
–
GND
V
OUT
8047 TA01
725VDC ISOLATION
0
5
10
15
(V)
20
25
30
V
IN
8047 TA01b
8047fc
1
For more information www.linear.com/LTM8047
LTM8047
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V , RUN, BIAS ........................................................32V
IN
ADJ, SS.......................................................................5V
A
B
C
–
V
Relative to V
..............................................16V
OUT
OUT
OUT
–
(V – GND) + (V
– V
)...................................36V
IN
OUT
BIAS Above V ........................................................ 0.1V
BANK 2
–
BANK 1
IN
D
E
V
V
–
OUT
OUT
GND to V
Isolation (Note 2) ........................725VDC
OUT
BANK 4
GND
Maximum Internal Temperature (Note 3).............. 125°C
Maximum Solder Temperature..............................250°C
BANK 3
IN
F
V
RUN
3
G
H
ADJ
BIAS SS
1
2
4
5
6
7
BGA PACKAGE
45-LEAD (11.25mm × 9mm × 4.92mm)
= 125°C, θ = 16°C/W, θ = 4.1°C/W, θ = 15°C/W, θ = 4°C/W
T
JMAX
JA
JCbottom
JCtop
JB
WEIGHT = 1.1g, θ VALUES DETERMINED PER JEDEC 51-9, 51-12
ORDER INFORMATION
PART NUMBER
PAD OR BALL FINISH
PART MARKING*
PACKAGE
TYPE
MSL
TEMPERATURE RANGE
(Note 3)
RATING
DEVICE
CODE
e1
LTM8047EY#PBF
LTM8047IY#PBF
LTM8047MPY#PBF
LTM8047MPY
SAC305 (RoHS)
SAC305 (RoHS)
SAC305 (RoHS)
SnPb (63/37)
LTM8047Y
LTM8047Y
LTM8047Y
LTM8047Y
BGA
BGA
BGA
BGA
3
3
3
3
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
–55°C to 125°C
e1
e1
e0
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• BGA Package and Tray Drawings:
www.linear.com/packaging
• Pb-free and Non-Pb-free Part Markings:
www.linear.com/leadfree
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, RUN = 12V (Note 3).
PARAMETER
CONDITIONS
BIAS = V
MIN
TYP
MAX
UNITS
l
l
Minimum Input DC Voltage
3.1
V
IN
V
DC Voltage
R
ADJ
R
ADJ
R
ADJ
= 12.4k
= 6.98k
= 3.16k
2.5
5
12
V
V
V
OUT
4.75
5.25
1
V
V
Quiescent Current
V
= 0V
µA
µA
IN
RUN
Not Switching
850
1.7
Line Regulation
6V ≤ V ≤ 31V, I = 0.15A
OUT
%
OUT
IN
8047fc
2
For more information www.linear.com/LTM8047
LTM8047
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, RUN = 12V (Note 3).
PARAMETER CONDITIONS
0.05A ≤ I
MIN
TYP
1.5
20
MAX
UNITS
%
V
V
Load Regulation
Ripple (RMS)
≤ 0.2A
OUT
OUT
OUT
I
= 0.1A
mV
mA
V
OUT
Input Short Circuit Current
RUN Pin Input Threshold
RUN Pin Current
V
Shorted
30
OUT
RUN Pin Rising
1.18
1.24
1.30
V
V
= 1V
= 1.3V
2.5
0.1
µA
µA
RUN
RUN
SS Threshold
0.7
–10
8
V
µA
mA
V
SS Sourcing Current
BIAS Current
SS = 0V
V
= 12V, BIAS = 5V, I
= 100mA
LOAD1
IN
Minimum BIAS Voltage (Note 4)
I
= 100mA
3.1
LOAD1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8047 isolation is tested at 725VDC for one second in each
polarity.
Note 3: The LTM8047E is guaranteed to meet performance specifications
from 0°C to 125°C. Specifications over the –40°C to 125°C internal
temperature range are assured by design, characterization and correlation
with statistical process controls. LTM8047I is guaranteed to meet
specifications over the full –40°C to 125°C internal operating temperature
range. The LTM8047MP is guaranteed to meet specifications over the
full –55°C to 125°C internal operating temperature range. Note that
the maximum internal temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 4: This is the BIAS pin voltage at which the internal circuitry is
powered through the BIAS pin and not the integrated regulator. See BIAS
Pin Considerations for details.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load
Efficiency vs Load
Efficiency vs Load
90
80
70
60
50
90
80
70
60
50
90
80
70
60
50
V
= 2.5V
V
= 3.3V
V
= 5V
OUT
OUT
OUT
BIAS = 5V
BIAS = 5V
BIAS = 5V
12V
IN
12V
IN
12V
IN
24V
IN
24V
IN
24V
IN
0
100
200
300
400
500
0
100
200
300
400
0
50 100 150 200 250 300 350
V
CURRENT (mA)
V
CURRENT (mA)
V
CURRENT (mA)
OUT
OUT
OUT
8047 G01
8047 G02
8047 G03
8047fc
3
For more information www.linear.com/LTM8047
LTM8047
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load
Efficiency vs Load
BIAS Current vs VOUT Load
100
90
80
70
60
100
90
80
70
60
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
V
= 8V
V
= 12V
V
= 2.5V
OUT
OUT
OUT
12V
IN
BIAS = 5V
BIAS = 5V
BIAS = 5V
12V
12V
IN
IN
24V
IN
24V
IN
24V
IN
0
50 100 150 200 250 300 350
CURRENT (mA)
0
50
100
150
200
250
0
100
200
300
400
500
V
V
CURRENT (mA)
V
OUT
CURRENT (mA)
OUT
OUT
8047 G04
8047 G05
8047 G06
BIAS Current vs VOUT Load
BIAS Current vs VOUT Load
BIAS Current vs VOUT Load
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
10
9
12
11
10
9
V
= 3.3V
V
= 5V
V
= 8V
OUT
OUT
12V
OUT
IN
12V
IN
BIAS = 5V
BIAS = 5V
BIAS = 5V
12V
IN
8
24V
IN
24V
24V
IN
IN
7
8
7
6
6
5
5
4
4
0
100
200
300
400
0
50 100 150 200 250 300 350
0
50 100 150 200 250 300 350
V
CURRENT (mA)
V
CURRENT (mA)
V
CURRENT (mA)
OUT
OUT
OUT
8047 G07
8047 G08
8047 G09
BIAS Current vs VOUT Load
Maximum Load vs VIN
Maximum Load vs VIN
13
12
11
10
9
500
450
400
350
300
250
200
150
100
350
300
250
200
150
100
50
V
= 12V
BIAS = V IF V ≤ 5V
BIAS = V IF V ≤ 5V
IN IN
BIAS = 5V IF V > 5V
IN
OUT
IN
IN
BIAS = 5V
BIAS = 5V IF V > 5V
12V
IN
IN
24V
IN
8
7
6
2.5V
3.3V
OUT
OUT
OUT
8V
5
OUT
5V
12V
OUT
4
0
0
50
100
150
200
250
0
5
10
15
(V)
20
25
30
0
5
10
V
IN
15
(V)
20
25
V
OUT
CURRENT (mA)
V
IN
8047 G10
8047 G11
8047 12
8047fc
4
For more information www.linear.com/LTM8047
LTM8047
TYPICAL PERFORMANCE CHARACTERISTICS
Input Current vs VIN
VOUT Shorted
Minimum Load vs VIN
Minimum Load vs VIN
40
35
30
25
20
15
10
5
15
12
9
80
70
60
50
40
30
20
10
2.5V
3.3V
OUT
8V
OUT1
OUT
OUT
12V
OUT1
5V
6
3
0
0
0
5
10
15
(V)
20
25
30
0
5
10
15
(V)
20
25
30
0
4
8
12 16 20 24 28 32
(V)
V
V
V
IN
IN
IN
8047 G13
8047 G14
8047 G15
Junction Temperature Rise vs
Load Current
Junction Temperature Rise vs
Load Current
Junction Temperature Rise vs
Load Current
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
V
= 2.5V
V
= 3.3V
V
= 5V
OUT
OUT
OUT
3.3V
5V
12V
24V
3.3V
5V
12V
24V
3.3V
IN
5V
12V
24V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
0
50 100 150 200 250 300 350 400
LOAD CURRENT (mA)
0
50 100 150 200 250 300 350 400
LOAD CURRENT (mA)
0
50 100 150 200 250 300 350
V
V
V
LOAD CURRENT (mA)
OUT
OUT
OUT
8047 G16
8047 G17
8047 G18
Junction Temperature Rise vs
Load Current
Junction Temperature Rise vs
Load Current
Output Noise and Ripple
12
10
8
12
10
8
V
= 8V
V
= 12V
OUT
OUT
10mV/DIV
6
6
8047 G21
4
4
2µs/DIV
3.3V
IN
3.3V
IN
IN
12V , 5V
at 250mA
OUT
IN
5V
5V
2
2
IN
0.1μF 250V SAFETY CAPACITOR APPLIED
–
12V
24V
12V
24V
IN
IN
IN
IN
BETWEEN GND AND V
OUT
0
0
0
50
V
100
150
200
250
300
0
50
V
100
LOAD CURRENT (mA)
OUT
150
200
250
LOAD CURRENT (mA)
OUT
8047 G19
8047 G20
8047fc
5
For more information www.linear.com/LTM8047
LTM8047
PIN FUNCTIONS
–
V
(Bank 1): V
and V comprise the isolated
power to the secondary. Above 1.24V, power will be de-
livered to the secondary and 10µA will be fed into the SS
pin. When RUN is less than 1.24V, the pin draws 2.5µA,
allowing for a programmable hysteresis. Do not allow a
negative voltage (relative to GND) on this pin.
OUT
OUT
OUT
output of the LTM8047 flyback stage. Apply an external
–
–
capacitor between V
exceed V
and V
. Do not allow V
to
OUT
OUT
OUT
.
OUT
–
–
–
V
OUT
(Bank 2): V
is the return for V . V
and
OUT
OUT
OUT OUT
V
comprise the isolated output of the LTM8047. In
ADJ (Pin G7): Apply a resistor from this pin to GND to set
the output voltage, using the recommended value given
most applications, the bulk of the heat flow out of the
LTM8047 is through the GND and V
–
pads, so the
in Table 1. If Table 1 does not list the desired V
value,
OUT
OUT
printed circuit design has a large impact on the thermal
performance of the part. See the PCB Layout and Thermal
the equation
Considerationssectionsformoredetails.Applyanexternal
–0.879
RADJ = 28.4 V
kΩ
(
)
–
OUT
capacitor between V
and V
.
OUT
OUT
GND (Bank 4): This is the primary side local ground of the
may be used to approximate the value. To the seasoned
designer, this exponential equation may seem unusual.
The equation is exponential due to non-linear current
sources that are used to temperature compensate the
output regulation.
LTM8047primary.Inmostapplications,thebulkoftheheat
–
flow out of the LTM8047 is through the GND and V
OUT
pads, so the printed circuit design has a large impact on
the thermal performance of the part. See the PCB Layout
and Thermal Considerations sections for more details.
BIAS (Pin H5): This pin supplies the power necessary to
operate the LTM8047. It must be locally bypassed with a
low ESR capacitor of at least 4.7μF. Do not allow this pin
V (Bank 3): V supplies current to the LTM8047’s inter-
IN
IN
nal regulator and to the integrated power switch. These
pins must be locally bypassed with an external, low ESR
capacitor.
voltage to rise above V .
IN
SS(PinH6):Placeasoft-startcapacitorheretolimitinrush
current and the output voltage ramp rate. Do not allow a
negative voltage (relative to GND) on this pin.
RUN (Pin F3): A resistive divider connected to V and this
IN
pin programs the minimum voltage at which the LTM8047
will operate. Below 1.24V, the LTM8047 does not deliver
8047fc
6
For more information www.linear.com/LTM8047
LTM8047
BLOCK DIAGRAM
V
V
OUT1
IN
•
0.1µF
•
1µF
RUN
BIAS*
SS
–
V
OUT
CURRENT
MODE
CONTROLLER
ADJ1
GND
8047 BD
*DO NOT ALLOW BIAS VOLTAGE TO BE ABOVE V
IN
8047fc
7
For more information www.linear.com/LTM8047
LTM8047
OPERATION
The LTM8047 is a stand-alone isolated flyback switching
DC/DCpowersupplythatcandeliverupto440mAofoutput
current. This module provides a regulated output voltage
programmable via one external resistor from 2.5V to 12V.
The input voltage range of the LTM8047 is 3.1V to 32V.
Given that the LTM8047 is a flyback converter, the output
current depends upon the input and output voltages, so
make sure that the input voltage is high enough to support
the desired output voltage and load current. The Typical
Performance Characteristics section gives several graphs
between the primary to secondary for 1 second and then
applying –725VDC for 1 second. For details please refer
to the Isolation and Working Voltage section.
An internal regulator provides power to the control cir-
cuitry. The bias regulator normally draws power from the
V
pin, but if the BIAS pin is connected to an external
IN
voltage higher than 3.1V, bias power will be drawn from
the external source, improving efficiency. V
must not
BIAS
exceed V . The RUN pin is used to turn on or off the
IN
LTM8047,disconnectingtheoutputandreducingtheinput
ofthemaximumloadversusV forseveraloutputvoltages.
IN
current to 1μA or less.
Asimplifiedblockdiagramisgiven.TheLTM8047contains
acurrentmodecontroller,powerswitchingelement,power
transformer, power Schottky diode, a modest amount of
input and output capacitance.
The LTM8047 is a variable frequency device. For a fixed
input and output voltage, the frequency increases as the
load increases. For light loads, the current through the
internal transformer may be discontinuous.
The LTM8047 has a galvanic primary to secondary isola-
tion rating of 725VDC. This is verified by applying 725VDC
8047fc
8
For more information www.linear.com/LTM8047
LTM8047
APPLICATIONS INFORMATION
For most applications, the design process is straight-
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended C , C
and R
.
IN OUT
ADJ
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal
capacitanceresultinginmuchhigheroutputvoltageripple
than expected.
3. Connect BIAS as indicated, or tie to an external source
up to 15V or V , whichever is less.
IN
Whilethesecomponentcombinationshavebeentestedfor
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmentalconditions. Bearinmindthatthemaximum
output current may be limited by junction temperature,
the relationship between the input and output voltage
magnitude and polarity and other factors. Please refer
to the graphs in the Typical Performance Characteristics
section for guidance.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8047. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit. If
the LTM8047 circuit is plugged into a live supply, the input
voltage can ring to much higher than its nominal value,
possibly exceeding the device’s rating. This situation is
easily avoided; see the Hot-Plugging Safely section.
Capacitor Selection Considerations
The C and C
capacitor values in Table 1 are the
IN
OUT
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
LTM8047 Table 1. Recommended Component Values and Configuration for Specific VOUT Voltages (TA = 25°C)
V
V
V
C
C
R
ADJ
IN
OUT
BIAS
IN
OUT
3.1V to 32V
3.1V to 32V
3.1V to 29V
3.1V to 26V
3.1V to 24V
9V to 15V
2.5V
3.3V
5V
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 25V, 0805
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 25V, 0805
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
100µF, 6.3V, 1210
100µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 16V, 1210
100µF, 6.3V, 1210
47µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 16V, 1210
100µF, 6.3V, 1210
47µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 16V, 1210
12.4k
10k
6.98k
8V
4.53k
12V
2.5V
3.3V
5V
3.16k/12pF*
12.4k
V
V
V
V
V
IN
IN
IN
IN
IN
9V to 15V
10k
9V to 15V
6.98k
9V to 15V
8V
4.53k
9V to 15V
12V
2.5V
3.3V
5V
3.16k
18V to 32V
18V to 32V
18V to 29V
18V to 26V
18V to 24V
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
12.4k
10k
6.98k
8V
4.53k
12V
3.16k/12pF*
Note: Do not allow BIAS to exceed V , a bulk input capacitor is required.
IN
*Connect 3.16k in parallel with 12pF from ADJ to GND.
8047fc
9
For more information www.linear.com/LTM8047
LTM8047
APPLICATIONS INFORMATION
BIAS Pin Considerations
The isolation rating of the LTM8047 is not the same as
the working or operational voltage that the application
will experience. This is subject to the application’s power
source, operating conditions, the industry where the end
product is used and other factors that dictate design re-
quirementssuchasthegapbetweencopperplanes,traces
and component pins on the printed circuit board, as well
as the type of connector that may be used. To maximize
the allowable working voltage, the LTM8047 has a row of
solder balls removed to facilitate the printed circuit board
design.Theballtoballpitchis1.27mm,andthetypicalball
diameter is 0.78mm. Accounting for the missing row and
theballdiameter,theprintedcircuitboardmaybedesigned
forametal-to-metalseparationofupto1.76mm.Thismay
have to be reduced somewhat to allow for tolerances in
solder mask or other printed circuit board design rules.
The BIAS pin is the output of an internal linear regulator
that powers the LTM8047’s internal circuitry. It is set to
3V and must be decoupled with a low ESR capacitor of at
least 4.7μF. The LTM8047 will run properly without apply-
ing a voltage to this pin, but will operate more efficiently
and dissipate less power if a voltage greater than 3.1V is
applied. At low V , the LTM8047 will be able to deliver
IN
more output current if BIAS is 3.1V or greater. Up to 40V
may be applied to this pin, but a high BIAS voltage will
causeexcessivepowerdissipationintheinternalcircuitry.
For applications with an input voltage less than 15V, the
BIAS pin is typically connected directly to the V pin. For
IN
input voltages greater than 15V, it is preferred to leave the
BIAS pin separate from the V pin, either powered from
IN
a separate voltage source or left running from the internal
regulator. This has the added advantage of keeping the
physical size of the BIAS capacitor small. Do not allow
To reiterate, the manufacturer’s isolation voltage rating
and the required operational voltage are often different
numbers. InthecaseoftheLTM8047, theisolationvoltage
rating is established by 100% hi-pot testing. The working
or operational voltage is a function of the end product
and its system level specifications. The actual required
operationalvoltageisoftensmallerthanthemanufacturer’s
isolation rating.
BIAS to rise above V .
IN
Soft-Start
For many applications, it is necessary to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltageovershootbyapplyingacapacitorfromSStoGND.
For those situations where information about the spacing
of LTM8047 internal circuitry is required, the minimum
metal to metal separation of the primary and secondary
is 0.44mm.
When the LTM8047 is enabled, whether from V reaching
IN
a sufficiently high voltage or RUN being pulled high, the
LTM8047 will source approximately 10µA out of the SS
pin. As this current gradually charges the capacitor from
SS to GND, the LTM8047 will correspondingly increase
the power delivered to the output, allowing for a graceful
turn-on ramp.
ADJ and Line Regulation
For V
greater than 8V, a capacitor connected from ADJ
OUT
to GND improves line regulation. Figure 1 shows the ef-
fect of three capacitance values applied to ADJ for a load
of 15mA. No capacitance has poor line regulation, while
12pF has improved line regulation. As the capacitance
increases, the line regulation begins to degrade again, but
in the opposite direction as having too little capacitance.
Furthermore,toomuchcapacitancefromADJtoGNDmay
increasetheminimumloadrequiredforproperregulation.
Isolation and Working Voltage
The LTM8047 isolation is 100% hi-pot tested by tying
all of the primary pins together, all of the secondary pins
together and subjecting the two resultant circuits to a dif-
ferential of 725VDC for one second and then –725VDC for
one second. This establishes the isolation voltage rating
of the LTM8047 component, and is most often used to
satisfycomponentsafetyspecificationsissuedbyagencies
such as UL, TUV, CSA and others.
8047fc
10
For more information www.linear.com/LTM8047
LTM8047
APPLICATIONS INFORMATION
LTM8047 Line Regulation
ADJ
12VOUT, 15mA Output Current
V
C
OUT
OUT
12.50
LTM8047
NO CAP
12pF
18pF
12.25
SS
12.00
BIAS
11.75
11.50
11.25
11.00
10.75
GND
–
V
OUT
RUN
0
5
10
V
15
(V)
20
25
IN
8047 F01
Figure 1. For higher output voltages, the LTM8047 requires some
capacitance from ADJ to GND for proper line regulation
C
IN
V
IN
THERMAL/INTERCONNECT VIAS
8047 F02
–
V
to V
Reverse Voltage
OUT
OUT
Figure 2. Layout Showing Suggested External Components,
Planes and Thermal Vias
The LTM8047 cannot tolerate a reverse voltage from V
OUT
–
–
to V
during operation. If V
raises above V dur-
OUT
OUT
OUT
A few rules to keep in mind are:
ing operation, the LTM8047 may be damaged. To protect
against this condition, a low forward drop power Schottky
1. Place the R
resistor as close as possible to its re-
ADJ
spective pin.
diode has been integrated into the LTM8047, anti-parallel
–
to V /V
. This can protect the output against many
OUT OUT
2. Place the C capacitor as close as possible to the V
IN
IN
reverse voltage faults. Reverse voltage faults can be both
steady state and transient. An example of a steady state
voltage reversal is accidentally misconnecting a powered
LTM8047 to a negative voltage source. An example of
transient voltage reversals is a momentary connection to
and GND connections of the LTM8047.
3. Place the C
capacitor as close as possible to V
OUT
OUT
–
and V
.
OUT
4. Place the C and C
capacitors such that their
OUT
ground current flow directly adjacent or underneath
IN
a negative voltage. It is also possible to achieve a V
OUT
reversal if the load is short-circuited through a long cable.
the LTM8047.
The inductance of the long cable forms an LC tank circuit
with the V
capacitance, which drives V
negative.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8047.
OUT
OUT
Avoid these conditions.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8047. The LTM8047 is neverthe-
less a switching power supply, and care must be taken to
minimizeelectricalnoisetoensureproperoperation. Even
with the high level of integration, you may fail to achieve
specified operation with a haphazard or poor layout. See
Figure 2 for a suggested layout. Ensure that the grounding
and heat sinking are acceptable.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 2. The LTM8047 can benefit from
theheatsinkingaffordedbyviasthatconnecttointernal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
8047fc
11
For more information www.linear.com/LTM8047
LTM8047
APPLICATIONS INFORMATION
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristicssectioncanbeusedasaguide.Thesecurves
2
were generated by the LTM8047 mounted to a 58cm
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
The printed circuit board construction has an impact on
theisolationperformanceoftheendproduct.Forexample,
increased trace and layer spacing, as well as the choice
of core and prepreg materials (such as using polyimide
versusFR4)cansignificantlyaffecttheisolationwithstand
of the end product.
Forincreasedaccuracyandfidelitytotheactualapplication,
many designers use FEA to predict thermal performance.
To that end, the Pin Configuration section of the data sheet
typically gives four thermal coefficients:
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of the LTM8047. However, these capaci-
tors can cause problems if the LTM8047 is plugged into a
live supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the volt-
ꢀ θ : Thermal resistance from junction to ambient
JA
ꢀ θ
: Thermal resistance from junction to the bot-
JCbottom
tom of the product case
ꢀ θ : Thermal resistance from junction to top of the
JCtop
product case
ꢀ θ : Thermal resistance from junction to the printed
JB
age at the V pin of the LTM8047 can ring to more than
IN
circuit board.
twice the nominal input voltage, possibly exceeding the
LTM8047’s rating and damaging the part. If the input
supply is poorly controlled or the user will be plugging
the LTM8047 into an energized supply, the input network
should be designed to prevent this overshoot. This can
be accomplished by installing a small resistor in series
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased as follows:
θ
is the natural convection junction-to-ambient air
JA
to V , but the most popular method of controlling input
IN
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to
as still air although natural convection causes the air to
move. This value is determined with the part mounted to a
JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
voltage overshoot is adding an electrolytic bulk capacitor
to V . This capacitor’s relatively high equivalent series
IN
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripplefilteringandcanslightlyimprovetheefficiencyofthe
circuit, though it can be a large component in the circuit.
θ
is the junction-to-board thermal resistance with
JCbottom
allofthecomponentpowerdissipationflowingthroughthe
bottom of the package. In the typical µModule converter,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient envi-
Thermal Considerations
The LTM8047 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
8047fc
12
For more information www.linear.com/LTM8047
LTM8047
APPLICATIONS INFORMATION
ronment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
θ
isdeterminedwithnearlyallofthecomponentpower
JCtop
dissipation flowing through the top of the package. As the
electricalconnectionsofthetypicalµModuleconverterare
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc-
A graphical representation of these thermal resistances
is given in Figure 3.
tion to the top of the part. As in the case of θ
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
, this
JCbottom
The blue resistances are contained within the µModule
converter, and the green are outside.
θ
is the junction-to-board thermal resistance where
JB
almost all of the heat flows through the bottom of the
µModule converter and into the board, and is really the
The die temperature of the LTM8047 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8047. The bulk of the heat flow out of the LTM8047
is through the bottom of the module and the BGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, result-
ing in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
sum of the θ
and the thermal resistance of the
JCbottom
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two-sided,
two-layer board. This board is described in JESD 51-9.
Giventhesedefinitions,itshouldnowbeapparentthatnone
of these thermal coefficients reflects an actual physical
operating condition of a µModule converter. Thus, none
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
AMBIENT
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
CASE (BOTTOM)-TO-BOARD
BOARD-TO-AMBIENT
RESISTANCE
RESISTANCE
8047 F03
µMODULE DEVICE
Figure 3.
8047fc
13
For more information www.linear.com/LTM8047
LTM8047
TYPICAL APPLICATIONS
Maximum Load vs VIN
3.3V Isolated Flyback Converter
350
340
330
320
310
300
290
280
270
260
250
LTM8047
V
V
IN
OUT
V
V
IN
OUT
9V TO 15V
3.3V
280mA
(10V
RUN
2.2µF
)
IN
BIAS
47µF
4.7µF
10k
ADJ
SS
–
GND
V
OUT
8047 TA02
725VDC ISOLATION
9
10
11
12
(V)
13
14
15
V
IN
8047 TA02b
Use Two LTM8047 Flyback Converters to Generate 5V
LTM8047
5V
V
IN
V
V
280mA
IN
OUT
3.5V TO 31V
(15V
)
IN
2.2µF
RUN
BIAS
Maximum Load Current vs VIN
22µF
4.7µF
6.98k
400
350
300
250
200
150
100
ADJ
SS
1µF
–
GND
V
OUT
725VDC ISOLATION
22µF
LTM8047
V
V
IN
OUT
2.2µF
RUN
5
10
15
V
20
(V)
25
30
BIAS
22µF
IN
4.7µF
8047 TA03b
6.98k
ADJ
SS
1µF
–5V
280mA
(15V
–
GND
V
OUT
)
IN
8047 TA03
725VDC ISOLATION
8047fc
14
For more information www.linear.com/LTM8047
LTM8047
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
E1 GND
E2 GND
E3 GND
E4 GND
E5 GND
E6 GND
E7 GND
PIN NAME
PIN NAME
PIN NAME
–
–
–
A1
A2
A3
A4
A5
A6
A7
V
V
V
V
V
V
V
B1
B2
B3
B4
B5
B6
B7
V
V
V
V
V
V
V
C1
C2
C3
C4
C5
C6
C7
V
V
V
V
V
V
V
D1
-
-
-
-
-
-
-
F1
F2
-
-
G1
G2
G3
V
V
-
H1
H2
H3
V
V
-
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
–
–
–
–
–
–
–
–
–
–
–
–
D2
D3
D4
D5
D6
D7
F3 RUN
F4 GND
F5 GND
F6 GND
F7 GND
G4 GND
G5 GND
G6 GND
G7 ADJ
H4 GND
H5 BIAS
H6 SS
H7 GND
PACKAGE PHOTO
8047fc
15
For more information www.linear.com/LTM8047
LTM8047
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
/ / b b b
Z
3 . 8 1 0
2 . 5 4 0
1 . 2 7 0
0 . 3 1 7 5
0 . 0 0 0
0 . 3 1 7 5
1 . 2 7 0
2 . 5 4 0
3 . 8 1 0
8047fc
16
For more information www.linear.com/LTM8047
LTM8047
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
1/14
Correct ADJ resistor on Typical Application schematic.
Add Min/Max limits to Output Voltage parameter.
1
2
Correct the 5V
Correct the 5V
R
value in Table 1.
9
OUT ADJ
R
value in schematic.
14
1, 2
OUT ADJ
B
C
1/14
7/15
Added SnPb terminal finish product option.
Added a new section: ADJ and Line Regulation.
10, 11
8047fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTM8047
TYPICAL APPLICATION
12V Isolated Flyback Converter
Maximum Load vs VIN
250
240
230
220
210
200
190
180
170
160
150
LTM8047
V
V
IN
OUT
V
V
OUT
IN
12V
15VDC TO 24VDC
2.2µF
180mA
(15V
RUN
)
IN
BIAS
10µF
4.7µF
3.16k
ADJ
SS
–
GND
V
OUT
8047 TA04
725VDC ISOLATION
15
18
21
24
V
(V)
IN
8047 TA04b
RELATED PARTS
PART NUMBER
LTM8031
LTM8032
LTM8033
LTM4612
LTM8061
LTM8048
DESCRIPTION
COMMENTS
EN55022 Class B Compliant, 3.6V ≤ V ≤ 36V; 0.8V ≤ V
Ultralow Noise EMC 1A µModule Regulator
Ultralow Noise EMC 2A µModule Regulator
Ultralow Noise EMC 3A µModule Regulator
Ultralow Noise EMC 5A µModule Regulator
Li-Ion/Polymer µModule Battery Charger
≤ 10V
≤ 10V
≤ 24V
IN
OUT
OUT
OUT
EN55022 Class B Compliant, 3.6V ≤ V ≤ 36V; 0.8V ≤ V
IN
EN55022 Class B Compliant, 3.6V ≤ V ≤ 36V; 0.8V ≤ V
IN
EN55022 Class B Compliant, 5V ≤ V ≤ 36V; 3.3V ≤ V
≤ 15V
OUT
IN
4.95V ≤ V ≤ 32V, 2A, 1-Cell and 2-Cell, 4.1V or 4.2V per Cell
IN
Isolated DC/DC µModule Regulator with LDO Low Noise LDO Post Regulator, Similar to the LTM8047
Post Regulator
8047fc
LT 0715 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
18
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTM8047
●
●
ꢀLINEAR TECHNOLOGY CORPORATION 2011
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