LTM8065 [Linear]
40VIN, 2A Silent Switcher μModule Regulator;
| 型号： | LTM8065 |
| 厂家： | 
Linear |
| 描述： | 40VIN, 2A Silent Switcher μModule Regulator |
| 文件： | 总24页 (文件大小：1064K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM8063
40V , 2A Silent Switcher
IN
µModule Regulator
FEATURES
n
DESCRIPTION
Low Noise Silent Switcher® Architecture
The LTM®8063 is a 40V , 2A continuous, 2.5A peak, step-
IN
Wide Input Voltage Range: 3.2V to 40V
down µModule® (power module) regulator. Included in
the package are the switching controller, power switches,
inductor, and all support components. Operating over an
input voltage range of 3.2V to 40V, the LTM8063 supports
an output voltage range of 0.8V to 15V and a switching
frequency range of 200kHz to 2.2MHz, each set by a single
resistor. Only the input and output filter capacitors are
needed to finish the design.
n
n
Wide Output Voltage Range: 0.8V to 15V
n
2A Continuous Output Current at 12V , 5V
,
IN
OUT
T = 85°C
A
n
n
n
n
n
2.5A Peak Current
Selectable Switching Frequency: 200kHz to 2.2MHz
External Synchronization
Configurable as an Inverter
6.25mm × 4mm × 2.22mm BGA Package
Thelowprofilepackageenablesutilizationofunusedspace
on the bottom of PC boards for high density point of load
regulation. The LTM8063 is packaged in a thermally en-
hanced,compactover-moldedballgridarray(BGA)package
suitableforautomatedassemblybystandardsurfacemount
equipment. The LTM8063 is RoHS compliant.
APPLICATIONS
n
Automotive Battery Regulation
n
Power for Portable Products
n
Distributed Supply Regulation
All registered trademarks and trademarks are the property of their respective owners.
n
Industrial Supplies
n
Wall Transformer Regulation
TYPICAL APPLICATION
Efficiency vs Load Current
ꢀꢁ
5VOUT from 6.5VIN to 40VIN Step-Down Converter
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8063 ꢍꢑ0ꢀa
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0
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8063 ꢀꢁ0ꢂꢃ
8063fa
1
For more information www.linear.com/LTM8063
LTM8063
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2)
V , RUN, PG Voltage .............................................. 42V
OUT
ꢊꢈꢑ ꢇꢌꢎꢞ
ꢀꢁꢂ
IN
V
Voltage ........................................................... 19V
ꢍꢃ ꢊꢜꢝꢚꢚ ꢀꢁꢂ
FB, TR/SS Voltage ..................................................... 4V
SYNC Voltage ............................................................ 6V
Maximum Internal Temperature .......................... 125°C
Storage Temperature ............................ –55°C to 125°C
Peak Reflow Solder Body Temperature ............... 260°C
ꢄ
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= 125°C, θ = 36.5°C/W, θ = 10.4°C/W
T
JMAX
JA
JCbottom
θ
= 37.1°C/W, θ = 10.8°C/W, WEIGHT = 0.14g
JCtop
JB
θ VALUES DETERMINED PER JEDEC51-9, 51-12
ORDER INFORMATION http://www.linear.com/product/LTM8063#orderinfo
PART MARKING*
PACKAGE
TYPE
MSL
RATING
PART NUMBER
LTM8063EY#PBF
LTM8063IY#PBF
TERMINAL FINISH
DEVICE
FINISH CODE
TEMPERATURE RANGE
SAC305 (RoHS)
8063
v
BGA
3
–40°C to 125°C
• Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended BGA PCB Assembly and Manufacturing Procedures:
www.linear.com/umodule/pcbassembly
• BGA Package and Tray Drawings: www.linear.com/packaging
• Terminal Finish Part Marking: www.linear.com/leadfree
8063fa
2
For more information www.linear.com/LTM8063
LTM8063
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, RUN = 2V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
Minimum Input Voltage
Output DC Voltage
V
Rising
Open
3.2
V
IN
R
R
0.8
15
V
V
FB
FB
= 13.7kΩ, V = 40V
IN
Peak Output DC Current
Quiescent Current into V
V
= 3.3V, f = 1MHz
2.5
A
OUT
SW
RUN = 0V
No Load, SYNC = 0V, Not Switching
3
8
µA
µA
IN
Line Regulation
5.5V < V < 36V, I
= 1A
0.5
0.5
15
%
%
IN
OUT
Load Regulation
0.1A < I
< 2A
OUT
Output Voltage Ripple
Switching Frequency
I
= 2A
mV
OUT
R = 232kΩ, V = 8V
200
1
2.2
kHz
MHz
MHz
T
T
IN
R = 41.2kΩ
R = 15.8kΩ
T
l
Voltage at FB
760
0.9
774
786
1.2
1
mV
V
RUN Threshold Voltage
RUN Current
µA
µA
Ω
TR/SS Current
TR/SS = 0V
2
TR/SS Pull Down
TR/SS = 0.1V
300
0.84
0.7
PG Threshold Voltage at FB (Upper)
PG Threshold Voltage at FB (Lower)
PG Leakage Current
FB Falling (Note 5)
FB Rising (Note 5)
PG = 42V
V
V
1
µA
µA
V
PG Sink Current
PG = 0.1V
150
SYNC Threshold Voltage
SYNC Voltage
Synchronization
0.4
2.9
1.5
4.2
5
To Enable Spread Spectrum
SYNC = 2V
V
SYNC Current
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The LTM8063 contains overtemperature protection that is
intended to protect the device during momentary overload conditions. The
internal temperature exceeds the maximum operating junction temperature
when the overtemperature protection is active. Continuous operation
above the specified maximum operating junction temperature may impair
device reliability.
Note 2: Unless otherwise noted, the absolute minimum voltage is zero.
Note 3: The LTM8063E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the full –40°C to
125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTM8063I is guaranteed to meet specifications over the full –40°C to
125°C internal operating temperature range. Note that the maximum
internal temperature is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistance and
other environmental factors.
Note 5: PG transitions from low to high.
8063fa
3
For more information www.linear.com/LTM8063
LTM8063
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency, VOUT = 1V
Efficiency, VOUT = 1.2V
Efficiency, VOUT = 1.5V
8ꢀ
80
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60
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60
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8063 ꢀ03
8063 ꢀ0ꢁ
8063 ꢀ0ꢁ
Efficiency, VOUT = 1.8V
Efficiency, VOUT = 2V
Efficiency, VOUT = 2.5V
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80
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60
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0
0ꢀꢁ
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8063 ꢀ0ꢁ
8063 ꢀ06
8063 ꢀ0ꢁ
Efficiency, VOUT = 3.3V
Efficiency, VOUT = 5V
Efficiency, VOUT = 8V
ꢀ0
80
ꢀ0
60
ꢀ0
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36ꢀ
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0
0ꢀꢁ
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0
0ꢀꢁ
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ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀ0ꢁ
8063 ꢀ08
8063 ꢀ0ꢁ
8063fa
4
For more information www.linear.com/LTM8063
LTM8063
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency, VOUT = 12V
Efficiency, VOUT = 15V
Efficiency, VOUT = –3.3V
ꢀꢁ
8ꢀ
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6ꢀ
ꢀꢀ
ꢀꢁ
8ꢀ
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6ꢀ
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80
ꢀ0
60
ꢀ0
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36ꢀ
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0
0ꢀꢁ
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0
0ꢀꢁ
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0
0ꢀꢁ
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ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀꢁ0
8063 ꢀꢁꢁ
8063 ꢀꢁꢂ
Efficiency, VOUT = –5V
Efficiency, VOUT = –8V
Efficiency, VOUT = –12V
80
ꢀ0
60
ꢀ0
80
ꢀ0
60
ꢀ0
80
ꢀ0
60
ꢀ0
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂ
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ꢀꢁ
ꢀꢁ
0
0ꢀꢁ
ꢀ
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0
0ꢀꢁꢂ
0ꢀꢁ0
0ꢀꢁꢂ
ꢀ
0
0ꢀꢁ
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ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀꢁ3
8063 ꢀꢁꢂ
8063 ꢀꢁꢂ
Input vs Load Current,
VOUT = 1.2V
Efficiency, VOUT = –15V
Input vs Load Current, VOUT = 1V
80
ꢀ0
60
ꢀ0
0ꢀꢁ
0ꢀ3
0ꢀꢁ
0ꢀꢁ
0
0ꢀꢁ
0ꢀ3
0ꢀꢁ
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0
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36ꢀ
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0
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0ꢀꢁ0
0ꢀꢁꢂ
0
0ꢀꢁ
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0
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ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀꢁ6
8063 ꢀꢁꢂ
8063 ꢀꢁ8
8063fa
5
For more information www.linear.com/LTM8063
LTM8063
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Input vs Load Current
VOUT = 1.5V
Input vs Load Current
VOUT = 1.8V
Input vs Load Current
VOUT = 2V
0ꢀ6
0ꢀꢁ
0ꢀꢁ
0
0ꢀ6
0ꢀꢁ
0ꢀꢁ
0
0ꢀ6
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ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀꢁꢂ
8063 ꢀꢁ0
8063 ꢀꢁꢂ
Input vs Load Current
Input vs Load Current
VOUT = 5V
Input vs Load Current
VOUT = 8V
V
OUT = 3.3V
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
ꢀꢁ00
0ꢀꢁꢂ
0ꢀꢁ0
0ꢀꢁꢂ
0
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0ꢀ8
0ꢀꢁ
0
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36ꢀ
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0
0ꢀꢁ
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0
0ꢀꢁ
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ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀꢁꢂ
8063 ꢀꢁꢁ
8063 ꢀꢁ3
Input vs Load Current
VOUT = 12V
Input vs Load Current
VOUT = 15V
Input vs Load Current
VOUT = –3.3V
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
ꢀꢁ00
0ꢀꢁꢂ
0ꢀꢁ0
0ꢀꢁꢂ
0
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36ꢀ
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ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀꢁꢂ
8063 ꢀꢁ6
8063 ꢀꢁꢂ
8063fa
6
For more information www.linear.com/LTM8063
LTM8063
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Input vs Load Current
OUT = –5V
Input vs Load Current
VOUT = –8V
Input vs Load Current
VOUT = –12V
V
ꢀꢁꢂ0
0ꢀ80
0ꢀꢁ0
0
ꢀꢁꢂ0
ꢀꢁ00
0ꢀꢁ0
0
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ
0
0ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ
0
0ꢀꢁ
ꢀ
ꢀꢁꢂ
0
0ꢀꢁꢂ
0ꢀꢁ0
0ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀꢁ8
8063 ꢀꢁꢂ
8063 ꢀ30
Input vs Load Current
OUT = –15V
V
Maximum Load Current vs VIN
Maximum Load Current vs VIN
ꢀꢁꢂ0
0ꢀ80
0ꢀꢁ0
0
3
ꢀ
ꢀ
0
ꢀꢁ00
0ꢀꢁꢂ
0ꢀꢁ0
0ꢀꢁꢂ
0
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ
ꢀ3ꢁ3ꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ8ꢁ
ꢀꢁꢂ
0
0ꢀꢁꢂ
0ꢀꢁ0
0ꢀꢁꢂ
0
ꢀ0
ꢀ0
30
ꢀ0
0
ꢀ0
ꢀ0
30
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
8063 ꢀ3ꢁ
8063 ꢀ3ꢁ
8063 ꢀ33
Input Current vs VIN
VOUT Short Circuited
Derating, VOUT = 1V,
DC2494A Demo Board
Derating, VOUT = 1.2V,
DC2494A Demo Board
ꢀ00
600
300
0
3
ꢀ
ꢀ
0
3
ꢀ
ꢀ
0
0ꢀꢁꢂ
0ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
36ꢀ
ꢀꢁ
36ꢀ
ꢀꢁ
ꢀꢁ
0
ꢀ0
ꢀ0
ꢀꢁꢂ
30
ꢀ0
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁ
8063 ꢀ3ꢁ
8063 ꢀ36
8063 ꢀ3ꢁ
8063fa
7
For more information www.linear.com/LTM8063
LTM8063
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Derating, VOUT = 1.8V,
DC2494A Demo Board
Derating, VOUT = 1.5V,
DC2494A Demo Board
Derating, VOUT = 2V,
DC2494A Demo Board
3
ꢀ
ꢀ
0
3
ꢀ
ꢀ
0
3
0ꢀꢁꢂ
0ꢀꢁꢂ
0ꢀꢁꢂ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
36ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
36ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
36ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
0
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
8063 ꢀ3ꢁ
8063 ꢀ38
8063 ꢀ3ꢁ
Derating, VOUT = 3.3V,
DC2494A Demo Board
Derating, VOUT = 3.3V,
DC2494A Demo Board
Derating, VOUT = 2.5V,
DC2494A Demo Board
3
ꢀ
ꢀ
0
3
ꢀ
ꢀ
0
3
0 ꢀꢁꢂ
ꢅ ꢆꢂꢇꢈ
0 ꢀꢁꢂ
0 ꢀꢁꢂ
f
ꢃꢄ
ꢀ
ꢀ
0
36
36
36
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
8063 ꢀꢁꢂ
8063 ꢀꢁ0
8063 ꢀꢁꢂ
Derating, VOUT = 5V,
DC2494A Demo Board
Derating, VOUT = 5V,
Derating, VOUT = 8V,
DC2494A Demo Board
DC2494A Demo Board
3
ꢀ
ꢀ
0
3
ꢀ
ꢀ
0
3
ꢀ
ꢀ
0
0 ꢀꢁꢂ
ꢅ ꢆꢂꢇꢈ
0 ꢀꢁꢂ
0 ꢀꢁꢂ
f
ꢃꢄ
36
36
36
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
8063 ꢀꢁ3
8063 ꢀꢁꢁ
8063 ꢀꢁꢂ
8063fa
8
For more information www.linear.com/LTM8063
LTM8063
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Derating, VOUT = 12V,
DC2494A Demo Board
Derating, VOUT = 15V,
DC2494A Demo Board
Derating, VOUT = –3.3V,
DC2494A Demo Board
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
0 ꢀꢁꢂ
0 ꢀꢁꢂ
0 ꢀꢁꢂ
36
36
36
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
8063 ꢀꢁꢂ
8063 ꢀꢁ8
8063 ꢀꢁ6
Derating, VOUT = –5V,
DC2494A Demo Board
Derating, VOUT = –8V,
DC2494A Demo Board
Derating, VOUT = –12V,
DC2494A Demo Board
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
0ꢀꢁ
0ꢀꢁ
0ꢀ3
0ꢀꢁ
0ꢀꢁ
0
0 ꢀꢁꢂ
0 ꢀꢁꢂ
0 ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
0
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
8063 ꢀꢁꢂ
8063 ꢀꢁ0
8063 ꢀꢁꢂ
CISPR22 Class B Emissions
Dropout Voltage vs Load Current
VOUT = 5V
Derating, VOUT = –15V,
DC2494A Demo Board
DC2494A Demo Board, VOUT = 5V,
C9 = 0.1µF, No EMI Filter, 1A Load
0ꢀꢁ
ꢀꢀ
ꢀꢁ
3ꢀ
ꢀꢁ
ꢀꢁ
ꢀ
800
600
ꢀ00
ꢀ00
0
0 ꢀꢁꢂ
0ꢀꢁ
0ꢀ3
0ꢀꢁ
0ꢀꢁ
0
ꢀꢁꢂꢃꢄꢁꢅꢆꢇꢈ
ꢀꢁꢂꢃꢄꢅꢆꢇ
ꢀꢁ
0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ00
ꢀꢁꢂ
0
ꢀ00
ꢀ00
600
800
ꢀ000
0
0ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅꢆ ꢆꢄꢁꢇꢄꢈꢀꢆꢉꢈꢄ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇ ꢈꢉꢊꢋꢌ
ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ
8063 ꢀꢁꢂ
8063 ꢀꢁ3
8063 ꢀꢁꢂ
8063fa
9
For more information www.linear.com/LTM8063
LTM8063
PIN FUNCTIONS
GND(Bank1,A1,A4):TietheseGNDpinstoalocalground
plane below the LTM8063 and the circuit components.
In most applications, the bulk of the heat flow out of the
LTM8063 is through these pads, so the printed circuit
design has a large impact on the thermal performance of
the part. See the PCB Layout and Thermal Considerations
sections for more details.
2. Pulse-skipping mode. Float this pin for pulse-skipping
mode. This mode offers full frequency operation down
to low output loads before pulse skipping occurs.
3. Spread spectrum mode. Tie this pin high (between
2.9V and 4.2V) for pulse-skipping mode with spread
spectrum modulation.
4. Synchronizationmode.Drivethispinwithaclocksource
tosynchronizetoanexternalfrequency.Duringsynchro-
nization the part will operate in pulse-skipping mode.
V (Bank 2): V supplies current to the LTM8063’s in-
IN
IN
ternal regulator and to the internal power switches. These
pins must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
PG (Pin B1): The PG pin is the open-collector output of
an internal comparator. PG remains low until the FB pin
voltage is within about 10% of the final regulation volt-
V
(Bank 3): Power Output Pins. Apply the output filter
OUT
capacitor and the output load between these pins and
age. The PG signal is valid when V is above 3.2V. If V
IN
IN
GND pins.
is above 3.2V and RUN is low, PG will drive low. If this
RUN (Pin B3): Pull the RUN pin below 0.9V to shut down
function is not used, leave this pin floating.
the LTM8063. Tie to 1.2V or more for normal operation. If
FB (Pin A2): The LTM8063 regulates its FB pin to 0.77V.
the shutdown feature is not used, tie this pin to the V pin.
IN
Connect the adjust resistor from this pin to ground.
RT (Pin C1): The RT pin is used to program the switching
frequency of the LTM8063 by connecting a resistor from
thispintoground.TheApplicationsInformationsectionof
the data sheet includes a table to determine the resistance
value based on the desired switching frequency. Minimize
capacitance at this pin. Do not drive this pin.
The value of R is given by the equation R = 192.73/
FB FB
– 0.774), where R is in kΩ.
FB
(V
OUT
TR/SS (Pin A3): The TR/SS pin is used to provide a soft-
start or tracking function. The internal 2μA pull-up current
in combination with an external capacitor tied to this pin
creates a voltage ramp. If TR/SS is less than about 0.77V,
theFBvoltagetrackstothisvalue.Thesoft-startramptime
is approximated by the equation t = 0.39 • C where C is
in μF. For tracking, tie a resistor divider to this pin from the
trackedoutput.Thispinispulledtogroundwithaninternal
MOSFETduringshutdownandfaultconditions;useaseries
resistor if driving from a low impedance output. This pin
may be left floating if the tracking function is not needed.
SYNC (Pin B2): External clock synchronization input
and operational mode. This pin programs four different
operating modes:
1. Burst Mode® Operation. Tie this pin to ground for Burst
Mode operation at low output loads—this will result in
ultralow quiescent current.
8063fa
10
For more information www.linear.com/LTM8063
LTM8063
BLOCK DIAGRAM
LTM8063 Block Diagram
ꢀ
ꢄꢅ
ꢖꢓꢙꢕꢚ
ꢏꢂꢋꢋꢐꢅꢃ
ꢑꢁꢊꢐ
ꢏꢁꢅꢃꢋꢁꢒꢒꢐꢋ
ꢀ
ꢁꢂꢃ
0ꢓꢔꢕꢆ
ꢔꢛꢜꢝ
ꢖ0ꢗꢆ
3ꢓ3ꢘꢆ
ꢉꢅꢊ
ꢆꢇ
ꢋꢂꢅ
ꢃꢋꢌꢍꢍ
ꢍꢎꢅꢏ
ꢋꢃ
ꢈꢉ
8063 ꢇꢊ
8063fa
11
For more information www.linear.com/LTM8063
LTM8063
OPERATION
The LTM8063 is a stand-alone non-isolated step-down
switching DC/DC power supply that can deliver up to
2.5A. Thecontinuouscurrentisdeterminedbytheinternal
operating temperature. It provides a precisely regulated
output voltage programmable via one external resistor
from 0.8V to 15V. The input voltage range is 3.2V to 40V.
Given that the LTM8063 is a step-down converter, make
sure that the input voltage is high enough to support the
desiredoutputvoltageandloadcurrent.AsimplifiedBlock
Diagram is given above.
TheoscillatorreducestheLTM8063’soperatingfrequency
when the voltage at the FB pin is low. This frequency fold-
back helps to control the output current during start-up
and overload.
The TR/SS node acts as an auxiliary input to the error
amplifier. The voltage at FB servos to the TR/SS voltage
until TR/SS goes above 0.77V. Soft-start is implemented
by generating a voltage ramp at the TR/SS pin using an
externalcapacitorwhichischargedbyaninternalconstant
current. Alternatively, driving the TR/SS pin with a signal
source or resistive network provides a tracking function.
Do not drive the TR/SS pin with a low impedance volt-
age source. See the Applications Information section for
more details.
The LTM8063 contains a current mode controller, power
switchingelements, powerinductorandamodestamount
of input and output capacitance. The LTM8063 is a fixed
frequency PWM regulator. The switching frequency is set
by simply connecting the appropriate resistor value from
the RT pin to GND.
The LTM8063 contains a power good comparator which
trips when the FB pin is at about 90% to 110% of its
regulated value. The PG output is an open-drain transistor
that is off when the output is in regulation, allowing an
external resistor to pull the PG pin high. The PG signal
The RUN pin is used to place the LTM8063 in shutdown,
disconnecting the output and reducing the input current
to a few µA.
is valid when V is above 3.2V. If V is above 3.2V and
IN
IN
Toenhanceefficiency,theLTM8063automaticallyswitches
to Burst Mode operation in light or no load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down reducing the input supply
current to just a few µA.
RUN is low, PG will drive low.
The LTM8063 is equipped with a thermal shutdown that
inhibits power switching at high junction temperatures.
Theactivationthresholdofthisfunctionisabovethemaxi-
mum temperature rating to avoid interfering with normal
operation, so prolonged or repetitive operation under a
condition in which the thermal shutdown activates may
damage or impair the reliability of the device.
8063fa
12
For more information www.linear.com/LTM8063
LTM8063
APPLICATIONS INFORMATION
For most applications, the design process is straight-
forward, summarized as follows:
ture, therelationshipbetweentheinputandoutputvoltage
magnitude and polarity and other factors. Please refer to
the graphs in the Typical Performance Characteristics
section for guidance.
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
The maximum frequency (and attendant R value) at
T
2. Applytherecommended,C , C , R andR values.
IN OUT FB
T
which the LTM8063 should be allowed to switch is given
3. Apply the C (from V
to F ) as required.
in Table 1 in the Maximum f column, while the recom-
FF
OUT
B
SW
mended frequency (and R value) for optimal efficiency
T
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions. Bear in mind that the
maximum output current is limited by junction tempera-
over the given input condition is given in the f column.
SW
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Table 1. Recommended Component Values and Configuration (TA = 25°C)
R
R
MIN R
(kΩ)
FB
T
T
2
V
V
(kΩ)
Open
845
453
267
187
154
113
75
C
C
C
f
(kΩ)
73.2
60.4
52.3
52.3
47.5
41.2
33.2
33.2
27.4
20.5
20.5
18.2
33.2
27.4
20.5
20.5
18.2
MAX f
SW
IN
OUT
IN
OUT
FF
SW
3.2 to 40
3.2 to 40
3.2 to 40
3.2 to 40
3.2 to 40
3.3 to 40V
3.8 to 40V
0.77V
1.0V
1.2V
1.5V
1.8V
2.0V
2.5V
3.3V
5V
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
1µF 50V 0805 X5R
100µF 4V 0805 X5R
100µF 4V 0805 X5R
100µF 4V 0805 X5R
100µF 4V 0805 X5R
100µF 4V 0805 X5R
100µF 4V 0805 X5R
47µF 4V 0805 X5R
47µF 4V 0805 X5R
22µF 6.3V 0805 X5R
10µF 10V 0805 X5R
10µF 16V 0805 X7S
10µF 25V 1206 X7R
47µF 4V 0805 X5R
22µF 6.3V 0805 X5R
10µF 10V 0805 X5R
10µF 16V 0805 X7S
10µF 25V 1206 X7R
27pF
10pF
600kHz
700kHz
800kHz
800kHz
900kHz
1MHz
600kHz
725kHz
850kHz
1MHz
73.2
59
48.7
41.2
33.2
29.4
23.7
18.2
15.8
15.8
15.8
15.8
18.2
15.8
15.8
15.8
15.8
1.2MHz
1.3MHz
1.6MHz
2MHz
1
1
1.2MHz
1.2MHz
1.4MHz
1.8MHz
1.8MHz
2MHz
1
5 to 40V
1
6.5 to 40V
45.3
26.7
17.4
13.7
75
2.2MHz
2.2MHz
2.2MHz
2.2MHz
2MHz
1
1
10.5 to 40V
18.5 to 40V
8V
12V
1
22 to 40V
15V
1
3.2 to 36V
–3.3V
–5V
1.2MHz
1.4MHz
1.8MHz
1.8MHz
2MHz
1
3.2 to 35V
45.3
26.7
17.4
13.7
2.2MHz
2.2MHz
2.2MHz
2.2MHz
1
3.2 to 32V
–8V
1
3.2 to 28V
–12V
–15V
1
3.2 to 25V
1. The LTM8063 may be capable of lower input voltages but may skip switching cycles.
2. An input bulk capacitor is required
8063fa
13
For more information www.linear.com/LTM8063
LTM8063
APPLICATIONS INFORMATION
Capacitor Selection Considerations
Frequency Selection
The C and C
capacitor values in Table 1 are the The LTM8063 uses a constant frequency PWM archi-
IN
OUT
minimum recommended values for the associated oper- tecture that can be programmed to switch from 200kHz
ating conditions. Applying capacitor values below those to 2.2MHz by using a resistor tied from the RT pin to
indicated in Table 1 is not recommended and may result ground. Table 2 provides a list of R resistor values and
T
in undesirable operation. Using larger values is generally their resultant frequencies.
acceptable, and can yield improved dynamic response, if
Table 2. SW Frequency vs RT Value
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
f
(MHz)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
R (kΩ)
SW
T
232
150
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal
capacitanceresultinginmuchhigheroutputvoltageripple
than expected.
110
88.7
73.2
60.4
52.3
41.2
33.2
27.4
23.7
20.5
18.2
15.8
Ceramic capacitors are also piezoelectric. In Burst Mode
operation, the LTM8063’s switching frequency depends
on the load current, and can excite a ceramic capacitor
at audio frequencies, generating audible noise. Since the
LTM8063 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to a
casual ear.
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal R
T
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8063isflexibleenoughtoaccommodateawiderange
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8063 if the output is overloaded or short-circuited.
A frequency that is too low can result in a final design
that has too much output ripple or too large of an output
capacitor.
If this audible noise is unacceptable, use a high perfor-
mance electrolytic capacitor at the output. It may also be
a parallel combination of a ceramic capacitor and a low
cost electrolytic capacitor.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8063. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit.
If the LTM8063 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
Maximum Load
The maximum practical continuous load that the LTM8063
can drive, while rated at 2A, actually depends upon both
the internal current limit and the internal temperature.
8063fa
14
For more information www.linear.com/LTM8063
LTM8063
APPLICATIONS INFORMATION
The internal current limit is designed to prevent damage
to the LTM8063 in the case of overload or short-circuit.
The internal temperature of the LTM8063 depends upon
operating conditions such as the ambient temperature,
the power delivered, and the heat sinking capability of
the system. For example, if the LTM8063 is configured
to regulate at 1.2V, it may continuously deliver 2.5A from
Output Voltage Tracking and Soft-Start
The LTM8063 allows the user to adjust its output voltage
rampratebymeansoftheTR/SSpin. Aninternal2μApulls
uptheTR/SSpintoabout2.4V. Puttinganexternalcapaci-
tor on TR/SS enables soft starting the output to reduce
current surges on the input supply. During the soft-start
ramp the output voltage will proportionally track the TR/
SS pin voltage. For output tracking applications, TR/SS
can be externally driven by another voltage source. From
0V to 0.77V, the TR/SS voltage will override the internal
0.77V reference input to the error amplifier, thus regulat-
ing the FB pin voltage to that of the TR/SS pin. When TR/
SS is above 0.77V, tracking is disabled and the feedback
voltage will regulate to the internal reference voltage. The
TR/SSpinmaybeleftfloatingifthefunctionisnotneeded.
12V if the ambient temperature is controlled to less than
IN
55°C. This is higher than the 2A continuous rating. Please
see the “Derating, V
= 1.2V” curve in the Typical Per-
OUT
formance Characteristics section. Similarly, if the output
voltage is 15V and the ambient temperature is 100°C, the
LTM8063 will deliver less than 100mA from 36V , which
IN
is less than the 2A continuous rating.
Load Sharing
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
capacitor are the RUN pin transitioning low, V voltage
falling too low, or thermal shutdown.
The LTM8063 is not designed to load share.
Burst Mode Operation
To enhance efficiency at light loads, the LTM8063 auto-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst
Modeoperation,theLTM8063deliverssinglecyclebursts
ofcurrenttotheoutputcapacitorfollowedbysleepperiods
where most of the internal circuitry is powered off and
energy is delivered to the load by the output capacitor.
IN
Pre-Biased Output
As discussed in the Output Voltage Tracking and Soft-
Start section, the LTM8063 regulates the output to the
FB voltage determined by the TR/SS pin whenever TR/
SS is less than 0.77V. If the LTM8063 output is higher
than the target output voltage, the LTM8063 will attempt
to regulate the output to the target voltage by returning a
small amount of energy back to the input supply. If there
is nothing loading the input supply, its voltage may rise.
Take care that it does not rise so high that the input voltage
exceeds the absolute maximum rating of the LTM8063.
During the sleep time, V quiescent current is greatly
IN
reduced, so, as the load current decreases towards a no
load condition, the percentage of time that the LTM8063
operates in sleep mode increases and the average input
current is greatly reduced, resulting in higher light load
efficiency.
Burst Mode operation is enabled by tying SYNC to GND.
Frequency Foldback
Minimum Input Voltage
The LTM8063 is equipped with frequency foldback which
actstoreducethethermalandenergystressontheinternal
power elements during a short circuit or output overload
condition. If the LTM8063 detects that the output has
fallenoutofregulation,theswitchingfrequencyisreduced
as a function of how far the output is below the target
voltage. This in turn limits the amount of energy that can
The LTM8063 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. Keep the input above 3.2V to ensure proper
operation. Voltage transients or ripple valleys that cause
the input to fall below 3.2V may turn off the LTM8063.
8063fa
15
For more information www.linear.com/LTM8063
LTM8063
APPLICATIONS INFORMATION
be delivered to the load under fault. During the start-up
time, frequency foldback is also active to limit the energy
delivered to the potentially large output capacitance of
the load. When a clock is applied to the SYNC pin, the
SYNC pin is floated or held high, the frequency foldback
is disabled, and the switching frequency will slow down
only during overcurrent conditions.
the LTM8063 is programmed to 2MHz, the frequency will
vary from 2MHz to 2.4MHz at a 3kHz rate. When spread
spectrum operation is selected, Burst Mode operation is
disabled, and the part will run in pulse-skipping mode.
TheLTM8063doesnotoperateinforcedcontinuousmode
regardless of SYNC signal.
Negative Output
Synchronization
The LTM8063 is capable of generating a negative output
To select low ripple Burst Mode operation, tie the SYNC
pin below about 0.4V (this can be ground or a logic low
output). To synchronize the LTM8063 oscillator to an
external frequency, connect a square wave (with about
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.4V
and peaks above 1.5V.
voltage by connecting its V
to system GND and the
OUT
LTM8063 GND to the negative voltage rail. An example
of this is shown in the Typical Applications section. The
most versatile way to generate a negative output is to
use a dedicated regulator that was designed to generate
a negative voltage, but using a buck regulator like the
LTM8063 to generate a negative voltage is a simple and
cost effective solution, as long as certain restrictions are
kept in mind.
The LTM8063 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
insteadwillpulseskiptomaintainregulation.TheLTM8063
may be synchronized over a 200kHz to 2.2MHz range.
Figure1showsatypicalnegativeoutputvoltageapplication.
Note that LTM8063 V
is tied to system GND and input
OUT
The R resistor should be chosen to set the switching
T
power is applied from V to LTM8063 V . As a result,
IN
OUT
frequency equal to or below the lowest synchronization
input. For example, if the synchronization signal will be
the LTM8063 is not behaving as a true buck regulator,
and the maximum output current depends upon the input
voltage. In the example shown in the Typical Applications
section, there is an attending graph that shows how much
current the LTM8063 can deliver for given input voltages.
500kHz and higher, the R should be selected for 500kHz.
T
For some applications it is desirable for the LTM8063 to
operate in pulse-skipping mode, offering two major dif-
ferences from Burst Mode operation. The first is that the
clock stays awake at all times and all switching cycles
are aligned to the clock. The second is that full switching
frequency is reached at lower output load than in Burst
Modeoperation.Thesetwodifferencescomeattheexpense
of increased quiescent current. To enable pulse-skipping
mode, the SYNC pin is floated.
ꢆ
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ꢊꢄꢋ8063
ꢂꢀꢎ
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ꢇꢈꢄꢉꢈꢄ ꢆꢇꢊꢄꢃꢂꢁ
8063 ꢌ0ꢍ
The LTM8063 features spread spectrum operation to
further reduce EMI/EMC emissions. To enable spread
spectrum operation, apply between 2.9V and 4.2V to the
SYNC pin. In this mode, triangular frequency modulation
is used to vary the switching frequency between the value
Figure 1. The LTM8063 Can Be Used to Generate a Negative Voltage
Note that this configuration requires that any load current
transient will directly impress the transient voltage onto
the LTM8063 GND, as shown in Figure 2, so fast load
transients can disrupt the LTM8063’s operation or even
cause damage.
programmed by R to about 20% higher than that value.
T
Themodulationfrequencyisabout3kHz.Forexample,when
8063fa
16
For more information www.linear.com/LTM8063
LTM8063
APPLICATIONS INFORMATION
circuitry pulls its quiescent current through its internal
power switch. This is fine if your system can tolerate a
few milliamps in this state. If you ground the RUN pin, the
internal current drops to essentially zero. However, if the
ꢎ
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ꢉꢈ
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ꢅꢋꢃ
ꢄꢃꢍ8063
ꢐꢈꢆ
V pin is grounded while the output is held high, parasitic
IN
ꢀꢁꢂꢃ ꢄꢅꢁꢆ
ꢃꢇꢁꢈꢂꢉꢊꢈꢃ
diodes inside the LTM8063 can pull large currents from
8063 ꢀ0ꢏ
ꢅꢋꢃꢌꢋꢃ ꢃꢇꢁꢈꢂꢉꢊꢈꢃ
ꢇꢊꢂꢌꢅꢈꢂꢊ
the output through the V pin. Figure 4 shows a circuit
IN
that runs only when the input voltage is present and that
Figure 2. Any Output Voltage Transient Appears on LTM8063 GND
protects against a shorted or reversed input.
The C and C
capacitors in Figure 3 form an AC divider
IN
OUT
ꢃ
ꢄꢅ
ꢃ
ꢄꢅ
at the negative output voltage node. If V is hot-plugged
IN
or rises quickly, the resultant V
will be a positive tran-
OUT
ꢀꢁꢂ8063
sient, which may be unhealthy for the application load.
An anti-parallel Schottky diode may be able to prevent
this positive transient from damaging the load. The loca-
tion of this Schottky diode is important. For example, in
a system where the LTM8063 is far away from the load,
placing the Schottky diode closest to the most sensitive
load component may be the best design choice. Carefully
evaluate whether the negative buck configuration is suit-
able for the application.
ꢈꢉꢅ
8063 ꢆ0ꢇ
Figure 4. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also
Protects the Circuit from a Reversed Input. The LTM8063
Runs Only When the Input Is Present
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8063. The LTM8063 is neverthe-
less a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 5
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
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ꢅꢆ
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ꢁ ꢋꢉꢂꢅꢃꢅꢄꢈ ꢃꢇꢁꢆꢂꢅꢈꢆꢃ
ꢄ
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ꢎꢃꢏ8063
ꢐꢆꢑ
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ꢅꢆ
ꢍ
ꢉꢊꢃ
ꢁꢍ ꢑꢅꢄꢅꢑꢈꢇ
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ꢂꢍꢒꢉꢃꢃꢓꢔ
ꢑꢅꢉꢑꢈ
A few rules to keep in mind are:
8063 ꢀ03
Figure 3. A Schottky Diode Can Limit the Transient Caused by
a Fast Rising VIN to Safe Levels
1. Place C , R and R as close as possible to their
FF
FB
T
respective pins.
2. Place the C capacitor as close as possible to the V
Shorted Input Protection
IN
IN
and GND connection of the LTM8063.
Care needs to be taken in systems where the output is held
high when the input to the LTM8063 is absent. This may
occurinbatterychargingapplicationsorinbatterybackup
systems where a battery or some other supply is diode
3. Place the C
capacitor as close as possible to the
OUT
V
and GND connection of the LTM8063.
OUT
4. PlacetheC andC capacitorssuchthattheirground
IN
OUT
ORed with the LTM8063’s output. If the V pin is allowed
IN
currents flow directly adjacent to or underneath the
LTM8063.
tofloatandtheRUNpinisheldhigh(eitherbyalogicsignal
or because it is tied to V ), then the LTM8063’s internal
IN
8063fa
17
For more information www.linear.com/LTM8063
LTM8063
APPLICATIONS INFORMATION
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8063.
complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the volt-
age at the V pin of the LTM8063 can ring to more than
IN
twice the nominal input voltage, possibly exceeding the
LTM8063’sratinganddamagingthepart.Iftheinputsupply
ispoorlycontrolledortheLTM8063ishot-pluggedintoan
energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
6. Use vias to connect the GND copper area to the board’s
internalgroundplanes. LiberallydistributetheseGNDvias
to provide both a good ground connection and thermal
path to the internal planes of the printed circuit board. Pay
attention to the location and density of the thermal vias in
Figure 5. The LTM8063 can benefit from the heat-sinking
afforded by vias that connect to internal GND planes at
these locations, due to their proximity to internal power
handling components. The optimum number of thermal
vias depends upon the printed circuit board design.
For example, a board might use very small via holes. It
should employ more thermal vias than a board that uses
larger holes.
installing a small resistor in series to V , but the most
IN
popular method of controlling input voltage overshoot is
add an electrolytic bulk cap to the V net. This capacitor’s
IN
relativelyhighequivalentseriesresistancedampsthecircuit
and eliminates the voltage overshoot. The extra capacitor
improves low frequency ripple filtering and can slightly
improve the efficiency of the circuit, though it is likely to
be the largest component in the circuit.
Thermal Considerations
The LTM8063 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
derating curves given in the Typical Performance Char-
acteristics section can be used as a guide. These curves
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ꢌꢉ
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ꢄꢌꢉ
ꢃꢍꢎꢇꢇ ꢍꢂꢉ
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2
were generated by the LTM8063 mounted to a 58cm
ꢊꢉꢋ
ꢄ
ꢁꢂꢃ
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
ꢔꢊ ꢍꢃ
ꢊꢉꢋ
ꢀ
ꢁꢂꢃ
For increased accuracy and fidelity to the actual applica-
tion, many designers use FEA (Finite Element Analysis)
to predict thermal performance. To that end, Page 2 of
the data sheet typically gives four thermal coefficients:
ꢊꢉꢋꢎꢃꢏꢐꢍꢑꢒꢓ ꢄꢌꢒꢇ
8063 ꢅ0ꢕ
Figure 5. Layout Showing Suggested External
Components, GND Plane and Thermal Vias
θ
JA
– Thermal resistance from junction to ambient
θ
– Thermal resistance from junction to the
JCbottom
Hot-Plugging Safely
bottom of the product case
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8063. However, these capacitors
can cause problems if the LTM8063 is plugged into a live
supply (see Linear Technology Application Note 88 for a
θ
– Thermal resistance from junction to top of the
JCtop
product case
θ
JB
– Thermal resistance from junction to the printed
circuit board.
8063fa
18
For more information www.linear.com/LTM8063
LTM8063
APPLICATIONS INFORMATION
While the meaning of each of these coefficients may
seem to be intuitive, JEDEC has defined each to avoid
confusion and inconsistency. These definitions are given
in JESD 51-12, and are quoted or paraphrased below:
µModule regulator and into the board, and is really the
sum of the θ
and the thermal resistance of the
JCbottom
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
θ
is the natural convection junction-to-ambient air
JA
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
Giventhesedefinitions,itshouldnowbeapparentthatnone
of these thermal coefficients reflects an actual physical
operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
θ
is the junction-to-board thermal resistance with
JCbottom
allofthecomponentpowerdissipationflowingthroughthe
bottom of the package. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient envi-
ronment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
A simplified graphical representation of these thermal
resistances is given in Figure 6. The blue resistances are
contained within the µModule regulator, and the green
are outside.
θ
JCtop
isdeterminedwithnearlyallofthecomponentpower
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule regulator are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc-
The die temperature of the LTM8063 must be lower than
the maximum rating, so care should be taken in the layout
of the circuit to ensure good heat sinking of the LTM8063.
The bulk of the heat flow out of the LTM8063 is through
the bottom of the package and the pads into the printed
circuit board. Consequently a poor printed circuit board
design can cause excessive heating, resulting in impaired
performance or reliability. Please refer to the PCB Layout
section for printed circuit board design suggestions.
tion to the top of the part. As in the case of θ
, this
JCbottom
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
θ
is the junction-to-board thermal resistance where
JB
almost all of the heat flows through the bottom of the
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ꢑꢕꢃꢍꢍꢃꢂꢓ ꢔꢇꢐꢉꢐꢍꢏꢌꢊꢇ
ꢊꢏꢐꢇ ꢑꢕꢃꢍꢍꢃꢂꢓꢎꢍꢃꢎꢕꢃꢏꢔꢄ
ꢔꢇꢐꢉꢐꢍꢏꢌꢊꢇ
ꢕꢃꢏꢔꢄꢎꢍꢃꢎꢏꢂꢕꢉꢇꢌꢍ
ꢔꢇꢐꢉꢐꢍꢏꢌꢊꢇ
8063 ꢀ06
ꢁꢂꢃꢄꢅꢆꢇ ꢄꢇꢈꢉꢊꢇ
Figure 6. Simplified Graphical Representation of the Thermal Resistance Between the Device Junction and Ambient
8063fa
19
For more information www.linear.com/LTM8063
LTM8063
TYPICAL APPLICATIONS
1.2VOUT from 3.2VIN to 40VIN Step-Down Converter
ꢏ
ꢖꢗ
ꢏ
ꢖꢗ
ꢌꢍꢎ8063
3ꢉꢈꢏ ꢍꢐ ꢆ0ꢏ
ꢅꢑꢗ
ꢅꢍ
ꢀꢁꢂ
ꢃꢄꢅ
080ꢄ
ꢏ
ꢐꢑꢍ
ꢏ
ꢐꢑꢍ
ꢀꢉꢈꢏ
ꢈꢉ3ꢒ
ꢈꢉꢄꢒ ꢓꢔꢒꢕ
ꢀ00ꢁꢂ
ꢃꢄꢅ
080ꢄ
ꢆꢄ3ꢇ
ꢄꢈꢉ3ꢇ
800ꢇꢊꢋ
ꢙꢗꢚ ꢛꢜꢗꢝ
ꢂꢘ
8063 ꢍꢒ0ꢈ
ꢓꢖꢗꢛ ꢗꢐꢍ ꢑꢛꢔꢚ ꢖꢗ ꢍꢊꢖꢛ ꢝꢖꢅꢝꢑꢖꢍꢞ ꢍꢅꢟꢛꢛꢠ ꢓꢙ
3.3VOUT from 5VIN to 40VIN Step-Down Converter
ꢐ
ꢗꢘ
ꢐ
ꢗꢘ
ꢙ
ꢎꢏꢋ8063
ꢄꢐ ꢏꢑ ꢆ0ꢐ
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ꢅꢏ
ꢀꢁꢂ
ꢃꢄꢅ
080ꢄ
ꢐ
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3ꢉ3ꢐ
ꢊꢉꢀꢓ
ꢊꢉꢄꢓ ꢔꢕꢓꢖ
ꢆꢇꢁꢂ
ꢃꢄꢅ
080ꢄ
ꢇꢄꢈ
33ꢉꢊꢈ
ꢀꢉꢊꢋꢌꢍ
ꢛꢘꢜ ꢝꢞꢘꢟ
ꢂꢚ
8063 ꢏꢓ03
ꢔꢗꢘꢝ ꢘꢑꢏ ꢒꢝꢕꢜ ꢗꢘ ꢏꢌꢗꢝ ꢟꢗꢅꢟꢒꢗꢏꢠ ꢏꢅꢡꢝꢝꢢ ꢔꢛ
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ꢗꢘ
–5VOUT from 3.2VIN to 35VIN Positive to Negative Converter
Maximum Load Current vs VIN
ꢚ
ꢑꢒ
ꢚ
ꢔꢐꢋ8063
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
0ꢀꢁ
ꢑꢒ
3ꢈꢆꢚ
ꢙ
ꢇꢈꢊꢁꢂ
ꢎꢏꢐꢑꢎꢒꢓꢔ
ꢕꢖꢔꢗ ꢘꢓꢏ
ꢅꢖꢒ
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ꢀꢁꢂ
ꢃꢄꢅ
080ꢄ
ꢚ
ꢎꢖꢐ
ꢆꢆꢁꢂ
ꢃꢄꢅ
ꢅꢐ
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ꢆꢊꢈꢇꢉ
ꢀꢈꢇꢋꢌꢍ
080ꢄ
ꢜꢒꢝ ꢞꢟꢒꢘ
ꢇꢄꢈ3ꢉ
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ꢛꢄꢚ
8063 ꢐꢓ0ꢇa
ꢏꢑꢒꢞ ꢒꢎꢐ ꢖꢞꢠꢝ ꢑꢒ ꢐꢌꢑꢞ ꢘꢑꢅꢘꢖꢑꢐꢡ ꢐꢅꢢꢞꢞꢣ ꢏꢜ
0
ꢀ0
ꢀ0
30
ꢀ0
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
8063 ꢀꢁ0ꢂꢃ
8063fa
20
For more information www.linear.com/LTM8063
LTM8063
PACKAGE PHOTO
PACKAGE DESCRIPTION
Table 3. LTM8063 Pinout (Sorted by Pin Number)
PIN
A1
A2
A3
A4
PIN NAME
GND
PIN
B1
B2
B3
B4
PIN NAME
PG
PIN
C1
C2
C3
C4
PIN NAME
RT
PIN
D1
D2
D3
D4
PIN NAME
GND
PIN
E1
E2
E3
E4
PIN NAME
GND
PIN
F1
F2
F3
F4
PIN NAME
PIN
G1
G2
G3
G4
PIN NAME
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
FB
SYNC
RUN
GND
GND
GND
TR/SS
GND
GND
GND
GND
V
IN
V
IN
GND
GND
8063fa
21
For more information www.linear.com/LTM8063
LTM8063
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM8063#packaging for the most recent package drawings.
BGA Package
28-Lead (6.25mm × 4mm × 2.22mm)
ꢧꢎꢪfꢪꢬꢪꢭꢮꢪ ꢍꢂꢏ ꢈꢝꢋ ꢚ 0ꢓꢔ08ꢔꢆꢓꢆꢯ ꢎꢪꢰ ꢌꢨ
ꢌꢆ
ꢮꢮꢮ
ꢟ
ꢌ
ꢈꢃꢂꢌꢉꢍ ꢌ
ꢄꢃꢃ ꢀꢁꢂꢃꢄ
6
ꢌꢖ
ꢒ
3
ꢖ
ꢆ
ꢖ×
aaa ꢟ
ꢐꢉꢀ ꢆ
ꢌ
ꢗ
ꢏ
ꢈ
ꢃ
ꢙ
ꢦꢆ
ꢐꢉꢀ ꢢꢌꢆꢣ
ꢏꢁꢎꢀꢃꢎ
ꢊꢁꢍꢈ
ꢏꢌꢐ
ꢦ
ꢒ
ꢄꢜꢗꢄꢂꢎꢌꢂꢃ
ꢞꢆ
ꢞꢖ
ꢈ
ꢙ
ꢈꢃꢂꢌꢉꢍ ꢗ
ꢪ
ꢥꢦ ꢧꢖ8 ꢐꢍꢌꢏꢃꢄꢨ
ꢋ
ꢩꢩꢩ ꢊ
ꢪꢪꢪ
ꢟ
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ꢤ ꢑ
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ꢤ
ꢄꢃꢃ ꢀꢁꢂꢃꢄ
3
ꢦ
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ꢋ
ꢈꢃꢂꢌꢉꢍ ꢗ
ꢐꢌꢏꢠꢌꢋꢃ ꢄꢉꢈꢃ ꢡꢉꢃꢝ
ꢐꢌꢏꢠꢌꢋꢃ ꢂꢁꢐ ꢡꢉꢃꢝ
ꢐꢌꢏꢠꢌꢋꢃ ꢗꢁꢂꢂꢁꢊ ꢡꢉꢃꢝ
ꢀꢁꢂꢃꢄꢅ
ꢆꢇ ꢈꢉꢊꢃꢀꢄꢉꢁꢀꢉꢀꢋ ꢌꢀꢈ ꢂꢁꢍꢃꢎꢌꢀꢏꢉꢀꢋ ꢐꢃꢎ ꢌꢄꢊꢃ ꢑꢆꢒꢇꢓꢊꢔꢆꢕꢕꢒ
ꢈꢃꢂꢌꢉꢍ ꢌ
ꢖꢇ ꢌꢍꢍ ꢈꢉꢊꢃꢀꢄꢉꢁꢀꢄ ꢌꢎꢃ ꢉꢀ ꢊꢉꢍꢍꢉꢊꢃꢂꢃꢎꢄ
3
ꢒ
ꢗꢌꢍꢍ ꢈꢃꢄꢉꢋꢀꢌꢂꢉꢁꢀ ꢐꢃꢎ ꢘꢃꢐꢕꢓ
DIMENSIONS
ꢈꢃꢂꢌꢉꢍꢄ ꢁꢙ ꢐꢉꢀ ꢚꢆ ꢉꢈꢃꢀꢂꢉꢙꢉꢃꢎ ꢌꢎꢃ ꢁꢐꢂꢉꢁꢀꢌꢍꢛ
ꢗꢜꢂ ꢊꢜꢄꢂ ꢗꢃ ꢍꢁꢏꢌꢂꢃꢈ ꢝꢉꢂꢞꢉꢀ ꢂꢞꢃ ꢟꢁꢀꢃ ꢉꢀꢈꢉꢏꢌꢂꢃꢈꢇ
ꢂꢞꢃ ꢐꢉꢀ ꢚꢆ ꢉꢈꢃꢀꢂꢉꢙꢉꢃꢎ ꢊꢌꢑ ꢗꢃ ꢃꢉꢂꢞꢃꢎ ꢌ ꢊꢁꢍꢈ ꢁꢎ
ꢊꢌꢎꢠꢃꢈ ꢙꢃꢌꢂꢜꢎꢃ
SYMBOL
MIN
ꢖꢇ0ꢖ
0ꢇ30
ꢆꢇꢯꢖ
0ꢇꢒꢓ
0ꢇ3ꢯ
NOM
ꢖꢇꢖꢖ
0ꢇꢒ0
ꢆꢇ8ꢖ
0ꢇꢓ0
0ꢇꢒ0
6ꢇꢖꢓ
ꢒꢇ00
0ꢇ80
ꢒꢇ80
ꢖꢇꢒ0
0ꢇ3ꢖ
ꢆꢇꢓ0
MAX
NOTES
ꢌ
ꢌꢆ
ꢌꢖ
ꢦ
ꢦꢆ
ꢈ
ꢃ
ꢪ
ꢙ
ꢋ
ꢞꢆ
ꢞꢖ
aaa
ꢦꢦꢦ
ꢮꢮꢮ
ꢩꢩꢩ
ꢪꢪꢪ
ꢖꢇꢒꢖ
0ꢇꢓ0
ꢆꢇꢕꢖ
0ꢇꢓꢓ
0ꢇꢒ3
ꢗꢌꢍꢍ ꢞꢂ
ꢓꢇ ꢐꢎꢉꢊꢌꢎꢑ ꢈꢌꢂꢜꢊ ꢔꢟꢔ ꢉꢄ ꢄꢃꢌꢂꢉꢀꢋ ꢐꢍꢌꢀꢃ
ꢐꢌꢏꢠꢌꢋꢃ ꢎꢁꢝ ꢌꢀꢈ ꢏꢁꢍꢜꢊꢀ ꢍꢌꢗꢃꢍꢉꢀꢋ ꢊꢌꢑ ꢡꢌꢎꢑ
ꢗꢌꢍꢍ ꢈꢉꢊꢃꢀꢄꢉꢁꢀ
ꢐꢌꢈ ꢈꢉꢊꢃꢀꢄꢉꢁꢀ
ꢖꢇꢒ
0ꢇꢒ0 0ꢇ0ꢖꢓ ꢥ ꢖ8ꢫ
6
!
ꢌꢊꢁꢀꢋ ꢱꢊꢲꢩꢳꢴꢪ ꢐꢎꢁꢈꢜꢏꢂꢄꢇ ꢎꢃꢡꢉꢃꢝ ꢃꢌꢏꢞ ꢐꢌꢏꢠꢌꢋꢃ
ꢍꢌꢑꢁꢜꢂ ꢏꢌꢎꢃꢙꢜꢍꢍꢑ
ꢆꢇ6
0ꢇ8
0ꢇ000
0ꢇ8
0ꢇꢖꢯ
ꢆꢇꢒꢓ
0ꢇ3ꢯ
ꢆꢇꢓꢓ
0ꢇꢆꢓ
0ꢇꢆ0
0ꢇꢖ0
0ꢇꢆꢓ
0ꢇ08
ꢄꢜꢗꢄꢂꢎꢌꢂꢃ ꢂꢞꢠ
ꢊꢁꢍꢈ ꢏꢌꢐ ꢞꢂ
ꢆꢇ6
ꢖꢇꢒ
ꢍꢂꢊꢤꢤꢤꢤꢤꢤ
ꢱꢊꢲꢩꢳꢴꢪ
ꢏꢁꢊꢐꢁꢀꢃꢀꢂ
ꢐꢉꢀ ꢢꢌꢆꢣ
ꢄꢜꢋꢋꢃꢄꢂꢃꢈ ꢐꢏꢗ ꢍꢌꢑꢁꢜꢂ
ꢂꢁꢐ ꢡꢉꢃꢝ
ꢂꢎꢌꢑ ꢐꢉꢀ ꢆ
ꢗꢃꢡꢃꢍ
ꢂꢁꢂꢌꢍ ꢀꢜꢊꢗꢃꢎ ꢁꢙ ꢗꢌꢍꢍꢄꢅ ꢖ8
ꢐꢌꢏꢠꢌꢋꢃ ꢉꢀ ꢂꢎꢌꢑ ꢍꢁꢌꢈꢉꢀꢋ ꢁꢎꢉꢃꢀꢂꢌꢂꢉꢁꢀ
ꢗꢋꢌ ꢖ8 0ꢓꢆꢯ ꢎꢃꢡ ꢌ
8063fa
22
For more information www.linear.com/LTM8063
LTM8063
REVISION HISTORY
REV
DATE
02/18 Initial cap sentence (e.g.: Update to curve G04 in the Typical Performance Characteristics section).
02/18 Changed I from 2.5A to 2A for Output Voltage Ripple test
DESCRIPTION
PAGE NUMBER
A
4, 5
B
3
3
OUT
Added V = 8V to Switching Frequency consideration
IN
Changed 2.5A to 2A in first paragraph
15
18
Corrected pin name of pin B2 from FB to PG
8063fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTM8063
TYPICAL APPLICATION
12VOUT from 18.5VIN to 40VIN Step Down Converter
ꢑ
ꢘꢙ
ꢑ
ꢘꢙ
ꢚ
ꢏꢐꢌ8063
ꢀ8ꢈꢄꢑ ꢐꢒ ꢉ0ꢑ
ꢅꢓꢙ
ꢅꢐ
ꢀꢁꢂ
ꢃꢄꢅ
080ꢄ
ꢑ
ꢒꢓꢐ
ꢑ
ꢒꢓꢐ
ꢀꢋꢑ
0ꢈꢄꢔ
ꢋꢈꢋꢔ ꢕꢖꢔꢗ
ꢀ0ꢁꢂ
ꢃꢆꢇ
080ꢄ
ꢀꢆꢈꢉꢊ
ꢋ0ꢈꢄꢊ
ꢀꢈ8ꢌꢍꢎ
ꢜꢙꢝ ꢇꢞꢙꢟ
ꢂꢛ
8063 ꢐꢔ0ꢄ
ꢕꢘꢙꢇ ꢙꢒꢐ ꢓꢇꢖꢝ ꢘꢙ ꢐꢍꢘꢇ ꢟꢘꢅꢟꢓꢘꢐꢠ ꢐꢅꢡꢇꢇꢢ ꢕꢜ
ꢚꢑ ꢌꢔꢞ ꢛꢖ ꢔꢇ ꢏꢒꢣ ꢔꢇ ꢀꢋꢈ6ꢑ ꢣꢘꢐꢍ ꢒꢂꢂꢤꢟꢞꢟꢏꢖ ꢇꢗꢘꢕꢕꢘꢙꢜ
ꢘꢙ
DESIGN RESOURCES
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
Manufacturing:
• Selector Guides
• Quick Start Guide
• Demo Boards and Gerber Files
• Free Simulation Tools
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
2. Search using the Quick Power Search parametric table.
TechClip Videos
Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management
Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LTM8053
LTM8032
LTM8033
LTM8026
LTM4613
LTM8027
LTM8050
LTM8003
40V, 3.5A Step-Down µModule Regulator
3.4V ≤ V ≤ 40V. 0.97V ≤ V
≤ 15V. 6.25mm x 9mm x 3.32mm BGA Package.
IN
IN
OUT
36V, 2A Low EMI Step-Down µModule Regulator 3.6V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V. EN55022B Compliant.
≤ 24V. EN55022B Compliant.
OUT
OUT
36V, 3A Low EMI Step-Down µModule Regulator 3.6V ≤ V ≤ 36V. 0.8V ≤ V
IN
36V, 5A CVCC Step-Down µModule Regulator
6V ≤ V ≤ 36V. 1.2V ≤ V
≤ 24V. Constant Voltage Constant Current Operation.
≤ 15V. EN55022B Compliant.
IN
IN
OUT
OUT
36V, 8A Low EMI Step-Down µModule Regulator 5V ≤ V ≤ 36V. 3.3V ≤ V
60V, 4A Step-Down µModule Regulator
58V, 2A Step-Down µModule Regulator
4.5V ≤ V ≤ 60V, 2.5V ≤ V
≤ 24V.
≤ 24V.
IN
OUT
OUT
3.6V ≤ V ≤ 58V, 0.8V ≤ V
IN
3.5A Version of LTM8002, 40V, 3.5A, I = 25µA
3.4V ≤ V ≤ 40V, 0.97V ≤ V
≤ 18V, 6.25mm × 9mm × 3.32 BGA Package.
Q
IN
OUT
FMEA Compliant
LTM8065
40V, 2.5A Silent Switcher Step-Down µModule
Regulator
3.4V ≤ V ≤ 40V, 0.97V ≤ V
≤ 18V, 6.25mm × 6.25mm × 2.32mm BGA Package.
IN
OUT
8063fa
LT 0218 • PRINTED IN USA
www.linear.com/LTM8063
24
LINEAR TECHNOLOGY CORPORATION 2017
相关型号：
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