APM-6848 [MARKIMICROWAVE]
GaAs Broadband Low Phase Noise Amplifier;
| 型号： | APM-6848 |
| 厂家： | 
Marki |
| 描述： | GaAs Broadband Low Phase Noise Amplifier |
| 文件： | 总15页 (文件大小：1463K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GaAs Broadband Low Phase Noise Amplifier
APM-6848
1. Device Overview
1.1 General Description
The APM-6848 is an integrated 2-stage broadband, low phase noise LO
driver amplifier designed to provide a saturated +20 dBm output power
from a 0-4 dBm input power with low DC power consumption. This
amplifier uses GaAs HBT technology for low phase noise, and is
optimized to provide enough power to drive the LO port of an S-diode
mixer from 2 GHz to 20 GHz or of an H or L diode mixer from 2 GHz to
32 GHz. This amplifier can be operated with a variety of bias conditions
for both low power and high-power applications.
PA Module
Bare Die
1.3 Applications
1.2 Features
▪
Mobile test and measurement
▪
-165 dBc/Hz phase noise at 10 kHz
equipment
offset frequency
▪
▪
▪
Radar and satellite communications
5G Transceivers
Driver amplifier for S, H, and L –
diode mixers
▪
▪
▪
▪
▪
▪
▪
▪
+21 dBm output power
+23 dB gain
Low DC power consumption
Positive-only biasing
No sequencing required
Unconditionally stable
S-parameter files: APM-6848CH.s2p
Integrated DC blocks – No bias-tees
or off-chip blocking required
▪
Suitable as a T3 driver
1.4 Functional Block Diagram
1.5 Part Ordering Options1
Part
Product
Lifecycle
Export
Classification
Description
Number
Package Green Status
APM-6848CH
APM-6848PA
Wire Bondable Die Bare Die
RoHS
RoHS
Active
Active
EAR99
Connectorized
Module
PA
EAR99
1
Refer to our website for a list of definitions for terminology presented in this table.
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APM-6848
3.3 Recommended Operating Conditions . 7
3.4 Sequencing Requirements ............... 7
3.5 Electrical Specifications .................. 8
Table of Contents
1. Device Overview ............................... 1
1.1 General Description........................ 1
1.2 Features ....................................... 1
1.3 Applications................................... 1
1.4 Functional Block Diagram ................ 1
1.5 Part Ordering Options..................... 1
3.6 APM-6848CH Typical Performance
Plots................................................... 9
3.7 APM-6848PA Typical Performance
Plots................................................. 11
3.9 Time Domain Plots........................ 13
4. Application Information .................... 13
4.1 APM-6848CH Application Circuit... 13
4.2 Gain and Power Control ................ 14
5. Mechanical Data............................. 15
5.1 APM-6848CH Outline Drawing...... 15
2. APM-6848 Port Configurations and
Functions ............................................... 3
2.1 APM-6848CH Port Diagram ........... 3
2.2 APM-6848CH Port Functions.......... 4
2.3 APM-6848PA Port Diagram............ 5
2.4 APM-6848PA Port Functions.......... 5
3. Specifications ................................... 6
3.1 Absolute Maximum Ratings.............. 6
3.2 Package Information ....................... 6
5.2 APM-6848PA Package Outline
Drawing ............................................ 15
Revision History
Revision Code
Comment
Revision Date
-
October 2019
Datasheet Initial Release
Revised Min. Psat/SSG Spec,
Added Time Domain Plots
Revised Max Operating
Temperature
Updated Thermal Resistance
Updated Thermal Specs, Updated
Min Specs
A
January 2020
B
C
D
July 2020
July 2020
October 2020
Updated Performance Plots to
Adhere to Max Input Power Spec
E
December 2020
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APM-6848
2. APM-6848 Port Configurations and Functions
2.1 APM-6848CH Port Diagram
A port diagram of the APM-6848CH is shown below.
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APM-6848
2.2 APM-6848CH Port Functions
Equivalent Circuit
for Package
Port
Function
Description
This is the RF Input port of the amplifier
die. It is internally DC blocked and RF
matched to 50 Ω. RF input pad is GSG
with 175 µm pitch.
RF In
RF Input
Pad VC1 is the DC voltage supply pad for
the 1st stage of the amplifier IC. See
section 3.6 for performance at different
bias conditions.
Collector Supply
Port 1
VC1
VC2
Pad VC2 is the DC voltage supply pad to
the 2nd stage of the amplifier IC. Larger
VC voltage will result in larger power
consumption and larger power output.
See section 3.6 for performance at
different bias conditions.
Collector Supply
Port 2
Pad VB1 is the DC voltage supply pad for
a current mirror which controls the
collector current of the 1st stage (Ic1).
Larger voltages result in a higher current
draw through pad VC1, effectively
Base Supply
Port 1
VB1
VB2
functioning as a gain control pin for the 1st
stage of the amplifier. See section 3.6 for
performance at different bias conditions.
Pad VB2 is the DC voltage supply pad for
a current mirror which controls the
collector current of the 2nd stage (Ic2).
Larger voltages result in a higher current
draw through pad VC2, effectively
Base Supply
Port 2
functioning as a gain control pin for the 2nd
stage of the amplifier. See section 3.6 for
performance at different bias conditions.
This is the RF Output port of the amplifier
die. It is internally DC blocked and RF
matched to 50 Ω. RF output pad is GSG
with 175 µm pitch. Must have less than
7:1 VSWR when operating with voltage
larger than 5V on VC1 or VC2.
RF Out
GND
RF Output
Ground
Backside of the IC must be connected to a
DC/RF ground with high thermal and
electrical conductivity.
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APM-6848
2.3 APM-6848PA Port Diagram
A port diagram of the APM-6848PA is shown below.
2.4 APM-6848PA Port Functions
Equivalent Circuit
for Package
Port
Function
Description
This is the RF input port of the amplifier.
It is internally DC blocked and RF matched
to 50 Ω.
RF In
RF Input
Port VC is the DC voltage supply port for
both stages of the 2-stage amplifier. The
VC port in the PA module internally
connects to both VC1 and VC2 of the IC
described in section 2.2 of this datasheet
Port VB is the DC voltage supply port for
current mirrors which controls the
collector current supplied to the 2
amplifier stages. Larger voltages result in
a higher current draw through port VC,
effectively functioning as a gain control
pin. The VB port in the PA module
internally connects to both VB1 and VB2
of the IC described in section 2.2 of this
datasheet
VC
VB
Collector Supply
Base Supply
This is the RF output port of the amplifier.
It is internally DC blocked and RF matched
to 50 Ω. Must have less than 7:1 VSWR
when operating with voltage larger than 5V on port VC.
RF Out
GND
RF Output
Ground
Housing or outside of the coaxial cables
must be connected to a DC/RF ground
potential with high thermal and electrical
conductivity.
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APM-6848
3. Specifications
3.1 Absolute Maximum Ratings
The Absolute Maximum Ratings indicate limits beyond which damage may occur to the
device. If these limits are exceeded, the device may become inoperable or have a reduced
lifetime.
Parameter
Maximum Rating
Units
Collector Positive Bias Voltage (VC, VC1, VC2)
Positive Bias Current (Ic1)2
7
V
mA
mA
V
90
Positive Bias Current (Ic2)2
90
Current Mirror Positive Bias Voltage (VB, VB1, VB2)
Current Mirror Positive Bias Current (Ib, Ib1+Ib2)
RF Input Power
7
8
+5
mA
dBm
-
Output Load VSWR
7:1
Operating Temperature
-40 to +85
-65 to +150
53
˚C
Storage Temperature
˚C
Thermal Resistance, θJC
ºC/W
ºC
Max Junction Temperature for MTTF >1E6 Hours:
125
3.2 Package Information
Parameter
Details
Rating
ESD
Weight
Human Body Model (HBM), per MIL-STD-750, Method 1020
APM-6848PA
TBD
14.7g
2
Maximum positive DC collector current into each collector biasing pin
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APM-6848
3.3 Recommended Operating Conditions
The Recommended Operating Conditions indicate the limits, inside which the device should
be operated, to guarantee the performance given in Electrical Specifications Operating
outside these limits may not necessarily cause damage to the device, but the
performance may degrade outside the limits of the electrical specifications. For limits,
above which damage may occur, see Absolute Maximum Ratings.
Min Nominal Max3 Units
TA, Ambient Temperature
-40
+3
8
+25
+5
21
+5
21
+5
2
+85
+6
°C
V
Positive DC Voltage (VC1)
Positive DC Current (Ic1)
40
mA
V
Positive DC Voltage (VC2)
+3
8
+6
Positive DC Current (Ic2)
40
mA
V
Positive DC Current Mirror Voltage (VB1)
Positive DC Current Mirror Current (Ib1)
Positive DC Current Mirror Voltage (VB2)
Positive DC Current Mirror Voltage (Ib2)
+3
0.9
+3
0.9
+6
2.6
+6
mA
V
+5
2
2.6
mA
3.4 Sequencing Requirements
There is no sequencing required to power up or power down the amplifier.
Amplifier must have an output load connected when operating with a VC, VC1, or VC2
voltage larger than +5V.
3
Maximum recommended operating current conditions without RF input applied. Please see
typical performance plots on page 12 for relationship between RF input power and DC current
draw.
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APM-6848
3.5 Electrical Specifications4
The electrical specifications apply at TA=+25°C in a 50Ω system.
Min and Max limits apply only to our connectorized units and are guaranteed at TA=+25°C. Die are 100% DC tested and RF tested on a per
lot basis
Test
Conditions
5V/5V
bias, +4
dBm Input
Power
Frequency
Parameter
Min
Typical
Units
2 GHz – 20 GHz
20 GHz – 29 GHz
+19
+21
Saturated Output
Power
dBm
+18
2 GHz – 20 GHz
20 GHz – 29 GHz
2 GHz – 20 GHz
20 GHz – 29 GHz
2 GHz – 20 GHz
20 GHz – 29 GHz
19
23
21
11
9
15
7
Small Signal Gain
Input Return Loss
Output Return Loss
Noise Figure
5V/5V
bias,
-25 dBm
Input
dB
6
Power
2 GHz – 26.5 GHz
2 GHz-29 GHz
65
Reverse Isolation
5V/4V
5V/5V
5V/6V
5V/4V
5V/5V
5V/6V
-
-
-
-
-
-
27
43
67
2.9
4
Collector Current5, Ic
mA
Current Mirror Current,
Ib
5.2
5V/5V
bias,
2 GHz – 29 GHz
+0.5
Input IP3 (IIP3)
-25 dBm
Input
Power
dBm
+21
Output IP3 (OIP3)
Output P1dB
2 GHz – 29 GHz
2 GHz – 20 GHz
20 GHz – 29 GHz
2 GHz – 29 GHz
+19
+13
5V/5V
bias
Input Power for
Saturation
5V/5V
bias
dBm
+4
5V/5V
bias, +9
dBm Input
power
Phase Noise @ 10 kHz
Offset
4 GHz
dBc/Hz
-165
4
5
All Specifications and performance shown with VC1 = VC2 and VB1 = VB2
Bias conditions for Ic and Ib tested with no RF input power. See section 3.6 for DC current vs.
RF power. Bias conditions presented as VC/VB.
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APM-6848
3.6 APM-6848CH Typical Performance Plots
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APM-6848
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APM-6848
3.7 APM-6848PA Typical Performance Plots6
6
Phase Noise Plots taken above maximum recommended input power for MTTF >1E6 hours. Input
powers greater than +5 dBm can result in MTTF <1E6 hours.
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APM-6848
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APM-6848
3.9 Time Domain Plots7
4. Application Information
4.1 APM-6848CH Application Circuit
Below is the recommended application circuit for the APM-6848CH.
7
Fast rise time is desirable for linear T3 mixer operation.
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APM-6848
4.2 Gain and Power Control
The APM-6848 is a 2-stage amplifier integrated on a single IC. In the APM-6848PA
module, VB1 & VB2 and VC1 & VC2 are connected internally for user convenience. However, in
the APM-6848CH bare die, the user has some freedom to operate the 2 amplifier stages
independently for their application-specific needs. Please refer to section 2.2 to see the function
of each pad on the APM-6848CH, and refer to the gain and Psat plots in sections 3.6 and 3.7 to
see how bandwidth, saturated output power, and gain profile change for various bias conditions.
Generally, the gain of the first stage and second stage of the amplifier can be controlled by
adjusting VB1 and VB2 respectively. Increasing the voltage applied to a VB pad increases the
current drawn into the corresponding amplifier stage, which strongly correlates to the gain of that
stage, and some difference to the output power of that stage. Increasing the voltage on a VC pad
generally increases the linearity, maximum output power, and DC power consumption of the
corresponding amplifier stage.
In the case where a user wants to drive the LO port of a mixer from an initial LO power of
+5 dBm at 10 GHz, the user could apply 5V at all 4 DC ports and see an output power of +21.5
dBm and an overall power consumption of about 1 watt (the amplifier stages pull more DC current
as the gain compresses in a high input power condition). Alternatively, the user could apply 3.5 V
– 4 V to VB1 and VC1, and 6V to VB2 and VC2 and see an output power of 22.5 dBm with very
little difference in the overall power consumption. For applications with a strict power budget and
performance requirements, optimizing the bias conditions of the amplifier can be a useful tool for
the system designer.
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APM-6848
5. Mechanical Data
5.1 APM-6848CH Outline Drawing
5.2 APM-6848PA Package Outline Drawing
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