MAX15040EWE+ [MAXIM]
Switching Regulator, Voltage-mode, 5A, 1030kHz Switching Freq-Max, BICMOS, PBGA16, 2 X 2 MM, 0.50 MM PITCH, ROHS COMPLIANT, WLP-16;型号: | MAX15040EWE+ |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | Switching Regulator, Voltage-mode, 5A, 1030kHz Switching Freq-Max, BICMOS, PBGA16, 2 X 2 MM, 0.50 MM PITCH, ROHS COMPLIANT, WLP-16 信息通信管理 开关 |
文件: | 总15页 (文件大小:317K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
19-4426; Rev 2; 7/10
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
MAX1540
General Description
Features
The MAX15040 high-efficiency switching regulator
delivers up to 4A load current at output voltages from
o Internal 15mΩ R
MOSFETs
DS(ON)
o Continuous 4A Output Current
0.6V to (0.9 x V ). The device operates from 2.4V to
IN
o
1% Output-Voltage Accuracy Over Load, Line,
3.6V, making it ideal for on-board point-of-load and
postregulation applications. Total output-voltage accu-
racy is within 1ꢀ over load, line, and temperature.
and Temperature
o Operates from 2.4V to 3.6V Supply
The MAX15040 features 1MHz fixed-frequency PWM
mode operation. The high operating frequency allows
for small-size external components.
o Adjustable Output from 0.6V to (0.9 x V )
IN
o Adjustable Soft-Start Reduces Inrush Supply
Current
The low-resistance on-chip nMOS switches ensure high
efficiency at heavy loads while minimizing critical parasitic
inductances, making the layout a much simpler task with
respect to discrete solutions. Following a simple layout
and footprint ensures first-pass success in new designs.
o Factory-Trimmed 1MHz Switching Frequency
o Compatible with Ceramic, Polymer, and
Electrolytic Output Capacitors
o Safe Startup into Prebias Output
o Enable Input/Power-Good Output
The MAX15040 incorporates a high-bandwidth
(> 15MHz) voltage-error amplifier. The voltage-mode
control architecture and the voltage-error amplifier per-
mit a Type III compensation scheme to achieve maxi-
mum loop bandwidth, up to 200kHz. High loop
bandwidth provides fast transient response, resulting in
less required output capacitance and allowing for all-
ceramic capacitor designs.
o Fully Protected Against Overcurrent and
Overtemperature
o Overload Hiccup Protection
o Sink/Source Current in DDR Applications
o 2mm x 2mm, 16-Bump (4 x 4 Array), 0.5mm Pitch
WLP Package
The MAX15040 features an output overload hiccup pro-
tection and peak current limit on both high-side (sourc-
ing current) and low-side (sinking and sourcing current)
MOSFETs, for ultra-safe operations in case of high out-
put prebias, short-circuit conditions, severe overloads,
or in converters with bulk electrolytic capacitors.
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX15040EWE+
-40°C to +85°C
16 WLP
+Denotes a lead(Pb)-free/RoHS-compliant package.
The MAX15040 features an adjustable output voltage.
The output voltage is adjustable by using two external
resistors at the feedback or by applying an external ref-
erence voltage to the REFIN/SS input. The MAX15040
offers programmable soft-start time using one capacitor
to reduce input inrush current. A built-in thermal shut-
down protection assures safe operation under all condi-
tions. The MAX15040 is available in a 2mm x 2mm,
16-bump (4 x 4 array), 0.5mm pitch WLP package.
Typical Operating Circuit
INPUT
2.4V TO 3.6V
IN
BST
LX
MAX15040
EN
OUTPUT
V
DD
Applications
GND
FB
Server Power Supplies
Point-of-Load
ASIC/CPU/DSP Core and I/O Voltages
DDR Power Supplies
REFIN/SS
V
DD
COMP
Base-Station Power Supplies
Telecom and Networking Power Supplies
RAID Control Power Supplies
PWRGD
GND
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
ABSOLUTE MAXIMUM RATINGS
IN, V , PWRGD to GND ......................................-0.3V to +4.5V
Continuous Power Dissipation (T = +70°C)
A
DD
LX to GND....................-0.3V to the lower of 4.5V or (V + 0.3V)
16-Bump (4 x 4 Array), 0.5mm Pitch WLP
IN
LX Transient..............(V
COMP, FB, REFIN/SS,
- 1.5V, <50ns), (V + 1.5V, <50ns)
(derated 12.5mW/°C above +70°C)...........................1000mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Continuous Operating Temperature at
Full Load Current (Note 2) ...........................................+105°C
Storage Temperature Range.............................-65°C to +150°C
Soldering Temperature (reflow) .......................................+260°C
GND
IN
EN to GND..............-0.3V to the lower of 4.5V or (V + 0.3V)
DD
LX RMS Current (Note 1) .........................................................5A
BST to LX..................................................................-0.3V to +4V
BST to GND..............................................................-0.3V to +8V
Note 1: LX has internal clamp diodes to GND and IN. Applications that forward bias these diodes should take care not to exceed
MAX1540
the package power dissipation limit of the device.
Note 2: Continuous operation at full current beyond +105°C may degrade product life.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = V = 3.3V, T = -40°C to +85°C. Typical values are at T = +25°C, circuit of Figure 1, unless otherwise noted.) (Note 3)
A
IN
DD
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IN/V
DD
IN and V Voltage Range
DD
2.40
3.60
1
V
V
V
V
V
V
V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
0.52
0.8
3.7
4
IN
IN
IN
IN
IN
IN
IN Supply Current
No load, no switching
No load, no switching
No load
mA
1.5
5.5
6
V
Supply Current
mA
mA
µA
DD
= V
= V
= 2.5V
= 3.3V
12
DD
DD
Total Supply Current (IN + V
)
DD
23
Total Shutdown Current from IN
and V
V
= V
= V
- V = 3.6V, V = 0V
0.1
2
IN
DD
BST
LX
EN
DD
V
V
rising
falling
2
1.9
2
2.2
DD
DD
V
Undervoltage Lockout
DD
LX starts/stops switching
V
Threshold
1.75
V
UVLO Deglitching
µs
DD
BST
T
T
= +25°C
= +85°C
2
A
V
V
= V = V = 3.6V,
DD IN
BST
BST Leakage Current
µA
ns
= 3.6V or 0V, V = 0V
LX
EN
0.025
10
A
PWM COMPARATOR
PWM Comparator Propagation
Delay
10mV overdrive
COMP
COMP Clamp Voltage High
COMP Clamp Voltage Low
COMP Slew Rate
V
V
= 2.4V to 3.6V
= 2.4V to 3.6V
2.03
0.73
1.6
830
1
V
V
DD
DD
V/µs
mV
V
PWM Ramp Valley
V
= 2.4V to 3.6V
DD
PWM Ramp Amplitude
COMP Shutdown Resistance
From COMP to GND, V = 0V
8
Ω
EN
2
_______________________________________________________________________________________
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
MAX1540
ELECTRICAL CHARACTERISTICS (continued)
(V = V = 3.3V, T = -40°C to +85°C. Typical values are at T = +25°C, circuit of Figure 1, unless otherwise noted.) (Note 3)
A
IN
DD
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ERROR AMPLIFIER
FB Regulation Accuracy
Open-Loop Voltage Gain
Using internal reference
0.594
0.600
115
0.606
V
1kΩ from COMP to GND (Note 4)
dB
Error-Amplifier Unity-Gain
Bandwidth
Series 5kΩ, 100nF from COMP to GND (Note 4)
26
MHz
V
V
V
V
V
V
= 2.4V to 2.6V
= 2.6V to 3.6V
0
V
V
- 1.80
- 1.85
DD
DD
DD
Error-Amplifier Common-Mode
Input Range
0
DD
= 1.2V, sinking
500
1000
-200
COMP
COMP
Error-Amplifier Minimum Output
Current
µA
nA
= 1.0V, sourcing
FB Input Bias Current
REFIN/SS
= 0.7V, using internal reference, T = +25°C
-100
FB
A
REFIN/SS Charging Current
REFIN/SS Discharge Resistance
V
= 0.45V
7
8
9
µA
REFIN/SS
520
Ω
V
V
= 2.4V to 2.6V
= 2.6V to 3.6V
0
0
V
- 1.80
- 1.85
DD
DD
DD
REFIN/SS Common-Mode Range
V
V
DD
T
A
= +25°C
30
µV
REFIN/SS Offset Voltage
Error amplifier offset
-4.5
+4.5
mV
LX (ALL BUMPS COMBINED)
LX On-Resistance, High Side
V
V
V
V
= V
= V
- V = 2.5V
21
19
16
15
7
IN
IN
IN
IN
BST
BST
LX
I
I
= -0.4A
= 0.4A
= 2.5V
mΩ
mΩ
A
LX
LX
- V = 3.3V
LX
= 2.5V
= 3.3V
LX On-Resistance, Low Side
High-side sourcing
Low-side sinking
5.5
5.5
-2
LX Peak Current-Limit Threshold
V
V
IN
IN
7
V
V
= 0V
LX
LX
T
= +25°C
= +85°C
A
A
LX Leakage Current
= 3.6V, V = 0V
= 3.6V
+2
µA
EN
T
0.2
1
LX Switching Frequency
LX Maximum Duty Cycle
LX Minimum On-Time
RMS LX Output Current
ENABLE
V
V
= 2.5V to 3.3V, T = +25°C
0.92
92
1.03
MHz
%
IN
IN
A
= 2.5V to 3.3V, T = +25°C
A
96
80
ns
4
A
EN Input Logic-Low Threshold
EN Input Logic-High Threshold
0.7
1
V
V
1.7
T
T
= +25°C
= +85°C
A
V
V
= 0 or 3.6V,
EN
IN
EN Input Current
µA
= V
= 3.6V
DD
0.3
A
_______________________________________________________________________________________
3
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
ELECTRICAL CHARACTERISTICS (continued)
(V = V = 3.3V, T = -40°C to +85°C. Typical values are at T = +25°C, circuit of Figure 1, unless otherwise noted.) (Note 3)
A
IN
DD
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
THERMAL SHUTDOWN
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
POWER-GOOD (PWRGD)
Rising
+165
20
°C
°C
V
V
falling, V
= 0.6V
= 0.6V
87
90
93
FB
FB
REFIN/SS
% of
Power-Good Threshold Voltage
Power-Good Edge Deglitch
MAX1540
V
rising, V
92.5
REFIN/SS
REFIN/SS
Clock
cycles
V
falling or rising
48
FB
PWRGD Output-Voltage Low
I
= 4mA (sinking)
0.03
0.01
0.15
V
PWRGD
PWRGD Leakage Current
V
= V
= 3.6V, V = 0.9V
µA
DD
PWRGD
FB
OVERCURRENT LIMIT (HICCUP MODE)
Clock
cycles
Current-Limit Startup Blanking
Restart Time
112
896
Clock
cycles
% of
REFIN/SS
FB Hiccup Threshold
V
V
falling
falling
70
36
FB
FB
V
Hiccup Threshold Blanking Time
µs
Note 3: Specifications are 100% production tested at T = +25°C. Limits over the operating temperature range are guaranteed by
A
design and characterization.
Note 4: Guaranteed by design.
Typical Operating Characteristics
(V = V
IN
= 3.3V, output voltage = 1.8V, I = 4A, and T = +25°C, circuit of Figure 1, unless otherwise noted.)
LOAD
A
DD
EFFICIENCY
vs. OUTPUT CURRENT
EFFICIENCY
vs. OUTPUT CURRENT
100
100
90
80
70
60
50
40
90
V
= 1.8V
OUT
80
70
60
50
40
V
= 1.8V
OUT
V
= 1.5V
OUT
V
= 1.5V
V
= 1.2V
OUT
OUT
V
= 1.2V
OUT
V
= 2.5V
OUT
V
= V = 3.3V
IN
V = V = 2.5V
IN DD
DD
0.1
1
OUTPUT CURRENT (A)
10
0.1
1
OUTPUT CURRENT (A)
10
4
_______________________________________________________________________________________
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
MAX1540
Typical Operating Characteristics (continued)
(V = V
IN
= 3.3V, output voltage = 1.8V, I
= 4A, and T = +25°C, circuit of Figure 1, unless otherwise noted.)
A
DD
LOAD
EFFICIENCY
vs. OUTPUT CURRENT
FREQUENCY
vs. INPUT VOLTAGE
LINE REGULATION
0.5
0.4
100
90
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.3
V
= 1.2V
OUT
0.2
80
V
= 1.8V
OUT
0.1
0
70
V
= 1.5V
OUT
-0.1
-0.2
-0.3
-0.4
-0.5
V
= 1.2V
OUT
60
50
40
V
= 1.8V
OUT
3.0
T
= +85°C
A
T
= +25°C
A
T
= -40°C
A
V
V
= 3.3V
DD
= 2.5V
IN
2.4
2.6
2.8
3.2
3.4
3.6
0.1
1
10
2.4
2.6
2.8
3.0
3.2
3.4
3.6
INPUT VOLTAGE (V)
OUTPUT CURRENT (A)
INPUT VOLTAGE (V)
SWITCHING WAVEFORMS
LOAD-TRANSIENT RESPONSE
LOAD REGULATION
MAX15040 toc08
MAX15040 toc07
0.10
0
AC-COUPLED
50mV/div
V
OUT
AC-COUPLED
V
100mV/div
OUT
-0.10
-0.20
-0.30
-0.40
-0.50
I
LX
2A/div
V
= 2.5V
OUT
V
= 1.8V
OUT
0
I
1A/div
0
OUT
V
= 1.5V
OUT
2V/div
0
V
LX
V
= 1.2V
OUT
3
INTERNAL REFERENCE
1
0
2
4
400ns/div
40µs/div
LOAD CURRENT (A)
SHUTDOWN WAVEFORM
SOFT-START WAVEFORM
MAX15040 toc09
MAX15040 toc10
2V/div
0
V
EN
V
2V/div
0
EN
1V/div
0
V
1V/div
0
OUT
V
OUT
I
= 1.8A
OUT
10µs/div
400µs/div
_______________________________________________________________________________________
5
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
Typical Operating Characteristics (continued)
(V = V
IN
= 3.3V, output voltage = 1.8V, I
= 4A, and T = +25°C, circuit of Figure 1, unless otherwise noted.)
LOAD
A
DD
INPUT SHUTDOWN CURRENT
vs. INPUT VOLTAGE
RMS INPUT CURRENT DURING
SHORT CIRCUIT vs. INPUT VOLTAGE
HICCUP CURRENT LIMIT
MAX15040 toc12
20
16
12
8
0.5
0.4
0.3
0.2
0.1
0
V
OUT
1V/div
0
MAX1540
10A/div
0
I
OUT
5A/div
0
4
I
IN
V
= 0
EN
V
= 0
OUT
3.4
0
2.4
2.6
2.8
3.0
3.2
3.4
3.6
2.4
2.6
2.8
3.0
3.2
3.6
1ms/div
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
FEEDBACK VOLTAGE
vs. TEMPERATURE
SOFT-START WITH REFIN/SS
MAX15040 toc15
0.610
0.608
0.606
0.604
0.602
0.600
0.598
0.596
0.594
0.592
0.590
NO LOAD
2A/div
I
IN
0
500mV/div
0
V
REFIN/SS
1V/div
V
OUT
0
2V/div
0
V
PWRGD
-40
-15
10
35
60
85
200µs/div
TEMPERATURE (°C)
STARTING INTO PREBIAS OUTPUT
WITH NO LOAD
STARTING INTO PREBIAS OUTPUT
WITH 2A LOAD
MAX15040 toc17
MAX15040 toc16
V
EN
2V/div
0
2V/div
0
V
EN
V
OUT
OUT
1V/div
0
1V/div
0
V
OUT
2A/div
0
I
V
PWRGD
2V/div
0
V
PWRGD
2V/div
0
400µs/div
400µs/div
6
_______________________________________________________________________________________
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
MAX1540
Typical Operating Characteristics (continued)
(V = V
IN
= 3.3V, output voltage = 1.8V, I = 4A, and T = +25°C, circuit of Figure 1, unless otherwise noted.)
LOAD
A
DD
CASE TEMPERATURE
vs. AMBIENT TEMPERATURE
STARTING INTO PREBIAS OUTPUT ABOVE
NOMINAL SETPOINT WITH NO LOAD
MAX15040 toc18
120
CASE = TOP SIDE OF DEVICE
MEASURED ON A MAX15040EVKIT
100
80
60
40
20
0
2V/div
1V/div
V
EN
V
OUT
0
2V/div
0
-20
-40
V
PWRGD
I
= 4A
OUT
60
-40
-15
10
35
85
1ms/div
AMBIENT TEMPERATURE (°C)
Pin Description
BUMP
NAME
FUNCTION
Analog/Power Ground. Connect GND to the PCB ground plane at one point near the input bypass
capacitor return terminal as close as possible to the device.
A1, A2
GND
IN
Power-Supply Input. Input supply range is from 2.4V to 3.6V. Bypass IN to GND with a 22µF ceramic
capacitor in parallel to a 0.1µ F ceramic capacitor as close as possible to the device.
A3, A4
B1, B2,
B3
Inductor Connection. All LX bumps are internally connected together. Connect all LX bumps to the
switched side of the inductor. LX is high impedance when the device is in shutdown mode.
LX
Supply Input. V
ceramic capacitor from V
powers the internal analog core. Connect V
to IN with a 10Ω resistor. Connect a 1µF
DD
DD
B4
V
DD
to GND.
DD
High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1µF capacitor.
Internally Connected. Leave unconnected or connect to ground.
C1
C2, C3
C4
BST
I.C.
EN
Enable Input. Connect EN to GND to disable the device. Connect EN to V
to enable the device.
DD
Power-Good Output. PWRGD is an open-drain output that goes high impedance when V exceeds 92.5%
FB
of V
and V
is above 0.54V. PWRGD is internally pulled low when V falls below 90% of
REFIN/SS FB
REFIN/SS
D1
PWRGD
V
or V
is below 0.54V. PWRGD is internally pulled low when the device is in shutdown
REFIN/SS
REFIN/SS
mode, V
is below the internal UVLO threshold, or the device is in thermal shutdown.
DD
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to set
the output voltage from 0.6V to 90% of V
D2
D3
FB
.
IN
Voltage-Error Amplifier Output. Connect the necessary compensation network from COMP to FB and the
converter output (see the Compensation Design section). COMP is internally pulled to GND when the
device is in shutdown mode.
COMP
External Reference Input/Soft-Start Timing Capacitor Connection. Connect REFIN/SS to a system voltage to
force FB to regulate to REFIN/SS voltage. REFIN/SS is internally pulled to GND when the device is in
D4
REFIN/SS shutdown and thermal shutdown mode. If no external reference is applied, the internal 0.6V reference is
automatically selected. REFIN/SS is also used to perform soft-start. Connect a minimum of 1nF capacitor
from REFIN/SS to GND to set the startup time (see the Soft-Start and Reference Input (REFIN/SS) section).
_______________________________________________________________________________________
7
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
Block Diagram
V
DD
MAX15040
UVLO
CIRCUITRY
SHUTDOWN
CONTROL
EN
5
CURRENT-LIMIT
COMPARATOR
BIAS
GENERATOR
LX
ILIM THRESHOLD
BST
IN
VOLTAGE
REFERENCE
BST SWITCH
SHDN
SOFT-START
CONTROL
LOGIC
LX
IN
THERMAL
SHUTDOWN
REFIN/SS
GND
CURRENT-LIMIT
COMPARATOR
ERROR
AMPLIFIER
PWM
COMPARATOR
ILIM
THRESHOLD
FB
1V
P-P
OSCILLATOR
COMP
PWRGD
GND
SHDN
FB
COMP CLAMPS
0.9 x V
REFIN/SS
8
_______________________________________________________________________________________
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
MAX1540
Typical Application Circuit
INPUT
2.4V TO 3.6V
IN
IN
BST
OPTIONAL
C9
R10
C1
C3
0.1µF
0.1µF
2.2Ω
U1
22µF
R1
C15
10Ω
1000pF
LX
LX
LX
MAX15040
L1
0.47µH
OUTPUT
1.8V/4A
V
DD
C5
1µF
R6
430Ω
ON
C4
0.01µF
C2
22µF
R3
EN
8.06kΩ
OFF
C10
1%
470pF
GND
FB
R4
5.1kΩ
C11
820pF
R7
REFIN/SS
4.02kΩ
C8
0.033µF
COMP
1%
V
DD
C12
33pF
PWRGD
R5
20kΩ
GND
Figure 1. All-Ceramic Capacitor Design with V
= 1.8V
OUT
Adjustable soft-start time provides flexibilities to mini-
mize input startup inrush current. An open-drain,
power-good (PWRGD) output goes high impedance
Detailed Description
The MAX15040 high-efficiency, voltage-mode switching
regulator is capable of delivering up to 4A of output
current. The MAX15040 provides output voltages from
when V exceeds 92.5% of V
and V
FB
REFIN/SS
REFIN/SS
is above 0.54V. PWRGD goes low when V falls below
FB
0.6V to (0.9 x V ) from 2.4V to 3.6V input supplies,
IN
90% of V
or V
is below 0.54V.
REFIN/SS
REFIN/SS
making it ideal for on-board point-of-load applications.
The output-voltage accuracy is better than 1% over
load, line, and temperature.
Controller Function
The controller logic block is the central processor that
determines the duty cycle of the high-side MOSFET
under different line, load, and temperature conditions.
Under normal operation, where the current-limit and tem-
perature protection are not triggered, the controller logic
block takes the output from the PWM comparator and
generates the driver signals for both high-side and low-
side MOSFETs. The control logic block controls the
break-before-make logic and the timing for charging the
bootstrap capacitors. The error signal from the voltage-
error amplifier is compared with the ramp signal generat-
ed by the oscillator at the PWM comparator to produce
the required PWM signal. The high-side switch turns on
at the beginning of the oscillator cycle and turns off when
The MAX15040 features a 1MHz fixed switching frequen-
cy, allowing the user to achieve all-ceramic capacitor
designs and fast transient responses. The high operating
frequency minimizes the size of external components.
The MAX15040 is available in a 2mm x 2mm, 16-bump
(4 x 4 array), 0.5mm pitch WLP package. The REFIN/SS
function makes the MAX15040 an ideal solution for DDR
and tracking power supplies. Using internal low-R
DSON
(15mΩ) n-channel MOSFETs for both high- and low-side
switches maintains high efficiency at both heavy-load
and high-switching frequencies.
The MAX15040 employs voltage-mode control architec-
ture with a high-bandwidth (> 15MHz) error amplifier.
The op-amp voltage-error amplifier works with Type III
compensation to fully utilize the bandwidth of the high-
frequency switching to obtain fast transient response.
the ramp voltage exceeds the V
signal or the cur-
COMP
rent-limit threshold is exceeded. The low-side switch
then turns on for the remainder of the oscillator cycle.
_______________________________________________________________________________________
9
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
Current Limit
The internal, high-side MOSFET has a typical 7A peak cur-
rent-limit threshold. When current flowing out of LX
exceeds this limit, the high-side MOSFET turns off and the
low-side MOSFET turns on. The low-side MOSFET
remains on until the inductor current falls below the low-
side current limit. This lowers the duty cycle and causes
the output voltage to droop until the current limit is no
longer exceeded. The MAX15040 uses a hiccup mode to
prevent overheating during short-circuit output conditions.
Undervoltage Lockout (UVLO)
The UVLO circuitry inhibits switching when V is
DD
below 1.9V (typ). Once V
rises above 2V (typ), UVLO
DD
clears and the soft-start function activates. A 100mV
hysteresis is built in for glitch immunity.
BST
The gate-drive voltage for the high-side, n-channel
switch is generated by a flying-capacitor boost circuit.
The capacitor between BST and LX is charged from the
V supply while the low-side MOSFET is on. When the
IN
5
During current limit, if V
REFIN/SS
drops below 70% of
FB
low-side MOSFET is switched off, the voltage of the
capacitor is stacked above LX to provide the necessary
turn-on voltage for the high-side internal MOSFET.
V
and stays below this level for typically 36µs
(12µs min) or more, the device enters hiccup mode.
The high-side MOSFET and the low-side MOSFET turn
off and both COMP and REFIN/SS are internally pulled
low. The device remains in this state for 896 clock
cycles and then attempts to restart for 112 clock
cycles. If the fault-causing current limit has cleared, the
device resumes normal operation. Otherwise, the
device reenters hiccup mode.
Power-Good Output (PWRGD)
PWRGD is an open-drain output that goes high
impedance when V is above 92.5% x V
and
REFIN/SS
FB
V
is above 0.54V. PWRGD pulls low when V
REFIN/SS
is below 90% of V
FB
for at least 48 clock cycles
REFIN/SS
or V
is below 0.54V. PWRGD is low during
REFIN/SS
shutdown.
Soft-Start and Reference Input (REFIN/SS)
The MAX15040 utilizes an adjustable soft-start function
to limit inrush current during startup. An 8µA (typ) cur-
rent source charges an external capacitor connected to
REFIN/SS. The soft-start time is adjusted by the value of
the external capacitor from REFIN/SS to GND. The
required capacitance value is determined as:
Setting the Output Voltage
The MAX15040 output voltage is adjustable from 0.6V
to 90% of V by connecting FB to the center tap of a
IN
resistor-divider between the output and GND (Figure
3). To determine the values of the resistor-divider, first
select the value of R3 between 2kΩ and 10kΩ. Then
use the following equation to calculate R4:
8µA × t
SS
R4 = (V x R3)/(V
- V
)
FB
C =
FB
OUT
0.6V
where V
is equal to the reference voltage at
FB
REFIN/SS and V
is the output voltage. For V
=
OUT
OUT
where t
is the required soft-start time in seconds.
SS
0.6V, remove R4. If no external reference is applied at
Connect a minimum 1nF capacitor between REFIN/SS
and GND. REFIN/SS is also an external reference input
(REFIN/SS). The device regulates FB to the voltage
applied to REFIN/SS. The internal soft-start is not avail-
able when using an external reference. Figure 2 shows
a method of soft-start when using an external refer-
ence. If an external reference is not applied, the device
uses the internal 0.6V reference.
REFIN/SS, the internal reference is automatically select-
ed and V becomes 0.6V.
FB
LX
R3
R4
MAX15040
R1
FB
REFIN/SS
R2
C
MAX15040
Figure 2. Typical Soft-Start Implementation with External
Reference
Figure 3. Setting the Output Voltage with a Resistor Voltage-
Divider
10 ______________________________________________________________________________________
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
MAX1540
capacitor’s ESL. Estimate the output voltage ripple due
to the output capacitance, ESR, and ESL as follows:
Shutdown Mode
Drive EN to GND to shut down the device and reduce
quiescent current to less than 0.1µA. During shutdown,
LX is high impedance. Drive EN high to enable the
MAX15040.
V
= V
+
RIPPLE
RIPPLE(C)
V
+ V
RIPPLE(ESL)
RIPPLE(ESR)
Thermal Protection
where the output ripple due to output capacitance,
ESR, and ESL is:
Thermal-overload protection limits total power dissipation
in the device. When the junction temperature exceeds T
J
I
P−P
= +165°C, a thermal sensor forces the device into shut-
down, allowing the die to cool. The thermal sensor turns
the device on again after the junction temperature cools
by 20°C, causing a pulsed output during continuous
overload conditions. The soft-start sequence begins after
recovery from a thermal-shutdown condition.
V
=
RIPPLE(C)
8 x C
x f
S
OUT
V
= I
x ESR
x ESL or
x ESL
RIPPLE(ESR)
P−P
I
t
P−P
V
=
RIPPLE(ESL)
Applications Information
ON
I
t
IN and V
Decoupling
DD
P−P
V
=
RIPPLE(ESL)
To decrease the noise effects due to the high switching
frequency and maximize the output accuracy of
OFF
or whichever is higher.
the MAX15040, decouple V with a 22µF capacitor in
IN
parallel with a 0.1µF capacitor from V to GND. Also
IN
The peak-to-peak inductor current (I ) is:
P-P
decouple V
with a 1µF capacitor from V
to GND.
DD
DD
Place these capacitors as close as possible to the device.
V
− V
V
OUT
IN
OUT
I
=
x
P−P
f × L
V
IN
Inductor Selection
Choose an inductor with the following equation:
S
Use these equations for initial output capacitor selec-
tion. Determine final values by testing a prototype or an
evaluation circuit. A smaller ripple current results in less
output voltage ripple. Since the inductor ripple current
is a factor of the inductor value, the output voltage rip-
ple decreases with larger inductance. Use ceramic
capacitors for low ESR and low ESL at the switching
frequency of the converter. The ripple voltage due to
ESL is negligible when using ceramic capacitors.
V
× (V − V
OUT
)
OUT
IN
L =
f × V × LIR ×I
S
IN
OUT(MAX)
where LIR is the ratio of the inductor ripple current to full
load current at the minimum duty cycle and f is the
S
switching frequency (1MHz). Choose LIR between 20%
to 40% for best performance and stability.
Use an inductor with the lowest possible DC resistance
that fits in the allotted dimensions. Powdered iron or ferrite
core types are often the best choice for performance.
With any core material, the core must be large enough
not to saturate at the current limit of the MAX15040.
Load-transient response depends on the selected out-
put capacitance. During a load transient, the output
instantly changes by ESR x ∆I
. Before the con-
LOAD
troller can respond, the output deviates further,
depending on the inductor and output capacitor val-
ues. After a short time, the controller responds by regu-
lating the output voltage back to its predetermined
value. The controller response time depends on the
closed-loop bandwidth. A higher bandwidth yields a
faster response time, preventing the output from deviat-
ing further from its regulating value. See the Compen-
sation Design section for more details.
Output-Capacitor Selection
The key selection parameters for the output capacitor are
capacitance, ESR, ESL, and voltage-rating requirements.
These affect the overall stability, output ripple voltage,
and transient response of the DC-DC converter. The out-
put ripple occurs due to variations in the charge stored
in the output capacitor, the voltage drop due to the
capacitor’s ESR, and the voltage drop due to the
______________________________________________________________________________________ 11
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
total equivalent series resistance of the output capacitor.
If there is more than one output capacitor of the same
type in parallel, the value of the ESR in the above equa-
tion is equal to that of the ESR of a single output capaci-
tor divided by the total number of output capacitors.
Input-Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the device. The total input capacitance must
be equal to or greater than the value given by the fol-
lowing equation to keep the input ripple voltage within
the specification and minimize the high-frequency rip-
ple current being fed back to the input source:
The MAX15040 high switching frequency allows the use
of ceramic output capacitors. Since the ESR of ceramic
capacitors is typically very low, the frequency of the
associated transfer function zero is higher than the unity-
D x T x I
S
OUT
gain crossover frequency, f , and the zero cannot be
C
C
=
IN_MIN
MAX1540
V
used to compensate for the double pole created by the
output inductor and capacitor. The double pole produces
a gain drop of 40dB/decade and a phase shift of 180°.
The compensation network must compensate for this
gain drop and phase shift to achieve a stable high-band-
width closed-loop system. Therefore, use type III com-
pensation as shown in Figure 4 and Figure 5. Type III
compensation possesses three poles and two zeros with
IN− RIPPLE
where V
is the maximum allowed input ripple
IN-RIPPLE
voltage across the input capacitors and is recommend-
ed to be less than 2% of the minimum input voltage, D
is the duty cycle (V
/V ), and T is the switching
OUT IN S
period (1/f ) = 1µs.
S
The impedance of the input capacitor at the switching
frequency should be less than that of the input source so
high-frequency switching currents do not pass through
the input source, but are instead shunted through the
input capacitor. The input capacitor must meet the ripple
current requirement imposed by the switching currents.
The RMS input ripple current is given by:
the first pole, f
, located at zero frequency (DC).
P1_EA
Locations of other poles and zeros of the type III compen-
sation are given by:
1
f
=
Z1_EA
2π x R1 x C1
1
f
=
Z2 _EA
V
× (V − V
)
OUT
IN
OUT
2π x R3 x C3
I
= I
×
RIPPLE
LOAD
V
IN
1
f
=
=
where I
is the input RMS ripple current.
P3 _EA
RIPPLE
2π x R1 x C2
Compensation Design
1
The power transfer function consists of one double pole
and one zero. The double pole is introduced by the
f
P2 _EA
2π x R2 x C3
inductor, L, and the output capacitor, C . The ESR of the
O
The above equations are based on the assumptions that
C1 >> C2, and R3 >> R2, which are true in most appli-
cations. Placements of these poles and zeros are deter-
mined by the frequencies of the double pole and ESR
zero of the power transfer function. It is also a function
of the desired closed-loop bandwidth. The following
section outlines the step-by-step design procedure to
calculate the required compensation components for
the MAX15040.
output capacitor determines the zero. The double pole
and zero frequencies are given as follows:
1
f
= f
=
P1_LC P2_LC
⎛ R +ESR⎞
O
2π x L x C
x
⎜
O
⎟
⎝
⎠
+R
L
R
O
1
f
=
Z_ESR
The output voltage is determined by:
2π x ESR x C
O
where R is equal to the sum of the output inductor’s DC
L
0.6×R3
R4 =
resistance (DCR) and the internal switch resistance,
V
OUT
− 0.6
(
)
R
. A typical value for R
output load resistance, which is equal to the rated output
voltage divided by the rated output current. ESR is the
is 15mΩ. R is the
DSON
DSON O
For V
= 0.6V, R4 is not needed.
OUT
12 ______________________________________________________________________________________
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
MAX1540
COMPENSATION
TRANSFER
FUNCTION
L
OPEN-LOOP
GAIN
V
OUT
LX
THIRD
POLE
C
OUT
R2
C3
DOUBLE POLE
MAX15040
R3
R4
GAIN (dB)
FB
SECOND
POLE
POWER-STAGE
C1
R1
C2
TRANSFER
FUNCTION
COMP
FIRST AND SECOND ZEROS
FREQUENCY (Hz)
Figure 4. Type III Compensation Network
Figure 5. Type III Compensation Illustration
The zero-cross frequency of the closed-loop, f , should
C
The above equations provide accurate compensation
when the zero-cross frequency is significantly higher than
the double-pole frequency. When the zero-cross frequen-
cy is near the double-pole frequency, the actual zero-
cross frequency is higher than the calculated frequency.
In this case, lowering the value of R1 reduces the zero-
cross frequency. Also, set the third pole of the type III
compensation close to the switching frequency (1MHz) if
the zero-cross frequency is above 200kHz to boost the
phase margin. The recommended range for R3 is 2kΩ to
10kΩ. Note that the loop compensation remains
unchanged if only R4’s resistance is altered to set differ-
ent outputs.
be between 10% and 20% of the switching frequency,
f
(1MHz). A higher zero-cross frequency results in
S
faster transient response. Once f is chosen, C1 is cal-
C
culated from the following equation:
⎛
⎜
⎝
⎞
⎠
V
IN
2.5
⎟
V
P−P
C1 =
R
L
2 x π x R3 x (1+
) × f
C
R
O
where V
= 1V
(typ).
P-P
P-P
Due to the underdamped nature of the output LC dou-
ble pole, set the two zero frequencies of the type III
compensation less than the LC double-pole frequency
to provide adequate phase boost. Set the two zero fre-
quencies to 80% of the LC double-pole frequency.
Hence:
Soft-Starting into a Prebiased Output
The MAX15040 soft-starts into a prebiased output without
discharging the output capacitor. In safe prebiased start-
up, both low-side and high-side switches remain off to
avoid discharging the prebiased output. PWM operation
starts when the voltage on REFIN/SS crosses the voltage
on FB. The PWM activity starts with the low-side switch
turning on first to build the bootstrap capacitor charge.
Power-good (PWRGD) asserts 48 clock cycles after FB
crosses 92.5% of the final regulation set point. After 4096
clock cycles, the device switches from prebiased safe
startup mode to forced PWM mode.
L x C x (R + ESR)
1
O
O
R1 =
C3 =
x
0.8 x C1
R + R
L O
L x C x (R + ESR)
1
O
O
x
0.8 x R3
R + R
L O
Setting the second compensation pole, f
Z_ESR
, at
P2_EA
The MAX15040 is capable of starting into a prebias volt-
age higher than the nominal set point without abruptly dis-
charging the output. This is achieved by using the sink
current control of the low-side MOSFET, which has four
internally set sinking current-limit thresholds. An internal
4-bit DAC steps through these thresholds, starting from
the lowest current limit to the highest, in 128 clock cycles
on every power-up.
f
yields:
C
x ESR
O
R2 =
C
3
Set the third compensation pole at 1/2 of the switching
frequency (500kHz) to gain phase margin. Calculate
C2 as follows:
1
C2 =
π x R1 x f
S
______________________________________________________________________________________ 13
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
PCB Layout Considerations and
Pin Configuration
Thermal Performance
Careful PCB layout is critical to achieve clean and stable
(BUMPS ON BOTTOM)
operation. It is highly recommended to duplicate the
MAX15040 evaluation kit layout for optimum performance.
If deviation is necessary, follow these guidelines for good
PCB layout:
TOP VIEW
1) Connect input and output capacitors to the power
ground plane; connect all other capacitors to the sig-
nal ground plane.
GND
A1
GND
IN
IN
A2
A3
A4
MAX1540
LX
B1
LX
B2
LX
B3
V
DD
2) Place capacitors on V , IN, and REFIN/SS as close
DD
as possible to the device and the corresponding
bump using direct traces. Keep power ground plane
and signal ground plane separate.
B4
BST
C1
I.C.
C2
I.C.
C3
EN
C4
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the out-
put capacitors, and the input capacitors.
PWRGD
D1
FB
D2
COMP REFIN/SS
D3
D4
4) Connect IN, LX, and GND separately to a large
copper area to help cool the device to further
improve efficiency and long-term reliability.
WLP
5) Ensure all feedback connections are short. Place
the feedback resistors and compensation compo-
nents as close to the device as possible.
6) Route high-speed switching nodes, such as LX and
BST, away from sensitive analog areas (FB, COMP).
Chip Information
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PROCESS: BiCMOS
PACKAGE
TYPE
16 WLP
PACKAGE
CODE
W162B2+1
OUTLINE
NO.
21-0200
LAND
PATTERN NO.
—
14 ______________________________________________________________________________________
High-Efficiency, 4A, Step-Down Regulator with
Integrated Switches in 2mm x 2mm Package
MAX1540
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
2
1/09
5/10
7/10
Initial release
—
1–4
2
Revised the Absolute Maximum Ratings and Electrical Characteristics.
Revised the Absolute Maximum Ratings.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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