MAX15058EWL+T [MAXIM]

Battery Charge Controller, Current-mode, 3A, 1150kHz Switching Freq-Max, BICMOS, PBGA9,;
MAX15058EWL+T
型号: MAX15058EWL+T
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Battery Charge Controller, Current-mode, 3A, 1150kHz Switching Freq-Max, BICMOS, PBGA9,

电池 信息通信管理
文件: 总22页 (文件大小:1338K)
中文:  中文翻译
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EVALUATION KIT AVAILABLE  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
General Description  
Features  
Internal 30mΩ (typ) R  
The MAX15058 high-efficiency, current-mode, synchro-  
nous step-down switching regulator with integrated power  
switches delivers up to 3A of output current. The device  
operates from 2.7V to 5.5V and provides an output volt-  
age from 0.6V up to 94% of the input voltage, making  
the device ideal for distributed power systems, portable  
devices, and preregulation applications.  
High-Side and 18mΩ  
DS(ON)  
(typ) Low-Side MOSFETs at 5V  
Continuous 3A Output Current Over Temperature  
95% Efficiency with 3.3V Output at 3A  
1% Output Voltage Accuracy Over Load, Line, and  
Temperature  
Operates from 2.7V to 5.5V Supply  
Cycle-by-Cycle Overcurrent Protection  
The MAX15058 utilizes a current-mode control architec-  
ture with a high-gain transconductance error amplifier.  
The current-mode control architecture facilitates easy  
compensation design and ensures cycle-by-cycle current  
limit with fast response to line and load transients.  
Adjustable Output from 0.6V to Up to 0.94 x V  
Programmable Soft-Start  
IN  
Factory-Trimmed, 1MHz Switching Frequency  
The MAX15058 offers selectable skip-mode functional-  
ity to reduce current consumption and achieve a higher  
Stable with Low-ESR Ceramic Output Capacitors  
Safe-Startup Into Prebiased Output  
External Reference Input  
efficiency at light output load. The low R  
integrated  
DS(ON)  
switches ensure high efficiency at heavy loads while  
minimizing critical inductances, making the layout design  
a much simpler task with respect to discrete solutions.  
Utilizing a simple layout and footprint assures first-pass  
success in new designs.  
Skip-Mode Functionality  
Enable Input/Power-Good Output  
Fully Protected Against Overcurrent and  
The MAX15058 features a 1MHz, factory-trimmed, fixed-  
frequency PWM mode operation. The high switching fre-  
quency, along with the PWM current-mode architecture,  
allows for a compact, all-ceramic capacitor design.  
Overtemperature  
Input Undervoltage Lockout  
Ordering Information  
The MAX15058 offers a capacitor-programmable soft-  
start reducing inrush current, startup into PREBIAS opera-  
tions, and a PGOOD open-drain output that can be used  
as an interrupt and for power sequencing.  
PART  
TEMP RANGE  
PIN-PACKAGE  
MAX15058EWL+  
-40°C to +85°C  
9 WLP  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
The MAX15058 is available in a 9-bump (3 x 3 array),  
1.5mm x 1.5mm WLP package and is specified over the  
-40°C to +85°C temperature range.  
Typical Operating Circuit  
INPUT  
OUTPUT  
1.8V/3A  
2.8V TO 5.5V  
IN  
LX  
Applications  
Distributed Power Systems  
Preregulators for Linear Regulators  
Portable Devices  
Notebook Power  
Server Power  
MAX15058  
GND  
PGOOD  
FB  
ON  
EN  
ENABLE  
OFF  
COMP  
SKIP  
IP Phones  
SS/REFIN  
19-5478; Rev 2; 7/11  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Absolute Maximum Ratings  
IN, PGOOD to GND ................................................-0.3V to +6V  
Continuous Power Dissipation (T = +70°C)  
A
LX to GND..................................................-0.3V to (V + 0.3V)  
9-Bump WLP Multilayer Board  
IN  
LX to GND...................................... -1V to (V + 0.3V) for 50ns  
(derate 14.1mW/°C above T = +70°C)....................1127mW  
IN  
A
EN, COMP, FB, SS/REFIN, SKIP to GND .-0.3V to (V + 0.3V)  
LX Current (Note 1).................................................... -6A to +6A  
Output Short-Circuit Duration....................................Continuous  
Operating Temperature Range........................... -40°C to +85°C  
Storage Temperature Range............................ -65°C to +150°C  
Soldering Temperature (reflow).......................................+260°C  
IN  
Note 1: LX has internal clamp diodes to GND and IN. Applications that forward bias these diodes should not exceed the IC’s pack-  
age power dissipation limits.  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these  
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect  
device reliability.  
Package Information  
PACKAGE TYPE: 9 WLP  
Package Code  
W91E1Z+1  
Outline Number  
21-0508  
Land Pattern Number  
Refer to Application Note 1891  
THERMAL RESISTANCE, FOUR-LAYER BOARD  
Junction to Ambient (θ  
)
71°C/W  
26°C/W  
JA  
Junction to Case (θ  
)
JC  
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,  
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing  
pertains to the package regardless of RoHS status.  
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For  
detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial  
.
Maxim Integrated  
2  
www.maximintegrated.com  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Electrical Characteristics  
(V = 5V, T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 2)  
IN  
A
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
5.5  
2
UNITS  
V
IN Voltage Range  
V
2.7  
IN  
IN Shutdown Supply Current  
IN Supply Current  
V
V
= 0V  
0.2  
µA  
EN  
I
= 5V, V = 0.65V, no switching  
1.56  
2.3  
mA  
IN  
EN  
FB  
V
Undervoltage Lockout  
IN  
LX starts switching, V rising  
2.6  
2.7  
V
IN  
Threshold  
V
Undervoltage Lockout  
IN  
LX stops switching, V falling  
IN  
200  
mV  
Hysteresis  
ERROR AMPLIFIER  
Transconductance  
Voltage Gain  
g
1.5  
90  
mS  
dB  
MV  
A
VEA  
FB Set-Point Accuracy  
FB Input Bias Current  
V
Over line, load, and temperature  
594  
600  
606  
mV  
nA  
FB  
I
V
= 0.6V  
-500  
+500  
FB  
FB  
COMP to Current-Sense  
Transconductance  
g
18  
A/V  
V
MC  
COMP Clamp Low  
V
= 0.65V, V = 0.6V  
SS  
0.94  
FB  
POWER SWITCHES  
LX On-Resistance, High-Side  
pMOS  
30  
18  
5
mΩ  
mΩ  
A
LX On-Resistance, Low-Side  
nMOS  
High-Side Switch Current-Limit  
Threshold  
I
HSCL  
Low-Side Switch Sink Current-  
Limit Threshold  
4
A
Low-Side Switch Source Current-  
Limit Threshold  
5
A
LX Leakage Current  
RMS LX Output current  
OSCILLATOR  
V
= 0V  
10  
µA  
A
EN  
3
Switching Frequency  
Maximum Duty Cycle  
Minimum Controllable On-Time  
f
850  
1000  
94  
1150  
kHz  
%
SW  
D
MAX  
70  
ns  
Slope Compensation Ramp  
Valley  
1.15  
320  
V
Slope Compensation Ramp  
Amplitude  
V
Extrapolated to 100% duty cycle  
mV  
SLOPE  
Maxim Integrated  
3  
www.maximintegrated.com  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Electrical Characteristics (continued)  
(V = 5V, T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 2)  
IN  
A
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
ENABLE  
EN Input High Threshold Voltage  
EN Input Low Threshold Voltage  
EN Input Leakage Current  
V
V
V
V
rising  
falling  
= 5V  
1.45  
V
V
EN  
0.4  
EN  
0.025  
25  
µA  
µA  
EN  
SKIP Input Leakage Current  
SOFT-START, PREBIAS, REFIN  
Soft-Start Current  
= V  
= 5V  
SKIP  
EN  
I
V
= 0.45V, sourcing  
= 10mA, sinking  
10  
µA  
SS  
SS/REFIN  
SS/REFIN Discharge Resistance  
R
I
8.3  
SS  
SS/REFIN  
SS/REFIN Prebias Mode Stop  
Voltage  
V
rising  
0.58  
V
V
SS/REFIN  
External Reference Input Range  
0
IN - 1.8  
HICCUP  
Number of Consecutive Current-  
Limit Events to Hiccup  
8
Events  
Clock  
Cycles  
Timeout  
1024  
POWER-GOOD OUTPUT  
PGOOD Threshold  
V
V
rising  
falling  
0.535  
0.555  
28  
0.575  
60  
V
FB  
PGOOD Threshold Hysteresis  
mV  
mV  
µA  
FB  
PGOOD V  
I
= 5mA, V = 0.5V  
20  
OL  
PGOOD  
FB  
PGOOD Leakage  
V
= 5V, V = 0.65V  
0.013  
PGOOD  
FB  
THERMAL SHUTDOWN  
Thermal Shutdown Threshold  
Thermal Shutdown Hysteresis  
150  
20  
°C  
°C  
Temperature falling  
Note 2: Specifications are 100% production tested at T = +25°C. Limits over the operating temperature range are guaranteed by  
A
design and characterization.  
Maxim Integrated  
4  
www.maximintegrated.com  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Typical Operating Characteristics  
(V = 5V, V  
= 1.8V, I  
= 3A, Circuit of Figure 5, T = +25°C, unless otherwise noted.)  
IN  
OUT  
LOAD  
A
EFFICIENCY vs. LOAD CURRENT  
(SKIP MODE)  
EFFICIENCY vs. LOAD CURRENT  
(PWM MODE)  
EFFICIENCY vs. OUTPUT CURRENT  
(FORCED PWM)  
100  
95  
90  
85  
80  
75  
70  
100  
95  
90  
85  
80  
75  
100  
95  
90  
85  
80  
75  
V
= 3.3V  
V
= 2.5V  
OUT  
OUT  
V
= 2.5V  
OUT  
V
= 1.5V  
OUT  
V = 1.8V  
OUT  
V
OUT  
= 1.8V  
V
= 1.8V  
V
= 1.5V  
OUT  
OUT  
V
OUT  
= 1.2V  
V
= 1.5V  
OUT  
V
= 1.2V  
V
= 2.5V  
OUT  
OUT  
V
= 1.2V  
OUT  
V
= 3.3V  
OUT  
V
= 5V  
V
IN  
= 5V  
V
= 3.3V  
IN  
IN  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
2.7  
0
OUTPUT CURRENT (A)  
OUTPUT CURRENT (A)  
OUTPUT CURRENT (A)  
EFFICIENCY vs. OUTPUT CURRENT  
(SKIP MODE)  
SWITCHING FREQUENCY  
vs. INPUT VOLTAGE  
100  
95  
90  
85  
80  
75  
1100  
V
= 2.5V  
OUT  
1080  
1060  
1040  
1020  
1000  
980  
V
OUT  
= 1.8V  
V
= 1.5V  
OUT  
V
= 1.2V  
OUT  
960  
940  
920  
V
= 3.3V  
IN  
900  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.2  
3.7  
4.2  
4.7  
5.2  
OUTPUT CURRENT (A)  
INPUT VOLTAGE (V)  
OUTPUT VOLTAGE  
vs. SUPPLY VOLTAGE  
OUTPUT VOLTAGE  
vs. OUTPUT CURRENT  
1.89  
1.87  
1.85  
1.83  
1.81  
1.79  
1.77  
1.75  
1.89  
1.87  
1.85  
1.83  
1.81  
1.79  
1.77  
1.75  
V
= 3.3V  
= 5V  
OUT  
V
OUT  
I
= 0.5A  
OUT  
2.7  
3.2  
3.7  
4.2  
4.7  
5.2  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
SUPPLY VOLTAGE (V)  
OUTPUT CURRENT (A)  
Maxim Integrated  
5  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Typical Operating Characteristics (continued)  
(V = 5V, V  
= 1.8V, I  
= 3A, Circuit of Figure 5, T = +25°C, unless otherwise noted.)  
IN  
OUT  
LOAD A  
LOAD-TRANSIENT RESPONSE  
SWITCHING WAVEFORMS (I  
= 3A)  
OUT  
MAX15058 toc08  
MAX15058 toc09a  
V
OUT  
20mV/div  
AC-COUPLED  
50mV/div  
AC-COUPLED  
I
LX  
1AV/div  
1A/div  
0A  
V
LX  
5V/div  
100µs/div  
400ns/div  
SWITCHING WAVEFORM IN SKIP MODE  
(I = 10mA)  
SWITCHING WAVEFORMS (I  
= 3A)  
OUT  
OUT  
MAX15058 toc09b  
MAX15058 toc10  
V
OUT  
20mV/div  
AC-COUPLED  
V
OUT  
50mV/div  
AC-COUPLED  
I
LX  
1AV/div  
I
LX  
1A/div  
0A  
V
LX  
V
LX  
5V/div  
5V/div  
V
IN  
= 3.3V  
400ns/div  
10µs/div  
INPUT AND OUTPUT  
WAVEFORMS (I  
= 3A)  
SHUTDOWN WAVEFORM  
MAX15058 toc12  
OUT  
MAX15058 toc11  
V
ENABLE  
5V/div  
INPUT  
20mV/div  
AC-COUPLED  
V
OUT  
1V/div  
I
LX  
OUTPUT  
100mV/div  
AC-COUPLED  
1A/div  
V
PGOOD  
5V/div  
400ns/div  
10µs/div  
Maxim Integrated  
6  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Typical Operating Characteristics (continued)  
(V = 5V, V  
= 1.8V, I  
= 3A, Circuit of Figure 5, T = +25°C, unless otherwise noted.)  
IN  
OUT  
LOAD A  
SOFT-START WAVEFORMS  
(PWM MODE) (I = 3A)  
SOFT-START WAVEFORMS  
(SKIP MODE) (I = 3A)  
OUT  
OUT  
MAX15058 toc13a  
MAX15058 toc13b  
V
V
ENABLE  
ENABLE  
5V/div  
5V/div  
V
OUT  
V
OUT  
1V/div  
1V/div  
I
LX  
I
LX  
1A/div  
1A/div  
V
V
PGOOD  
PGOOD  
5V/div  
5V/div  
200µs/div  
200µs/div  
SHUTDOWN CURRENT  
vs. INPUT VOLTAGE  
SHORT-CIRCUIT HICCUP MODE  
MAX15058 toc15  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
V
EN  
= 0V  
I
IN  
500mA/div  
V
OUT  
200mV/div  
I
OUT  
5A/div  
2.7  
3.2  
3.7  
4.2  
4.7  
5.2  
200µs/div  
INPUT VOLTAGE (V)  
RMS INPUT CURRENT  
vs. INPUT VOLTAGE  
FB VOLTAGE vs. TEMPERATURE  
606  
604  
602  
600  
598  
596  
594  
200  
160  
120  
80  
40  
NO LOAD  
SHORT CIRCUIT ON OUTPUT  
0
-40 -20  
0
20  
40  
60  
80  
2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5  
INPUT VOLTAGE (V)  
AMBIENT TEMPERATURE (°C)  
Maxim Integrated  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Typical Operating Characteristics (continued)  
(V = 5V, V  
= 1.8V, I  
= 3A, Circuit of Figure 5, T = +25°C, unless otherwise noted.)  
IN  
OUT  
LOAD A  
SOFT-START WAVEFORMS  
(EXTERNAL REFIN) (PWM MODE)  
SOFT-START WAVEFORMS  
(EXTERNAL REFIN) (SKIP MODE)  
MAX15058 toc18a  
MAX15058 toc18b  
V
V
SS/REFIN  
SS/REFIN  
500mV/div  
500mV/div  
V
OUT  
V
OUT  
1V/div  
1V/div  
NO LOAD  
NO LOAD  
I
LX  
I
LX  
1A/div  
1A/div  
V
V
PGOOD  
PGOOD  
5V/div  
5V/div  
200µs/div  
200µs/div  
STARTING INTO A PREBIASED OUTPUT  
(I = 2A)  
STARTING INTO A PREBIASED OUTPUT  
(NO LOAD)  
OUT  
MAX15058 toc19  
MAX15058 toc20a  
V
ENABLE  
V
ENABLE  
5V/div  
5V/div  
V
OUT  
V
OUT  
1V/div  
1V/div  
I
LX  
I
LX  
1A/div  
1A/div  
V
PGOOD  
V
PGOOD  
PWM MODE  
PWM MODE  
200µs/div  
5V/div  
5V/div  
200µs/div  
STARTING INTO A PREBIASED OUTPUT  
STARTING INTO A PREBIASED OUTPUT  
(NO LOAD)  
HIGHER THAN SET OUTPUT  
MAX15058 toc20b  
MAX15058 toc21  
1.8V  
V
OUT  
V
ENABLE  
500mV/div  
5V/div  
V
OUT  
1V/div  
I
L
1A/div  
I
LX  
1A/div  
V
SS/REFIN  
500mV/div  
V
PGOOD  
5V/div  
SKIP MODE  
10LOAD AT OUT  
200µs/div  
400µs/div  
Maxim Integrated  
8  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Typical Operating Characteristics (continued)  
(V = 5V, V  
= 1.8V, I  
= 3A, Circuit of Figure 5, T = +25°C, unless otherwise noted.)  
IN  
OUT  
LOAD A  
CASE TEMPERATURE  
vs. AMBIENT TEMPERATURE  
INPUT CURRENT IN SKIP MODE  
vs. OUTPUT VOLTAGE  
100  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
NO LOAD  
80  
60  
40  
20  
0
V
V
= 5.0V  
CC  
= 3.3V  
2.2  
CC  
-20  
-40  
-40  
-20  
0
20  
40  
60  
80  
1.2  
1.7  
2.7  
3.2  
AMBIENT TEMPERATURE (°C)  
OUTPUT VOLTAGE (V)  
Maxim Integrated  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Pin Configuration  
TOP VIEW  
(BUMPS ON BOTTOM)  
MAX15058  
GND  
LX  
A2  
IN  
A1  
A3  
COMP  
B1  
SKIP  
B2  
EN  
B3  
FB  
C1  
SS/REFIN PGOOD  
C2  
C3  
WLP  
Pin Description  
BUMP  
NAME  
FUNCTION  
Analog Ground/Low-Side Switch Source Terminal. Connect to the PCB copper plane at one point near the  
input bypass capacitor return terminal.  
A1  
GND  
Inductor Connection. Connect LX to the switched side of the inductor. LX is high impedance when the IC is  
in shutdown mode.  
A2  
A3  
LX  
IN  
Input Power Supply. Input supply range is from 2.7V to 5.5V. Bypass with a minimum 10µF ceramic capacitor  
to GND. See Figures 5 and 6.  
Voltage Error-Amplifier Output. Connect the necessary compensation network from COMP to GND. See  
the Closing the Loop: Designing the Compensation Circuitry section.  
B1  
B2  
B3  
COMP  
SKIP  
EN  
Skip-Mode Input. Connect to EN to select skip mode or leave unconnected for normal operation.  
Enable Input. EN is a digital input that turns the regulator on and off. Drive EN high to turn on the regulator.  
Connect to IN for always-on operation.  
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to set  
C1  
C2  
C3  
FB  
the output voltage from 0.6V up to 94% of V  
.
IN  
Soft-Start/External Voltage Reference Input. Connect a capacitor from SS/REFIN to GND to set the startup  
SS/REFIN time. See the Setting the Soft-Start Time section for details on setting the soft-start time. Apply a voltage  
reference from 0V to V - 1.5V to drive soft-start externally.  
IN  
Open-Drain Power-Good Output. PGOOD goes high when FB is above 555mV and pulls low if FB is below  
527mV.  
PGOOD  
Maxim Integrated  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Block Diagram  
SKIP  
EN  
IN  
HIGH-SIDE  
CURRENT LIMIT  
SHDN  
SKPM  
BIAS  
GENERATOR  
EN LOGIC, IN UVLO  
THERMAL SHDN  
SKIP-MODE  
LOGIC  
LX  
VOLTAGE  
REFERENCE  
CURRENT-SENSE  
AMPLIFIER  
LX  
IN  
IN  
STRONG PREBIASED  
FORCED START  
SKPM  
CK  
0.58V  
LX  
CONTROL  
LOGIC  
SS/REFIN  
IN  
SS/REFIN BUFFER  
0.6V  
GND  
10µA  
LOW-SIDE SOURCE-SINK  
CURRENT LIMIT AND ZERO-  
CROSSING COMPARATOR  
PWM  
COMPARATOR  
ERROR AMPLIFIER  
SINK  
SOURCE  
FB  
ZX  
COMP  
RAMP  
CK  
SKPM  
OSCILLATOR  
RAMP GEN  
MAX15058  
PGOOD  
POWER-GOOD  
COMPARATOR  
0.555V RISING,  
0.527V FALLING  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
reached. The low-side MOSFET turns on for the remain-  
der of the oscillation cycle.  
Detailed Description  
The MAX15058 high-efficiency, current-mode switch-  
ing regulator can deliver up to 3A of output current. The  
MAX15058 provides output voltages from 0.6V to 0.94 x  
Starting into a Prebiased Output  
The MAX15058 can soft-start into a prebiased output  
without discharging the output capacitor. In safe pre-  
biased startup, both low-side and high-side MOSFETs  
remain off to avoid discharging the prebiased output.  
PWM operation starts when the voltage on SS/REFIN  
crosses the voltage on FB.  
V
IN  
from 2.7V to 5.5V input supplies, making the device  
ideal for on-board point-of-load applications.  
The MAX15058 delivers current-mode control architec-  
ture using a high-gain transconductance error amplifier.  
The current-mode control architecture facilitates easy  
compensation design and ensures cycle-by-cycle current  
limit with fast response to line and load transients.  
The MAX15058 can start into a prebiased voltage higher  
than the nominal set point without abruptly discharging  
the output. Forced PWM operation starts when the SS/  
REFIN voltage reaches 0.58V (typ), forcing the converter  
to start. In case of prebiased output, below or above the  
output nominal set point, if low-side sink current-limit  
threshold (set to the reduced value of -0.4A (typ) for the  
first 32 clock cycles and then set to -5A (typ)) is reached,  
the low-side switch turns off before the end of the clock  
period, and the high-side switch turns on until one of the  
following conditions is satisfied:  
The MAX15058 features a 1MHz fixed switching frequen-  
cy, allowing for all-ceramic capacitor designs and fast  
transient responses. The high operating frequency mini-  
mizes the size of external components. The MAX15058 is  
available in a 1.5mm x 1.5mm (3 x 3 array) x 0.5mm pitch  
WLP package.  
The MAX15058 offers a selectable skip-mode functional-  
ity to reduce current consumption and achieve a higher  
efficiency at light output loads. The low R  
inte-  
DS(ON)  
grated switches (30mΩ high-side and 18mΩ low-side, typ)  
ensure high efficiency at heavy loads while minimizing  
critical inductances, making the layout design a much  
simpler task with respect to discrete solutions. Utilizing a  
simple layout and footprint assures first-pass success in  
new designs.  
High-side source current hits the reduced high-side  
current limit (0.4A, typ); in this case, the high-side  
switch is turned off for the remaining time of the clock  
period.  
The clock period ends. Reduced high-side current  
limit is activated to recirculate the current into the  
high-side power switch rather than into the internal  
high-side body diode, which could be damaged. Low-  
side sink current limit is provided to protect the low-  
side switch from excessive reverse current during  
prebiased operation.  
The MAX15058 features 1MHz ±15%, factory-trimmed,  
fixed-frequency PWM mode operation. The MAX15058  
also offers capacitor-programmable, soft-start reducing  
inrush current, startup into PREBIAS operation, and a  
PGOOD open-drain output for sequencing with other  
devices.  
In skip mode operation, the prebias output needs to be  
lower than the set point.  
Controller Function—PWM Logic  
The controller logic block is the central processor that  
determines the duty cycle of the high-side MOSFET  
under different line, load, and temperature conditions.  
Under normal operation, where the current-limit and  
temperature protection are not triggered, the controller  
logic block takes the output from the PWM comparator  
and generates the driver signals for both high-side and  
low-side MOSFETs. The control logic block controls the  
break-before-make logic and all the necessary timing.  
Enable Input  
The MAX15058 features independent device enable con-  
trol and power-good signal that allow for flexible power  
sequencing. Drive the enable input (EN) high to enable  
the regulator, or connect EN to IN for always-on opera-  
tion. Power-good (PGOOD) is an open-drain output that  
asserts when V  
is above 555mV (typ), and deasserts  
FB  
low if V is below 527mV (typ).  
FB  
Programmable Soft-Start (SS/REFIN)  
The high-side MOSFET turns on at the beginning of the  
oscillator cycle and turns off when the COMP voltage  
crosses the internal current-mode ramp waveform, which  
is the sum of the slope compensation ramp and the  
current-mode ramp derived from inductor current (current-  
sense block). The high-side MOSFET also turns off if the  
maximum duty cycle is 94%, or when the current limit is  
The MAX15058 utilizes a soft-start feature to slowly ramp  
up the regulated output voltage to reduce input inrush cur-  
rent during startup. Connect a capacitor from SS/REFIN  
to GND to set the startup time (see the Setting the Soft-  
Start Time section for capacitor selection details).  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
200mA (typ). The inductor current does not become nega-  
tive. If during a clock cycle the inductor current falls below  
Error Amplifier  
A high-gain error amplifier provides accuracy for the  
voltage-feedback loop regulation. Connect the necessary  
compensation network between COMP and GND (see  
the Compensation Design Guidelines section). The error-  
amplifier transconductance is 1.5mS (typ). COMP clamp  
low is set to 0.94V (typ), just below the slope ramp com-  
pensation valley, helping COMP to rapidly return to the  
correct set point during load and line transients.  
the 200mA threshold (during off-time), the low side turns  
off. At the next clock cycle, if the output voltage is above  
set point, the PWM logic keeps both high-side and low-  
side MOSFETs off. If instead the output voltage is below  
the set point, the PWM logic drives the high-side on for a  
minimum fixed on-time (300ns typ). In this way the system  
can skip cycles, reducing frequency of operations, and  
switches only as needed to service load at the cost of  
an increase in output voltage ripple (see the Skip Mode  
Frequency and Output Ripple section). In skip mode,  
power dissipation is reduced and efficiency is improved  
at light loads because power MOSFETs do not switch at  
every clock cycle.  
PWM Comparator  
The PWM comparator compares COMP voltage to the  
current-derived ramp waveform (LX current to COMP volt-  
age transconductance value is 18A/V typ). To avoid insta-  
bility due to subharmonic oscillations when the duty cycle  
is around 50% or higher, a slope compensation ramp is  
added to the current-derived ramp waveform. Confirm  
the compensation ramp slope (0.3V x 1MHz = 0.3V/µs)  
is equivalent to half the inductor current downslope in the  
worst case (load 3A, current ripple 30% and maximum  
duty-cycle operation of 94%). The slope compensation  
ramp valley is set to 1.15V (typ).  
Applications Information  
Setting the Output Voltage  
The MAX15058 output voltage is adjustable from 0.6V  
up to 94% of V by connecting FB to the center tap of a  
IN  
resistor-divider between the output and GND (Figure 1).  
Choose R1 and R2 so that the DC errors due to the FB  
input bias current (±500nA) do not affect the output volt-  
age accuracy. With lower value resistors, the DC error  
is reduced, but the amount of power consumed in the  
resistor-divider increases. A typical value for R2 is 10kΩ,  
but values between 5kΩ and 50kΩ are acceptable. Once  
R2 is chosen, calculate R1 using:  
Overcurrent Protection and Hiccup  
When the converter output is shorted or the device is  
overloaded, each high-side MOSFET current-limit event  
(5A typ) turns off the high-side MOSFET and turns on  
the low-side MOSFET. On each current-limit event a 3-bit  
counter is incremented. The counter is reset after three  
consecutive high-side MOSFETs turn on without reach-  
ing current limit. If the current-limit condition persists, the  
counter fills up reaching eight events. The control logic  
then discharges SS/REFIN, stops both high-side and low-  
side MOSFETs, and waits for a hiccup period (1024 clock  
cycles typ) before attempting a new soft-start sequence.  
The hiccup mode is also enabled during soft-start time.  
VOUT  
R1 = R2×  
1  
V
FB  
where the feedback threshold voltage, V  
= 0.6V (typ).  
FB  
When regulating for an output of 0.6V in skip mode, short  
FB to OUT and keep R2 connected from FB to GND.  
Inductor Selection  
Thermal-Shutdown Protection  
A high-valued inductor results in reduced inductor ripple  
current, leading to a reduced output ripple voltage.  
However, a high-valued inductor results in either a larger  
physical size or a high series resistance (DCR) and  
a lower saturation current rating. Typically, choose an  
inductor value to produce a current ripple equal to 30%  
of load current. Choose the inductor with the following  
formula:  
The MAX15058 contains an internal thermal sensor that  
limits the total power dissipation to protect the device in  
the event of an extended thermal fault condition. When  
the die temperature exceeds +150°C (typ), the thermal  
sensor shuts down the device, turning off the DC-DC  
converter to allow the die to cool. After the die tempera-  
ture falls by 20°C (typ), the device restarts, following the  
soft-start sequence.  
Skip Mode Operation  
V
V
OUT  
OUT  
L =  
× 1−  
The MAX15058 operates in skip mode when SKIP is con-  
nected to EN. When in skip mode, LX output becomes  
high impedance when the inductor current falls below  
f
×LIR ×I  
V
SW  
LOAD  
IN   
where f  
is the internally fixed 1MHz switching frequen-  
cy, and LIR is the desired inductor current ratio (typically  
SW  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
FEEDBACK  
DIVIDER  
ERROR AMPLIFIER  
POWER MODULATOR  
SLOPE  
OUTPUT FILTER  
AND LOAD  
COMPENSATION  
RAMP  
V
IN  
V
OUT  
g
MC  
FB  
R1  
*C  
FF  
I
L
V
FB  
V
OUT  
COMP  
V
Q
HS  
LS  
I
OUT  
L
DCR  
PWM  
CONTROL  
LOGIC  
R2  
COMP  
ESR  
Q
COMPARATOR  
R
LOAD  
R
C
R
OUT  
g
MV  
C
OUT  
C
C
V
COMP  
I
OUT  
G
MOD  
AVEA(dB)/20  
= 10 /g  
R
OUT  
MV  
NOTE: THE G  
STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OF  
MOD  
REF  
THE INDUCTOR, I , INJECTED INTO THE OUTPUT LOAD, I , e.g., I = I .  
OUT OUT  
L
L
THIS CAN BE USED TO SIMPLIFY/MODEL THE MODULATION/CONTROL/POWER  
STATE CIRCUITRY SHOWN WITHIN THE BOXED AREA.  
*NOTE: C IS OPTIONAL AND DESIGNED TO EXTEND THE  
FF  
REGULATOR’S GAIN BANDWIDTH AND INCREASED PHASE  
MARGIN FOR SOME LOW-DUTY CYCLE APPLICATIONS.  
Figure 1. Peak Current-Mode Regulator Transfer Model  
set to 0.3). In addition, the peak inductor current, I  
,
to be less than 2% of the minimum input voltage, f  
is  
SW  
L_PK  
must always be below the minimum high-side current-limit  
value, I , and the inductor saturation current rating,  
the switching frequency (1MHz), and I  
is the output  
LOAD  
load. The impedance of the input capacitor at the switch-  
ing frequency should be less than that of the input source  
so high-frequency switching currents do not pass through  
the input source, but are instead shunted through the  
input capacitor.  
HSCL  
I
.
L_SAT  
Ensure that the following relationship is satisfied:  
1
I
= I  
+
I < min I  
I
(
)
L_PK  
LOAD  
L
HSCL_, L_SAT  
2
The input capacitor must meet the ripple current require-  
ment imposed by the switching currents. The RMS input  
ripple current is given by:  
Input Capacitor Selection  
The input capacitor reduces the peak current drawn from  
the input power supply and reduces switching noise in the  
device. The total input capacitance must be equal to or  
greater than the value given by the following equation to  
keep the input ripple voltage within the specification and  
minimize the high-frequency ripple current being fed back  
to the input source:  
V
× V V  
(
)
OUT  
IN  
OUT  
I
=
I
RIPPLE  
LOAD  
V
IN  
where I  
is the input RMS ripple current.  
RIPPLE  
Output Capacitor Selection  
The key selection parameters for the output capacitor are  
capacitance, ESR, ESL, and voltage rating. The param-  
eters affect the overall stability, output ripple voltage, and  
transient response of the DC-DC converter. The output  
ripple occurs due to variations in the charge stored in  
the output capacitor, the voltage drop due to the capaci-  
I
V
OUT  
V
IN  
LOAD  
C
=
×
IN  
f
× ∆V  
SW  
IN_RIPPLE  
where V  
is the maximum-allowed input ripple  
IN_RIPPLE  
voltage across the input capacitors and is recommended  
Maxim Integrated  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
tor’s ESR, and the voltage drop due to the capacitor’s  
ESL. Estimate the output-voltage ripple due to the output  
capacitance, ESR, and ESL as follows:  
on the inductor and output capacitor values. After a short  
time, the controller responds by regulating the output volt-  
age back to the predetermined value.  
Use higher C  
values for applications that require light  
OUT  
V
V
OUT  
1
OUT  
×L  
load operation or transition between heavy load and light  
load, triggering skip mode, causing output undershooting  
or overshooting. When applying the load, limit the output  
undershoot by sizing C  
formula:  
V  
=
× 1−  
× R  
+
ESR_COUT  
OUT  
f
V
8× f  
× C  
SW  
IN  
SW  
OUT   
For ceramic capacitors, ESR contribution is negligible:  
1
according to the following  
OUT  
R
<<  
ESR_OUT  
I  
8× f  
× C  
OUT  
LOAD  
x V  
OUT  
SW  
C
OUT  
3f  
CO  
For tantalum or electrolytic capacitors, ESR contribution  
is dominant:  
where I  
is the total load change, f  
is the regula-  
LOAD  
CO  
tor unity-gain bandwidth (or zero crossover frequency),  
and ∆V is the desired output undershooting. When  
removing the load and entering skip mode, the device  
cannot control output overshooting, since it has no sink  
current capability; see the Skip Mode Frequency and  
1
R
>>  
ESR_OUT  
OUT  
8× f  
× C  
OUT  
SW  
Use these equations for initial output-capacitor selec-  
tion. Determine final values by testing a prototype or an  
evaluation circuit. A smaller ripple current results in less  
output-voltage ripple. Since the inductor ripple current is  
a factor of the inductor value, the output-voltage ripple  
decreases with larger inductance. Use ceramic capacitors  
for low ESR and low ESL at the switching frequency of  
the converter. The ripple voltage due to ESL is negligible  
when using ceramic capacitors.  
Output Ripple section to properly size C  
.
OUT  
Skip Mode Frequency and Output Ripple  
In skip mode, the switching frequency (f  
) and output  
SKIP  
ripple voltage (V  
) shown in Figure 2 are cal-  
OUT-RIPPLE  
culated as follows:  
t
is a fixed time (300ns, typ); the peak inductor current  
ON  
reached is:  
Load-transient response also depends on the selected  
output capacitance. During a load transient, the output  
V
V  
L
IN  
OUT  
I
=
× t  
ON  
SKIPLIMIT  
instantly changes by ESR x I  
. Before the control-  
LOAD  
ler can respond, the output deviates further, depending  
I
L
I
SKIP-LIMIT  
I
LOAD  
t
t
t
= n × t  
OFF2 CK  
ON  
OFF1  
V
OUT  
V
OUT-RIPPLE  
Figure 2. Skip Mode Waveform  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
t
is the time needed for inductor current to reach the  
As a result, the inductor’s pole frequency is shifted  
beyond the gain bandwidth of the regulator. System  
stability is provided with the addition of a simple series  
capacitor-resistor from COMP to GND. This pole-zero  
combination serves to tailor the desired response of the  
closed-loop system. The basic regulator loop consists of a  
power modulator (comprising the regulator’s pulse-width  
modulator, current sense and slope compensation ramps,  
control circuitry, MOSFETs, and inductor), the capacitive  
output filter and load, an output feedback divider, and a  
voltage-loop error amplifier with its associated compensa-  
tion circuitry. See Figure 1.  
OFF1  
zero-current crossing limit (~0A):  
L ×I  
SKIPLIMIT  
t
=
OFF1  
V
OUT  
During t  
charge equal to (see Figure 2):  
and t , the output capacitor stores a  
OFF1  
ON  
1
1
2
L x I  
I  
SKIPLIMIT LOAD  
x
+
(
)
V
V  
V
IN  
OUT  
OUT   
Q  
=
OUT  
2
The average current through the inductor is expressed as:  
During t  
(= n x t , number of clock cycles skipped),  
CK  
OFF2  
output capacitor loses this charge:  
I
= G  
× V  
MOD COMP  
L
where I is the average inductor current and G  
is the  
MOD  
Q  
L
OUT  
t
=
OFF2  
power modulator’s transconductance.  
I
LOAD  
2
For a buck converter:  
1
1
L x I  
I  
x
+
(
)
SKIPLIMIT LOAD  
V
V  
V
OUT  
IN  
OUT  
V
= R  
×I  
LOAD L  
t
=
OUT  
OFF2  
2 xI  
LOAD  
where R  
is the equivalent load resistor value.  
LOAD  
Combining the above two relationships, the power modu-  
lator’s transfer function in terms of V with respect to  
COMP  
Finally, frequency in skip mode is:  
1
OUT  
V
is:  
f
=
SKIP  
t
+ t  
+ t  
OFF1 OFF2  
ON  
V
R
×I  
LOAD L  
OUT  
=
= R  
× G  
LOAD MOD  
V
I
L
COMP  
Output ripple in skip mode is:  
G
MOD  
V
= V  
+ V  
OUTRIPPLE  
COUTRIPPLE  
I  
ESRRIPPLE  
The peak current-mode controller’s modulator gain is  
attenuated by the equivalent divider ratio of the load  
resistance and the current-loop gain’s impedance.  
I
x t  
(
)
SKIPLIMIT  
LOAD  
ON  
=
C
OUT  
G
becomes  
+ R  
x I  
(
I  
LOAD  
MOD  
)
ESR,COUT  
SKIPLIMIT  
1
L x I  
G
DC = g  
×
MC  
SKIPLIMIT  
(
)
MOD  
V
=
+ R  
ESR,COUT  
OUTRIPPLE  
R
LOAD  
C
x V V  
(
)
)
1+  
× K × 1D 0.5  
OUT  
IN  
OUT  
(
)
S
f
×L  
SW  
x I  
(
I  
SKIPLIMIT  
LOAD  
where R  
= V  
, f  
is the switching  
LOAD  
OUT/IOUT(MAX) SW  
frequency, L is the output inductance, D is the duty cycle  
(V /V ), and K is a slope compensation factor calcu-  
lated from the following equation:  
To limit output ripple in skip mode, size C  
the above formula. All the above calculations are appli-  
cable only in skip mode.  
based on  
OUT  
OUT IN  
S
Compensation Design Guidelines  
S
V
× f  
×L × g  
MC  
SLOPE  
S
N
SLOPE SW  
K
= 1+  
= 1+  
S
The MAX15058 uses a fixed-frequency, peak-current-  
mode control scheme to provide easy compensation  
and fast transient response. The inductor peak current is  
monitored on a cycle-by-cycle basis and compared to the  
COMP voltage (output of the voltage error amplifier). The  
regulator’s duty cycle is modulated based on the induc-  
tor’s peak current value. This cycle-by-cycle control of  
the inductor current emulates a controlled current source.  
V
V  
(
)
IN OUT  
where:  
V
SLOPE  
S
=
= V  
× f  
SLOPE  
SLOPE SW  
t
SW  
V
(
V  
OUT  
)
IN  
S
=
N
L × g  
MC  
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MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
1ST ASYMPTOTE  
R2 × (R1 + R2) × 10  
-1  
AVEA(dB)/20  
-1 -1  
SW  
× g × R  
MC  
× {1 + R  
× [K × (1 - D) - 0.5] × (L × f ) }  
LOAD  
LOAD  
S
2ND ASYMPTOTE  
-1  
-1  
-1 -1  
SW  
R2 × (R1 + R2) × g × (2C ) × g × R  
× {1 + R  
× [K × (1 - D) - 0.5] × (L × f ) }  
MV  
C
MC  
LOAD  
LOAD  
S
GAIN  
3RD ASYMPTOTE  
-1  
-1  
-1 -1  
× [K × (1 - D) - 0.5] × (L × f ) } ×  
R2 × (R1 + R2) × g × (2C ) × g × R  
× {1 + R  
-1 -1 -1  
SW  
MV  
-1  
C
MC  
LOAD  
LOAD  
S
SW  
(2C  
× {R  
+ [K × (1 - D) - 0.5] × (L × f ) } )  
OUT  
LOAD  
S
4TH ASYMPTOTE  
-1  
-1 -1  
× [K × (1 - D) - 0.5] × (L × f ) } ×  
R2 × (R1 + R2) × g × R × g × R  
× {1 + R  
MV  
-1  
C
MC  
LOAD  
LOAD  
S
SW  
-1 -1 -1  
(2GC  
× {R  
+ [K × (1 - D) - 0.5] × (L × f ) } )  
OUT  
LOAD  
S
SW  
3RD POLE (DBL) 2ND ZERO  
-1  
(2C ESR)  
0.5 × f  
SW  
OUT  
UNITY  
FREQUENCY  
1ST POLE  
AVEA(dB)/20  
f
CO  
-1 -1  
)]  
MV  
[2× (10  
C
- g  
2ND POLE  
f
*
PMOD  
5TH ASYMPTOTE  
-1  
-1 -1  
× [K × (1 - D) - 0.5] × (L × f ) }  
R2 × (R1 + R2) × g × R × g × R  
× {1 + R  
SW  
×
MV  
-1  
C
MC  
LOAD  
LOAD  
-1 -1 -1  
S
SW  
1ST ZERO  
-1  
2
-2  
(2C  
× {R  
+ [K × (1 - D) - 0.5] × (L × f ) } ) × (0.5 × f ) × (2f)  
OUT  
LOAD  
S
SW  
(2C R )  
C
C
NOTE:  
AVEA(dB)/20  
-1  
R
= 10  
× g  
MV  
OUT  
-1  
-1 -1 -1  
f
= [2C  
× (ESR + {R + [K × (1 - D) - 0.5] × (L × f ) } )]  
LOAD S SW  
PMOD  
OUT  
6TH ASYMPTOTE  
-1  
-1 -1  
R2 × (R1 + R2) × g × R × g × R  
× {1 + R  
-1 -1  
× [K × (1 - D) - 0.5] × (L × f ) } ×  
LOAD S SW  
MV  
C
MC  
LOAD  
WHICH FOR  
ESR << {R  
-1  
2
-2  
ESR × {R  
+ [K × (1 - D) - 0.5] × (L × f ) } × (0.5 × f ) × (2f)  
S SW SW  
LOAD  
-1  
-1 -1  
+ [K × (1 - D) - 0.5] × (L × f ) }  
LOAD  
S
SW  
BECOMES  
-1  
-1  
-1 -1 -1  
f
f
= [2C  
= (2C  
× {R  
LOAD  
+ [K × (1 - D) - 0.5] × (L × f ) } ]  
PMOD  
PMOD  
OUT  
OUT  
S
SW  
-1  
× R  
)
+ [K × (1 - D) - 0.5] × (2C  
× L × f )  
LOAD  
S
OUT  
SW  
Figure 3. Asymptotic Loop Response of Current-Mode Regulator  
As previously mentioned, the power modulator’s dominant  
pole is a function of the parallel effects of the load resis-  
tance and the current-loop gain’s equivalent impedance:  
which can be expressed as:  
1
K
× 1D 0.5  
(
)
S
f
+
PMOD  
2π × C  
×R  
2π × f  
×L × C  
OUT  
LOAD  
SW  
OUT  
1
f
=
PMOD  
1  
K × 1D 0.5  
(
)
1
Note: Depending on the application’s specifics, the  
amplitude of the slope compensation ramp could have a  
significant impact on the modulator’s dominate pole. For  
low duty-cycle applications, it provides additional damp-  
ing (phase lag) at/near the crossover frequency (see the  
Closing the Loop: Designing the Compensation Circuitry  
section). There is no equivalent effect on the power modu-  
S
2π × C  
× ESR +   
+
OUT  
R
f
×L  
LOAD  
SW  
And knowing that the ESR is typically much smaller than  
the parallel combination of the load and the current loop:  
1  
K
× 1D 0.5  
(
)
1
S
ESR <<  
+
lator zero, f  
.
ZMOD  
R
f
× L  
LOAD  
SW  
1
1
f
= f  
=
ZESR  
ZMOD  
f
PMOD  
2π × C  
×ESR  
1  
OUT  
K
× 1D 0.5  
(
)
1
S
2π × C  
×   
+
OUT  
R
f
×L  
LOAD  
SW  
Maxim Integrated  
17  
www.maximintegrated.com  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
The effect of the inner current loop at higher frequencies  
is modeled as a double-pole (complex conjugate) fre-  
The dominant poles and zeros of the transfer loop gain  
are shown below:  
quency term, G  
(s), as shown:  
SAMPLING  
g
MV  
1
f
=
P1  
AVEA(dB)/20  
G
s =  
( )  
SAMPLING  
2π ×10  
× C  
C
2
s
s
+
+1  
1
2
π × f  
× Q  
C
f
=
SW  
π × f  
(
)
P2  
SW  
K × 1D 0.5  
(
)
1
S
1  
2π × C  
+
OUT  
where the sampling effect quality factor, Q , is:  
C
R
f
×L  
LOAD  
SW  
1
1
f
=
f
(
)
P3  
SW  
Q
=
C
2
π × K × 1D 0.5  
(
)
S
1
f
=
Z1  
And the resonant frequency is:  
ωSAMPLING(s) = π × f  
2π × C R  
C
C
1
SW  
f
=
Z2  
2π × C  
ESR  
or:  
OUT  
f
SW  
2
f
=
SAMPLING  
The order of pole-zero occurrence is:  
< f f < f f < f  
Z2  
Having defined the power modulator’s transfer function,  
the total system transfer can be written as follows (see  
Figure 3):  
f
P1 P2  
Z1  
CO  
P3  
Under heavy load, f , approaches f . Figure 3 shows  
P2  
Z1  
a graphical representation of the asymptotic system  
closed-loop response, including dominant pole and zero  
locations.  
Gain(s) = G (s) × G (s) × G  
(DC) × G  
(s) ×  
FILTER  
FF  
EA  
MOD  
(s)  
G
SAMPLING  
where:  
The loop response’s fourth asymptote (in bold, Figure 3)  
is the one of interest in establishing the desired crossover  
frequency (and determining the compensation component  
values). A lower crossover frequency provides for stable  
closed-loop operation at the expense of a slower load-  
and line-transient response. Increasing the crossover  
frequency improves the transient response at the (poten-  
tial) cost of system instability. A standard rule of thumb  
sets the crossover frequency between 1/10 and 1/5 of  
the switching frequency. First, select the passive power  
and decoupling components that meet the application’s  
requirements. Then, choose the small-signal compen-  
sation components to achieve the desired closed-loop  
frequency response and phase margin as outlined in the  
Closing the Loop: Designing the Compensation Circuitry  
section.  
sC R1+1  
R2  
(
)
FF  
G
s =  
( )  
×
FF  
sC R1|| R2 +1  
R1+ R2  
(
)
FF  
Leaving C empty, G (s) becomes:  
FF  
FF  
R2  
G
s =  
( )  
FF  
R1+ R2  
Also:  
sC R +1  
(
)
AVEA(dB)/20  
C C  
G
s = 10  
( )  
×
EA  
AVEA(dB)/20  
10  
sC  
R
+
+1  
C
C
g
MV  
which simplifies to:  
sC R +1  
(
)
AVEA(dB)/20  
C C  
G
s = 10  
( )  
×
EA  
Closing the Loop: Designing the  
Compensation Circuitry  
AVEA(dB)/20  
10  
sC  
+1  
C
g
MV  
1) Select the desired crossover frequency. Choose f  
CO  
approximately 1/10 to 1/5 of the switching frequency  
(f ).  
SW  
AVEA(dB)/20  
10  
when R <<  
C
g
MV  
2) Determine R by setting the system transfer’s fourth  
C
asymptote gain equal to unity (assuming f  
> f  
,
Z1  
sC  
ESR +1  
CO  
(
)
OUT  
G
s = R  
( )  
×
LOAD  
FILTER  
f
, and f ) where:  
1  
P2  
P1  
K × 1D 0.5  
(
)
1
S
sC  
+
+1  
OUT  
R
f
× L  
LOAD  
SW  
Maxim Integrated  
18  
www.maximintegrated.com  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Using C the zero-pole order is adjusted as follows:  
FF  
R
K
1D 0.5  
(
)
LOAD  
S
1+  
L × f  
R1+ R2  
R2  
SW  
1
1
R
=
×
× 2πf  
C
×
C
CO OUT  
f
< f f  
<
<
P1 P2  
Z1  
g
× g  
×R  
MV  
MC  
LOAD  
2πC R1 2πC (R1|| R2)  
FF  
FF  
f
< f < f  
P3 Z2  
CO  
1
Confirm the desired operation of C empirically. The  
FF  
ESR +  
K
1D 0.5  
(
)
1
phase lead of C diminishes as the output voltage is  
S
FF  
+
a smaller multiple of the reference voltage, e.g., below  
about 1V. Do not use C when V  
R
L × f  
LOAD  
SW  
= V  
.
FF  
OUT  
FB  
and where the ESR is much smaller than the parallel  
combination of the equivalent load resistance and the  
current loop impedance, e.g.,:  
Setting the Soft-Start Time  
The soft-start feature ramps up the output voltage slowly,  
reducing input inrush current during startup. Size the C  
SS  
capacitor to achieve the desired soft-start time, t , using:  
SS  
1
ESR <<  
K
1D 0.5  
(
)
1
S
I
× t  
SS  
SS  
FB  
+
C
=
SS  
R
L × f  
LOAD  
SW  
V
R
becomes:  
C
I
, the soft-start current, is 10µA (typ) and V , the out-  
SS FB  
put feedback voltage threshold, is 0.6V (typ). When using  
large C capacitance values, the high-side current  
limit can trigger during the soft-start period. To ensure the  
2πf  
× C  
R1+ R2  
R2  
CO  
OUT  
MC  
OUT  
R
=
×
C
g
× g  
MV  
correct soft-start time, t , choose C  
satisfy:  
large enough to  
SS  
SS  
3) Determine C by selecting the desired first sys-  
C
tem zero, f , based on the desired phase margin.  
Z1  
V
×I  
Typically, setting f  
ficient phase margin.  
below 1/5 of f  
provides suf-  
Z1  
CO  
OUT SS  
I  
C
>> C  
×
OUT  
SS  
(I  
) × V  
OUT  
HSCL_  
FB  
f
1
CO  
5
I
is the typical high-side MOSFET current-limit  
HSCL_  
value.  
f
=
Z1  
C
2π × C R  
C
C
An external tracking reference with steady-state value  
between 0V and V - 1.8V can be applied to SS/REFIN.  
In this case, connect an RC network from external track-  
ing reference and SS/REFIN, as shown in Figure 4. The  
recommended value for R  
therefore:  
IN  
5
C
2π × f  
×R  
C
CO  
is approximately 1kΩ. R  
SS  
SS  
is needed to ensure that, during hiccup period, SS/REFIN  
can be internally pulled down.  
4) For low duty-cycle applications, the addition of  
a phase-leading capacitor (C in Figure 1) helps  
FF  
When an external reference is connected to SS/REFIN,  
the soft-start must be provided externally.  
mitigate the phase lag of the damped half-frequency  
double pole. Adding a second zero near to but below  
the desired crossover frequency increases both the  
closed-loop phase margin and the regulator’s unity-  
gain bandwidth (crossover frequency). Select the  
capacitor as follows:  
R
SS  
V
1
REF_EXT  
SS/REFIN  
C
=
FF  
C
SS  
2π × f  
× R1|| R2  
(
)
MAX15058  
CO  
This guarantees the additional phase-leading zero  
occurs at a frequency lower than f from:  
CO  
1
Figure 4. RC Network for External Reference at SS/REFIN  
f
=
PHASE_LEAD  
2π × C ×R1  
FF  
Maxim Integrated  
19  
www.maximintegrated.com  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
INPUT  
2.8V TO 5.5V  
L
1µH  
OUT  
(ICE IN06142)  
OUTPUT  
1.8V AT 3A  
IN  
LX  
C
IN  
22µF  
1.2  
R
20kΩ  
C
PULL  
OUT  
MAX15058  
22µF x 2  
C
R
1
FF  
1nF  
100pF  
8.06kΩ  
PGOOD  
GND  
ON  
FB  
ENABLE  
EN  
OFF  
R
2
COMP  
4.02kΩ  
SKIP  
R
C
5.36kΩ  
SS/REFIN  
C
22nF  
SS  
C
1nF  
C
Figure 5. Application Circuit for PWM Mode Operation  
2) Place capacitors on IN and SS/REFIN as close as pos-  
sible to the IC and the corresponding pad using direct  
traces.  
Power Dissipation  
The MAX15058 is available in a 9-bump WLP package  
and can dissipate up to 1127mW at T = +70°C. When  
A
the die temperature exceeds +150°C, the thermal-shut-  
down protection is activated (see the Thermal-Shutdown  
Protection section).  
3) Keep the high-current paths as short and wide as  
possible. Keep the path of switching current short  
and minimize the loop area formed by LX, the output  
capacitors, and the input capacitors.  
Layout Procedure  
4) Connect IN, LX, and GND separately to a large copper  
area to help cool the IC to further improve efficiency.  
Careful PCB layout is critical to achieve clean and stable  
operation. It is highly recommended to duplicate the  
MAX15058 Evaluation Kit layout for optimum perfor-  
mance. If deviation is necessary, follow these guidelines  
for good PCB layout:  
5) Ensure all feedback connections are short and direct.  
Place the feedback resistors and compensation com-  
ponents as close as possible to the IC.  
6) Route high-speed switching nodes (such as LX) away  
from sensitive analog areas (such as FB and COMP).  
1) Connect the signal and ground planes at a single point  
immediately adjacent to the GND bump of the IC.  
Maxim Integrated  
20  
www.maximintegrated.com  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
INPUT  
2.8V TO 5.5V  
L
1µH  
OUT  
(ICE IN06142)  
OUTPUT  
1.8V AT 3A  
IN  
LX  
C
IN  
22µF  
1.2  
C
R
20kΩ  
OUT  
PULL  
MAX15058  
22µF x 2  
R
C
1
FF  
1nF  
8.06kΩ  
100pF  
PGOOD  
EN  
GND  
ON  
FB  
ENABLE  
OFF  
R
2
COMP  
4.02kΩ  
SKIP  
R
C
5.36kΩ  
SS/REFIN  
C
22nF  
SS  
C
1nF  
C
Figure 6. Application Circuit for Skip Mode Operation  
Chip Information  
PROCESS: BiCMOS  
Maxim Integrated  
21  
www.maximintegrated.com  
MAX15058  
High-Efficiency, 3A, Current-Mode Synchronous,  
Step-Down Switching Regulator  
Revision History  
REVISION  
NUMBER  
REVISION  
DATE  
PAGES  
DESCRIPTION  
CHANGED  
0
1
12/10  
3/11  
Initial release  
Revised Package Information section.  
20  
Changed the 1.65mm x 1.65mm, 9-bump package information to 1.5mm x 1.5mm,  
9-bump package information. Inserted Typical Operating Circuit on page one.  
2
7/11  
1, 11  
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.  
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses  
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)  
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.  
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.  
2011 Maxim Integrated Products, Inc.  
22  

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