MAX15061 [MAXIM]

80V, 300mW Boost Converter and Current Monitor for APD Bias Applications; 80V , 300mW boost转换器和电流监测器,用于APD偏置
MAX15061
型号: MAX15061
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

80V, 300mW Boost Converter and Current Monitor for APD Bias Applications
80V , 300mW boost转换器和电流监测器,用于APD偏置

转换器 光电二极管
文件: 总16页 (文件大小:405K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-5034; Rev 0; 10/09  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
MAX5061  
General Description  
Features  
o Input Voltage Range  
The MAX15061 consists of a constant-frequency pulse-  
width modulating (PWM) step-up DC-DC converter with  
an internal switch and a high-side current monitor with  
high-speed adjustable current limiting. This device can  
generate output voltages up to 76V and provides current  
monitoring up to 4mA (up to 300mW). The MAX15061  
can be used for a wide variety of applications such as  
avalanche photodiode biasing, PIN biasing, or varactor  
biasing, and LCD displays. The MAX15061 operates  
from 2.7V to 11V.  
+2.7V to +5.5V (Using Internal Charge Pump) or  
+5.5V to +11V  
o Wide Output-Voltage Range from (V + 1V) to 76V  
IN  
o Internal 1Ω (typ) 80V Switch  
o 300mW Boost Converter Output Power  
o Accurate 10ꢀ (500nA to 1mA) and 3.5ꢀ (1mA  
to 4mA) High-Side Current Monitor  
o Resistor-Adjustable Ultra-Fast APD Current Limit  
The constant-frequency (400kHz), current-mode PWM  
architecture provides low-noise output voltage that is  
easy to filter. A high-voltage, internal power switch  
allows this device to boost output voltages up to 76V.  
Internal soft-start circuitry limits the input current when  
the boost converter starts. The MAX15061 features a  
shutdown mode to save power.  
(1µs Response Time)  
o Open-Drain Current-Limit Indicator Flag  
o 400kHz Fixed Switching Frequency  
o Constant PWM Frequency Provides Easy Filtering  
in Low-Noise Applications  
o Internal Soft-Start  
The MAX15061 includes a current monitor with more  
than three decades of dynamic range and monitors cur-  
rent ranging from 500nA to 2mA with high accuracy.  
Resistor-adjustable current limiting protects the APD  
from optical power transients. A clamp diode protects  
the monitor’s output from overvoltage conditions. Other  
protection features include cycle-by-cycle current limit-  
ing of the boost converter switch, undervoltage lockout,  
and thermal shutdown if the die temperature reaches  
+160°C.  
o 2µA (max) Shutdown Current  
o -40°C to +125°C Temperature Range  
o Small Thermally Enhanced, 4mm x 4mm, 16-Pin  
TQFN Package  
Ordering Information  
PART  
TEMP RANGE  
PIN-PACKAGE  
MAX15061ATE+  
-40°C to +125°C  
16 TQFN-EP*  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
*EP = Exposed pad.  
The MAX15061 is available in a thermally enhanced  
4mm x 4mm, 16-pin TQFN package and operates over  
the -40°C to +125°C automotive temperature range.  
Pin Configuration  
Applications  
TOP VIEW  
Avalanche Photodiode Biasing and Monitoring  
PIN Diode Bias Supplies  
Low-Noise Varactor Diode Bias Supplies  
FBON Modules  
12  
11  
10  
9
ILIM  
8
7
6
5
BIAS 13  
SHDN 14  
GPON Modules  
CNTRL  
FB  
LCD Displays  
MAX15061  
PGND  
LX  
15  
16  
*EP  
SGND  
+
Typical Operating Circuits appear at end of data sheet.  
1
2
3
4
THIN QFN  
(4mm × 4mm)  
*CONNECT EXPOSED PAD TO SGND.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
ABSOLUTE MAXIMUM RATINGS  
PWR, IN to SGND...................................................-0.3V to +12V  
LX to PGND ............................................................-0.3V to +80V  
BIAS, APD to SGND ...............................................-0.3V to +80V  
Continuous Power Dissipation  
16-Pin TQFN (derate 25mW/°C above +70°C)..........2000mW  
Thermal Resistance (Note 1)  
SHDN to SGND............................................-0.3V to (V + 0.3V)  
θ
θ
...............................................................................40°C/W  
.................................................................................6°C/W  
IN  
JA  
JC  
CLAMP to SGND......................................-0.3V to (V  
+ 0.3V)  
BIAS  
FB, ILIM, RLIM, CP, CN, CNTRL to SGND.............-0.3V to +12V  
PGND to SGND .....................................................-0.3V to +0.3V  
Operating Temperature Range .........................-40°C to +125°C  
Junction Temperature......................................................+150°C  
Storage Temperature Range.............................-65°C to +150°C  
Lead Temperature (soldering, 10s) .................................+300°C  
MOUT to SGND....................................-0.3V to (V  
+ 0.3V)  
CLAMP  
Note 1:  
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-  
MAX5061  
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(V = V  
= 3.3V. V  
= 3.3V. C = C  
= 10μF. C = 10nF, V  
= V . V  
= 0V. V  
= V  
= 0V. V  
SGND  
= 40V.  
BIAS  
PGND  
IN  
PWR  
SHDN  
IN  
PWR  
CP  
CNTRL  
IN RLIM  
APD = unconnected. CLAMP = unconnected. ILIM = unconnected, MOUT = unconnected. T = T = -40°C to +125°C, unless other-  
A
J
wise noted. Typical values are at T = +25°C.) (Note 2)  
A
PARAMETER  
SYMBOL  
, V  
CONDITIONS  
MIN  
2.7  
TYP  
MAX  
5.5  
11  
UNITS  
Supply Voltage Range  
V
V
IN PWR  
CP connected to IN, C = open  
5.5  
CP  
V
V
C
= 1.4V, no switching  
1
2
FB  
Supply Current  
I
mA  
SUPPLY  
= 11V, V = 1.4V (no switching),  
IN  
FB  
1.2  
3
= open, CP = IN  
CP  
Undervoltage Lockout Threshold  
Undervoltage Lockout Hysteresis  
Shutdown Current  
V
V
rising  
IN  
2.375  
2.5  
2.675  
V
UVLO  
V
100  
mV  
μA  
μA  
UVLO_HYS  
I
SHDN pulled low  
2
IN_SHDN  
Bias Current During Shutdown  
BOOST CONVERTER  
I
V
= 3.3V, V = 0V  
SHDN  
30  
BIAS_SHDN  
BIAS  
Output-Voltage Adjustment  
Range  
V
+
1V  
IN  
76  
V
V
= V  
= 5V  
400  
400  
90  
IN  
PWR  
Switching Frequency  
f
kHz  
SW  
2.9V V  
2.9V V  
11V, V = V  
IN  
PWR  
PWR  
PWR  
PWR  
Maximum Duty Cycle  
FB Set-Point Voltage  
FB Input Bias Current  
D
11V, V = V  
%
V
CLK  
IN  
V
1.2201 1.245 1.2699  
100  
FB  
FB  
I
nA  
V
V
= V = 2.9V,  
IN  
= 5.5V  
PWR  
1
1
2
2
CP  
I
I
= 100mA  
= 100mA,  
LX  
V
V
= V = 5.5V,  
IN  
= 10V  
PWR  
Internal Switch On-Resistance  
R
Ω
ON  
CP  
V
V
= V = V = 5.5V  
1
1
2
2
PWR  
PWR  
IN  
CP  
LX  
V
= V  
IN  
CP  
= V = V = 11V  
IN  
CP  
Peak Switch Current Limit  
LX Leakage Current  
I
0.8  
1.2  
1.6  
1
A
LIM_LX  
V
= 76V  
μA  
LX  
2.9V V  
11V, V  
= V ,  
IN  
PWR  
PWR  
Line Regulation  
Load Regulation  
0.2  
1
%
%
I
= 4.5mA  
LOAD  
0 I  
4.5mA  
LOAD  
2
_______________________________________________________________________________________  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
MAX5061  
ELECTRICAL CHARACTERISTICS (continued)  
(V = V  
= 3.3V. V  
= 3.3V. C = C  
= 10μF. C = 10nF, V  
= V . V  
= 0V. V  
= V  
= 0V. V  
SGND  
= 40V.  
BIAS  
PGND  
IN  
PWR  
SHDN  
IN  
PWR  
CP  
CNTRL  
IN RLIM  
APD = unconnected. CLAMP = unconnected. ILIM = unconnected, MOUT = unconnected. T = T = -40°C to +125°C, unless other-  
A
J
wise noted. Typical values are at T = +25°C.) (Note 2)  
A
PARAMETER  
Soft-Start Duration  
SYMBOL  
CONDITIONS  
MIN  
TYP  
8
MAX  
UNITS  
ms  
Soft-Start Steps  
(0.25 x I  
) to I  
LIM_LX  
32  
Steps  
LIM_LX  
CONTROL INPUT (CNTRL)  
Maximum Control Input-Voltage  
Range  
FB set point is regulated to V  
1.25  
V
CNTRL  
CURRENT MONITOR  
Bias Voltage Range  
V
10  
76  
100  
3.2  
1
V
BIAS  
I
I
I
I
I
= 500nA  
= 2mA  
μA  
mA  
V
APD  
APD  
APD  
APD  
APD  
Bias Quiescent Current  
I
BIAS  
Voltage Drop  
V
DROP  
R
MOUT  
= 2mA, V  
= 500nA  
= 2.5mA  
= V  
- V  
BIAS APD  
DROP  
1
890  
1
GΩ  
MΩ  
nA  
Dynamic Output Resistance at  
MOUT  
MOUT Output Leakage  
Output Clamp Voltage  
APD is unconnected  
Forward diode current = 1mA  
V = V = 76V  
BIAS  
V
-
MOUT  
0.5  
0.73  
1
0.95  
V
nA  
V
V
CLAMP  
Output Clamp Leakage Current  
Output-Voltage Range  
CLAMP  
10V V  
is unconnected  
76V, 0 I  
1mA, clamp  
V
-
BIAS  
APD  
BIAS  
1V  
V
MOUT  
I
I
= 500nA  
= 2mA  
0.1  
0.1  
APD  
APD  
Current Gain  
I
/I  
MOUT APD  
0.0965  
-1000  
0.1035  
+1500  
I
I
= 500nA  
= 5μA to  
+300  
APD  
(ΔI  
V
/I  
)/ΔV  
,
MOUT MOUT  
BIAS  
Power-Supply Rejection Ratio  
PSRR  
= 10V to 76V  
ppm/V  
BIAS  
APD  
(Note 3)  
= 35V, R = 3.3kΩ  
LIM  
-250  
+24  
3.75  
+250  
1mA  
APD Input Current Limit  
I
V
3.15  
1
4.35  
5
mA  
mA  
LIM_APD  
APD  
Current-Limit Adjustment Range  
12.45kΩ ≥ R  
2.5kΩ  
LIM  
I
settles to within  
MOUT  
I
I
= 500nA  
= 2.5mA  
7.5  
90  
ms  
μs  
APD  
Power-Up Settling Time  
t
0.1%, 10nF connected  
from APD to ground  
S
APD  
LOGIC INPUTS/OUTPUTS  
SHDN Input-Voltage Low  
SHDN Input-Voltage High  
ILIM Output-Voltage Low  
ILIM Output Leakage Current  
THERMAL PROTECTION  
Thermal Shutdown  
V
0.8  
V
V
IL  
V
2.4  
IH  
V
I
= 2mA  
0.3  
1
V
OL  
OH  
LIM  
I
V
= 11V  
μA  
ILIM  
Temperature rising  
+160  
10  
°C  
°C  
Thermal Shutdown Hysteresis  
Note 2: All minimum/maximum parameters are tested at T = +125°C. Limits over temperature are guaranteed by design.  
A
Note 3: Guaranteed by design and not production tested.  
_______________________________________________________________________________________  
3
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
Typical Operating Characteristics  
(V  
= V = 3.3V, V  
= 70V, circuit of Figure 3 (Figure 4 for V > 5.5V), unless otherwise noted.)  
IN  
PWR  
IN  
OUT  
EFFICIENCY vs. LOAD CURRENT  
EFFICIENCY vs. LOAD CURRENT  
EFFICIENCY vs. LOAD CURRENT  
70  
60  
50  
40  
30  
20  
10  
0
70  
60  
50  
40  
30  
20  
10  
0
70  
60  
50  
40  
30  
20  
10  
0
V
= 30V  
V
OUT  
= 30V  
OUT  
MAX5061  
V
= 8V  
IN  
V
= 55V  
OUT  
V
= 55V  
OUT  
V = 3.3V  
IN  
V
= 5V  
IN  
V
= 70V  
OUT  
V
= 70V  
OUT  
V
IN  
= 3.3V  
V
= 5V  
V
3
= 70V  
OUT  
IN  
0
1
2
3
4
0
1
2
3
4
0
1
2
4
LOAD CURRENT (mA)  
LOAD CURRENT (mA)  
LOAD CURRENT (mA)  
NO-LOAD SUPPLY CURRENT  
vs. SUPPLY VOLTAGE  
MINIMUM STARTUP VOLTAGE  
vs. LOAD CURRENT  
SUPPLY CURRENT  
vs. SUPPLY VOLTAGE  
60  
50  
40  
30  
20  
10  
0
2.55  
2.54  
2.53  
2.52  
2.51  
2.50  
2.49  
2.48  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
T
A
= -40°C  
T
A
= +25°C  
T
= +85°C  
A
T
A
= +25°C  
T
= +85°C  
A
T
A
= -40°C  
T
A
= +125°C  
V
= 1.4V  
FB  
3
4
5
6
7
8
9
10 11  
0
1
2
3
4
0
1
2
3
4
5
6
7
8
9 10 11  
SUPPLY VOLTAGE (V)  
LOAD CURRENT (mA)  
SUPPLY VOLTAGE (V)  
EXITING SHUTDOWN  
ENTERING SHUTDOWN  
MAX15061 toc07  
MAX15061 toc08  
70V  
OUTPUT VOLTAGE  
50V/div  
V
OUT  
50V/div  
3V  
3V  
INDUCTOR CURRENT  
500mA/div  
I
L
0mA  
500mA/div  
0mA  
SHUTDOWN VOLTAGE  
2V/div  
V
SHDN  
0V  
2V/div  
I
= 1mA  
OUT  
I
= 1mA  
LOAD  
0V  
1ms/div  
4ms/div  
4
_______________________________________________________________________________________  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
MAX5061  
Typical Operating Characteristics (continued)  
(V  
= V = 3.3V, V  
= 70V, circuit of Figure 3 (Figure 4 for V > 5.5V), unless otherwise noted.)  
IN  
OUT  
PWR  
IN  
LIGHT-LOAD SWITCHING  
HEAVY-LOAD SWITCHING  
WAVEFORM WITH RC FILTER  
WAVEFORM WITH RC FILTER  
MAX15061 toc09  
MAX15061 toc10  
I
= 0.1mA, V  
= 70V  
I
= 4mA, V  
= 70V  
OUT  
BIAS  
OUT  
BIAS  
V
V
BIAS  
BIAS  
AC-COUPLED  
1mV/div  
AC-COUPLED  
1mV/div  
V
V
LX  
LX  
50V/div  
50V/div  
0V  
0V  
I
I
L
L
500mA/div  
0mA  
500mA/div  
0mA  
1μs/div  
1μs/div  
LX LEAKAGE CURRENT  
vs. TEMPERATURE  
LOAD-TRANSIENT RESPONSE  
LINE-TRANSIENT RESPONSE  
MAX15061 toc12  
MAX15061 toc11  
200  
CURRENT INTO  
LX PIN  
180  
160  
140  
120  
100  
80  
V
IN  
2V/div  
3.3V  
V
OUT  
AC-COUPLED  
200mV/div  
I
LOAD  
5mA/div  
0mA  
V
OUT  
AC-COUPLED  
100mV/div  
60  
40  
V
I
RISE  
= 70V  
OUT  
OUT  
V
V
= 70V  
= 3.3V  
OUT  
IN  
= 1mA  
20  
t
= 50μs  
0
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
100ms/div  
100ms/div  
TEMPERATURE (°C)  
MAXIMUM LOAD CURRENT  
vs. INPUT VOLTAGE  
BIAS CURRENT  
vs. BIAS VOLTAGE  
LOAD REGULATION  
70.0  
110  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
10  
1
69.8  
69.6  
69.4  
69.2  
69.0  
68.8  
68.6  
68.4  
68.2  
68.0  
I
= 2mA  
APD  
A
B
C
D
I
= 500nA  
APD  
0.1  
0.01  
E
F
A: V  
OUT  
D: V  
OUT  
= 30V, B: V  
= 55V, E: V  
= 35V, C: V  
= 45V,  
= 72V  
OUT  
OUT  
OUT  
OUT  
= 60V, F: V  
0
1
2
3
4
5
3
4
5
6
7
8
9
10 11  
0
10 20 30 40 50 60 70 80  
BIAS VOLTAGE (V)  
LOAD CURRENT (mA)  
INPUT VOLTAGE (V)  
_______________________________________________________________________________________  
5
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
Typical Operating Characteristics (continued)  
(V  
= V = 3.3V, V  
= 70V, circuit of Figure 3 (Figure 4 for V > 5.5V), unless otherwise noted.)  
IN  
OUT  
PWR  
IN  
BIAS CURRENT  
vs. APD CURRENT  
BIAS CURRENT  
vs. TEMPERATURE  
GAIN ERROR  
vs. APD CURRENT  
10  
1
10  
1
5
4
V
= 70V  
BIAS  
V
= 70V  
BIAS  
I
= 2mA  
APD  
3
2
MAX5061  
1
0
-1  
-2  
-3  
-4  
-5  
0.1  
0.1  
0.01  
I
= 500nA  
APD  
0.01  
0.0001 0.001  
0.01  
0.1  
1
10  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
0.1  
1
10  
100  
(μA)  
1000 10,000  
APD CURRENT (mA)  
TEMPERATURE (°C)  
I
APD  
GAIN ERROR  
GAIN ERROR  
vs. BIAS VOLTAGE  
vs. TEMPERATURE  
0.80  
0.60  
0.40  
0.20  
0
1.0  
0.5  
I
= 2mA  
I
= 500μA  
APD  
APD  
I
= 5μA  
APD  
0
I
= 50μA  
APD  
I
= 50μA  
I
= 5μA  
APD  
-0.5  
-1.0  
-1.5  
-2.0  
-2.5  
-3.0  
APD  
I
= 500nA  
APD  
-0.20  
-0.40  
-0.60  
-0.80  
I
= 500nA  
APD  
I
= 500μA  
APD  
V
= 70V  
BIAS  
I
= 2mA  
APD  
10  
20  
30  
40  
50  
60  
70  
80  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
BIAS VOLTAGE (V)  
TEMPERATURE (°C)  
APD TRANSIENT RESPONSE  
STARTUP DELAY  
MAX15061 toc22  
MAX15061 toc23  
V
APD  
AC-COUPLED  
70V  
2V/div  
V
BIAS  
20V/div  
I
APD  
3V  
2.5mA/div  
0mA  
I
MOUT  
0.25mA/div  
I
MOUT  
0mA  
20nA/div  
I
= 500nA  
APD  
0nA  
20μs/div  
200μs/div  
6
_______________________________________________________________________________________  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
MAX5061  
Typical Operating Characteristics (continued)  
(V  
= V = 3.3V, V  
= 70V, circuit of Figure 3 (Figure 4 for V > 5.5V), unless otherwise noted.)  
IN  
OUT  
PWR  
IN  
STARTUP DELAY  
STARTUP DELAY  
MAX15061 toc24  
MAX15061 toc25  
V
APD  
20V/div  
V
APD  
2V/div  
3V  
0V  
I
MOUT  
50μA/div  
I
MOUT  
20nA/div  
I
= 500nA  
APD  
I
= 2mA  
APD  
V
= 5V  
BIAS  
0nA  
0nA  
100μs/div  
100μs/div  
STARTUP DELAY  
SHORT-CIRCUIT RESPONSE  
MAX15061 toc26  
MAX15061 toc27  
I
LIM  
2V/div  
V
BIAS  
0V  
2V/div  
0V  
I
BIAS  
2mA/div  
I
MOUT  
V
= 70V  
= +85°C  
50μA/div  
BIAS  
I
V
= 2mA  
APD  
T
A
0mA  
= 5V  
BIAS  
R
= 2kΩ  
LIM  
0nA  
40μs/div  
40ms/div  
SWITCHING FREQUENCY  
vs. TEMPERATURE  
VOLTAGE DROP  
vs. APD CURRENT  
500  
480  
460  
440  
420  
400  
380  
360  
340  
320  
300  
1.40  
1.20  
1.00  
0.80  
0.60  
0.40  
0.20  
0
T
A
= +25°C  
T
A
= -40°C  
T
A
= +125°C  
T
A
= +85°C  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
0.1  
1
10  
100  
(μA)  
1000 10,000  
TEMPERATURE (°C)  
I
APD  
_______________________________________________________________________________________  
7
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
Typical Operating Characteristics (continued)  
(V  
= V = 3.3V, V  
= 70V, circuit of Figure 3 (Figure 4 for V > 5.5V), unless otherwise noted.)  
IN  
OUT  
PWR  
IN  
SWITCHING FREQUENCY  
vs. INPUT VOLTAGE  
SWITCHING FREQUENCY AND  
DUTY CYCLE vs. LOAD CURRENT  
MAX15061 toc31  
60  
50  
420  
415  
410  
405  
400  
395  
390  
385  
380  
500  
480  
460  
440  
420  
400  
380  
360  
340  
320  
300  
DUTY CYCLE  
40  
30  
MAX5061  
SWITCHING FREQUENCY  
MEASURED AT CN  
20  
10  
0
0
1
2
3
4
2
4
6
8
10  
12  
LOAD CURRENT (mA)  
INPUT VOLTAGE (V)  
FB SET-POINT VARIATION  
vs. TEMPERATURE  
APD OUTPUT RIPPLE VOLTAGE  
MAX15061 toc33  
1.277  
1.267  
V
= 2.9V  
IN  
1.257  
1.247  
1.237  
1.227  
1.217  
1.207  
V
= 5.5V  
IN  
V
APD  
FB RISING  
AC-COUPLED, 55V  
200μV/div  
V
= 2.9V  
IN  
V
= 5.5V  
IN  
FB FALLING  
-40 -25 -10  
5
20 35 50 65 80 95 110 125  
TEMPERATURE (°C)  
2μs/div  
APD OUTPUT RIPPLE VOLTAGE  
APD OUTPUT RIPPLE VOLTAGE  
MAX15061 toc34  
MAX15061 toc35  
V
V
APD  
APD  
AC-COUPLED, 55V  
AC-COUPLED, 70V  
100μV/div  
500μV/div  
0.1μF CAPACITOR CONNECTED  
0.1μF CAPACITOR CONNECTED  
FROM APD TO GND.  
FROM APD TO GND.  
2μs/div  
2μs/div  
8
_______________________________________________________________________________________  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
MAX5061  
Pin Description  
PIN  
NAME  
FUNCTION  
Boost Converter Input Voltage. PWR powers the switch driver and charge pump. Bypass PWR to PGND with a  
ceramic capacitor of 1μF minimum value.  
1
PWR  
CP  
Positive Terminal of the Charge-Pump Flying Capacitor for 2.7V to 5.5V Supply Voltage Operation. Connect  
CP to IN when the input voltage is in the 5.5V to 11V range.  
2
3
4
5
Negative Terminal of the Charge-Pump Flying Capacitor for 2.7V to 5.5V Supply Voltage Operation. Leave CN  
unconnected when the input voltage is in the 5.5V to 11V range.  
CN  
Input Supply Voltage. IN powers all blocks of the MAX15061 except the switch driver and charge pump.  
Bypass IN to PGND with a ceramic capacitor of 1μF minimum value.  
IN  
Signal Ground. Connect directly to the local ground plane. Connect SGND to PGND at a single point, typically  
near the return terminal of the output capacitor.  
SGND  
Feedback Regulation Input. Connect FB to the center tap of a resistive voltage-divider from the output (V  
)
OUT  
6
7
FB  
to SGND to set the output voltage. The FB voltage regulates to 1.245V (typ) when V  
is above 1.5V (typ)  
CNTRL  
and to V  
voltage when V  
is below 1.245V (typ).  
CNTRL  
CNTRL  
Control Input for Boost Converter Output-Voltage Programmability. Allows the feedback set-point voltage to be  
set externally by CNTRL when CNTRL is less than 1.245V. Pull CNTRL above 1.5V (typ) to use the internal  
1.245V (typ) feedback set-point voltage.  
CNTRL  
8
9
ILIM  
RLIM  
MOUT  
Open-Drain Current-Limit Indicator. ILIM asserts low when the APD current limit has been exceeded.  
Current-Limit Resistor Connection. Connect a resistor from RLIM to SGND to program the APD current-limit  
threshold.  
10  
11  
12  
Current-Monitor Output. MOUT sources a current 1/10 of I  
.
APD  
CLAMP Clamp Voltage Input. CLAMP is the external potential used for voltage clamping of MOUT.  
APD  
Reference Current Output. APD provides the source current to the cathode of the photodiode.  
Bias Voltage Input. Connect BIAS to the boost converter output (V ) either directly or through a lowpass  
OUT  
13  
14  
BIAS  
filter for ripple attenuation. BIAS provides the voltage bias for the current monitor and is the current source for  
APD.  
Active-Low Shutdown Control Input. Apply a logic-low voltage to SHDN to shut down the device and reduce  
the supply current to 2μA (max). Connect SHDN to IN for normal operation. Ensure that V  
is not greater  
SHDN  
SHDN  
than the input voltage, V  
.
IN  
Power Ground. Connect the negative terminals of the input and output capacitors to PGND. Connect PGND  
externally to SGND at a single point, typically at the return terminal of the output capacitor.  
15  
16  
PGND  
LX  
Drain of Internal 80V n-Channel DMOS. Connect inductor and diode to LX. Minimize the trace area at LX to  
reduce switching noise emission.  
Exposed Pad. Connect EP to a large contiguous copper plane at SGND potential to improve thermal  
dissipation. Do not use as the main SGND connection.  
EP  
_______________________________________________________________________________________  
9
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
Functional Diagram  
PWR  
OUTPUT ERROR AND CURRENT  
COMPARATOR  
FB  
-A  
V
REF  
MUX  
+A  
-C  
+C  
CNTRL  
SGND  
LX  
SWITCH  
CONTROL  
LOGIC  
80V  
DMOS  
PEAK CURRENT-LIMIT  
COMPARATOR  
MAX5061  
SOFT-  
START  
PGND  
REFERENCE  
COMPARATOR  
V
REF  
SWITCH  
CURRENT  
SENSE  
CLAMP  
CHARGE  
PUMP  
(DOUBLER)  
CN  
CP  
THERMAL  
SHUTDOWN  
1x  
MOUT  
RLIM  
V
REF  
CURRENT-  
LIMIT  
ADJUSTMENT  
MAX15061  
CURRENT  
MONITOR  
BIAS AND  
REFERENCE  
10x  
CURRENT  
LIMIT  
CLK  
APD  
ILIM  
IN  
UVLO  
OSCILLATOR  
400kHz  
SHDN  
BIAS  
because there is a conduction path between the out-  
put, diode, and switch to ground during the time need-  
ed for the diode to turn off and reverse its bias voltage.  
To reduce the output noise even further, the LX switch  
turns off by taking 10ns typically to transition from ON  
to OFF. As a consequence, the positive slew rate of the  
LX node is reduced and the current from the inductor  
does not “force” the output voltage as hard as would  
be the case if the LX switch were to turn off faster.  
Detailed Description  
The MAX15061 constant-frequency, current-mode, PWM  
boost converter is intended for low-voltage systems that  
require a locally generated high voltage. This device can  
generate a low-noise, high output voltage required for  
PIN and varactor diode biasing and LCD displays. The  
MAX15061 operates either from +2.7V to +5.5V or from  
+5.5V to +11V. For 2.7V to 5.5V operation, an internal  
charge pump with an external 10nF ceramic capacitor is  
used. For 5.5V to 11V operation, connect CP to IN and  
leave CN unconnected.  
The constant-frequency (400kHz) PWM architecture  
generates an output voltage ripple that is easy to filter.  
An 80V vertical DMOS device used as the internal  
power switch is ideal for boost converters with output  
voltages up to 76V. The MAX15061 can also be used in  
other topologies where the PWM switch is grounded,  
like SEPIC and flyback converters.  
The MAX15061 operates in discontinuous mode in  
order to reduce the switching noise caused by reverse-  
voltage recovery charge of the rectifier diode. Other  
continuous mode boost converters generate large volt-  
age spikes at the output when the LX switch turns on  
10 ______________________________________________________________________________________  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
MAX5061  
The MAX15061 includes a versatile current monitor  
The APD current-monitor range is from 500nA to 4mA,  
and the MOUT current-mirror output accuracy is 10%  
from 500nA to 1mA of APD current and 3.5% from  
1mA to 4mA of APD current.  
intended for monitoring the APD, PIN, or varactor diode  
DC current in fiber and other applications. The  
MAX15061 features more than three decades of  
dynamic current ranging from 500nA to 4mA and pro-  
vides an output current accurately proportional to the  
APD current at MOUT.  
Clamping the Monitor  
Output Voltage (CLAMP)  
CLAMP provides a means for diode clamping the volt-  
The MAX15061 also features a shutdown logic input to  
disable the device and reduce its standby current to  
2μA (max).  
age at MOUT; thus, V  
is limited to (V  
+
CLAMP  
MOUT  
0.6V). CLAMP can be connected to either an external  
supply or BIAS. CLAMP can be left unconnected if volt-  
age clamping is not required.  
Fixed-Frequency PWM Controller  
The heart of the MAX15061 current-mode PWM con-  
troller is a BiCMOS multiple-input comparator that  
simultaneously processes the output-error signal and  
switch current signal. The main PWM comparator uses  
direct summing, lacking a traditional error amplifier and  
its associated phase shift. The direct summing configu-  
ration approaches ideal cycle-by-cycle control over the  
output voltage since there is no conventional error  
amplifier in the feedback path.  
Adjusting the Boost Converter  
Output Voltage (FB/CNTRL)  
The boost converter output voltage can be set by con-  
necting FB to a resistor-divider from V  
to ground.  
OUT  
The set-point feedback reference is the 1.245 (typ)  
internal reference voltage when V  
> 1.5V and is  
< 1.25V.  
CNTRL  
equal to the CNTRL voltage when V  
CNTRL  
To change the converter output on the fly, apply a volt-  
age lower than 1.25V (typ) to the CNTRL input and  
adjust the CNTRL voltage, which is the reference input  
The device operates in PWM mode using a fixed-fre-  
quency, current-mode operation. The current-mode fre-  
quency loop regulates the peak inductor current as a  
function of the output error signal.  
of the error amplifier when V  
< 1.25V (see the  
CNTRL  
Functional Diagram). This feature can be used to adjust  
the APD voltage based on the APD mirror current,  
which compensates for the APD avalanche gain varia-  
tion with temperature and manufacturing process. As  
shown in Figure 4, the voltage signal proportional to the  
MOUT current is connected to the analog-to-digital  
(ADC) input of the APD module, which then controls the  
reference voltage of the boost converter error amplifier  
through a digital-to-analog (DAC) block connected to  
the CNTRL input. The BIAS voltage and, therefore, the  
APD current, are controlled based on the MOUT mirror  
current, forming a negative feedback loop.  
The current-mode PWM controller is intended for dis-  
continuous conduction mode (DCM) operation. No  
internal slope compensation is added to the current  
signal.  
Charge Pump  
At low supply voltages (2.7V to 5.5V), internal charge-  
pump circuitry and an external 10nF ceramic capacitor  
connected between CP and CN double the available inter-  
nal supply voltage to drive the internal switch efficiently.  
In the 5.5V to 11V supply voltage range, the charge  
pump is not required. In this configuration, disable the  
charge pump by connecting CP to IN and leaving CN  
unconnected.  
Shutdown (SHDN)  
The MAX15061 features an active-low shutdown input  
(SHDN). Pull SHDN low to enter shutdown. During shut-  
down, the supply current drops to 2μA (30μA from  
BIAS) (max). However, the output remains connected to  
the input through the inductor and the output diode,  
holding the output voltage to one diode drop below  
PWR when the MAX15061 shuts down. Connect SHDN  
to IN for always-on operation.  
Monitor Current Limit (RLIM)  
The current limit of the current monitor is programmable  
from 1mA to 5mA. Connect a resistor from RLIM to  
ground to program the current-limit threshold up to 5mA.  
The current monitor mirrors the current out of APD with  
a 1:10 ratio, and the MOUT current can be converted to  
a voltage signal by connecting a resistor from MOUT to  
SGND.  
______________________________________________________________________________________ 11  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
output current in amperes, L is the inductor value in  
microhenrys, and η is the efficiency of the boost con-  
verter (see the Typical Operating Characteristics).  
V
OUT  
Determining the Inductor Value  
Three key inductor parameters must be specified for  
operation with the MAX15061: inductance value (L),  
R
R
2
1
inductor saturation current (I  
), and DC resistance  
SAT  
FB  
(DCR). In general, the inductor should have a saturation  
current rating greater than the maximum switch peak  
MAX15061  
current-limit value (I  
= 1.6A). Choose an inductor  
LIM-LX  
MAX5061  
with a low-DCR resistance for reasonable efficiency.  
Use the following formula to calculate the lower bound  
of the inductor value at different output voltages and  
output currents. This is the minimum inductance value  
for discontinuous mode operation for supplying full  
300mW of output power.  
Figure 1. Adjustable Output Voltage  
2 × T ×I  
× (V V  
OUT IN_MIN  
)
S
OUT  
L
[μH] =  
MIN  
2
η×I  
LIM-LX  
Design Procedure  
where V  
, V  
(both in volts), and I  
(in  
OUT  
IN_MIN  
OUT  
Setting the Output Voltage  
Set the MAX15061 output voltage by connecting a resis-  
tive divider from the output to FB to SGND (Figure 1).  
amperes) are typical values (so that efficiency is opti-  
mum for typical conditions), T (in microseconds) is the  
S
period, η is the efficiency, and I  
switch current in amperes (see the Electrical  
Characteristics table).  
is the peak  
LIM_LX  
Select R (FB to SGND resistor) between 200kΩ and  
1
400kΩ. Calculate R (V  
lowing equation:  
to FB resistor) using the fol-  
2
OUT  
Calculate the optimum value of L (L  
) to ensure  
OPTIMUM  
the full output power without reaching the boundary  
between continuous conduction mode (CCM) and DCM  
using the following formula:  
V
OUT  
R
= R  
1  
2
1
V
REF  
where V  
can range from (V + 1V) to 76V and V  
IN  
REF  
CNTRL  
> 1.5V, the internal 1.245V (typ) reference  
OUT  
= 1.245V or V  
L
[μH]  
2.25  
MAX  
depending on the V  
value.  
CNTRL  
L
[μH] =  
OPTIMUM  
For V  
CNTRL  
voltage is used as the feedback set point (V  
=
REF  
2
V
(V  
V  
)× T × η  
1.245V) and for V  
< 1.25V, V  
= V  
.
OUT  
IN_MIN S  
CNTRL  
REF  
CNTRL  
IN_MIN  
where L  
[μH] =  
MAX  
2
× V  
2 ×I  
Determining Peak Inductor Current  
If the boost converter remains in the discontinuous  
mode of operation, then the approximate peak inductor  
current, I  
mula below:  
OUT  
OUT  
For a design in which V = 3.3V, V  
= 70V, I  
=
=
IN  
OUT  
S
OUT  
MIN  
3mA, η = 45%, I  
1.3μH and L  
MAX  
= 1.3A, and T = 2.5μs: L  
(in amperes), is represented by the for-  
LIM-LX  
LPEAK  
= 23μH.  
For a worse-case scenario in which V = 2.9V, V  
=
=
IN  
OUT  
70V, I  
= 4mA, η = 43%, I  
= 1.3A, and T  
2 × T × (V  
V ) ×I  
IN_MIN OUT_MAX  
OUT  
LIM-LX S  
= 15μH.  
MAX  
S
OUT  
I
=
LPEAK  
2.5μs: L  
= 1.8μH and L  
MIN  
η× L  
The choice of 4.7μH is reasonable given the worst-case  
scenario above. In general, the higher the inductance,  
the lower the switching noise. Load regulation is also  
better with higher inductance.  
where T is the switching period in microseconds,  
S
V
is the output voltage in volts, V  
is the mini-  
OUT  
IN_MIN  
is the maximum  
mum input voltage in volts, I  
OUT_MAX  
12 ______________________________________________________________________________________  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
MAX5061  
For very low output ripple applications, the output of the  
boost converter can be followed by an RC filter to further  
Diode Selection  
The MAX15061’s high switching frequency demands a  
high-speed rectifier. Schottky diodes are recommend-  
ed for most applications because of their fast recovery  
time and low forward-voltage drop. Ensure that the  
diode’s peak current rating is greater than the peak  
inductor current. Also the diode reverse-breakdown  
reduce the ripple. Figure 2 shows a 100Ω (R ), 0.1μF  
F
(C ) filter used to reduce the switching output ripple to  
F
1mV  
with a 0.1mA load or 2mV  
with a 4mA load.  
P-P  
P-P  
The output-voltage regulation resistor-divider must remain  
connected to the diode and output capacitor node.  
voltage must be greater than V  
of the boost converter.  
, the output voltage  
OUT  
Use X7R ceramic capacitors for more stability over the full  
temperature range. Use an X5R capacitor for -40°C to  
+85°C applications.  
Output Filter Capacitor Selection  
For most applications, use a small output capacitor of  
0.1μF or greater. To achieve low output ripple, a capaci-  
tor with low ESR, low ESL, and high capacitance value  
should be selected. If tantalum or electrolytic capacitors  
are used to achieve high capacitance values, always  
add a smaller ceramic capacitor in parallel to bypass  
the high-frequency components of the diode current.  
The higher ESR and ESL of electrolytic capacitors  
increase the output ripple and peak-to-peak transient  
voltage. Assuming the contribution from the ESR and  
capacitor discharge equals 50% (proportions may vary),  
calculate the output capacitance and ESR required for a  
specified ripple using the following equations:  
Input Capacitor Selection  
Bypass PWR to PGND with a 1μF (min) ceramic capaci-  
tor and bypass IN to PGND with a 1μF (min) ceramic  
capacitor. Depending on the supply source imped-  
ance, higher values may be needed. Make sure that the  
input capacitors are close enough to the IC to provide  
adequate decoupling at IN and PWR as well. If the lay-  
out cannot achieve this, add another 0.1μF ceramic  
capacitor between IN and PGND (or PWR and PGND)  
in the immediate vicinity of the IC. Bulk aluminum elec-  
trolytic capacitors may be needed to avoid chattering  
at low input voltage. In case of aluminum electrolytic  
capacitors, calculate the capacitor value and ESR of  
the input capacitor using the following equations:  
I
I
x L  
OUT  
LPEAK OPTIMUM  
C
[μF] =  
T −  
S
OUT  
V
x I  
OUT  
x 0.5 x ΔV  
IN  
I
LPEAK  
T −  
S
x L  
x V  
OUT  
OUT  
OPTIMUM  
(V V  
0.5 x ΔV  
(V  
V  
)
OUT  
OUT IN_MIN  
C
[μF] =  
IN  
η x V  
IN_MIN  
V
)
IN_MIN OUT IN_MIN  
0.5x ΔV  
OUT  
OUT  
0.5x ΔV x η x V  
IN IN_MIN  
ESR mΩ =  
[
]
ESR mΩ =  
[
]
I
V
x I  
OUT OUT  
L1  
C
IN  
R
F
100Ω  
D1  
IN  
V
= 2.7V TO 5.5V  
PWR  
LX  
V
OUT  
IN  
CNTRL  
SHDN  
R
R
2
1
C
0.1μF  
F
FB  
C
OUT1  
MAX15061  
SGND  
CP  
C
CP  
C
PWR  
CN  
BIAS  
PGND  
Figure 2. Typical Operating Circuit with RC Filter  
______________________________________________________________________________________ 13  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
protection is less critical when MOUT is connected  
Determining Monitor Current Limit  
directly to subsequent transimpedance amplifiers (linear  
or logarithmic) that have low-impedance, near-ground-  
referenced inputs. If a transimpedance amplfier is used  
on the low side of the photodiode, its voltage drop must  
also be considered. Leakage from the clamping diode  
is most often insignificant over nominal operating condi-  
tions, but grows with temperature.  
Calculate the value of the monitor current-limit resistor,  
LIM  
R
, for a given APD current limit, I  
, using the fol-  
LIMIT  
lowing equation:  
1.245V  
R
= 10 ×  
LIM  
I
(mA)  
LIMIT  
The R  
resistor, R , ranges from 12.45kΩ to 2.5Ω  
LIM  
for APD currents from 1mA to 5mA.  
LIM  
To maintain low levels of wideband noise, lowpass filter-  
ing the output signal is suggested in applications where  
only DC measurements are required. Connect the filter  
capacitor at MOUT. Determining the required filtering  
components is straightforward, as the MAX15061  
exhibits a very high output impedance of 890MΩ.  
MAX5061  
Applications Information  
Using APD or PIN Photodiodes  
in Fiber Applications  
When using the MAX15061 to monitor APD or PIN pho-  
todiode currents in fiber applications, several issues  
must be addressed. In applications where the photodi-  
ode must be fully depleted, keep track of voltages bud-  
geted for each component with respect to the available  
supply voltage(s). The current monitors require as  
much as 1.1V between BIAS and APD, which must be  
considered part of the overall voltage budget.  
In some applications where pilot tones are used to identi-  
fy specific fiber channels, higher bandwidths are desired  
at MOUT to detect these tones. Consider the minimum  
and maximum currents to be detected, then consult the  
frequency response and noise typical operating curves.  
If the minimum current is too small, insufficient bandwidth  
could result, while too high a current could result in  
excessive noise across the desired bandwidth.  
Additional voltage margin can be created if a negative  
supply is used in place of a ground connection, as long  
as the overall voltage drop experienced by the  
MAX15061 is less than or equal to 76V. For this type of  
application, the MAX15061 is suggested so the output  
can be referenced to “true” ground and not the negative  
supply. The MAX15061’s output current can be refer-  
enced as desired with either a resistor to ground or a  
transimpedance amplifier. Take care to ensure that out-  
put voltage excursions do not interfere with the required  
margin between BIAS and MOUT. In many fiber applica-  
tions, MOUT is connected directly to an ADC that oper-  
ates from a supply voltage that is less than the voltage  
at BIAS. Connecting the MAX15061’s clamping diode  
output, CLAMP, to the ADC power supply helps avoid  
damage to the ADC. Without this protection, voltages  
can develop at MOUT that might destroy the ADC. This  
Layout Considerations  
Careful PCB layout is critical to achieve low switching  
losses and clean and stable operation. Protect sensitive  
analog grounds by using a star ground configuration.  
Connect SGND and PGND together close to the device  
at the return terminal of the output bypass capacitor.  
Do not connect them together anywhere else. Keep all  
PCB traces as short as possible to reduce stray capaci-  
tance, trace resistance, and radiated noise. Ensure that  
the feedback connection to FB is short and direct.  
Route high-speed switching nodes away from the sen-  
sitive analog areas. Use an internal PCB layer for SGND  
as an EMI shield to keep radiated noise away from the  
device, feedback dividers, and analog bypass capaci-  
tors. Refer to the MAX15061 evaluation kit data sheet  
for a layout example.  
14 ______________________________________________________________________________________  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
MAX5061  
L1  
4.7μH  
D1  
V
IN  
V
(70V MAX)  
OUT  
R
R
2
F
C
0.1μF  
OUT  
348kΩ  
100Ω  
C
PWR  
1μF  
R
ADJ  
C
F
0.1μF  
PWR  
LX  
R
1
CNTRL  
IN  
PGND  
6.34kΩ  
C
1μF  
IN  
BIAS  
FB  
MAX15061  
CP  
CN  
SHDN  
ILIM  
GPIO  
GPIO  
C
10nF  
CP  
V
DD  
μC  
CLAMP  
V
DD  
RLIM SGND APD MOUT  
ADC  
DAC  
APD  
R
LIM  
2.87kΩ  
C
MOUT  
R
MOUT  
(OPTIONAL)  
10kΩ  
Figure 3. Typical Operating Circuit for V = 2.7V to 5.5V  
IN  
______________________________________________________________________________________ 15  
80V, 300mW Boost Converter and Current  
Monitor for APD Bias Applications  
L1  
4.7μH  
D1  
V
IN  
= 5.5V TO 11V  
V
(70V MAX)  
OUT  
R
R
2
F
C
0.1μF  
OUT  
348kΩ  
100Ω  
C
PWR  
1μF  
C
F
0.1μF  
PWR  
LX  
MAX5061  
R
1
CNTRL  
IN  
PGND  
634kΩ  
C
1μF  
IN  
BIAS  
FB  
CP  
CN  
MAX15061  
SHDN  
ILIM  
GPIO  
GPIO  
V
DD  
μC  
CLAMP  
V
DD  
RLIM SGND APD MOUT  
ADC  
DAC  
APD  
R
LIM  
2.87kΩ  
C
MOUT  
R
MOUT  
(OPTIONAL)  
10kΩ  
Figure 4. Typical Operating Circuit for V = 5.5V to 11V  
IN  
Package Information  
Chip Information  
For the latest package outline information and land patterns, go  
to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in  
the package code indicates RoHS status only. Package draw-  
ings may show a different suffix character, but the drawing per-  
tains to the package regardless of RoHS status.  
PROCESS: BiCMOS  
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.  
16 TQFN  
T1644-4  
21-0139  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
© 2009 Maxim Integrated Products  
Maxim is a registered trademark of Maxim Integrated Products, Inc.  

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