MAX16928DGUP/V+ [MAXIM]

Switching Regulator, Current-mode, 2420kHz Switching Freq-Max, BICMOS, PDSO20, ROHS COMPLIANT, TSSOP-20;
MAX16928DGUP/V+
型号: MAX16928DGUP/V+
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Switching Regulator, Current-mode, 2420kHz Switching Freq-Max, BICMOS, PDSO20, ROHS COMPLIANT, TSSOP-20

信息通信管理 开关 光电二极管
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EVALUATION KIT AVAILABLE  
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
General Description  
Features  
The MAX16928 is a highly integrated power supply  
for automotive TFT-LCD applications. The device inte-  
grates one boost converter, one 1.8V/3.3V regulator  
controller, and two gate voltage regulators. The device  
comes in several versions to satisfy common automotive  
TFT-LCD power-supply requirements (see the Ordering  
Information table).  
S High-Power (Up to 6W) Boost Output Providing Up  
to 18V  
S 1.8V or 3.3V Regulator Provides 500mA with  
External npn Transistor  
S One Positive-Gate Voltage Regulator Capable of  
Delivering 20mA at 28V  
S One Negative-Gate Voltage Regulator  
S High-Frequency 2.2MHz Operation  
S Flexible Stand-Alone Sequencing  
S True Shutdown™ Boost Converter  
S Internal Soft-Start  
The boost converter uses spread-spectrum modulation to  
reduce peak interference and to optimize EMI performance.  
The sequencing input (SEQ) allows flexible sequencing  
of the positive-gate and negative-gate voltage regulators.  
The power-good indicator (PGOOD) indicates a failure  
on any of the converters or regulator outputs. Integrated  
thermal shutdown circuitry protects the device from over-  
heating.  
S Overtemperature Shutdown  
S -40NC to +105NC Operation  
S AEC-Q100 Qualified  
The MAX16928 is available in a 20-pin TSSOP pack-  
age with exposed pad and operates over the -40NC to  
+105NC temperature range.  
Ordering Information appears at end of data sheet.  
Typical Operating Circuit appears at end of data sheet.  
Applications  
Automotive Dashboards  
Automotive Central Information Displays  
Automotive Navigation Systems  
True Shutdown is a trademark of Maxim Integrated Products, Inc.  
For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAX16928.related  
For pricing, delivery, and ordering information, please contact Maxim Direct at  
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.  
19-5991; Rev 2; 3/13  
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
ABSOLUTE MAXIMUM RATINGS  
INA, COMPV, FBP to GND......................................-0.3V to +6V  
PGOOD to GND ......................................................-0.3V to +6V  
CP, GH to GND.....................................................-0.3V to +31V  
GND to PGNDP....................................................-0.3V to +0.3V  
Continuous Power Dissipation (T = +70NC)  
A
TSSOP (derate 26.5mW/NC above +70NC)................2122mW  
Operating Temperature Range........................ -40NC to +105NC  
Junction Temperature Range........................... -40NC to +150NC  
Storage Temperature Range............................ -65NC to +150NC  
Lead Temperature (soldering, 10s) ................................+300NC  
Soldering Temperature (reflow) ......................................+260NC  
CP, GH to GND (V  
= 3.3V) ..............................-0.3V to +29V  
INA  
LXP to GND...........................................................-0.3V to +20V  
DRVN to GND........................................................-25V to +0.3V  
ENP, DR, FB, GATE, COMPI, FBGH,  
FBGL, REF, SEQ to GND .....................-0.3V to (V  
+ 0.3V)  
INA  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-  
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
PACKAGE THERMAL CHARACTERISTICS (Note 1)  
TSSOP  
Junction-to-Ambient Thermal Resistance (B ) .......37.7NC/W  
JA  
Junction-to-Case Thermal Resistance (B ).................2NC/W  
JC  
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer  
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.  
ELECTRICAL CHARACTERISTICS  
(V  
= 5V, V  
= V  
= 0V, T = T = -40NC to +105NC, typical values are at T = +25NC unless otherwise noted.) (Note 2)  
INA  
GND  
PGNDP A J A  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
BOOST, POSITIVE (GH), NEGATIVE (GL), 1.8V/3.3V CONVERTERS  
INA Input Supply Range  
3
5.5  
2.9  
V
V
INA Undervoltage Lockout  
Threshold  
V
rising, hysteresis = 200mV,  
INA  
= +25NC  
2.5  
2.7  
1.5  
T
A
V
= V  
= 1.3V, V  
= 0V,  
FBP  
FBGH  
FBGL  
INA Supply Current  
I
2.0  
mA  
INA  
LXP not switching  
INA Shutdown Current  
I
V
= 0V, T = +25NC  
0.5  
+165  
15  
FA  
NC  
NC  
SHDN  
ENP  
A
Thermal Shutdown Temperature  
Thermal Shutdown Hysteresis  
T
Temperature rising  
SHDN  
T
H
Duration to Trigger Fault  
Condition  
V
, V  
, or V  
below its threshold  
238  
1.9  
ms  
s
FBP FBGH  
FBGL  
Autoretry Time  
REFERENCE (REF)  
REF Output Voltage  
REF Load Regulation  
V
No output current  
0 < I < 80FA, REF sourcing  
1.236  
-2  
1.25  
1.264  
+2  
V
REF  
%
REF  
REF Undervoltage Lockout  
Threshold  
Rising edge, hysteresis = 200mV  
1.165  
V
OSCILLATOR  
As a percentage of switching frequency,  
Spread-Spectrum Factor  
SSR  
Q4  
%
f
SW  
Maxim Integrated  
2
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
= 5V, V  
= V  
= 0V, T = T = -40NC to +105NC, typical values are at T = +25NC unless otherwise noted.) (Note 2)  
INA  
GND  
PGNDP A J A  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
BOOST CONVERTER  
Switching Frequency  
Maximum Duty Cycle  
f
1.98  
82  
2.20  
2.42  
93.5  
MHz  
%
SW  
Low boost current-  
limit option  
0.625  
1.25  
0.78  
1.56  
Duty cycle = 70%,  
= 220pF  
LXP Current Limit  
I
A
LIM  
C
COMPI  
High boost current-  
limit option  
1.87  
LXP On-Resistance  
LXP Leakage Current  
Soft-Start Time  
R
I
= 200mA  
110  
8.5  
30  
250  
20  
mI  
FA  
ms  
V
DS_ON(LXP) LXP  
I
V
= 20V, T =+25NC  
LK_LXP  
LXP A  
(Note 3)  
Output Voltage Range  
V
V
18  
SH  
INA  
T
T
= +25NC  
0.985  
0.98  
0.74  
1.0  
1.0  
1.015  
A
V
0 < I  
= +3V to +5.5V,  
INA  
FBP Regulation Voltage  
V
V
= -40NC to  
FBP  
A
< full load  
1.02  
0.96  
LOAD  
+105NC  
PGOOD Threshold  
V
Measured at FBP  
0 < I < full load  
0.85  
-1  
V
%
PG_FBP  
FBP Load Regulation  
FBP Line Regulation  
FBP Input Bias Current  
LOAD  
V
= +3V to +5.5V  
0.1  
%/V  
FA  
INA  
V
= +1V, T = +25NC  
Q1  
FBP  
A
FBP to COMPV  
Transconductance  
DI = Q2.5FA at COMPV, T = +25NC  
400  
FS  
A
POSITIVE-GATE VOLTAGE REGULATOR (GH)  
With external charge pump, T = +25NC  
A
Output Voltage Range  
V
5
29  
V
GH  
(maximum V = 29.5V)  
CP  
CP Overvoltage Threshold  
FBGH Regulation Voltage  
PGOOD Threshold  
T
= +25NC (Note 4)  
29.5  
0.96  
0.83  
30.5  
1.0  
0.85  
2
V
V
A
V
I
= 1mA  
1.034  
0.87  
FBGH  
GH  
V
Measured at FBGH  
V
PG_FBGH  
FBGH Load Regulation  
I
= 0 to 20mA  
%
GH  
V
= 12V to 20V at V  
= 10mA  
= 10V,  
GH  
CP  
FBGH Line Regulation  
2
%
I
GH  
FBGH Input Bias Current  
GH Output Current  
GH Current Limit  
V
V
= 1V, T = +25NC  
Q1  
FA  
mA  
mA  
ms  
FBGH  
A
I
- V = 2V  
GH  
20  
35  
GH  
CP  
I
56  
LIM_GH  
GH Soft-Start Time  
7.45  
NEGATIVE-GATE VOLTAGE REGULATOR (GL)  
Output Voltage Range  
FBGL Regulation Voltage  
PGOOD Threshold  
V
-24  
0.212  
0.38  
-2  
V
V
V
DRVN  
V
I
= 100FA  
0.242  
0.4  
0.271  
0.42  
FBGL  
DRVN  
V
Measured at FBGL  
PG_FBGL  
Maxim Integrated  
3
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
= 5V, V  
= V  
= 0V, T = T = -40NC to +105NC, typical values are at T = +25NC unless otherwise noted.) (Note 2)  
INA  
GND  
PGNDP A J A  
PARAMETER  
SYMBOL  
CONDITIONS  
= +0.25V  
MIN  
TYP  
MAX  
UNITS  
FA  
FBGL Input Bias Current  
DRVN Source Current  
DRVN Source Current Limit  
GL Soft-Start Time  
V
V
Q1  
FBGL  
= +0.5V, V  
= -10V  
2
mA  
FBGL  
DRVN  
2.5  
4
mA  
7.45  
ms  
1.8V/3.3V REGULATOR CONTROLLER  
3.3V regulator option  
1.8V regulator option  
3.18  
3.3  
1.8  
3.38  
Output Voltage  
V
V
= V  
FB  
V
V
FB  
DR  
1.746  
1.854  
3.3V regulator option,  
FB rising  
2.4  
2.57  
1.38  
2.7  
Measured at FB  
(Notes 4, 6)  
FB PGOOD Threshold  
V
PG_FB  
1.8V regulator option,  
FB rising  
1.364  
1.396  
V
V
V
= 1.8V  
= 3.3V  
= 1.8V  
2.5  
4.5  
6
FB  
FB  
FB  
FB Input Bias Current  
FA  
DR Drive Current  
4.5  
33  
mA  
INPUT SERIES SWITCH CONTROL  
p-Channel FET GATE Sink  
Current  
V
= 0.5V  
55  
75  
FA  
GATE  
Measured at GATE; below this voltage, the  
external p-channel FET is considered on  
GATE Voltage Threshold  
1.25  
V
DIGITAL LOGIC  
ENP, SEQ Input Pulldown  
Resistor Value  
R
V
500  
kI  
V
PD  
0.3 x  
ENP, SEQ Input-Voltage Low  
ENP, SEQ Input-Voltage High  
V
IL  
V
INA  
0.7 x  
V
IH  
V
INA  
PGOOD Leakage Current  
I
T
= +25NC  
Q1  
FA  
LK_IN  
A
PGOOD Output-Voltage Low  
V
2mA sink current, T = +25NC  
0.4  
V
OL  
A
Note 2: Specifications over temperature are guaranteed by design and not production tested.  
Note 3: 50% of the soft-start voltage time is due to the soft-start ramp and the other 50% is due to the settling of the output voltage.  
Note 4: After the voltage at CP exceeds this overvoltage threshold, the entire circuit switches off and autoretry is started.  
Note 5: Guaranteed by design; not production tested.  
Note 6: FB power good is indicated by PGOOD. The condition V < V  
does not shut down/restart the device.  
FB  
PG_FB  
Maxim Integrated  
4
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Typical Operating Characteristics  
(V  
= +5V, V = +12V, V  
= +18V, V = -6V, V  
= 3.3V, T = +25NC, unless otherwise noted.)  
A
INA  
SH  
GH  
GL  
REG  
SHUTDOWN SUPPLY CURRENT  
EFFICIENCY vs. LOAD CURRENT (BOOST)  
LOAD REGULATION (BOOST)  
10  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
1.0  
0.8  
9
8
7
6
5
4
3
2
1
0
0.6  
0.4  
V
= 5V  
INA  
V
= 3.3V  
INA  
0.2  
V
= 3.3V  
INA  
0
-0.2  
-0.4  
-0.6  
-0.8  
-1.0  
V
= 5V  
INA  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
0
100  
200  
300  
400  
500  
0
100  
200  
300  
400  
500  
600  
INPUT VOLTAGE (V)  
LOAD CURRENT (mA)  
LOAD CURRENT (A)  
BOOST STARTUP WAVEFORMS  
LINE REGULATION (BOOST)  
MAX16928 toc05  
1.0  
0.8  
V
ENP  
5V/div  
0.6  
V
LXP  
0.4  
10V/div  
0.2  
0
I
LX  
1A/div  
-0.2  
-0.4  
-0.6  
-0.8  
-1.0  
V
SH  
10V/div  
4ms/div  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
INPUT VOLTAGE (V)  
SUPPLY SEQUENCING WAVEFORMS  
50mA TO 450mA LOAD-TRANSIENT RESPONSE  
(V  
SEQ  
= 0V)  
MAX16928 toc06  
MAX16928 toc07  
V
ENP  
5V/div  
V
GH  
5V/div  
450mA  
50mA  
I
SH  
500mA/div  
V
SH  
5V/div  
V
REG  
5V/div  
V
SH  
200mV/div  
V
GL  
5V/div  
100µs/div  
10ms/div  
Maxim Integrated  
5
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Typical Operating Characteristics (continued)  
(V  
= +5V, V = +12V, V  
= +18V, V = -6V, V  
= 3.3V, T = +25NC, unless otherwise noted.)  
INA  
SH  
GH  
GL  
REG  
A
SUPPLY SEQUENCING WAVEFORMS  
(V = V  
LOAD REGULATION  
(POSITIVE-GATE VOLTAGE REGULATOR)  
)
INA  
SEQ  
MAX16928 toc08  
0
-0.4  
-0.8  
-1.2  
-1.6  
-2.0  
-2.4  
-2.8  
-3.2  
-3.6  
-4.0  
V
ENP  
5V/div  
V
GH  
5V/div  
V
SH  
5V/div  
V
REG  
5V/div  
V
GL  
5V/div  
10ms/div  
0
2
4
6
8
10 12 14 16 18 20  
LOAD CURRENT (mA)  
LOAD REGULATION  
(NEGATIVE-GATE VOLTAGE REGULATOR)  
LINE REGULATION  
(POSITIVE-GATE VOLTAGE REGULATOR)  
LINE REGULATION  
(NEGATIVE-GATE VOLTAGE REGULATOR)  
8
7
6
5
4
3
2
1
0
1.0  
0.40  
0.32  
0.24  
0.16  
0.08  
0
0.8  
0.6  
I
I
= 10mA  
= 20mA  
0.4  
LOAD  
LOAD  
0.2  
I
= 10mA  
LOAD  
0
-0.2  
-0.4  
-0.6  
-0.8  
-1.0  
-0.08  
-0.16  
-0.24  
-0.32  
-0.40  
I
= 20mA  
LOAD  
0
2
4
6
8
10 12 14 16 18 20  
20 21 22 23 24 25 26 27 28 29 30  
VOLTAGE (V)  
-24 -22 -20 -18 -16 -14 -12 -10 -8  
VOLTAGE (V)  
LOAD CURRENT (mA)  
V
V
CN  
CP  
LOAD-TRANSIENT RESPONSE  
(3.3V LINEAR REGULATOR)  
LOAD REGULATION (3.3V REGULATOR)  
MAX16928 toc14  
0
-0.05  
-0.10  
-0.15  
-0.20  
-0.25  
-0.30  
-0.35  
-0.40  
450mA  
50mA  
I
OUT  
500mA/div  
V
REG  
(AC-COUPLED)  
100mV/div  
EXTERNAL NPN TRANSISTOR USED  
100µs/div  
0
50 100 150 200 250 300 350 400 450 500  
LOAD CURRENT (mA)  
Maxim Integrated  
6
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Pin Configuration  
TOP VIEW  
+
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
ENP  
DR  
SEQ  
REF  
3
FB  
FBGL  
FBGH  
COMPI  
GND  
DRVN  
GH  
4
GATE  
PGNDP  
LXP  
MAX16928  
5
6
7
INA  
8
COMPV  
FBP  
9
CP  
EP  
10  
N.C.  
PGOOD  
TSSOP  
Pin Description  
PIN  
NAME  
FUNCTION  
Boost Circuitry and 1.8V/3.3V Regulator Controller Enable Input. ENP has an internal 500kI pulldown  
resistor. Drive high for normal operation and drive low to place the device in shutdown.  
1
ENP  
1.8V or 3.3V Regulator Output. DR has a 4.5mA (min) drive capability. For greater output current capa-  
bility, use an external npn bipolar transistor whose base is connected to DR.  
2
3
DR  
FB  
1.8V or 3.3V Regulator Feedback Input. FB is regulated to 1.8V or 3.3V. Connect FB to DR when power-  
ing loads demanding less than 4.5mA. For greater output current capability, use an external npn bipo-  
lar transistor whose emitter is connected to FB.  
External p-Channel FET Gate Drive. GATE is an open-drain driver connected to the gate of the external  
input series p-channel FET. Connect a pullup resistor between GATE and INA. During a fault condition,  
the gate driver turns off and the pullup resistor turns off the FET.  
4
GATE  
5
6
7
PGNDP  
LXP  
Boost Converter Power Ground  
Boost Converter Switching Node. Connect LXP to the inductor and catch diode of the boost converter.  
Boost Circuitry and 1.8V/3.3V Regulator Controller Power Input. Connect INA to a 3V to 5.5V supply.  
INA  
Boost Error Amplifier Compensation Connection. Connect a compensation network between COMPV to  
GND.  
8
9
COMPV  
Boost Converter Feedback Input. FBP is regulated to 1V. Connect FBP to the center of a resistive divid-  
er connected between the boost output and GND.  
FBP  
N.C.  
10  
11  
No Connection. Not internally connected.  
PGOOD Open-Drain Power-Good Output. Connect PGOOD to INA through an external pullup resistor.  
Positive-Gate Voltage Regulator Power Input. Connect CP to the positive output of the external charge  
12  
CP  
pump. Ensure that V does not exceed the CP overvoltage threshold as given in the Electrical  
CP  
Characteristics table.  
Maxim Integrated  
7
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Pin Description (continued)  
PIN  
NAME  
FUNCTION  
13  
GH  
Positive-Gate Voltage Regulator Output  
Negative-Gate Voltage Regulator Driver Output. DRVN is the open drain of an internal p-channel FET.  
Connect DRVN to the base of an external npn pass transistor.  
14  
15  
16  
DRVN  
GND  
Analog Ground  
Boost Slope Compensation Connection. Connect a capacitor between COMPI and GND to set the  
slope compensation.  
COMPI  
Positive-Gate Voltage Regulator Feedback Input. FBGH is regulated to 1V. Connect FBGH to the center  
of a resistive divider connected between GH and GND.  
17  
18  
FBGH  
FBGL  
Negative-Gate Voltage Regulator Feedback Input. FBGL is regulated to 0.25V. Connect FBGL to the  
center of a resistive divider connected between REF and the output of the negative-gate voltage  
regulator.  
19  
20  
REF  
SEQ  
1.25V Reference Output. Bypass REF to GND with a 0.1FF ceramic capacitor.  
Sequencing Input. SEQ has an internal 500kI pulldown resistor. SEQ determines the sequence in  
which V  
and V power up. See Table 1 for supply sequencing options.  
GH  
GL  
Exposed Pad. Connect to a large contiguous copper ground plane for optimal heat dissipation. Do not  
use EP as the only electrical ground connection.  
EP  
Boost Converter  
The boost converter employs a current-mode, fixed-  
Detailed Description  
The MAX16928 is a highly integrated power supply for  
automotive TFT-LCD applications. The device integrates  
one boost converter, one 1.8V/3.3V regulator controller,  
one positive-gate voltage regulator, and one negative-  
gate voltage regulator.  
frequency PWM architecture to maximize loop bandwidth  
and provide fast transient response to pulsed loads  
typical of TFT-LCD panel source drivers. The 2.2MHz  
switching frequency allows the use of low-profile induc-  
tors and ceramic capacitors to minimize the thickness  
of LCD panel designs. The integrated low on-resistance  
MOSFET and the device’s built-in digital soft-start func-  
tions reduce the number of external components required  
while controlling inrush currents. The output voltage  
The device achieves enhanced EMI performance through  
spread-spectrum modulation. Digital input control allows  
the device to be placed in a low-current shutdown mode  
and provides flexible sequencing of the gate voltage  
regulators.  
can be set from V  
to 18V with an external resistive  
INA  
voltage-divider. The regulator controls the output voltage  
by modulating the duty cycle (D) of the internal power  
MOSFET in each switching cycle. The duty cycle of the  
MOSFET is approximated by:  
Internal thermal shutdown circuitry protects the device  
from overheating. The device is designed to shut down  
when its die temperature reaches +165NC (typ) and to  
resume normal operation once its die temperature has  
fallen 15NC.  
ηV  
V
INA  
D=1−  
The device is factory-trimmed to provide a variety of  
power options to meet the most common automotive  
TFT-LCD display power requirements, as outlined in the  
Ordering Information table.  
O
where V  
is the voltage at INA, V = V  
(the boost  
INA  
O
SH  
output voltage), and E is the efficiency of the boost con-  
verter as shown in the Typical Operating Characteristics.  
Maxim Integrated  
8
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Figure 1 shows the functional diagram of the boost  
regulator. An error amplifier compares the signal at  
FBP to 1V and changes the COMPV output. The volt-  
age at COMPV sets the peak inductor current. As the  
load varies, the error amplifier sources or sinks current  
to the COMPV output accordingly to produce the peak  
inductor current necessary to service the load. To main-  
tain stability at high duty cycles, a slope-compensation  
signal (set by the capacitor at COMPI) is summed with  
the current-sense signal. On the rising edge of the  
internal clock, the controller sets a flip-flop, turning on  
the n-channel MOSFET and applying the input voltage  
across the inductor. The current through the inductor  
ramps up linearly, storing energy in its magnetic field.  
Once the sum of the current feedback signal and the  
slope compensation exceeds the COMPV voltage, the  
controller turns off the MOSFET. The inductor current  
then flows through the diode to the output. The MOSFET  
remains off for the rest of the clock cycle.  
The external p-channel FET controlled by GATE protects  
the output during fault conditions and provides True  
Shutdown of the converter. Connect a pullup resistor  
between GATE and INA (see the Boost Converter section  
to select the value for the pullup resistor). Under normal  
operation, GATE turns on the p-channel FET, connecting  
the supply to the boost input. During a fault condition or  
in shutdown, GATE is off and the pullup resistor turns off  
the p-channel FET, disconnecting the supply from the  
boost input.  
LXP  
CLOCK  
LOGIC AND  
DRIVER  
PGNDP  
I
LIM  
COMPARATOR  
SOFT-  
START  
V
LIMIT  
PWM  
COMPARATOR  
CURRENT  
SENSE  
Σ
2.2MHz  
OSCILLATOR  
SLOPE  
COMP  
COMPI  
FBP  
ERROR  
AMP  
TO FAULT LOGIC  
0.85V  
FAULT  
COMPARATOR  
1V  
MAX16928  
COMPV  
Figure 1. Boost Converter Functional Diagram  
Maxim Integrated  
9
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Spread-Spectrum Modulation  
The high-frequency 2.2MHz operation of the boost con-  
verter moves switching noise outside of the AM band.  
The device achieves enhanced EMI performance by  
modulating the switching frequency by Q4%. The modu-  
lating signal is pseudorandom and changes each switch-  
If either condition 4 or 5 occurs, the device pulls PGOOD  
low and turns off all outputs immediately. The device initi-  
ates startup only after the fault has cleared.  
If the last condition occurs, the device pulls PGOOD low,  
but does not turn off any of the outputs.  
During startup, PGOOD is masked and goes high as  
soon as the 1.8V/3.3V regulator controller turns on. This  
ing period (i.e., f = 2.2MHz).  
SS  
Startup  
regulator turns on as soon as V  
undervoltage lockout threshold.  
exceeds the INA  
INA  
Immediately after power-up, coming out of shutdown,  
or going into autoretry, the boost converter performs a  
short-circuit detection test on the output by connecting  
the input (INA) to the switching node (LXP) through an  
internal 50I resistor.  
Autoretry  
When the autoretry counter finishes incrementing after  
1.9s, the device attempts to turn on the boost con-  
verter and gate voltage regulators in the order shown  
in Table 1. The device continues to autoretry as long as  
the fault condition persists. A fault on the 1.8V/3.3V regu-  
lator output causes PGOOD to go low, but does not result  
in the device shutting down and going into autoretry.  
If the resulting voltage on LXP exceeds 1.2V, the device  
turns on the external pMOS switch by pulling GATE low.  
The boost output ramps to its final value in 15ms.  
An overloaded or shorted output is detected if the result-  
ing voltage on LXP is below 1.2V. The external pMOS  
switch remains off and the converter does not switch.  
After the fault blanking period of 238ms, the device pulls  
PGOOD low and starts the autoretry timer.  
Current Limit  
The effective current limit of the boost converter is  
reduced by the internally injected slope compensation by  
an amount dependent on the duty cycle of the converter.  
The effective current limit is given by:  
The short-circuit detection feature places a lower limit  
on the output load of approximately 46I when the input  
voltage is 3V.  
D
-12  
I
=192 ×10  
×I  
×
LIM(EFF)  
LIM_DC_0  
C
COMPI  
Fault Conditions and PGOOD  
PGOOD signals whether all the regulators and the boost  
converter are operating normally. PGOOD is an open-  
drain output that pulls low if any of the following faults  
occur:  
where I  
is the effective current limit, I  
=
LIM_DC_0  
LIM(EFF)  
1.1A or 2.2A, depending on the boost converter current-  
limit option, D is the duty cycle of the boost converter,  
and C  
is the value of the capacitor at the COMPI  
COMPI  
1) The boost output voltage falls below 85% of its set  
value.  
input. Estimate the duty cycle of the converter using the  
formulas shown in the Design Procedure section.  
2) The positive-gate voltage regulator output (V ) falls  
GH  
1.8V/3.3V Regulator Controller  
The 1.8V/3.3V regulator controller delivers 4.5mA (min)  
to an external load. Connect FB to DR for a regulated  
1.8V/3.3V output.  
below 85% of its set value.  
3) The negative-gate voltage regulator output (V ) falls  
GL  
below 85% of its set value.  
4) The LXP voltage is greater than 21V (typ).  
For higher output capability, use an external npn transis-  
tor as shown in the Typical Operating Circuit. The drive  
capability of the regulator is then increased by the cur-  
5) The positive charge-pump voltage (V ) is greater  
CP  
than 30.5V (typ).  
rent gain of the transistor (h ). When using an external  
FE  
6) The 1.8V/3.3V regulator output voltage falls below  
85% of its nominal value.  
transistor, use DR as the base drive and connect FB to  
the transistor’s emitter. Bypass the base to ground with a  
0.1FF ceramic capacitor.  
If any of the first three fault conditions persists for longer  
than the 238ms fault blanking period, the device pulls  
PGOOD low, turns off all outputs, and starts the autoretry  
timer.  
If the boost output current is greater than 300mA, con-  
nect a 30kI resistor between DR and GND.  
Maxim Integrated  
10  
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Positive-Gate Voltage Regulator (GH)  
The positive-gate voltage regulator includes a p-channel  
FET output stage to generate a regulated output between  
Enable (ENP)  
Use the enable input (ENP) to enable and disable the  
boost section of the device. Connect ENP to INA for  
normal operation and to GND to place the device in shut-  
down. In shutdown, the INA supply current is reduced to  
0.5FA.  
5V and (V - 2V). The regulator maintains accuracy over  
CP  
wide line and load conditions. It is capable of at least  
20mA of output current and includes current-limit protec-  
tion. V  
drivers’ gate-on voltage.  
is typically used to provide the TFT-LCD gate  
GH  
Soft-Start and Supply Sequencing (SEQ)  
When enabled, the boost output ramps up from V  
to  
INA  
The regulator derives its positive supply voltage from a  
noninverting charge pump, a single-stage example of  
which is shown in the Typical Operating Circuit. A higher  
voltage using a multistage charge pump is possible, as  
described in the Charge Pumps section.  
its set voltage. Once the boost output reaches 85% of the  
set voltage and the soft-start timer expires, the gate volt-  
age regulators turn on in the order shown in Table 1. The  
1.8V/3.3V regulator controller is enabled at the beginning  
of the boost converter’s soft-start.  
Negative-Gate Voltage Regulator (GL)  
The negative-gate voltage regulator is an analog gain  
block with an open-drain p-channel output. It drives an  
external npn pass transistor with a 6.8kIbase-to-emitter  
resistor (see the Pass Transistor Selection section). Its  
guaranteed base drive source current is at least 2mA.  
Both gate voltage regulators have a 7.45ms soft-start  
time. The second one turns on as soon as the output of  
the first reaches 85% of its set voltage.  
Thermal Shutdown  
Internal thermal shutdown circuitry shuts down the  
device immediately when the die temperature exceeds  
+165NC. A 15NC thermal shutdown hysteresis prevents  
the device from resuming normal operation until the die  
temperature falls below +150NC.  
V
is typically used to provide the TFT-LCD gate driv-  
GL  
ers’ gate-off voltage.  
The output of the negative-gate voltage regulator (i.e.,  
the collector of the external npn pass transistor) has load-  
dependent bypassing requirements. Connect a ceramic  
capacitor between the collector and ground with the  
value shown in Table 3.  
Design Procedure  
Boost Converter  
The regulator derives its negative supply voltage from an  
inverting charge pump, a single-stage example of which  
is shown in the Typical Operating Circuit. A more negative  
voltage using a multistage charge pump is possible, as  
described in the Charge Pumps section.  
Inductor Selection  
Three key inductor parameters must be specified for  
operation with the device: inductance value (L), inductor  
saturation current (I  
), and DC resistance (R ). To  
SAT  
DC  
determine the inductance value, select the ratio of inductor  
peak-to-peak ripple current to average output current (LIR)  
first. For LIR values that are too high, the RMS currents are  
The external npn transistor is not short-circuit protected.  
To maintain proper pulldown capability of the external npn  
transistor and optimal regulation, a minimum load of at least  
500FA is recommended on the output of the GL regulator.  
2
high, and therefore, I R losses are high. Use high-valued  
inductors to achieve low LIR values. Typically, inductance  
is proportional to resistance for a given package type,  
Table 1. Supply Sequencing  
CONTROL INPUTS  
SUPPLY SEQUENCING  
ENP  
SEQ  
FIRST  
SECOND  
THIRD  
0
1
1
X
0
1
Device is in shutdown  
V
V
V
V
GL  
SH  
GH  
V
V
GH  
SH  
GL  
Maxim Integrated  
11  
 
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
2
Rectifier Diode  
The catch diode should be a Schottky type to minimize  
its voltage drop and maximize efficiency. The diode must  
be capable of withstanding a reverse voltage of at least  
which again makes I R losses high for very low LIR values.  
A good compromise between size and loss is to select a  
30%-to-60% peak-to-peak ripple current to average-current  
ratio. If extremely thin high-resistance inductors are used,  
as is common for LCD-panel applications, the best LIR can  
increase between 0.5 and 1.0. The size of the inductor is  
determined as follows:  
V
. The diode should have an average forward current  
SH  
rating greater than:  
I
= I  
× (1-D)  
D
INA  
V
×D  
V ×I  
O O  
INA  
where I  
and D are the input current and duty cycle  
INA  
L =  
and I  
=
INA  
LIR×I  
× f  
ηV  
given above. In addition ensure that the peak current rat-  
ing of the diode is greater than:  
INA SW  
INA  
1-ηV  
INA  
LIR  
D =  
I
× 1+  
V
INA  
O
2
where V  
is the input voltage, V is the output voltage,  
O
INA  
Output Voltage Selection  
The output voltage of the boost converter can be adjust-  
ed by using a resistive voltage-divider formed by R  
I
O
is the output current, I  
is the average boost input  
INA  
current, Eis the efficiency of the boost converter, D is the  
duty cycle, and f is 2.2MHz (the switching frequency  
TOP  
SW  
and R  
FBP and connect R  
Select R  
. Connect R  
between the output and  
between FBP and GND.  
BOTTOM  
TOP  
of the boost converter). The efficiency of the boost  
converter can be estimated from the Typical Operating  
Characteristics and accounts for losses in the internal  
BOTTOM  
in the 10kI to 50kI range. Calculate  
BOTTOM  
R
TOP  
with the following equation:  
switch, catch diode, inductor R , and capacitor ESR.  
DC  
V
O
R
= R  
× (  
BOTTOM  
1)  
Capacitor Selection  
The input and output filter capacitors should be of a low-  
ESR type (tantalum, ceramic, or low-ESR electrolytic) and  
TOP  
V
FBP  
where V , the boost converter’s feedback set point, is  
FBP  
should have I  
ratings greater than:  
RMS  
1V. Place both resistors as close as possible to the device  
and connect R to the analog ground plane.  
LIR×I  
BOTTOM  
INA  
I
=
for the input capacitor  
RMS  
12  
Loop Compensation  
to set the high-frequency integrator  
Choose R  
COMPV  
2
gain for fast transient response. Choose C  
to set  
LIR  
COMPV  
D+  
the integrator zero to maintain loop stability. For low-ESR  
output capacitors, use Table 2 to select the initial values  
12  
1D  
I
=I  
for the output capacitor  
RMS  
O
for R  
lel with R  
and C  
. Use a 22pF capacitor in paral-  
COMPV  
COMPV  
where I  
and D are the input current and duty cycle  
INA  
+ C  
.
COMPV  
COMPV  
given above.  
The output voltage contains a ripple component whose  
peak-to-peak value depends on the value of the ESR and  
capacitance of the output capacitor and is approximately  
given by:  
Table 2. Compensation Component Values  
V
(V)  
8
18  
200  
5
SH  
I
(mA)  
200  
3.3  
1.75  
5
SH  
DV  
= DV + DV  
ESR CAP  
RIPPLE  
V
(V)  
INA  
P
(W)  
3.75  
5
LIR  
2
IN  
V  
= I  
× (1+  
) ×R  
ESR  
ESR INA  
L (µH)  
(kI)  
R
33  
39  
I
×D  
×f  
COMPV  
O
V  
=
CAP  
C
(pF)  
(pF)  
220  
820  
180  
330  
C
COMPV  
OUT SW  
C
COMPI  
where I  
given above.  
and D are the input current and duty cycle  
INA  
Maxim Integrated  
12  
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
To further optimize transient response, vary R  
Charge Pumps  
COMPV  
in 20% steps and C  
in 50% steps while observ-  
COMPV  
Selecting the Number of Charge-Pump Stages  
For most applications, a single charge-pump stage is  
sufficient, as shown in the Typical Operating Circuit.  
Connect the flying capacitors to LXP. The output voltages  
generated on the storage capacitors are given by:  
ing transient-response waveforms. The ideal transient  
response is achieved when the output settles quickly with  
little or no overshoot. Connect the compensation network  
to the analog ground plane.  
Use the following formula to calculate the value for C  
-6  
:
COMPI  
V
= 2 x V + V  
- 2 x V  
CP  
SH  
SCHOTTKY D  
C
≤ 950 × 10 × L/(V + V  
- V  
)
COMPI  
SH  
SCHOTTKY  
INA  
V
= -(V + V  
- 2 x V )  
CN  
SH  
SCHOTTKY D  
p-Channel FET Selection  
The p-channel FET used to gate the boost converter’s  
input should have low on-resistance. Connect a resistor  
where V is the positive supply for the positive-gate volt-  
CP  
age regulator, and V  
is the negative supply for the neg-  
CN  
ative-gate voltage regulator. Where larger output voltages  
are needed, use multistage charge pumps (however, the  
maximum charge-pump voltage is limited by the absolute  
maximum ratings of CP and DRVN). Figure 2 and Figure 3  
show the configuration of a multistage charge pump for  
both positive and negative output voltages.  
(R ) between the source and gate of the FET. Under  
SG  
normal operation, R  
carries a gate drive current of  
SG  
55FA and the resulting gate source voltage (V ) turns  
GS  
on the FET. When the gate drive is removed under a fault  
condition or in shutdown, R  
off the FET. Size R  
on the FET.  
bleeds off charge to turn  
SG  
to produce the V  
needed to turn  
SG  
GS  
For mutistage charge pumps the output voltages are:  
V
CP  
V
= V + n × (V + V  
- 2 x V )  
SH  
SH  
SCHOTTKY D  
1.8V/3.3V Regulator Controller  
= -n × (V + V  
- 2 x V )  
D
CN  
SH  
SCHOTTKY  
npn Bipolar Transistor Selection  
For highest efficiency, choose the lowest number of  
charge-pump stages that meets the output requirement.  
The number of positive charge-pump stages needed is  
given by:  
There are two important considerations in selecting the  
pass npn bipolar transistor: current gain (h ) and power  
FE  
dissipation. Select a transistor with an h high enough  
FE  
to ensure adequate drive capability. This condition is  
V
+V  
V  
2 × V  
satisfied when I  
mum load current. The regulator can source I = 4.5mA  
(min). The transistor should be capable of dissipating:  
x (h + 1) is greater than the maxi-  
DR  
FE  
GH DROPOUT SH  
n
=
CP  
V
+V  
DR  
SH SCHOTTKY D  
and the number of negative charge-pump stages is  
given by:  
P
= (V  
– V  
) × I  
NPN_REG  
INA  
REG_OUT LOAD(MAX)  
where V  
= 1.8V or 3.3V. Bypass DR to ground  
REG_OUT  
|V |+V  
with a 0.1FF ceramic capacitor. For applications in which  
the boost output current exceeds 300mA, connect a  
30kI resistor from DR to ground.  
GL  
DROPOUT  
n
=
CN  
V
+ V  
2 × V  
SH  
SCHOTTKY D  
where n  
is the number of positive charge-pump stag-  
is the number of negative charge-pump stages,  
CP  
Supply Considerations  
INA needs to be at least 4.5V for the 3.3V regulator to  
operate properly.  
es, n  
CN  
V
is the positive-gate voltage regulator output volt-  
GH  
age, V  
is the negative-gate voltage regulator output  
GL  
voltage, V  
is the boost converter’s output voltage, V  
SH  
D
V
V
CN  
SH  
V
CP  
LXP  
LXP  
Figure 2. Multistage Charge Pump for Positive Output Voltage  
Figure 3. Multistage Charge Pump for Negative Output Voltage  
Maxim Integrated  
13  
 
 
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
is the forward-voltage drop of the charge-pump diode,  
is the forward drop of the Schottky diode  
V
is the peak-to-peak value of the output  
RIPPLE_CN  
V
ripple.  
SCHOTTKY  
of the boost converter, and V  
margin for the regulator. Use V  
negative voltage regulator and V  
for the positive-gate voltage regulator.  
is the dropout  
= 0.3V for the  
= 2V at 20mA  
DROPOUT  
DROPOUT  
DROPOUT  
Charge-Pump Rectifier Diodes  
Use high-speed silicon switching diodes with a current  
rating equal to or greater than two times the average  
charge-pump input current. If it helps avoid an extra  
stage, some or all of the diodes can be replaced with  
Schottky diodes with an equivalent current rating.  
Flying Capacitors  
Increasing the flying capacitor (C ) value lowers the  
X
effective source impedance and increases the output  
current capability. Increasing the capacitance indefi-  
nitely has a negligible effect on output current capability  
because the internal switch resistance and the diode  
impedance place a lower limit on the source impedance.  
A 0.1FF ceramic capacitor works well in most low-current  
applications. The voltage rating of the flying capacitors  
Positive-Gate Voltage Regulator  
Output Voltage Selection  
The output voltage of the positive-gate voltage regula-  
tor can be adjusted by using a resistive voltage-divider  
formed by R  
and R  
. Connect R  
between  
between  
TOP  
BOTTOM  
TOP  
the output and FBGH, and connect R  
FBGH and GND. Select R  
BOTTOM  
in the 10kI to 50kI  
BOTTOM  
for the positive charge pump should exceed V , and  
CP  
range. Calculate R  
with the following equation:  
TOP  
that for the negative charge pump should exceed the  
magnitude of V  
.
CN  
V
GH  
R
= R  
× (  
BOTTOM  
1)  
TOP  
Charge-Pump Output Capacitor  
V
FBGH  
Increasing the output capacitance or decreasing the ESR  
reduces the output-ripple voltage and the peak-to-peak  
transient voltage. With ceramic capacitors, the output-  
voltage ripple is dominated by the capacitance value.  
Use the following equation to approximate the required  
output capacitance for the noninverting charge pump  
connected to CP:  
where V  
is the desired output voltage and V  
= 1V  
FBGH  
GH  
(the regulated feedback voltage for the regulator). Place  
both resistors as close as possible to the device.  
Avoid excessive power dissipation within the internal  
pMOS device of the regulator by paying attention to the  
voltage drop across the drain and source. The amount of  
power dissipation is given by:  
D×I  
LOAD_CP  
C
OUT_CP  
P
= (V - V ) × I  
CP GH LOAD(MAX)  
GL  
f
× V  
RIPPLE_CP  
SW  
where V  
age applied to the drain, V  
voltage, and I  
is the noninverting charge-pump output volt-  
CP  
where C  
is the output capacitor of the charge  
OUT_CP  
is the regulated output  
GH  
pump, D is the duty cycle of the boost converter, I  
is the load current of the charge pump, f  
ing frequency of the boost converter, and V  
the peak-to-peak value of the output ripple.  
LOAD_CP  
is the maximum load current.  
LOAD(MAX)  
is the switch-  
SW  
Stability Requirements  
is  
RIPPLE_CP  
The positive-gate voltage regulator (GH) requires a mini-  
mum output capacitance for stability. For an output volt-  
age of 5V to (V - 2V) and an output current of 10mA to  
For the inverting charge pump connected to CN, use the  
following equation to approximate the required output  
capacitance:  
CP  
15mA, use a minimum capacitance of 0.47FF.  
Negative-Gate Voltage Regulator  
(1-D)×I  
LOAD_CN  
Output Voltage Selection  
The output voltage of the negative-gate voltage regula-  
tor can be adjusted by using a resistive voltage-divider  
formed by R  
REF and FBGL and connect R  
C
OUT_CN  
f
× V  
RIPPLE_CN  
SW  
where C  
is the output capacitor of the charge  
OUT_CN  
and R  
. Connect R  
between  
TOP  
BOTTOM  
TOP  
pump, D is the duty cycle of the boost converter,  
between FBGL  
BOTTOM  
I
is the load current of the charge pump, f  
LOAD_CN  
SW  
and the collector of the external npn transistor. Select  
is the switching frequency of the boost converter, and  
Maxim Integrated  
14  
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
R
greater than 20kI to avoid loading down the ref-  
The transconductance amplifier regulates the output volt-  
age by controlling the pass transistor’s base current. The  
total DC loop gain is approximately:  
TOP  
erence output. Calculate R  
equation:  
with the following  
BOTTOM  
V
V  
GL  
FBGL  
R
= R  
×
TOP  
I
×h  
I
LOAD  
4
BOTTOM  
BIAS  
FE  
V
V  
A
( )× (1+  
)× V  
REF  
REF  
FBGL  
V_GL  
V
T
where V  
is the desired output voltage, V  
= 0.25V (the regulated feedback voltage of  
= 1.25V,  
GL  
REF  
where V is 26mV at room temperature, and I  
current through the base-to-emitter resistor (R ). For  
the device, the bias current for the negative-gate voltage  
regulator is 0.1mA. Therefore, the base-to-emitter resistor  
should be chosen to set 0.1mA bias current:  
is the  
BIAS  
BE  
T
and V  
FBGL  
the regulator).  
Pass Transistor Selection  
The pass transistor must meet specifications for current  
gain (h ), input capacitance, collector-emitter saturation  
FE  
V
0.7V  
BE  
voltage, and power dissipation. The transistor’s current  
gain limits the guaranteed maximum output current to:  
R
=
=
= 7kΩ  
BE  
0.1mA 0.1mA  
Use the closest standard resistor value of 6.8kI. The  
output capacitor and the load resistance create the  
dominant pole in the system. However, the internal  
amplifier delay, pass transistor’s input capacitance,  
and the stray capacitance at the feedback node create  
additional poles in the system, and the output capacitor’s  
ESR generates a zero. For proper operation, use the fol-  
lowing procedure to verify that the regulator is properly  
compensated:  
V
BE  
I
= (I  
)×h  
FE(MIN)  
LOAD(MAX)  
DRVN  
R
BE  
where I  
rent, V  
is the minimum guaranteed base-drive cur-  
is the transistor’s base-to-emitter forward volt-  
DRVN  
BE  
age drop, and R  
is the pulldown resistor connected  
BE  
between the transistor’s base and emitter. Furthermore,  
the transistor’s current gain increases the regulator’s DC  
loop gain (see the Stability Requirements section), so  
excessive gain destabilizes the output.  
1) First, determine the dominant pole set by the regula-  
tor’s output capacitor and the load resistor:  
The transistor’s saturation voltage at the maximum output  
current determines the minimum input-to-output volt-  
age differential that the regulator can support. Also, the  
package’s power dissipation limits the usable maximum  
input-to-output voltage differential. The maximum power-  
dissipation capability of the transistor’s package and  
mounting must exceed the actual power dissipated in  
the device. The power dissipated equals the maximum  
I
LOAD(MAX)_GL  
f
=
POLE_GL  
2π × C  
× V  
OUT_GL  
OUT_GL  
The unity-gain crossover frequency of the regulator is:  
= A × f  
f
CROSSOVER  
V_LR  
POLE_LR  
2) The pole created by the internal amplifier delay is  
approximately 1MHz:  
load current (I  
) multiplied by the maximum  
input-to-output voltage differential:  
LOAD(MAX)_GL  
f
= 1MHz  
POLE_AMP  
P
= (V - V ) × I  
GL CN LOAD(MAX)  
NPN_GL  
3) Next, calculate the pole set by the transistor’s input  
capacitance, the transistor’s input resistance, and the  
base-to-emitter pullup resistor:  
where V  
is the regulated output voltage on the collec-  
GL  
tor of the transistor, V  
is the inverting charge-pump  
CN  
output voltage applied to the emitter of the transistor, and  
is the maximum load current. Note that the  
external transistor is not short circuit protected.  
1
f
=
POLE_IN  
I
LOAD(MAX)  
2π × C × (R /R  
)
IN  
BE IN  
where:  
Stability Requirements  
The device’s negative-gate voltage regulator uses an  
internal transconductance amplifier to drive an external  
pass transistor. The transconductance amplifier, the  
pass transistor, the base-emitter resistor, and the output  
capacitor determine the loop stability.  
g
h
FE  
m
C
=
, R  
=
IN  
IN  
2πf  
g
T
m
g
T
is the transconductance of the pass transistor, and  
f is the transition frequency. Both parameters can be  
m
Maxim Integrated  
15  
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
found in the transistor’s data sheet. Because R  
is  
BE  
Table 3. Minimum Output Capacitance vs.  
Output Voltage Range for Negative-Gate  
much greater than R , the above equation can be  
IN  
simplified:  
Voltage Regulator (I  
= 10mA to 15mA)  
OUT  
1
2π × C ×R  
f
=
OUTPUT VOLTAGE  
RANGE  
MINIMUM OUTPUT  
CAPACITANCE (µF)  
POLE_IN  
IN  
IN  
Substituting for C and R yields:  
-2V R V R -4V  
2.2  
1.5  
1
IN  
IN  
GL  
-5V R V R -7V  
f
GL  
T
f
=
POLE  
h
-8V R V R -13V  
GL  
FE  
4) Next, calculate the pole set by the regulator’s feed-  
back resistance and the capacitance between FBGL  
and GND (including stray capacitance):  
Applications Information  
1
Power Dissipation  
An IC’s maximum power dissipation depends on the ther-  
mal resistance from the die to the ambient environment  
and the ambient temperature. The thermal resistance  
depends on the IC package, PCB copper area, other  
thermal mass, and airflow. More PCB copper, cooler  
ambient air, and more airflow increase the possible dis-  
sipation, while less copper or warmer air decreases the  
IC’s dissipation capability. The major components of  
power dissipation are the power dissipated in the boost  
converter, positive-gate voltage regulator, negative-gate  
voltage regulator, and the 1.8V/3.3V regulator controller.  
f
=
POLE_FBGL  
2π × C  
× (R  
/R  
)
FBGL  
TOP BOTTOM  
where C  
GND and is equal to 30pF, R  
is the capacitance between FBGL and  
FBGL  
is the upper resistor  
TOP  
of the regulator’s feedback divider, and R  
the lower resistor of the divider.  
is  
BOTTOM  
5) Next, calculate the zero caused by the output capaci-  
tor’s ESR:  
1
f
=
ZERO_ESR  
2π × C  
×R  
ESR  
OUT_LR  
where R  
is the equivalent series resistance of  
ESR  
Boost Converter  
Power dissipation in the boost converter is primarily due  
to conduction and switching losses in the low-side FET.  
Conduction loss is produced by the inductor current  
flowing through the on-resistance of the FET during the  
on-time. Switching loss occurs during switching transi-  
tions and is a result of the finite time needed to fully turn  
on and off the FET. Power dissipation in the boost con-  
verter can be estimated with the following formula:  
C
. To ensure stability, make C  
large  
OUT_LR  
OUT_LR  
enough so the crossover occurs well before the poles  
and zero calculated in steps 2 to 5. The poles in steps  
3 and 4 generally occur at several MHz and using  
ceramic capacitors ensures the ESR zero also occurs  
at several MHz. Placing the crossover frequency  
below 500kHz is sufficient to avoid the amplifier delay  
pole and generally works well, unless unusual compo-  
nent choices or extra capacitances move one of the  
other poles or the zero below 1MHz.  
2
P
[(I  
IN(DC,MAX)  
× D) × R  
] + V  
×
LXP  
IN(DC,MAX)  
DS_ON(LXP)  
SH  
I
× f  
× [(t  
+ t ) + (t + t )]  
SW  
R-V F-I R-I F-V  
Table 3 is a list of recommended minimum output capaci-  
tance for the negative-gate voltage regulator and is appli-  
cable for output currents in the 10mA to 15mA range.  
where I  
is the maximum expected average  
IN(DC,MAX)  
input (i.e., inductor) current, D is the duty cycle of the  
boost converter, R  
the internal low-side FET, V  
is the on-resistance of  
is the output voltage, and  
DS_ON(LXP)  
SH  
f
R
is the switching frequency of the boost converter.  
SW  
is 110mI (typ) and f  
is 2.2MHz.  
DS_ON(LXP)  
SW  
Maxim Integrated  
16  
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
The voltage and current rise and fall times at the LXP  
node are equal to t (voltage rise time), t (voltage fall  
voltage regulator. Estimate the power dissipated in the  
negative-gate voltage regulator using the following:  
R-V  
F-V  
time), t  
(current rise time), and t (current fall time),  
R-I  
F-I  
P
GL  
= (V + |V | - V ) × I  
INA CN BE DRVN  
and are determined as follows:  
where V is the base-emitter voltage of the external npn  
BE  
V
+ V  
SCHOTTKY  
bipolar transistor, and I  
is the current sourced from  
SH  
DRVN  
t
=
R-V  
F-V  
DRVN to the R  
transistor, which is given by:  
bias resistor and to the base of the  
K
BE  
R-V  
V
+ V  
SH  
SCHOTTKY  
V
I
GL  
BE  
t
=
I
=
+
DRVN  
K
F-V  
R
h
+1  
BE  
FE  
I
IN(DC,MAX)  
1.8V/3.3V Regulator Controller  
The power dissipated in the 1.8V/3.3V regulator controller  
is given by:  
t
=
=
R-I  
F-I  
K
R-I  
I
IN(DC,MAX)  
P
= (V  
- V - V ) × I  
OUT_REG BE DR  
REG  
INA  
t
K
F-I  
where V  
= 1.8V or 3.3V, V is the base-emitter  
BE  
OUT_REG  
voltage of the external npn bipolar transistor, and I  
is  
DR  
K
R-V  
, K , K , and K  
are the voltage and current  
F-I  
slew rates of the LXP node and are supply dependent.  
Use Table 4 to determine their values.  
F-V  
R-I  
the current sourced from DR to the base of the transistor.  
is given by:  
I
DR  
I
LOAD  
I
=
DR  
Positive-Gate Voltage Regulator  
Use the lowest number of charge-pump stages possible  
in supplying power to the positive voltage regulator.  
Doing so minimizes the drain-source voltage of the inte-  
grated pMOS switch and power dissipation. The power  
dissipated in the switch is given as:  
h
+1  
FE  
where I  
is load current of the 1.8V/3.3V regulator  
controller, and h is the current gain of the transistor.  
LOAD  
FE  
Total Power Dissipation  
The total power dissipated in the package is the sum of  
the losses previously calculated. Therefore, total power  
dissipation can be estimated as follows:  
P
= (V - V ) × I  
CP GH LOAD(MAX)_GH  
GH  
Ensure that the voltage on CP does not exceed the  
CP overvoltage threshold as given in the Electrical  
Characteristics table.  
P = P  
+ P + P + P  
GH GL REG  
T
LXP  
Achieve maximum heat transfer by connecting the  
exposed pad to a thermal landing pad and connecting  
the thermal landing pad to a large ground plane through  
thermal vias.  
Negative-Gate Voltage Regulator  
Use the lowest number of charge-pump stages possible  
to provide the negative voltage to the negative-gate  
Table 4. LXP Voltage and Current Slew Rates vs. Supply Voltage  
LXP VOLTAGE AND CURRENT SLEW RATES  
RISING VOLTAGE  
SLEW RATE,  
FALLING VOLTAGE  
SLEW RATE,  
RISING CURRENT  
SLEW RATE,  
FALLING CURRENT  
SLEW RATE,  
V
(V)  
INA  
K
R-V  
(V/ns)  
K
(V/ns)  
K
(A/ns)  
K
(A/ns)  
F-V  
R-I  
F-I  
3.3  
0.52  
1.35  
1.7  
0.13  
0.3  
0.38  
0.44  
5
2
Maxim Integrated  
17  
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
3) Keep the high-current paths as short and wide as  
possible. Keep the path of switching currents short.  
Layout Considerations  
Careful PCB layout is critical in achieving stable and  
optimized performance. Follow these guidelines for good  
PCB layout:  
4) Place the feedback resistors as close as possible to  
the device. Connect the negative end of the resistive  
divider and the compensation network to the analog  
ground plane.  
1) Place decoupling capacitors as close as possible to  
the device. Connect the power ground planes and the  
analog ground plane together at one point close to the  
device.  
5) Route the high-speed switching node LXP away from  
sensitive analog nodes (FB, FBP, FBGH, FBGL, and  
REF).  
2) Connect input and output capacitors to the power  
ground planes; connect all other capacitors to the  
analog ground plane.  
Refer to the MAX16928 Evaluation Kit data sheet for a  
recommended PCB layout.  
Ordering Information  
REGULATOR V  
(V)  
BOOST I  
(A)  
REG  
LIM  
PART  
TEMP RANGE  
PIN-PACKAGE  
MAX16928AGUP/V+  
MAX16928BGUP/V+  
MAX16928CGUP/V+  
MAX16928DGUP/V+  
3.3  
1.8  
3.3  
1.8  
1.5  
1.5  
20 TSSOP-EP*  
20 TSSOP-EP*  
20 TSSOP-EP*  
20 TSSOP-EP*  
-40°C to +105°C  
-40°C to +105°C  
-40°C to +105°C  
-40°C to +105°C  
0.75  
0.75  
/V denotes an automotive qualified part.  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
*EP = Exposed pad.  
Chip Information  
Package Information  
For the latest package outline information and land patterns (foot-  
prints), go to www.maximintegrated.com/packages. Note that a  
“+”, “#”, or “-” in the package code indicates RoHS status only.  
Package drawings may show a different suffix character, but the  
drawing pertains to the package regardless of RoHS status.  
PROCESS: BiCMOS  
LAND  
PATTERN  
NO.  
PACKAGE  
TYPE  
PACKAGE  
CODE  
OUTLINE  
NO.  
20 TSSOP-EP  
U20E+1  
21-0108  
90-0114  
Maxim Integrated  
18  
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Typical Operating Circuit  
3V TO 5.5V  
R
COMPV  
C
C
COMPV  
COMP1  
INA  
COMPI  
COMPV  
GATE  
L
P
OPTIONAL  
1.8V/3.3V  
LXP  
V
SH  
DR  
FB  
V
TO 18V  
INA  
BOOST  
1.8V/3.3V  
REGULATOR  
CONTROLLER  
PGNDP  
FBP  
LXP  
V
CN  
V
OSCILLATOR  
CN  
CP  
GH  
DRVN  
FBGL  
V
SH  
POSITIVE  
GATE  
VOLTAGE  
REGULATOR  
NEGATIVE  
GATE  
VOLTAGE  
REGULATOR  
V
GH  
V
GL  
FBGH  
INA  
MAX16928  
REF  
PGOOD  
BANDGAP  
REFERENCE  
ENP  
SEQ  
CONTROL  
GND  
Maxim Integrated  
19  
 
MAX16928  
Automotive TFT-LCD Power Supply with Boost  
Converter and Gate Voltage Regulators  
Revision History  
REVISION REVISION  
PAGES  
CHANGED  
DESCRIPTION  
NUMBER  
DATE  
7/11  
1/12  
3/13  
0
1
2
Initial release  
13  
18  
Corrected the C  
formula in the Loop Compensation section  
COMPI  
Corrected typo in package code  
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent  
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and  
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.  
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000  
20  
©
2013 Maxim Integrated Products, Inc.  
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.  

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