MAX17841BGUEV [MAXIM]
Automotive SPI Communication Interface (ASCI);
| 型号： | MAX17841BGUEV |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Automotive SPI Communication Interface (ASCI) |
| 文件： | 总33页 (文件大小：1345K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX17841B
Automotive SPI Communication Interface (ASCI)
General Description
Benefits and Features
●ꢀ SupportsꢀMaxim’sꢀBatteryꢀManagementꢀUARTꢀ
The MAX17841B ASCI combines an SPI port with
a universal asynchronous receiver transmitter (UART)
specially designed to interface with Maxim battery
management devices.
Protocol
●ꢀ SPIꢀInterfaceꢀUpꢀtoꢀ4MHz
●ꢀ UARTꢀBaudꢀRateꢀProgrammableꢀUpꢀtoꢀ2Mbps
●ꢀ 3.3Vꢀorꢀ5VꢀOperation
The UART can be configured to automatically
performManchesterencoding/decoding,messageframing,
parity, wake-up, and keep-alive signaling as required for
Maxim’s battery management UART protocol.
●ꢀ Ultra-LowꢀQuiescentꢀCurrent
●ꢀ TransmitꢀandꢀReceiveꢀBuffersꢀwithꢀProgrammableꢀ
InterruptsꢀAllowꢀforꢀQueuingꢀofꢀUARTꢀMessages
The UART has programmable baud rates of 0.5Mbps,
1Mbps, or 2Mbps and supports either single-ended or
differential signaling. For host efficiency, the UART
contains a 28-byte transmit buffer and a 62-byte receive
buffer with host-configurable interrupt events.
●ꢀ ManchesterꢀEncoderꢀandꢀDecoderꢀReducesꢀHostꢀ
Controller Burden
●ꢀ OperatingꢀTemperatureꢀRangeꢀfromꢀ-40°Cꢀtoꢀ+105°Cꢀ
(AEC-Q100ꢀTypeꢀ2)
●ꢀ SupportsꢀASILꢀRequirements
Applications
●ꢀ BatteryꢀManagementꢀSystemsꢀ(BMS)
●ꢀ ElectricꢀandꢀHybridꢀVehiclesꢀ(EV/HEV)
●ꢀ EnergyꢀStorageꢀSystemsꢀ(ESS)
Ordering Information appears at end of data sheet.
Simplified Operating Circuit
V
AA
MASTER
SLAVE(S)
V
CC
5V DC
DCIN
V
DDL
SUPPLY
V
AA
1µF
GNDL
0.1µF
V
AA
1µF
AGND
ISOLATORS
1.5kΩ
1.5kΩ
V
CC
RXP
MAX178xx
15pF
15pF
MAX17841B
TXPL
TXNL
100kΩ
RXN
BATTERY
MANAGEMENT
DEVICE
MISO
MOSI
SCLK
SS
DOUT
DIN
SCLK
CS
47Ω
47Ω
V
CC
TXP
TXN
SYSTEM
µP
RXPL
RXNL
100kΩ
IRQ
INT
100Ω
GPIO
SHDN
0.01µF
19-6790; Rev 2; 1/15
MAX17841B
Automotive SPI Communication Interface (ASCI)
Absolute Maximum Ratings
DCINꢀtoꢀAGND ........................................................-0.3Vꢀtoꢀ+6V
Maximum Continuous Current into Any Pin .......................20mA
MaximumꢀAverageꢀPowerꢀforꢀESDꢀDiodesꢀ(Noteꢀ1) .... 14.4/√τW
ContinuousꢀPowerꢀDissipation
V
V
ꢀtoꢀAGND...........................................................-0.3Vꢀtoꢀ+4V
AA
ꢀtoꢀGNDL.........................................................-0.3Vꢀtoꢀ+4V
DDL
AGNDꢀtoꢀGNDL......................................................-0.3Vꢀtoꢀ+0.3V
OnꢀMultilayerꢀBoardꢀ(T ꢀ=ꢀ+70°C)
A
TXP,ꢀTXNꢀtoꢀGNDL................................. -0.3Vꢀtoꢀ(V
ꢀ+ꢀ0.3V)
ꢀ+ꢀ0.3V)
16ꢀTSSOPꢀ(derateꢀ11.1mW/ºCꢀaboveꢀ+70ºC).............889mW
OperatingꢀTemperatureꢀRange......................... -40°Cꢀtoꢀ+105°C
Storage Temperature Range............................ -55°Cꢀtoꢀ+150°C
Junction Temperature (Continuous) ................................+150°C
SolderingꢀLeadꢀTemperatureꢀforꢀ10s...............................+300°C
DDL
DOUTꢀtoꢀGNDL .....................................-0.3Vꢀtoꢀ(V
DCIN
CTGꢀtoꢀAGND............................................................-0.3Vꢀtoꢀ+8V
SHDNꢀtoꢀAGND.....................................-0.3Vꢀtoꢀ(V ꢀ+ꢀ0.3V)
DCIN
CS,ꢀDIN,ꢀSCLK,ꢀINTꢀtoꢀGNDL.................................-0.3Vꢀtoꢀ+6V
RXP,ꢀRXNꢀtoꢀGNDL................................................-30Vꢀtoꢀ+30V
Note 1: Average power for time period τ where τ is the time constant (in µs) of the transient diode current during a hot-plug event.
For, example, if τꢀisꢀ330µs,ꢀtheꢀmaximumꢀaverageꢀpowerꢀisꢀ0.793W.ꢀPeakꢀcurrentꢀmustꢀneverꢀexceedꢀ2A.ꢀActualꢀaverageꢀ
power during hot-plug must be calculated from the diode current waveform for the application circuit and compared to the
maximum rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
ꢀ=ꢀ5V,ꢀV = V
ꢀ=ꢀ3.3V,ꢀT = T
to T
, unless otherwise noted, where T
ꢀ=ꢀ-40°CꢀandꢀT
ꢀ=ꢀ+105°C.ꢀTypicalꢀvaluesꢀ
MAX
DCIN
AA
DDL
A
MIN
MAX
MIN
are at T ꢀ=ꢀ+25°C.ꢀOperationꢀisꢀwithꢀtheꢀrecommendedꢀapplicationꢀcircuit.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS
V
V
ꢀ=ꢀV ꢀ=ꢀV =ꢀ3.3Vꢀnominal
3.1
3.3
5.0
4
3.5
5.5
10
DCIN
AA
DDLꢀ
SupplyꢀVoltage
V
V
DCIN
ꢀ=ꢀ5Vꢀnominal;ꢀV ꢀ=ꢀV
4.5
DCIN
AA
DDL
V
ꢀ=ꢀV ꢀ=ꢀ3.3V
DCIN
DCIN
AA
I
V
ꢀ=ꢀ0V
µA
SHUTDOWN
SHDN
V
ꢀ=ꢀ5V
1
10
I
SHDN high, f
= 0, f = 0
UART
1.0
1.0
2.3
5.0
STANDBY
SCLK
Supply Current
ContinuousꢀSPIꢀwritesꢀatꢀ4MHz,ꢀ50pFꢀ
TXPꢀload,ꢀ50pFꢀTXNꢀload,ꢀf
mA
I
=
UART
4
6
ACTIVE
2Mbps, Transmit Preambles mode
REGULATOR
0mA < I
4.5Vꢀ<ꢀV
< 10mA,
VAAꢀ
OutputꢀVoltage
V
3.13
3.30
3.46
V
AA
ꢀ<ꢀ5.5V
DCIN
Short-Circuit Current
I
V
V
V
=ꢀAGND
falling
13.0
2.8
26.0
2.9
120.0
3.0
mA
AASC
AA
AA
AA
V
AARESET
PORꢀThreshold
PORꢀHysteresis
V
V
rising
2.9
3.0
3.1
AAVALID
V
40.0
100
mV
AAHYS
LOGIC INPUTS (SHDN, CS, DIN, SCLK)
Pulldown Resistance (CS)
R
V
V
ꢀ=ꢀ5V
5.5
12
28.8
MΩ
MΩ
CS
CS
Pulldown Resistance (SHDN)
R
ꢀ=ꢀ5V
0.75
1.5
3.0
SHDN
SHDN
InputꢀLeakageꢀCurrentꢀ(DIN,ꢀ
SCLK)
I
V
,ꢀV ꢀ=ꢀ0V
-1.0
+1.0
µA
LKG
DIN SCLK
InputꢀLowꢀThreshold
InputꢀHighꢀThresholdꢀ
V
0.3ꢀxꢀV
V
V
IL
DCIN
V
0.7ꢀxꢀV
DCIN
IH
Maxim Integrated
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Electrical Characteristics (continued)
(V
ꢀ=ꢀ5V,ꢀV = V
ꢀ=ꢀ3.3V,ꢀT = T
to T
, unless otherwise noted, where T
ꢀ=ꢀ-40°CꢀandꢀT
ꢀ=ꢀ+105°C.ꢀTypicalꢀvaluesꢀ
MAX
DCIN
AA
DDL
A
MIN
MAX
MIN
are at T ꢀ=ꢀ+25°C.ꢀOperationꢀisꢀwithꢀtheꢀrecommendedꢀapplicationꢀcircuit.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC OUTPUTS (DOUT, INT)
OutputꢀLeakageꢀCurrent
I
V
ꢀ=ꢀ0ꢀandꢀ5V,ꢀV ꢀ=ꢀ5V
-1.0
+1.0
µA
LKG
DOUT
INT
V
+ꢀ
GNDLꢀ
0.4
OutputꢀLowꢀVoltageꢀ
V
I
I
= -2mA
V
OL
OLꢀ
V
- 0.4
DCIN
OutputꢀHighꢀVoltageꢀ(DOUT)
V
= 2mA
V
OH
OHꢀ
POWER AND GROUND FAULT DETECTION
OpenꢀDetectionꢀVoltageꢀ(V
)
V
V
V
V
ꢀ=ꢀ3.3V
2.8
3.0
V
V
V
DDL
VDDLALRT
GNDLALRT
AGNDALRT
AA
OpenꢀDetectionꢀVoltageꢀ(GNDL)
OpenꢀDetectionꢀVoltageꢀ(AGND)
UART INPUTS (RXP, RXN)
V
ꢀ=ꢀ0V
ꢀ=ꢀ0V
0.13
0.13
0.25
0.25
AGND
V
GNDL
V
V
GNDL
- 28
GNDL
+ꢀ28
RXPꢀInputꢀVoltage
RXNꢀInputꢀVoltage
V
V
V
V
RXP
V
V
GNDL
+ꢀ28
GNDL
RXN
- 28
V
-
/2
DDL
V
/2ꢀ+ꢀ
DDL
DifferentialꢀInputꢀHighꢀThreshold
V
(Noteꢀ2)
(Noteꢀ2)
V
/2
V
mV
V
TH
DDL
400mV
400mV
DifferentialꢀInputꢀZero-Crossingꢀ
Threshold
V
-400
0
+400
ZC
-V
/
DDL
-V
/
-V
/2
DDL
DDL
2
DifferentialꢀInputꢀLowꢀThreshold
V
(Noteꢀ2)
(Noteꢀ2)
2 -
400mV
TL
+ꢀ400mV
DifferentialꢀInputꢀHysteresis
Common-ModeꢀVoltageꢀBias
V
25
75
150
mV
V
HYST
V
/3ꢀ
V
/3ꢀ
DDL
DDL
V
V
/3
DDL
CM
- 0.1
+ꢀ0.1
Input Capacitance
C
2
pF
µA
IN
LeakageꢀCurrent
I
-30
+30
LKG
InputꢀResistanceꢀtoꢀV
R
1.1
MΩ
CM
RXIN
UART OUTPUTS (TXP, TXN)
V
ꢀ+ꢀ
GNDL
0.4
OutputꢀLowꢀVoltage
V
I
I
= -20mA
V
V
OL
OLꢀ
V
-
DDL
0.4
OutputꢀHighꢀVoltage
V
= 20mA
OHꢀ
OH
SPI TIMING
SCLKꢀFrequency
CSꢀtoꢀSCLKꢀSetupꢀTime
CSꢀHighꢀPulseꢀWidth
SCLKꢀHighꢀTime
SCLKꢀLowꢀTime
f
4
MHz
ns
SCLK
t
250
200
100
100
CSS
t
ns
CSWH
t
ns
CH
t
ns
CL
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Electrical Characteristics (continued)
(V
ꢀ=ꢀ5V,ꢀV = V
ꢀ=ꢀ3.3V,ꢀT = T
to T
, unless otherwise noted, where T
ꢀ=ꢀ-40°CꢀandꢀT
ꢀ=ꢀ+105°C.ꢀTypicalꢀvaluesꢀ
MAX
DCIN
AA
DDL
A
MIN
MAX
MIN
are at T ꢀ=ꢀ+25°C.ꢀOperationꢀisꢀwithꢀtheꢀrecommendedꢀapplicationꢀcircuit.)
A
PARAMETER
SCLKꢀFallꢀtoꢀDOUTꢀValid
DINꢀtoꢀSCLKꢀSetupꢀTime
DINꢀtoꢀSCLKꢀHoldꢀTime
UART TIMING
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ns
t
30
DO
t
10
ns
DS
DH
t
30
ns
f
f
f
f
f
f
f
f
f
f
f
f
= 2Mbps
8
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
UART
BitꢀPeriodꢀExceptꢀforꢀSecondꢀ
STOPꢀBitꢀ(Notesꢀ3,ꢀ4)
t
= 1Mbps
= 0.5Mbps
= 2Mbps
= 1Mbps
= 0.5Mbps
= 2Mbps
= 1Mbps
= 0.5Mbps
= 2Mbps
= 1Mbps
= 0.5Mbps
16
32
9
1/f
1/f
1/f
BIT
OSC
OSC
OSC
SecondꢀSTOPꢀBitꢀPeriodꢀ
(Notesꢀ3,ꢀ4)
t
18
36
STOPBIT
0
0
0
8
Rx Idle to START Setup Time
(Notesꢀ3,ꢀ4)
t
16
32
RXSTSU
8
Tx Idle to START Setup Time
(Notesꢀ3,ꢀ4)
t
16
32
1/f
1/f
1/f
TXSTSU
OSC
OSC
OSC
STOPꢀHoldꢀTimeꢀtoꢀIdleꢀ
(Notesꢀ3,ꢀ4)
t
4
SPHD
f
= 2Mbps
= 1Mbps
= 0.5Mbps
8
UART
RxꢀMinimumꢀIdleꢀTimeꢀ(STOPꢀ
BitꢀtoꢀSTARTꢀBit)ꢀ(Notesꢀ3,ꢀ4)
t
t
f
16
32
RXIDLESPST UART
f
UART
Tx Minimum Idle Time
(Notesꢀ3,ꢀ4)
10
1/f
1/f
TXIDLESPST
OSC
OSC
f
f
f
f
f
f
= 2Mbps
= 1Mbps
= 0.5Mbps
= 2Mbps
= 1Mbps
= 0.5Mbps
4
8
UART
UART
UART
UART
UART
UART
RxꢀFallꢀTimeꢀ(Notesꢀ3–5)
RxꢀRiseꢀTimeꢀ(Notesꢀ3–5)
t
FALL
16
4
t
8
1/f
RISE
OSC
16
Startup Time (SHDNꢀHighꢀtoꢀ
RXPꢀValid)
t
800
2000
µs
STARTUP
OscillatorꢀFrequency
f
15.68
16.00
16.32
MHz
OSC
UART MESSAGE TIMING
SPIꢀCommandꢀtoꢀTxꢀValidꢀDelayꢀ
(Noteꢀ6)
t
4 x t
5 x t
BIT
TX
BIT
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Electrical Characteristics (continued)
(V
ꢀ=ꢀ5V,ꢀV = V
ꢀ=ꢀ3.3V,ꢀT = T
to T
, unless otherwise noted, where T
ꢀ=ꢀ-40°CꢀandꢀT
ꢀ=ꢀ+105°C.ꢀTypicalꢀvaluesꢀ
MAX
DCIN
AA
DDL
A
MIN
MAX
MIN
are at T ꢀ=ꢀ+25°C.ꢀOperationꢀisꢀwithꢀtheꢀrecommendedꢀapplicationꢀcircuit.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
n x
UNITS
TxꢀValidꢀtoꢀRxꢀValidꢀUpꢀStackꢀ
Delayꢀ(Noteꢀ7)
t
RXUP
t
PROP
n x
TxꢀValidꢀtoꢀRxꢀValidꢀDownꢀStackꢀ
Delayꢀ(Noteꢀ7)
t
RXDN
t
PROP
EndꢀofꢀSTOPꢀCharacterꢀtoꢀ
RX_Stop_INTꢀFlagꢀTrueꢀ
(Noteꢀ8)
t
2 x t
BIT
INT
SPI START to UART Slave
DeviceꢀRegisterꢀWriteꢀDelayꢀ
(Notesꢀ9,ꢀ10)
8 / f
130ꢀxꢀt ꢀ+ꢀ
n x t
ꢀ+ꢀ
SCLK
t
REGWR
BIT
PROP
Note 2:ꢀ Differentialꢀsignalꢀ(V
ꢀ-ꢀV
)ꢀwhereꢀV
,ꢀV
ꢀdoꢀnotꢀexceedꢀaꢀcommon-modeꢀvoltageꢀrangeꢀofꢀ±25V.
RXP
RXN
RXP RXN
Note 3: All parameters measured based on differential signal.
Note 4:ꢀ Guaranteedꢀbyꢀdesignꢀandꢀnotꢀproductionꢀtested.
Note 5: Fall time measured 90% to 10%, rise time measured 10% to 90%.
Note 6:ꢀ Measuredꢀfromꢀfallingꢀedgeꢀofꢀ8thꢀSCLKꢀcycleꢀofꢀtheꢀWR_NXT_LD_QꢀSPIꢀcommandꢀbyteꢀ(B0h).
Note 7: t
is the maximum propagation delay through a slave device in a given direction. Refer to the UART slave device data
PROP
sheet for the actual delay. The number of UART slave devices is denoted by n.
Note 8: Measured from end of 12th bit of stop character.
Note 9: Parameter t
is the minimum amount of time needed to write a register in the nth slave device of the daisy-chain. It is
REGWRꢀ
measuredꢀfromꢀtheꢀstartꢀofꢀtheꢀSPIꢀtransactionꢀWR_NXT_LD_Qꢀ(B0h)ꢀthatꢀinitiatesꢀtransmissionꢀofꢀaꢀWRITEALLꢀmessageꢀ
toꢀwhenꢀtheꢀnthꢀdeviceꢀreceivesꢀaꢀvalidꢀWRITEALLꢀmessage.ꢀForꢀexample,ꢀforꢀ4MHzꢀSPIꢀfrequency,ꢀ2MbpsꢀUARTꢀbaudꢀ
rate, n = 10 and t
=ꢀ3ꢀxꢀt , t
=ꢀ2μsꢀ+ꢀ65μsꢀ+ꢀ15μsꢀ=ꢀ82μs.
PROPꢀ
BIT REGWRꢀ
Note 10:Computation of t
consists of three terms: 1) duration of the SPI transaction, 2) partial duration of the UART
REGWR
message,ꢀandꢀ3)ꢀpropagationꢀdelayꢀofꢀtheꢀUARTꢀmessage.ꢀTheꢀfirstꢀtermꢀequalsꢀtheꢀnumberꢀofꢀbitsꢀinꢀtheꢀSPIꢀtransactionꢀ
(8) x the SPI bit time (1 / f ).ꢀTheꢀsecondꢀtermꢀequalsꢀtheꢀtimeꢀfromꢀtheꢀstartꢀofꢀtheꢀWRITEALLꢀmessageꢀtoꢀtheꢀfirstꢀ
SCLK
STOPꢀbitꢀofꢀtheꢀlastꢀPECꢀnibble.ꢀTheꢀlastꢀPECꢀnibbleꢀisꢀtheꢀ11thꢀcharacterꢀinꢀtheꢀmessage.ꢀWithꢀeachꢀcharacterꢀlastingꢀ12ꢀ
UARTꢀbitꢀtimes,ꢀthereꢀareꢀ11ꢀxꢀ12ꢀ=ꢀ132ꢀbitꢀtimesꢀfromꢀtheꢀstartꢀofꢀtheꢀmessageꢀtoꢀtheꢀendꢀofꢀtheꢀlastꢀPECꢀnibble.ꢀSinceꢀtheꢀ
writeꢀoccursꢀjustꢀbeforeꢀtheꢀtwoꢀSTOPꢀbitsꢀofꢀtheꢀ11thꢀcharacter,ꢀtheꢀtermꢀisꢀactuallyꢀ130ꢀxꢀt . The third term is the propa-
BIT
gationꢀdelayꢀrequiredꢀforꢀtheꢀWRITEALLꢀmessageꢀtoꢀgetꢀtoꢀtheꢀnthꢀdevice.
t
t
CSWH
CSSO
CS
t
t
CL
CH
1
2
3
4
5
6
7
8
9
10
SCLK
t
DS
t
DH
DIN
t
DO
DOUT
Figure 1. SPI Timing Diagram (Example of Reading Register 0x1B with Data 80h and Transaction Terminated Prematurely)
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MAX17841B
Automotive SPI Communication Interface (ASCI)
t
BIT
t
RXSTSU
t
RISE
t
t
SPHD
t
t
RXIDLESPST
BIT
FALL
RXP-RXN
S
0
1
2
3
4
5
6
7
E
P
P
S
0
P
P
Figure 2. Receive UART Timing
t
TXSTSU
t
t
STOPBIT
TXIDLESPST
TXP-TXN
S
0
1
2
3
4
5
6
7
E
P
P
S
0
P
P
Figure 3. Transmit UART Timing
CS
WR_NXT_LD_Q
(BOh)
WRITE DATA
DIN
t
TX
PREAMBLE
MESSAGE
STOP
IDLE
TXP-TXN
t
TXSTSU
PREAMBLE
MESSAGE
STOP
IDLE
RXP-RXN
INT
t
t
INT
RXUP
t
RXDN
Figure 4. UART Message Timing
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Pin Configuration
TOP VIEW
+
1
16
15
14
13
12
11
10
9
RXP
V
AA
AGND
DCIN
SHDN
CS
RXN
GNDL
2
3
4
5
MAX17841B
V
DDL
TXP
TXN
CTG
INT
6
7
8
DIN
DOUT
SCLK
TSSOP
Pin Description
PIN
NAME
FUNCTION
DESCRIPTION
PowerꢀOutputꢀforꢀLDOꢀRegulatorꢀ(5VꢀModeꢀOnly)ꢀandꢀSupplyꢀforꢀOscillator.ꢀForꢀ5Vꢀmode,ꢀ
1
V
Power
connectꢀtoꢀV
.ꢀForꢀ3.3Vꢀmode,ꢀconnectꢀthisꢀpinꢀtoꢀ3.3Vꢀsupply.ꢀDecoupleꢀperꢀapplicationꢀ
DDL
AA
circuit.
2
AGND
DCIN
Ground
AnalogꢀGround.ꢀConnectꢀtoꢀtheꢀpowerꢀsupplyꢀground.
PowerꢀInputꢀforꢀLDOꢀRegulatorꢀandꢀSPIꢀPort.ꢀForꢀ5Vꢀmode,ꢀconnectꢀtoꢀ5Vꢀsupply.ꢀForꢀ3.3Vꢀ
mode,ꢀconnectꢀthisꢀpinꢀtoꢀ3.3Vꢀsupply.ꢀDecoupleꢀperꢀapplicationꢀcircuit.
3
Power
Active-LowꢀShutdownꢀInput.ꢀConnectꢀtoꢀhostꢀGPIO.ꢀAssertꢀtoꢀplaceꢀdeviceꢀinꢀshutdownꢀ
mode.ꢀInꢀthisꢀmode,ꢀtheꢀregulatorꢀisꢀdisabledꢀandꢀtheꢀdeviceꢀisꢀreset.ꢀThisꢀpinꢀhasꢀaꢀ1.5MΩꢀ
internalꢀpulldown.ꢀ5Vꢀtolerant.
4
Input
SHDN
Active-LowꢀSPIꢀChip-SelectꢀInput.ꢀConnectꢀtoꢀtheꢀSlave_SelectꢀoutputꢀofꢀtheꢀSPIꢀmaster.ꢀ
AssertꢀtoꢀenableꢀtheꢀSPIꢀport.ꢀThisꢀpinꢀhasꢀaꢀ12MΩꢀinternalꢀresistorꢀtoꢀground.ꢀ5Vꢀtolerant.
5
6
Input
Input
CS
DIN
SPIꢀDataꢀInput.ꢀConnectꢀtoꢀDOUT/MOSIꢀoutputꢀofꢀSPIꢀmaster.ꢀ5Vꢀtolerant.
SPIꢀDataꢀOutput.ꢀConnectꢀtoꢀDIN/MISOꢀinputꢀofꢀSPIꢀmaster.ꢀThisꢀoutputꢀisꢀthree-statedꢀ
when CS is deasserted. When CSꢀisꢀasserted,ꢀthisꢀpinꢀisꢀdrivenꢀbetweenꢀDCINꢀandꢀAGNDꢀ
supplies.
7
DOUT
SCLK
Output
8
9
Input
Output
Ground
Output
SPIꢀClockꢀInput.ꢀConnectꢀtoꢀSCLKꢀoutputꢀofꢀSPIꢀmaster.ꢀ5Vꢀtolerant.
Active-Low,ꢀOpen-DrainꢀInterruptꢀOutput.ꢀConnectꢀaꢀpullupꢀresistorꢀtoꢀthisꢀpinꢀperꢀapplicationꢀ
requirements.ꢀThisꢀpinꢀisꢀassertedꢀifꢀanyꢀinterruptꢀflagꢀisꢀset.
INT
CTG
TXN
10
11
Reservedꢀforꢀfactoryꢀuse.ꢀConnectꢀtoꢀAGND.ꢀ
UARTꢀTransmitterꢀNegativeꢀOutput.ꢀConnectꢀtoꢀRxꢀportꢀnegativeꢀinputꢀcircuitꢀofꢀUARTꢀslaveꢀ
deviceꢀperꢀapplicationꢀcircuit.ꢀThisꢀpinꢀisꢀdrivenꢀbetweenꢀtheꢀV
ꢀandꢀGNDLꢀsupplies.
DDL
UARTꢀTransmitterꢀPositiveꢀOutput.ꢀConnectꢀtoꢀRxꢀportꢀpositiveꢀinputꢀcircuitꢀofꢀUARTꢀslaveꢀ
deviceꢀperꢀapplicationꢀcircuit.ꢀThisꢀpinꢀisꢀdrivenꢀbetweenꢀtheꢀV ꢀandꢀGNDLꢀsupplies.
12
TXP
Output
DDL
13
V
Power
3.3VꢀDigitalꢀandꢀUARTꢀPortꢀPower.ꢀConnectꢀtoꢀV .ꢀDecoupleꢀperꢀapplicationꢀcircuit.
DDL
AA
14
GNDL
Ground
DigitalꢀandꢀUARTꢀPortꢀGround.ꢀConnectꢀtoꢀAGND.
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Pin Description (continued)
PIN
NAME
FUNCTION
DESCRIPTION
UARTꢀReceiverꢀNegativeꢀInput.ꢀConnectꢀtoꢀTxꢀportꢀnegativeꢀoutputꢀofꢀUARTꢀslaveꢀdeviceꢀ
per application circuit.
15
RXN
Output
UART Receiver Positive Input. Connect to Tx port positive output of UART slave device per
application circuit.
16
RXP
Output
Together with the host controller, the ASCI is the mas-
ter for communications with the slave devices. Figure 5
shows the functional block diagram. Table 1 shows how
power is distributed inside the device.
Detailed Description
The MAX17841B allows any host controller with an SPI
port to communicate with one or more battery manage-
ment slave devices that use Maxim’s battery manage-
ment UART protocol.
Serial Peripheral Interface (SPI)
The SPI port is a synchronous data link that the host uses
to read and write the ASCI registers and the UART com-
munication buffers.
Table 1. Internal Power Distribution
BLOCK
SUPPLY
Oscillator
V
SPI Transactions
AA
SPIꢀPortꢀandꢀLDOꢀRegulator
Digital,ꢀUART,ꢀandꢀControl
DCIN
An SPI transaction is initiated when the host drives the CS
pin low. The host always transmits data most-significant
bit (MSB) first to the ASCI. After the first byte, it can termi-
V
DDL
CS
SCLK
DIN
RXP
RECEIVE
BUFFER
UART
DECODER
RECEIVER
RXN
SPI SLAVE
CONTROLLER
V
DD
V
DDL
CONTROLLER
REGISTERS
GNDL
DCIN
DOUT
INT
TRANSMIT
BUFFER
MAX17841B
16MHz
OSCILLATOR
TXP
TXN
FILL BYTE
GENERATOR
UART
ENCODER
TRANSMITTER
3.3V
SHDN
DCIN
3.3V LDO
REGULATOR
AGND
V
AA
Figure 5. Functional Diagram
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MAX17841B
Automotive SPI Communication Interface (ASCI)
nate the transaction (single-byte transaction), continue to
clock data out (write transaction), or start clocking data in
(readꢀtransaction).ꢀHowever,ꢀitꢀdoesꢀnotꢀsendꢀandꢀreceiveꢀ
data at the same time (half-duplex operation).
UART Interface
Slave devices that use Maxim’s battery management
UART protocol can be connected in daisy-chain fashion to
manage a multiple battery-cell stack. In a BMS, or Battery
Management System, the BMS controller is the host for
all slave devices and initiates all communication. The data
flow always starts from the host, goes up the daisy-chain
and back down to the host as represented in Figure 6.
Register Transactions
For register transactions, the host first sends a single-byte
register address. Register addresses are either read-only
(odd addresses) or write-only (even addresses). For a
read transaction, the second byte is the read data sent by
the ASCI to the host. For a write transaction, the second
byte is the write data sent by the host to the ASCI. Multiple
data bytes are allowed as long as CS remains active-
low—the ASCI automatically selects the next read-only
register address (for reads) or the next write-only address
(for writes). The SPI transaction is terminated when the
host drives CS high.
CHOOSE
INTERNAL OR
EXTERNAL
LOOPBACK
RXUP RXUN
TXUP TXUN
RXLP RXLN
BATTERY
PACK n
DEVICE (n)
Buffer Transactions
TXLP TXLN
Buffer transactions can consist of only a command byte,
a command byte followed by one or more read bytes, or
a command byte followed by one or more write bytes. All
allowed transactions are specified in Table 9.
OPTIONAL
SERVICE
DISCONNECT
SPI Timing
TheꢀASCIꢀisꢀonlyꢀcompatibleꢀwithꢀSPIꢀmodeꢀ0ꢀ(CPOLꢀ=ꢀ
0/CPHAꢀ=ꢀ0).ꢀInꢀthisꢀmode,ꢀdataꢀisꢀalwaysꢀdrivenꢀonꢀtheꢀ
fallingꢀedgeꢀofꢀSCLKꢀandꢀisꢀalwaysꢀsampledꢀonꢀtheꢀrisingꢀ
edgeꢀofꢀSCLK.ꢀ
RXUP RXUN
TXLP TXLN
TXUP TXUN
BATTERY
PACK (n - 1)
DEVICE (n-1)
RXLP RXLN
Forꢀreads,ꢀtheꢀASCIꢀstartsꢀdrivingꢀDOUTꢀonꢀtheꢀfirstꢀfall-
ingꢀ edgeꢀ ofꢀ SCLKꢀ immediatelyꢀ afterꢀ theꢀASCIꢀ samplesꢀ
theꢀ least-significantꢀ bitꢀ (LSB)ꢀ ofꢀ theꢀ command/addressꢀ
byte.ꢀDINꢀisꢀaꢀ“don’tꢀcare”ꢀwhileꢀreading.ꢀReadsꢀattemptedꢀ
beyondꢀtheꢀaddressꢀspaceꢀreturnꢀzero.
RXUP RXUN
TXUP TXUN
RXLP RXLN
BATTERY
PACK 1
DEVICE 1
TXLP TXLN
For writes, registers are written on the falling edge of
SCLK,ꢀafterꢀtheꢀlastꢀbitꢀisꢀsampled.ꢀHowever,ꢀifꢀCS goes
highꢀbeforeꢀtheꢀlastꢀbit’sꢀfallingꢀedgeꢀofꢀSCLK,ꢀthatꢀregisterꢀ
is not written.
ISOLATION
Table 2. SPI Communication Summary
PARAMETER
Communication Mode
Maximum Clock Frequency
BitꢀOrder
VALUE
Half-duplex
MAX17841B
4MHz
Most-significantꢀbitꢀfirst
0 (leading clock edge is
rising edge)
µC
ClockꢀPolarityꢀ(CPOL)
ClockꢀPhaseꢀ(CPHA)
BMS
0 (data sampled on leading
clock edge)
Figure 6. System Data Flow
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Automotive SPI Communication Interface (ASCI)
Eachꢀdataꢀbyteꢀisꢀtransmittedꢀandꢀreceivedꢀasꢀtwoꢀsepa-
Battery Management UART Protocol
rate characters, one 12-bit character for each 4-bit data
nibble.ꢀEachꢀManchester-encodedꢀnibbleꢀactuallyꢀrequiresꢀ
eight data bits: four true bits and four inverted bits.
The ASCI uses a UART protocol specifically designed for
Maxim battery management devices. This protocol uses
theꢀ followingꢀ featuresꢀ toꢀ maximizeꢀ theꢀ integrityꢀ ofꢀ theꢀ
communications:
In its default configuration, when the ASCI transmits a mes-
sage, it automatically performs the following functions:
●ꢀ Allꢀ transmittedꢀ dataꢀ areꢀ Manchester-encodedꢀ whereꢀ
each data bit is transmitted twice with the second bit
invertedꢀ(G.E.ꢀThomasꢀconvention).
●ꢀ Framesꢀtheꢀmessageꢀwithꢀtheꢀrequiredꢀpreambleꢀchar-
acter at the beginning of the message.
●ꢀ Everyꢀ transmittedꢀ characterꢀ containsꢀ 12ꢀ bitsꢀ thatꢀ
includeꢀaꢀSTARTꢀbit,ꢀaꢀparityꢀbit,ꢀandꢀtwoꢀSTOPꢀbits.
●ꢀ Manchesterꢀencodesꢀeachꢀdataꢀnibbleꢀandꢀtransmitsꢀ
each encoded nibble with the required START, parity,
andꢀSTOPꢀbits.
●ꢀ Eachꢀ messageꢀ containsꢀ aꢀ CRC-8ꢀ packetꢀ error-
checkingꢀ(PEC)ꢀbyte
●ꢀ Transmitsꢀtheꢀmessageꢀatꢀtheꢀconfiguredꢀbaudꢀrateꢀofꢀ
0.5Mbps, 1Mbps, or 2Mbps.
●ꢀ Eachꢀmessageꢀisꢀframedꢀbyꢀaꢀpreambleꢀcharacterꢀandꢀ
stop character.
●ꢀ Framesꢀtheꢀmessageꢀwithꢀtheꢀrequiredꢀstopꢀcharacterꢀ
at the end of the message.
●ꢀ Eachꢀ receivedꢀ messageꢀ containsꢀ aꢀ data-checkꢀ byteꢀ
for verifying the integrity of the transmission.
These automatic functions can be disabled by enabling
the following special transmit modes:
Theꢀ protocolꢀ isꢀ alsoꢀ designedꢀ toꢀ minimizeꢀ powerꢀ con-
sumption by allowing slave devices to shut down if the
data link is idle for a specified period of time. To prevent
the unintentional shutdown of slave devices, the host
shouldꢀenableꢀtheꢀASCI’sꢀKeep-Aliveꢀmodeꢀtoꢀperiodicallyꢀ
transmit stop characters. The time period between stop
characters is configurable by the host.
●ꢀ Transmitꢀ Noꢀ Preambleꢀ modeꢀ (eliminatesꢀ preambleꢀ
characters)
●ꢀ TransmitꢀNoꢀStopꢀmodeꢀ(eliminatesꢀstopꢀcharacters)
●ꢀ Transmitꢀ Rawꢀ Dataꢀ modeꢀ (transmitsꢀ dataꢀ withꢀ noꢀ
Manchester encoding)
●ꢀ Receiveꢀ Rawꢀ Dataꢀ modeꢀ (receivesꢀ dataꢀ asꢀ notꢀ
UART Messages
Manchester encoded)
A message is defined as a sequence of UART characters.
The message starts with a preamble character, followed
by data characters, and ending with a stop character.
Preamble Character
The preamble is a framing character that the UART
generates to signal the beginning of a message. It is
transmittedꢀasꢀanꢀunencodedꢀ15h,ꢀbutꢀisꢀstillꢀaꢀDC-balancedꢀ
character.ꢀIfꢀanyꢀbit(s)ꢀotherꢀthanꢀtheꢀSTOPꢀbitsꢀdeviateꢀ
from the unique preamble sequence, the character is
not interpreted as a valid preamble, but rather as a data
character.
Eachꢀcharacterꢀconsistsꢀofꢀtheꢀfollowingꢀ12ꢀbits:
●ꢀ OneꢀSTARTꢀbit
●ꢀ Eightꢀdataꢀbitsꢀ(LSBꢀfirst)
●ꢀ Oneꢀparityꢀbitꢀ(even)
●ꢀ TwoꢀSTOPꢀbits
S
1
0
1
0
1
0
0
0
E = 1
P
P
OPTIONAL
IDLE
OPTIONAL
IDLE
IDLE
DISABLE
IDLE
ENABLE
Figure 7. UART Timing for a Preamble
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Automotive SPI Communication Interface (ASCI)
OPTIONAL
IDLE
OPTIONAL
IDLE
S
0
0
1
0
1
0
1
0
E = 1
P
P
IDLE
DISABLE
IDLE
ENABLE
Figure 8. UART Timing for a Stop Character
DATA NIBBLE = 0h
0
0
0
0
OPTIONAL
IDLE
OPTIONAL
IDLE
S
0
1
0
1
0
1
0
1
E = 0
P
P
IDLE
DISABLE
IDLE
ENABLE
Figure 9. UART Timing for a Manchester-Encoded Data Nibble 0h
Stop Character
Manchester Encoding
The stop character is a framing character that the UART
generates to signal the end of a message. It is transmit-
tedꢀ asꢀ anꢀ unencodedꢀ 54h,ꢀ butꢀ itꢀ isꢀ stillꢀ aꢀ DC-balancedꢀ
character.
Eachꢀ dataꢀ byteꢀ isꢀ transmittedꢀ asꢀ twoꢀ separateꢀ nibblesꢀ
(four bits) that are Manchester-encoded. For each data
bit, the first bit represents the information and the
second bit is its complement. The parity is even so its
value should always result in an even number of high
bits. Since the data is Manchester-encoded and there are
twoꢀSTOPꢀbits,ꢀtheꢀparityꢀbitꢀforꢀdataꢀcharactersꢀ(butꢀnotꢀ
framingꢀcharacters)ꢀshouldꢀalwaysꢀbeꢀzero.
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Data Types
Assigning Slave Device Addresses
Maxim’s battery management UART protocol supports
several different data types as described in Tableꢀ3. The
ASCI does not interpret the significance of any of these
data types. It is up to the host to both compose the data
being transmitted and interpret the data being received.
Forꢀ example,ꢀ theꢀ hostꢀ mustꢀ computeꢀ theꢀ properꢀ PECꢀ
value for each transmitted message and must verify the
PECꢀvalueꢀonꢀeachꢀreceivedꢀmessage.
The battery management UART protocol requires that the
host assign a unique and contiguous address between 0
andꢀ31ꢀtoꢀeachꢀUARTꢀslaveꢀdeviceꢀsoꢀthatꢀtheꢀhostꢀcanꢀ
address each slave device individually as desired. The host
performs this assignment by specifying a seed address
inꢀtheꢀHELLOALLꢀcommandꢀsequence.ꢀAsꢀtheꢀcommandꢀ
propagates up the daisy-chain, each slave device assigns
itsꢀownꢀaddress.ꢀTheꢀHELLOALLꢀsequenceꢀreturnsꢀaꢀvalueꢀ
from which the host can determine the number of devices
in the daisy-chain as well as the device addresses.
Table 3. Message Data Types
DATA TYPE
DESCRIPTION
Command
Address
Data
Definesꢀtheꢀtypeꢀofꢀmessage,ꢀeitherꢀaꢀwriteꢀcommandꢀorꢀaꢀreadꢀcommand.
Register address to be read or written.
Register data being read or written.
PEC
CRC-8ꢀpacketꢀerror-checkingꢀbyte;ꢀsentꢀandꢀreturnedꢀwithꢀeveryꢀmessage.
Errorꢀstatusꢀprovidedꢀbyꢀtheꢀslaveꢀdevices;ꢀreturnedꢀonlyꢀonꢀreads.
Data-Check
Used to verify the number of devices responding to a transmitted message. This byte is optional but is
recommended for error-checking purposes.
Alive-Counter
Fill
BytesꢀwithꢀvaluesꢀC2hꢀorꢀD3hꢀtransmittedꢀasꢀaꢀpartꢀofꢀreadꢀcommandsꢀsoꢀthatꢀtheꢀtotalꢀnumberꢀofꢀbytesꢀsentꢀ
equalsꢀtheꢀnumberꢀofꢀbytesꢀreceived.ꢀHowever,ꢀtheseꢀbytesꢀareꢀnotꢀreturnedꢀtoꢀreceiverꢀwithꢀtheirꢀoriginalꢀ
values;ꢀinsteadꢀeachꢀslaveꢀdeviceꢀreplacesꢀtheꢀfillꢀbytesꢀwithꢀtheꢀregisterꢀdataꢀbeingꢀrequestedꢀbyꢀtheꢀhost.
Table 4. Common Commands
COMMAND BYTE
HELLOALL
VALUE
57h
DESCRIPTION
Assigns a unique device address to each device in the daisy-chain.
Writesꢀaꢀspecificꢀregisterꢀinꢀallꢀdevices.
WRITEALL
02h
READALL
03h
Readsꢀaꢀspecificꢀregisterꢀfromꢀallꢀdevices.
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MAX17841B
Automotive SPI Communication Interface (ASCI)
whether or not the event causes an interrupt. Interrupt flags
(exceptꢀtheꢀPOR_Flag)ꢀareꢀedge-triggeredꢀinꢀthatꢀtheyꢀareꢀsetꢀ
only when the interrupt enable bit is true and the correspond-
ingꢀstatusꢀbitꢀtransitionsꢀfromꢀaꢀlogic-zeroꢀstateꢀtoꢀlogic-oneꢀ
state. Interrupt flags can only be cleared by the host.
UART Operation
The UART is the subsystem that transmits messages to
the UART slave devices and receives them back. The
host uses SPI buffer transactions to store unencoded
outgoing messages in the transmit buffer and also to read
decoded incoming messages out of the receive buffer as
shown in Figure 10. Table 5ꢀshowsꢀtheꢀsizeꢀandꢀorganiza-
tion of the UART buffers.
If the flag enable is set when its corresponding status bit
is true, the flag is not set until the status bit transitions
fromꢀaꢀlogic-zeroꢀstateꢀtoꢀaꢀlogic-oneꢀstate.ꢀIfꢀtheꢀflagꢀisꢀ
cleared when the corresponding status bit is true, the flag
does not set again until the status bit transitions from a
logic-zeroꢀstateꢀtoꢀaꢀlogic-oneꢀstate.
UART Interrupts
There are 12 different UART events that can cause an
interrupt (refer to the Register Table for details). For each
event, there is a status bit, an enable bit, and a flag bit.
The status bit is the real-time status of the event and can only
be set or cleared by the UART. The enable bit determines
When any flag is true, the UART asserts the INT pin. All
flags must be cleared for the INT pin to be deasserted.
TheꢀonlyꢀexceptionꢀisꢀtheꢀPOR_Flag,ꢀwhichꢀhasꢀnoꢀeffectꢀ
on INT.
RECEIVE
BUFFER
UART
RECEIVER
DECODER
SLAVE
DEVICE(S)
SPI
PORT
HOST
TRANSMIT
BUFFER
FILL BYTE
GENERATOR
UART
TRANSMITTER
ENCODER
Figure 10. UART Data Flow
Table 5. UART Buffers
PARAMETER
Organization
Size
TRANSMIT BUFFER
4 x 7 bytes
RECEIVE BUFFER
1 x 62 bytes
62 bytes
28 bytes
Message Capacity
HostꢀAccess
4 messages
Read and Write
Variable
ReadꢀOnly
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Automotive SPI Communication Interface (ASCI)
Table 6. UART Operational Modes
MODE
DESCRIPTION
Asserting SHDNꢀresetsꢀallꢀASCIꢀregistersꢀandꢀbufferꢀdataꢀtoꢀtheirꢀdefaultꢀstate,ꢀstopsꢀsendingꢀandꢀreceivingꢀ
UARTꢀcommunication,ꢀandꢀdisablesꢀtheꢀ3.3Vꢀregulator.ꢀ
Shutdown
Transmitsꢀpreamblesꢀcontinuouslyꢀ(noꢀidleꢀstate).ꢀUsedꢀtoꢀwakeꢀupꢀtheꢀUARTꢀslaveꢀdevicesꢀandꢀinitializeꢀtheꢀ
UART baud rate of each slave device. This mode takes precedence over all transmit modes except Transmit
Pause mode.
Transmit
Preambles
Periodically sends a stop character to prevent UART slave devices from shutting down during periods of no
communicationꢀ(idleꢀstate).ꢀTheꢀidleꢀtimeꢀinꢀbetweenꢀtheꢀperiodicꢀstopꢀcharactersꢀisꢀprogrammableꢀfromꢀzeroꢀ
toꢀ10.24msꢀthroughꢀtheꢀKeep-Aliveꢀ[3:0]ꢀconfiguration.ꢀTheꢀdefaultꢀsettingꢀisꢀinfiniteꢀ(modeꢀdisabled).ꢀTheꢀ
TransmitꢀPause,ꢀTransmitꢀPreambles,ꢀandꢀtheꢀTransmitꢀQueueꢀmodesꢀtakeꢀprecedenceꢀoverꢀthisꢀmode.
Keep-Alive
Startsꢀtransmissionꢀofꢀtheꢀmessageꢀloadedꢀinꢀtheꢀtransmitꢀqueueꢀifꢀ1)ꢀthereꢀisꢀsufficientꢀspaceꢀinꢀtheꢀreceiveꢀ
bufferꢀforꢀtheꢀmessageꢀ(RX_Full_Statusꢀisꢀfalse)ꢀorꢀ2)ꢀtheꢀlimitationsꢀonꢀmessageꢀlengthꢀareꢀremovedꢀ
(TX_Unlimitedꢀisꢀset).ꢀDefaultꢀisꢀenabled.
TransmitꢀQueue
(default mode)
In this mode, the transmit queue automatically limits the message length to 255 bytes instead of the default
62-byte limit, and the message transmission is permitted even if the message length is greater than the
availableꢀwriteꢀspaceꢀinꢀtheꢀreceiveꢀbuffer.
Transmit Unlimited
Transmit Pause
PlacesꢀtheꢀtransmitterꢀintoꢀidleꢀstateꢀonceꢀtheꢀUARTꢀhasꢀfinishedꢀtransmittingꢀtheꢀcurrentꢀbyte,ꢀhowever,ꢀtheꢀ
TX_Busy_StatusꢀandꢀTX_Idle_Statusꢀbitsꢀremainꢀunchanged.ꢀTransmissionꢀresumesꢀwhenꢀthisꢀbitꢀisꢀcleared.ꢀ
This mode takes precedence over all other transmit modes.
TransmitꢀOddꢀ
Transmits characters with odd parity. Since the battery management UART protocol uses even parity, this
Parity
modeꢀcanꢀbeꢀusedꢀtoꢀtestꢀtheꢀsystem’sꢀabilityꢀtoꢀdetectꢀparityꢀerrors.ꢀEvenꢀparityꢀisꢀdefault.
Transmitsꢀmessagesꢀwithoutꢀaꢀstopꢀcharacter.ꢀByꢀsendingꢀsubsequentꢀmessagesꢀwithꢀtheꢀNoꢀPreambleꢀbit,ꢀ
aꢀframedꢀmessageꢀofꢀindefiniteꢀlengthꢀcanꢀbeꢀconstructed.ꢀTheꢀTX_Unlimitedꢀbitꢀmustꢀbeꢀsetꢀforꢀmessagesꢀ
greater than 62 bytes.
TransmitꢀNoꢀStop
Transmitsꢀmessagesꢀwithoutꢀaꢀpreamble.ꢀByꢀfirstꢀsendingꢀaꢀmessageꢀinꢀwhichꢀtheꢀTX_No_Stopꢀbitꢀisꢀset,ꢀandꢀ
thenꢀsendingꢀmessagesꢀwithꢀthisꢀbitꢀset,ꢀaꢀframedꢀmessageꢀofꢀindefiniteꢀlengthꢀcanꢀbeꢀconstructed.ꢀHowever,ꢀ
if the preceding message was terminated with a stop character (end of frame), then the data sent in this
modeꢀisꢀunframedꢀ(withoutꢀpreamble)ꢀandꢀisꢀnotꢀstoredꢀinꢀtheꢀreceiveꢀbuffer.ꢀ
TransmitꢀNoꢀ
Preamble
DisablesꢀManchesterꢀencodingꢀofꢀtransmittedꢀdata.ꢀInꢀthisꢀmode,ꢀeachꢀdataꢀbyteꢀisꢀtransmittedꢀasꢀoneꢀ
character (instead of two characters).
TransmitꢀRawꢀData
ReceiveꢀRawꢀData
DisablesꢀManchesterꢀdecodingꢀofꢀtheꢀreceivedꢀdata.ꢀInꢀthisꢀmode,ꢀthereꢀisꢀoneꢀdataꢀbyteꢀstoredꢀforꢀeveryꢀ
character received (instead of every two received).
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Transmit Buffer
Tx BUFFER MEMORY MAP
The transmit buffer memory map is shown below. It con-
sists of four fixed-length queues, which the host uses to
store outgoing messages. At any time, one of the queues
is designated as the load queue (the queue being loaded)
and one of the queues is designated as the transmit
queue (the queue being unloaded). The load queue is
selectedꢀ byꢀ theꢀ two-bitꢀ registerꢀ LD_Qꢀ andꢀ theꢀ transmitꢀ
queueꢀ isꢀ selectedꢀ byꢀ theꢀ two-bitꢀ registerꢀ TX_Q.ꢀ Eachꢀ
queue consists of seven bytes.
Q
BYTE
000
8 BITS
00
QUEUE 0
TRANSMIT QUEUE
7 BYTES
7 BYTES
TX_POINTER
DATA TO UART (Tx)
UART CONTROLS
INCREMENT
01
1
000
000
0
0
1
0
QUEUE 1
(LD COMPLETE
Tx PENDING)
TX_Q [1:0] LOCATION [2:0]
READ ONLY INTERNAL
Transmit Buffer Queues
In each queue, location 0 is reserved for the message
length and the remaining six locations are for specific
message data. The default state of each queue is as
shown in Table 7.
10
QUEUE 2
(LOAD QUEUE)
7 BYTES
7 BYTES
LD_POINTER
Clearing the Transmit Buffer
DATA TO/FROM HOST
HOST CONTROLS
INCREMENT THROUGH SPI
Duringꢀ UARTꢀ initialization,ꢀ itꢀ isꢀ recommendedꢀ thatꢀ theꢀ
hostꢀ resetꢀ theꢀ transmitꢀ bufferꢀ byꢀ issuingꢀ theꢀ CLR_TX_BUFꢀ
SPI transaction (20h). This resets the transmit buffer as follows:
11
000
1
0
0
1
0
QUEUE 3
(EMPTY)
LD_Q [1:0] LOCATION [2:0]
READ ONLY INTERNAL
●ꢀ TX_Qꢀ[1:0]ꢀ=ꢀ00b
●ꢀ LD_Qꢀ[1:0]ꢀ=ꢀ00b
11
110
●ꢀ Dataꢀ inꢀ transmitꢀ bufferꢀ (28ꢀ bytes)ꢀ isꢀ resetꢀ toꢀ defaultꢀ
state per Table 7.
QUEUE 0 IS THE TRANSMIT QUEUE IN THIS EXAMPLE
QUEUE 2 IS THE LOAD QUEUE IN THIS EXAMPLE
Message Length
Before composing any message, the host should
compute the message’s length (in bytes, not characters)
based on both the type of command (read or write) and
the device count. The message length should include any
required fill bytes (but not preamble and stop characters).
The host writes the message length into location 0 of the
load queue, but if the specified message length is greater
thanꢀ 62d,ꢀ onlyꢀ 62dꢀ (3Eh)ꢀ isꢀ actuallyꢀ written.ꢀ Ifꢀ theꢀTX_
Unlimited = 1, then the maximum message length written
is increased to 255d (FFh), but the host must service the
receive buffer accordingly to avoid any possible overflow.
TRANSMIT BUFFER ADDRESSING
Figure 11. Transmit Buffer Memory Map
If the specified message length is greater than 6 bytes, the
UARTꢀ automaticallyꢀ appendsꢀ alternatingꢀ fillꢀ bytesꢀ (D3h,ꢀ
C2h) as required by the battery management UART proto-
col during the latter portion of the message transmission.
Table 7. Queue Memory Map
MAXIMUM DEFAULT PERMITTED
DEFAULT
VALUE
LOCATION
DESCRIPTION
TX_UNLIMITED = 0
TX_UNLIMITED = 1
0
1
2
3
4
5
6
Message length
00h
D3h
C2h
D3h
C2h
D3h
C2h
3Eh
FFh
Dataꢀbytesꢀand/orꢀfillꢀ
bytes
FFh
FFh
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MAX17841B
Automotive SPI Communication Interface (ASCI)
emptyꢀ (TX_Qꢀ =ꢀ LD_Q),ꢀ whichꢀ isꢀ theꢀ defaultꢀ state.ꢀThisꢀ
Writing the Load Queue
state can also occur when the UART finishes sending the
last loaded message and thus creates an empty transmit
buffer.
Aꢀmessage,ꢀnotꢀincludingꢀfillꢀbytes,ꢀconsistsꢀofꢀthreeꢀ(3)ꢀ
toꢀsixꢀ(6)ꢀbytes.ꢀTheꢀHELLOALLꢀsequence,ꢀforꢀexample,ꢀ
isꢀthreeꢀbytes:ꢀ57h,ꢀ00h,ꢀ00hꢀ(firstꢀaddressꢀsetꢀtoꢀzero).ꢀ
Since no fill bytes are required, the total message length
isꢀ3ꢀbytes.ꢀTherefore,ꢀtheꢀhostꢀshouldꢀwriteꢀtheꢀloadꢀqueueꢀ
with the following data in Table 8.
Message Transmission
WheneverꢀLD_Qꢀ=ꢀTX_Q,ꢀtheꢀtransmitꢀbufferꢀisꢀconsid-
eredꢀ emptyꢀ (TX_Empty_Statusꢀ isꢀ true)ꢀ becauseꢀ eitherꢀ
the host has not yet finished loading the selected queue
or the host has written but not yet verified the queue.
However,ꢀonceꢀtheꢀhostꢀisꢀfinishedꢀservicingꢀtheꢀqueue,ꢀitꢀ
performsꢀaꢀWR_NXT_LD_Qꢀtransactionꢀtoꢀselectꢀtheꢀnextꢀ
queue.ꢀOnceꢀthisꢀoccurs,ꢀtheꢀtransmitꢀbufferꢀisꢀnoꢀlongerꢀ
consideredꢀemptyꢀbecauseꢀLD_Qꢀ≠ꢀTX_Q.
The host can write the load queue starting at any location
within the queue by using appropriate SPI commands
listed in SPI transaction Table 9.ꢀ However,ꢀ ifꢀ theꢀ hostꢀ
attempts to write beyond location 6 of the queue, the
additional data is ignored.
The UART never attempts to transmit the queue selected
byꢀ LD_Qꢀ becauseꢀ theꢀ hostꢀ mayꢀ beꢀ inꢀ theꢀ processꢀ ofꢀ
loading it or, even if it has finished loading, may need to
verify (read) the contents of the load queue by using the
RD_LD_Qꢀ transactionꢀ (C1h).ꢀ Theꢀ hostꢀ canꢀ thenꢀ selectꢀ
the next queue in sequence for loading by performing the
WR_NXT_LD_Qꢀtransactionꢀ(B0h),ꢀwhichꢀincrementsꢀtheꢀ
LD_Qꢀvalue.ꢀItꢀisꢀonlyꢀwhenꢀthisꢀincrementꢀoccursꢀthatꢀtheꢀ
UART starts transmitting the data in the previously loaded
queue.ꢀForꢀbothꢀLD_Q[1:0]ꢀandꢀTX_Q[1:0],ꢀvaluesꢀofꢀ3hꢀ
increment to 0h.
The UART unloads/transmits the transmit queue if the fol-
lowing conditions are met:
●ꢀ TheꢀUARTꢀisꢀinꢀTransmit_Queueꢀmodeꢀ(TX_Queueꢀbitꢀ
is set)
●ꢀ Theꢀ transmitꢀ bufferꢀ hasꢀ atꢀ leastꢀ oneꢀ loadedꢀ queueꢀ
(TX_Empty_Statusꢀisꢀfalse)
●ꢀ Thereꢀisꢀsufficientꢀspaceꢀinꢀtheꢀreceiveꢀbufferꢀforꢀtheꢀ
messageꢀ(RX_Space_ꢀ≥ꢀMessageꢀLength)
Note:ꢀTheꢀlimitationꢀonꢀavailableꢀspaceꢀinꢀtheꢀreceiveꢀbuf-
ferꢀcanꢀbeꢀremovedꢀbyꢀsettingꢀtheꢀTX_Unlimitedꢀbit.
Table 8. Example of Queue Loaded with
Message HELLOALL
Onceꢀ theꢀ transmitꢀ conditionsꢀ areꢀ met,ꢀ theꢀ UARTꢀ auto-
matically starts unloading the transmit queue until the
entire message, including any required fill bytes, has
been transmitted. After the transmission is complete, the
contents of the transmit queue are reset to their default
values and the queue is once again available to the host
for loading.
LOCATION
VALUE
03h
DESCRIPTION
Message length
0
1
2
3
4
5
6
57h
Command byte
Address byte
Dataꢀbyte
00h
00h
C2h
D3h
C2h
Notꢀwritten
Notꢀwritten
Notꢀwritten
Receive Buffer
The receive buffer is a 62-byte circular buffer that the
host can read with the SPI, but can only be loaded by
theꢀUARTꢀasꢀitꢀreceivesꢀdata.ꢀItꢀutilizesꢀthreeꢀpointersꢀasꢀ
shown in the receive buffer memory map (Figure 12).
Filling the Transmit Buffer
●ꢀ RX_RD_POINTER:ꢀReadꢀpointerꢀorꢀbufferꢀlocationꢀtoꢀ
TheꢀhostꢀcanꢀloadꢀallꢀavailableꢀqueuesꢀuntilꢀLD_Qꢀ=ꢀTX_Qꢀ
-ꢀ1.ꢀInꢀthisꢀstate,ꢀtheꢀtransmitꢀbufferꢀisꢀfullꢀ(TX_Full_Statusꢀ
true). In this condition, the host cannot start loading the
transmit queue because the UART may still be unloading/
transmitting data. If the transmit buffer is full and the host
attemptsꢀ toꢀ performꢀ aꢀ WR_NXT_LD_Qꢀ transactionꢀ andꢀ
thus attempts to load the transmit queue, the increment
does not occur and an overflow condition is indicated
(TX_Overflow_Statusꢀ true).ꢀ Theꢀ onlyꢀ timeꢀ theꢀ hostꢀ canꢀ
write the transmit queue is when the transmit buffer is
be read by host (default 00h, read-only)
●ꢀ RX_WR_POINTER:ꢀWriteꢀpointerꢀorꢀbufferꢀlocationꢀtoꢀ
be written by UART (default 01h, read-only)
●ꢀ RX_NXT_MSG_POINTER:ꢀBufferꢀlocationꢀthatꢀisꢀstartꢀ
of next unread message (default 00h, read-only)
In the default state, where the read pointer is one less
than the write pointer, the receive buffer is considered
emptyꢀ(RX_Empty_Statusꢀisꢀtrue).ꢀAnyꢀreceiveꢀbufferꢀdataꢀ
readꢀinꢀthisꢀconditionꢀwillꢀbeꢀzero.
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Clearing the Receive Buffer
RECEIVE BUFFER MEMORY MAP
DuringꢀUARTꢀinitialization,ꢀitꢀisꢀrecommendedꢀthatꢀtheꢀhostꢀ
clearꢀtheꢀreceiveꢀbufferꢀbyꢀissuingꢀtheꢀCLR_RX_BUFꢀSPIꢀ
transactionꢀ(E0h).ꢀThisꢀresetsꢀtheꢀreceiveꢀbufferꢀasꢀfollows:ꢀ
8 BITS
0 0 0 0 0 0
AVAILABLE
(EMPTY)
MESSAGE 1
(ALREADY READ)
●ꢀ RX_RD_Pointer:ꢀ00h
●ꢀ RX_WR_Pointer:ꢀ01h
●ꢀ RX_NXT_MSG_POINTER:ꢀ00h
●ꢀ Dataꢀinꢀreceiveꢀbufferꢀ(62ꢀbytes)ꢀisꢀclearedꢀtoꢀ00h
FIRST BYTE OF MESSAGE 2
DATA TO HOST
MESSAGE 2
(BEING READ)
RX_RD_POINTER
If the receive buffer is cleared during Transmit Preambles
mode, the state of the buffer cannot be guaranteed.
Therefore, after disabling the Transmit Preambles mode,
the host should wait until all transmitted preambles have
been received before clearing the buffer. Since the first
keep-alive stop character received after the last preamble
results in a null message, the host can simply wait until
theꢀ bufferꢀ isꢀ noꢀ longerꢀ emptyꢀ (RX_Empty_Statusꢀ =ꢀ 0)ꢀ
before clearing the buffer.
RX_NXT_MESSAGE
RX_WR_POINTER
FIRST BYTE OF MESSAGE 3
DATA FROM UART
PART OF
MESSAGE 3
(BEING LOADED
BY UART)
AVAILABLE
(EMPTY)
1 1 1 1 1 0
The RX Clear Buffer command acts an an asynchronous
reset not only for the RX Buffer, but also for the UART
receiver logic. When the UART receiver logic is reset, it
mustꢀ resynchronizeꢀ toꢀ theꢀ incomingꢀ UARTꢀ signalꢀ beforeꢀ
bytes can be properly processed. This is accomplished
by receiving either a preamble byte or an idle state
lasting at least one UART byte period. The preamble used to
resynchronizeꢀ theꢀ dataꢀ streamꢀ shouldꢀ notꢀ beꢀ theꢀ sameꢀ
preamble that is at the beginning of the next transmitted
message. The application should make sure that one of
these conditions is met following an RX buffer clear prior to
sending the next message from the MAX17841B.
EACH MESSAGE IS
VARIABLE LENGTH
Figure 12. Receive Buffer Memory Map
byteꢀbeingꢀreadꢀ(theꢀbyteꢀaddressedꢀbyꢀRX_RD_Pointer),ꢀ
which is useful for error checking:
●ꢀ First_Byteꢀbit:ꢀIndicatesꢀthatꢀtheꢀbyteꢀisꢀtheꢀfirstꢀdataꢀ
byte in a message (the corresponding character was
preceded by preamble character).
●ꢀ Byte_Errorꢀ bit:ꢀ Indicatesꢀ thatꢀ theꢀ byteꢀ mayꢀ containꢀ
an error (the corresponding character contained a
Manchester and/or parity error). This bit drives the
RX_Errorꢀinterrupt.
Receiving Messages
UART messages are framed with the preamble and stop
characters. If the UART receiver decodes a valid pream-
ble, it prepares to receive a message but it does not store
theꢀpreambleꢀinꢀtheꢀreceiveꢀbuffer.ꢀOnceꢀdataꢀisꢀreceived,ꢀ
theꢀbufferꢀisꢀnoꢀlongerꢀemptyꢀ(RX_Empty_Statusꢀ=ꢀ0)ꢀandꢀ
the UART sequentially stores decoded data bytes in the
receive buffer until either a stop character or another pre-
amble is received. When the stop character is received at
the end of a message, the UART stores it in the receive
bufferꢀasꢀaꢀnullꢀbyteꢀ(00h)ꢀandꢀsetsꢀtheꢀRX_Stop_Statusꢀ
bit.ꢀ Theꢀ RX_Stop_Statusꢀ bitꢀ isꢀ subsequentlyꢀ clearedꢀ
when all unread messages have been read (buffer empty)
or the next preamble is detected. The host can set the
RX_Stop_INT_Enableꢀbitꢀandꢀmonitorꢀtheꢀinterruptꢀlineꢀtoꢀ
determine when to service the receive buffer.
●ꢀ Last_Byteꢀbit:ꢀIndicatesꢀthatꢀtheꢀbyteꢀisꢀtheꢀlastꢀbyteꢀinꢀ
a message (the corresponding character was a stop
character and was stored as a null byte).
Message Exceptions
If a message is not framed with a valid preamble, then the
UART ignores the data and does not store it.
If a message is not framed with a stop character, then
the preamble of the next message serves to delineate
betweenꢀtheꢀtwoꢀmessages.ꢀHowever,ꢀtheꢀfirstꢀmessageꢀ
has no stop character stored.
If the UART receives a preamble followed by a stop
character it stores a null message in the receive buffer
consisting of a single null byte (00h). This occurs when
a keep-alive stop character is received after Transmit
Preambles mode is disabled. In this use case, the receive
When the host services the receive buffer, three bits in the
RX_Byteꢀregisterꢀindicateꢀspecificꢀinformationꢀaboutꢀtheꢀ
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MAX17841B
Automotive SPI Communication Interface (ASCI)
buffer is not empty. The host should dispense of the null
message by either clearing the receive buffer or by simply
reading the null message and discarding it.
read so the last address that can be written is the one just
behind the read pointer. If more data is received after the
last address is written, the UART simply overwrites the last
addressꢀ andꢀ thenꢀ setsꢀ theꢀ RX_Overflow_Statusꢀ bit.ꢀ Theꢀ
RX_Overflow_Statusꢀbitꢀisꢀclearedꢀwhenꢀtheꢀreceiveꢀbufferꢀ
is read, thereby creating more write space. To detect any
overflow, the status must be checked before servicing the
receive buffer. After servicing the receive buffer, the status
A receive buffer overflow occurs when the UART receives
data but there is no more space to store it. This could
potentiallyꢀ occurꢀ ifꢀTX_Unlimitedꢀ wasꢀ setꢀ orꢀ ifꢀ thereꢀ wasꢀ
sufficient latency in the daisy-chain. The UART cannot
overtake the read pointer and overwrite the data being
Table 9. SPI Transactions
REGISTER TRANSACTIONS
ADDRESS
NAME
DESCRIPTION
0x01 to 0x1B and 0x95 to 0x9B
BUFFER TRANSACTIONS
See the Register Table
ReadsꢀorꢀwritesꢀtheꢀspecifiedꢀASCIꢀregister
COMMAND
START LOCATION
DESCRIPTION
CLR_TX_BUFꢀCommand:ꢀResetsꢀtheꢀtransmitꢀbufferꢀtoꢀitsꢀdefaultꢀstateꢀandꢀclearsꢀ
TX_QꢀandꢀLD_Q.
0x20
—
RD_MSGꢀCommand:ꢀReadsꢀtheꢀreceiveꢀbufferꢀstartingꢀatꢀtheꢀaddressꢀRX_RD_
Pointer. Automatically increments the read pointer after the byte is read but does
not increment the read pointer into the next message.
RX_RD_
Pointer
0x91
RD_NXT_MSGꢀCommand:ꢀReadsꢀtheꢀreceiveꢀbufferꢀstartingꢀatꢀtheꢀaddressꢀRX_
NXT_MSG_Pointerꢀ(oldestꢀunreadꢀmessage).ꢀAutomaticallyꢀincrementsꢀtheꢀreadꢀ
pointer after the byte is read but does not increment the read pointer into the next
message.
RX_NXT_MSG_
0x93
Pointer
0xB0
0xB2
0xB4
0xB6
0xB8
0xBA
0xBC
0xC0
0xC2
0xC4
0xC6
0xC8
0xCA
0xCC
0xC1
0xC3
0xC5
0xC7
0xC9
0xCB
0xCD
LD_QꢀLocationꢀ0
LD_QꢀLocationꢀ1
LD_QꢀLocationꢀ2
LD_QꢀLocationꢀ3
LD_QꢀLocationꢀ4
LD_QꢀLocationꢀ5
LD_QꢀLocationꢀ6
LD_QꢀLocationꢀ0
LD_QꢀLocationꢀ1
LD_QꢀLocationꢀ2
LD_QꢀLocationꢀ3
LD_QꢀLocationꢀ4
LD_QꢀLocationꢀ5
LD_QꢀLocationꢀ6
LD_QꢀLocationꢀ0
LD_QꢀLocationꢀ1
LD_QꢀLocationꢀ2
LD_QꢀLocationꢀ3
LD_QꢀLocationꢀ4
LD_QꢀLocationꢀ5
LD_QꢀLocationꢀ6
WR_NXT_LD_QꢀCommand:ꢀIncrementsꢀLD_Q,ꢀthenꢀwritesꢀtheꢀtransmitꢀbufferꢀ
load queue. The increment occurs whether the host loads the data or not. The
commandꢀbyteꢀdefinesꢀtheꢀfirstꢀlocationꢀtoꢀbeꢀwrittenꢀ(locationsꢀ0ꢀtoꢀ6).ꢀForꢀ
example, 0xB0 starts writing at location 0 and continues through location 6. Writes
beyondꢀlocationꢀ6ꢀhaveꢀnoꢀeffect.ꢀ
WR_LD_QꢀCommand:ꢀWritesꢀtheꢀtransmitꢀbufferꢀloadꢀqueue.ꢀTheꢀcommandꢀbyteꢀ
definesꢀtheꢀfirstꢀbyteꢀwrittenꢀ(locationsꢀ0ꢀtoꢀ6).ꢀForꢀexample,ꢀ0xC0ꢀstartsꢀwritingꢀ
at location 0 and continues through location 6. Writes beyond location 6 have no
effect.
RDꢀ_LD_QꢀCommand:ꢀReadsꢀtransmitꢀbufferꢀloadꢀqueue.ꢀTheꢀcommandꢀbyteꢀ
definesꢀtheꢀfirstꢀbyteꢀreadꢀ(locationsꢀ0ꢀtoꢀ6).ꢀForꢀexample,ꢀ0xC1ꢀstartsꢀreadingꢀ
at location 0 and continues through location 6. Reading beyond location 6 reads
zeros.
CLR_RX_BUFꢀCommand:ꢀResetsꢀtheꢀreceiveꢀbufferꢀandꢀtheꢀreceiveꢀbufferꢀ
pointers to their default state.
0xE0
—
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MAX17841B
Automotive SPI Communication Interface (ASCI)
should be checked again for data errors (e.g., parity errors)
prior to initiating transmission of the next message.
Applications Information
Transaction Sequence for UART Initialization
If multiple messages are received without being read,
thenꢀanꢀoverflowꢀcanꢀoccurꢀandꢀtheꢀUARTꢀsetsꢀtheꢀRX_
Overflow_Statusꢀbit.ꢀThisꢀoccursꢀwhenꢀtheꢀwriteꢀpointerꢀ
has incremented until it is one less than the read pointer,
at which point the UART no longer increments it. In this
case, the last data byte is overwritten.
In the example shown in Table 10,ꢀtheꢀhostꢀinitializesꢀcom-
munication with two UART slave devices. SHDN must be
deassertedꢀfirst.ꢀTransactionsꢀtoꢀpollꢀRX_STATUSꢀregis-
ter are repeated until the poll is successful or times out.
It is recommended that all writes to configuration registers
be verified by reading back the register data. Transmit
buffer data can be verified by reading the buffer contents
or by reading the transmitted data in the receive buffer.
Reading Messages
The host can use two different SPI transactions to read
the receive buffer:
Transaction Sequence for UART Write and
Read
In the example shown in Table 11, the host communicates
with two UART slave devices to:
●ꢀ RD_RX_BUFꢀ(91h):ꢀStartsꢀreadingꢀatꢀtheꢀcurrentꢀreadꢀ
pointer location
●ꢀ RD_NXT_MSGꢀ(93h):ꢀStartsꢀreadingꢀatꢀtheꢀstartꢀofꢀtheꢀ
next unread message
●ꢀ WriteꢀtheꢀvalueꢀB2B1hꢀtoꢀtheꢀdeviceꢀregisterꢀaddressꢀ
0x12ꢀ forꢀ allꢀ slaveꢀ devicesꢀ usingꢀ aꢀ WRITEALLꢀ com-
mand sequence
Duringꢀanyꢀreadꢀtransaction,ꢀtheꢀhostꢀmayꢀcontinueꢀread-
ing data until the end of the message, after which the data
read will be 00h. The host cannot continue reading into
the next message, if there is one.
●ꢀ ReadꢀbackꢀtheꢀvalueꢀB2B1hꢀfromꢀtheꢀdeviceꢀregisterꢀ
addressꢀ 0x12ꢀ forꢀ allꢀ slaveꢀ devicesꢀ usingꢀ READALLꢀ
command sequence.
Duringꢀ anyꢀ readꢀ transaction,ꢀ theꢀ UARTꢀ incrementsꢀ theꢀ
read pointer after the data byte is read so that if the SPI
transaction is prematurely terminated in the middle of
the byte, then the same location is resent on the next
RD_MSGꢀSPIꢀtransaction.ꢀThisꢀallowsꢀtheꢀhostꢀtoꢀstopꢀaꢀ
readꢀandꢀrestartꢀitꢀwithoutꢀlosingꢀdata.ꢀEachꢀbyteꢀinꢀtheꢀ
buffer is cleared after it is read and is eventually available
to the UART for storing incoming data.
This example assumes that the slave devices have been
configured with the alive counter enabled. To execute
these two command sequences, the host performs the
SPI transactions listed in Table 11.
Table 10. UART Daisy-Chain Initialization Sequence
DIN
DOUT
DESCRIPTION
TRANSACTION 1
EnableꢀKeep-Aliveꢀmodeꢀ(priorꢀtoꢀtheꢀUARTꢀslaveꢀwake-upꢀtoꢀpreventꢀshutdown)
WriteꢀConfigurationꢀ3ꢀregister
10h
05h
xxh
xxh
Set keep-alive period to 160µs
TRANSACTION 2
EnableꢀRxꢀInterruptꢀflagsꢀforꢀRX_ErrorꢀandꢀRX_Overflow
WriteꢀRX_Interrupt_Enableꢀregister
04h
88h
xxh
xxh
SetꢀtheꢀRX_Error_INT_EnableꢀandꢀRX_Overflow_INT_Enableꢀbits
Clearꢀreceiveꢀbuffer
TRANSACTION 3
E0h xxh
TRANSACTION 4
Clearꢀreceiveꢀbuffer
Wake-up UART slave devices (transmit preambles)
WriteꢀConfigurationꢀ2ꢀregister
0Eh
30h
xxh
xxh
EnableꢀTransmitꢀPreamblesꢀmodeꢀ
TRANSACTION 5
WaitꢀforꢀallꢀUARTꢀslaveꢀdevicesꢀtoꢀwakeꢀupꢀ(pollꢀRX_Busy_Statusꢀbit)
ReadꢀRX_Statusꢀregisterꢀ(RX_Busy_StatusꢀandꢀRX_Empty_Statusꢀshouldꢀbeꢀtrue)
IfꢀRX_Statusꢀ=ꢀ21h,ꢀcontinue.ꢀOtherwise,ꢀrepeatꢀtransactionꢀuntilꢀtrueꢀorꢀtimeout.
EndꢀofꢀUARTꢀslaveꢀdeviceꢀwake-upꢀperiod
WriteꢀConfigurationꢀ2ꢀregister
01h
xxh
xxh
21h
TRANSACTION 6
0Eh
xxh
xxh
10h
DisableꢀTransmitꢀPreamblesꢀmode
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Table 10. UART Daisy-Chain Initialization Sequence (continued)
DIN
TRANSACTION 7
01h xxh
TRANSACTION 8
20h xxh
TRANSACTION 9
E0h xxh
TRANSACTION 10
DOUT
DESCRIPTION
Waitꢀforꢀnullꢀmessageꢀtoꢀbeꢀreceivedꢀ(pollꢀRX_Empty_Statusꢀbit)
ReadꢀRX_Statusꢀregister
Clearꢀtransmitꢀbuffer
Clearꢀtransmitꢀbuffer
Clearꢀreceiveꢀbuffer
Clearꢀreceiveꢀbuffer
LoadꢀtheꢀHELLOALLꢀcommandꢀsequenceꢀintoꢀtheꢀloadꢀqueue
C0h
03h
57h
00h
00h
xxh
xxh
xxh
xxh
xxh
WR_LD_QꢀSPIꢀcommandꢀbyteꢀ(writeꢀtheꢀloadꢀqueue)
Message length
HELLOALLꢀcommandꢀbyte
Register address (0x00)
InitializationꢀaddressꢀofꢀHELLOALL
TRANSACTION 11
Verifyꢀcontentsꢀofꢀtheꢀloadꢀqueue
C1h
xxh
xxh
xxh
xxh
xxh
03h
57h
00h
00h
RD_LD_QꢀSPIꢀcommandꢀbyte
OK
OK
OK
OK
TRANSACTION 12
B0h xxh
TRANSACTION 13
TransmitꢀHELLOALLꢀsequence
WR_NXT_LD_QꢀSPIꢀcommandꢀbyteꢀ(writeꢀtheꢀnextꢀloadꢀqueue)
PollꢀRX_Stop_Statusꢀbit
01h
xxh
xxh
12h
ReadꢀRX_Statusꢀregister
IfꢀRX_Status[1]ꢀisꢀtrue,ꢀcontinue.ꢀIfꢀfalse,ꢀthenꢀrepeatꢀtransactionꢀuntilꢀtrue.
Serviceꢀreceiveꢀbuffer.ꢀReadꢀtheꢀHELLOALLꢀmessageꢀthatꢀpropagatedꢀthroughꢀtheꢀdaisy-chainꢀandꢀwasꢀ
returned back to the ASCI. The host should verify the device count.
TRANSACTION 14
93h
xxh
xxh
xxh
xxh
57h
00h
02h
RD_NXT_MSGꢀSPIꢀtransaction
Sentꢀcommandꢀbyteꢀ(HELLOALL)
Sent address = 00h
Returned address = 02h
TRANSACTION 15
Checkꢀforꢀreceiveꢀbufferꢀerrors
09h
xxh
xxh
00h
ReadꢀRX_Interrupt_Flagsꢀregister
Ifꢀnoꢀerrors,ꢀcontinue.ꢀOtherwise,ꢀclearꢀandꢀgoꢀtoꢀerrorꢀroutine.
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Table 11. Transaction Sequence for UART Write and Read
SPI DIN
SPI DOUT
DESCRIPTION
ꢀꢀLoadꢀtheꢀWRITEALLꢀcommandꢀsequenceꢀintoꢀtheꢀloadꢀqueue
WR_LD_QꢀSPIꢀcommandꢀbyte
TRANSACTION 1
C0h
06h
02h
12h
B1h
B2h
C4h
00h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
Message length = 6
WRITEALLꢀcommandꢀbyte
Register address of the device
LSꢀbyteꢀofꢀregisterꢀdataꢀtoꢀbeꢀwritten
MS byte of register data to be written
PECꢀbyteꢀforꢀ02h,ꢀ12h,ꢀB1h,ꢀB2h
Alive-counter byte (seed value = 0)
ꢀꢀStartꢀtransmittingꢀtheꢀWRITEALLꢀsequenceꢀfromꢀtheꢀtransmitꢀqueue
WR_NXT_LD_QꢀSPIꢀcommandꢀbyte
Checkꢀifꢀaꢀmessageꢀhasꢀbeenꢀreceivedꢀintoꢀtheꢀreceiveꢀbuffer
ReadꢀRX_Statusꢀregister
TRANSACTION 2
B0h xxh
TRANSACTION 3
01h
xxh
xxh
12h
IfꢀRX_Status[1]ꢀisꢀtrue,ꢀcontinue.ꢀOtherwise,ꢀrepeatꢀuntilꢀtrueꢀorꢀtimeout.
ReadꢀreceiveꢀbufferꢀtoꢀverifyꢀtheꢀsentꢀWRITEALLꢀmessage
RD_NXT_MSGꢀSPI
TRANSACTION 4
93h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
02h
12h
B1h
B2h
C4h
02h
Sentꢀcommandꢀbyteꢀ(WRITEALL)
Sent address
SentꢀLSꢀbyte
Sent MS byte
SentꢀPEC
Alive-counterꢀbyteꢀ(=ꢀsentꢀseedꢀ+ꢀ2,ꢀifꢀaliveꢀcounterꢀenabled)
Checkꢀforꢀreceiveꢀbufferꢀerrors
TRANSACTION 5
09h
xxh
xxh
00h
ReadꢀRX_Interrupt_Flagsꢀregister
Ifꢀnoꢀerrors,ꢀcontinue.ꢀOtherwise,ꢀclearꢀandꢀgoꢀtoꢀerrorꢀroutine.
LoadꢀtheꢀREADALLꢀcommandꢀsequenceꢀintoꢀtheꢀloadꢀqueue
WR_NXT_LD_QꢀSPIꢀcommandꢀbyte
Messageꢀlengthꢀ(5ꢀ+ꢀ2ꢀxꢀnꢀ=ꢀ9)
TRANSACTION 6
C0h
09h
03h
12h
00h
CBh
00h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
READALLꢀcommandꢀbyte
Register address
Data-checkꢀbyteꢀ(seedꢀvalueꢀ=ꢀ00h)
PECꢀbyteꢀforꢀbytesꢀ03h,ꢀ12h,ꢀ00h
Alive-counter byte (seed value = 00h)
StartꢀtransmittingꢀtheꢀREADALLꢀsequence
WR_NXT_LD_QꢀSPIꢀcommandꢀbyte
Checkꢀifꢀaꢀmessageꢀhasꢀbeenꢀreceivedꢀintoꢀtheꢀreceiveꢀbuffer
ReadꢀtheꢀRX_Statusꢀregister
TRANSACTION 7
B0h xxh
TRANSACTION 8
01h
xxh
xxh
12h
IfꢀRX_Status[1]ꢀisꢀtrue,ꢀcontinue.ꢀOtherwise,ꢀrepeatꢀuntilꢀtrueꢀorꢀtimeout.
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Automotive SPI Communication Interface (ASCI)
Table 11. Transaction Sequence for UART Write and Read (continued)
SPI DIN
SPI DOUT
DESCRIPTION
Readꢀtheꢀreceiveꢀbufferꢀandꢀverifyꢀthatꢀtheꢀdeviceꢀregisterꢀdataꢀisꢀwhatꢀwasꢀwrittenꢀduringꢀtheꢀ
WRITEALLꢀsequence
TRANSACTION 9
93h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
03h
12h
B1h
B2h
B1h
B2h
00h
67h
02h
RD_NXT_MSGꢀSPIꢀcommandꢀbyte
Sentꢀcommandꢀbyteꢀ(READALL)
Sent register address
LSꢀbyteꢀofꢀdeviceꢀ1
MS byte of device 1
LSꢀbyteꢀofꢀdeviceꢀ0
MS byte of device 0
Data-checkꢀbyteꢀ(=ꢀ00hꢀifꢀallꢀstatusꢀbitsꢀhaveꢀbeenꢀcleared)
PECꢀ(forꢀtheꢀpreviousꢀ7ꢀbytes)
Alive-counterꢀbyteꢀ(=ꢀsentꢀseedꢀ+ꢀ2,ꢀifꢀaliveꢀcounterꢀisꢀenabled)
Checkꢀforꢀreceiveꢀbufferꢀerrors
TRANSACTION 10
09h
xxh
xxh
00h
ReadꢀRX_Interrupt_Flagsꢀregister
Ifꢀnoꢀerrors,ꢀcontinue.ꢀOtherwise,ꢀclearꢀandꢀgoꢀtoꢀerrorꢀroutine.
identify each message sent by sending up to 256 different
seed values for the alive-counter byte. The host should
Error Checking
Itꢀisꢀhighlyꢀrecommendedꢀthatꢀtheꢀhostꢀutilizeꢀtheꢀvariousꢀ
error checking features available in both the ASCI and the
battery management UART protocol to ensure the integ-
rity of the data being received. The host should implement
the following verifications:
increment the seed value every time a message is sent
by the host so that its propagation through the daisy chain
can be verified in the received data. The alive-counter
byteꢀisꢀsentꢀafterꢀtheꢀPECꢀbyteꢀandꢀthereforeꢀtheꢀPECꢀisꢀ
not affected.
●ꢀ Verificationꢀ ofꢀ writeꢀ dataꢀ receivedꢀ (matchingꢀ values,ꢀ
Corrupted Message Content
number of bytes)
Manchester,ꢀ parity,ꢀ andꢀ PECꢀ errorsꢀ areꢀ indicationsꢀ thatꢀ
the data in the message may have been corrupted. For
each UART message received, the host should perform
the appropriate computations on any error-checking bytes
that may be available in the received message:
●ꢀ Verificationꢀ ofꢀ readꢀ dataꢀ receivedꢀ (allowedꢀ values,ꢀ
ranges, number of bytes)
●ꢀ Verificationꢀ ofꢀ theꢀ receivedꢀ PEC,ꢀ data-check,ꢀ andꢀ
alive-counter bytes
●ꢀ VerificationꢀofꢀASCIꢀFMEAꢀregister
●ꢀ Data-Checkꢀ byte:ꢀ Errorꢀ statusꢀ providedꢀ byꢀ theꢀ slaveꢀ
device(s);ꢀsentꢀandꢀreturnedꢀonꢀreadsꢀofꢀslaveꢀdeviceꢀ
data as described in the slave device data sheet.
●ꢀ Verificationꢀ ofꢀ theꢀ ASCIꢀ statusꢀ bitsꢀ (RX_Error_
Status,ꢀ RX_Overflow_Status,ꢀ TX_Overflow_Status,ꢀ
POR_Flag)
●ꢀ PECꢀbyte:ꢀCRC-8ꢀpacketꢀerror-checkingꢀbyteꢀprovidedꢀ
byꢀtheꢀslaveꢀdevice(s);ꢀsentꢀandꢀreturnedꢀwithꢀeveryꢀ
message as described in the slave device data sheet.
Corrupted Preamble Character
If the preamble for a message is corrupted, none of the
message is entered into the receive buffer. To detect
this failure mode, the host should always verify that any
message that it transmitted was also received into the
receive buffer. In the case where the host is polling a
register (identical messages) then the host can uniquely
●ꢀ Alive-Counterꢀ byte:ꢀ Usedꢀ toꢀ verifyꢀ theꢀ numberꢀ ofꢀ
devicesꢀrespondingꢀtoꢀaꢀtransmittedꢀmessage;ꢀcanꢀbeꢀ
sent and received with every message as described in
the slave device data sheet.
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Automotive SPI Communication Interface (ASCI)
TheꢀhostꢀshouldꢀalsoꢀsetꢀtheꢀASCI’sꢀRX_Error_INT_Enableꢀ
bit. If, in the course of reading the receive buffer, the ASCI
setsꢀtheꢀRX_Error_INT_Flag,ꢀitꢀmeansꢀthatꢀtheꢀUARTꢀhadꢀ
detected a Manchester and/or parity error in at least one
of the received characters in the message. Because
Manchester and parity errors can be introduced anywhere
inꢀtheꢀUARTꢀdataꢀstream,ꢀtheꢀerrorsꢀdenotedꢀbyꢀtheꢀRX_
Error_INT_Flagꢀareꢀnotꢀnecessarilyꢀreflectedꢀinꢀtheꢀerror-
checking bytes returned by the slave device(s). Therefore,
the host should check and clear this flag after (but not
before) reading each message in the receive buffer.
corrupted data character within a message, then the mes-
sage is prematurely terminated and a second, unexpected
message is created. This event can be detected by
comparing the number of received bytes in the message
to the expected number.
Unintended Stop Character
The presence of an unintended stop character prema-
turely terminates the message. This is detected by com-
paring the number of received bytes in the message to the
expected number.
UART Physical Layer
Single-Ended Mode
Corrupted or Missing Stop Character
If a stop character is corrupted or missing, there is no data
loss because the message is still framed either by a sub-
sequent valid stop character (that is automatically sent in
Keep-Aliveꢀmode)ꢀorꢀbyꢀtheꢀpreambleꢀofꢀtheꢀnextꢀUARTꢀmes-
sage. A corrupted stop character can be interpreted as a data
character and would be stored as such in error. In this case,
if a valid stop character is eventually received before the next
preamble, the message length is one byte too long. The host
should check for this condition by computing the received
message length and comparing it to the expected message
length.
By default, UART ports are configured for differential
communication. For single-ended operation, the host can
setꢀtheꢀSingle_Ended_Modeꢀconfigurationꢀbit.ꢀThisꢀmodeꢀ
enables the UART to receive a single-ended signal by
shiftingꢀtheꢀinputꢀthresholdꢀnegativeꢀsoꢀthatꢀzeroꢀdifferen-
tial voltage is a logic one. The RXP input is connected to
groundꢀandꢀtheꢀRXNꢀinputꢀreceivesꢀtheꢀinvertedꢀsignal,ꢀ
just as it does for differential mode. In this mode, the Tx
port operates the same as in differential mode.
Before reading the next message, the host should also check
theꢀRX_Byteꢀregisterꢀtoꢀverifyꢀthatꢀtheꢀlastꢀcharacterꢀreceivedꢀ
was a valid stop character, in which case all of the following
are true:
RXP
1) The last byte in the message is a null byte (00h).
2)ꢀ TheꢀLast_Byteꢀbitꢀisꢀset.
1.5kΩ
RXN
3)ꢀ TheꢀByte_Errorꢀbitꢀisꢀcleared.
15pF
IfꢀaꢀstopꢀcharacterꢀwasꢀnotꢀreceivedꢀthenꢀtheꢀLast_Byteꢀ
bit is not set.
GNDL
Unintended Preamble
The presence of an unintended preamble in the middle
of a message creates an unintended message in the
receive buffer. If the unintended preamble is the result of a
Figure 13. Single-Ended Mode
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Automotive SPI Communication Interface (ASCI)
A common-mode noise filter can be implemented by
UART Transformer Coupling
capacitively coupling the center tap of the transformer on
the transmitter side to the UART ground. Any common-
mode noise that passes through the transformer is effec-
tively shunted to ground.
The UART signals can be transformer-coupled because
ofꢀtheꢀDC-balancedꢀsignaling.ꢀPlacingꢀanꢀisolationꢀtrans-
former between the UART’s transmitter and the slave
device’s receiver provides common-mode isolation for
the case where the slave device is operating at a different
voltage level.
UART Supplemental ESD Protection
The UART transmitter and receiver, with supplemental
protection diodes as shown in the application circuits, can
beꢀusedꢀforꢀenhancedꢀESDꢀprotection.ꢀTheꢀdiodesꢀshouldꢀ
be placed as close as possible to the external connector.
When no data is being transmitted (idle state), the trans-
mitter drives both outputs to a logic low level to prevent
any current flow through the transformer winding.
MAX178XX
MAX17841B
BATTERY MANAGEMENT
DEVICE
15pF
47Ω
1.5kΩ
TXP
RXLP
1.5kΩ
RXLN
15pF
47Ω
GNDL
TXN
10nF
GNDL
Figure 14. Transformer Coupling of UART Signals
1nF
600V
15pF
50V
47Ω
1.5kΩ
1.5kΩ
TXP
RXP
RXN
1nF
600V
47Ω
TXN
100kΩ
100kΩ
15pF
50V
GNDL
PESD1CAN
PESD1CAN
GNDL
Figure 16. Supplemental ESD Protection for UART Receiver
(Shown with Capacitive Coupling)
Figure 15. Supplemental ESD Protection for UART Transmitter
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Automotive SPI Communication Interface (ASCI)
Internal ESD Protection
MAX17841B ESD DIODES
RXP, RXN
CS, SCLK,
DIN, INT
V
AA
DOUT
DCIN
TXP, TXN
V
DDL
CTG
SHDN
AGND
GNDL
ALL DIODES ARE RATED FOR ESD CLAMPING CONDITIONS. THEY ARE NOT INTENDED
TO ACCURATELY CLAMP DC VOLTAGE. ALL DIODES SHOWN HAVE A PARASITIC
PN DIODE FROM THEIR CATHODE TO AGND THAT IS OMITTED FOR CLARITY.
THIS PARASITIC DIODE HAS ITS ANODE AT AGND.
Figure 17. ESD Diode Diagram
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Automotive SPI Communication Interface (ASCI)
Register Table
READ ADDRESS
0x01
WRITE ADDRESS
DEFAULT VALUE
NAME
NA
NA
11h
13h
00h
00h
00h
80h
60h
10h
0Fh
00h
84h
12h
01h
3Eh
00h
00h
01h
00h
RX_Status
0x03
TX_Statusꢀ
0x05
0x04
0x06
0x08
0x0A
0x0C
0x0E
0x10
NA
RX_Interrupt_Enable
TX_Interrupt_Enableꢀ
RX_Interrupt_Flags
TX_Interrupt_Flags
Configuration_1
Configuration_2
Configuration_3
FMEA
0x07
0x09
0x0B
0x0D
0x0F
0x11
0x13
0x15
NA
Model
0x17
NA
Version
0x19
NA
RX_Byte
0x1B
0x95
NA
RX_Space
NA
TX_Queue_Selects
RX_Read_Pointer
RX_Write_Pointer
RX_Next_Message
0x97
NA
0x99
NA
0x9B
NA
RX_STATUS REGISTER
ADDRESS
BITS
DEFAULT
NAME
DESCRIPTION
TheꢀdataꢀbyteꢀatꢀlocationꢀRX_RD_Pointerꢀmayꢀ
contain an error (the corresponding character
contained a Manchester and/or parity error). This
bit is set when the byte is read, not when the byte is
received or written.
7
0
RX_Error_Status
6
5
4
0
0
1
Reserved
Alwaysꢀreadsꢀlogicꢀzero.
RX_Busy_Status
RX_Idle_Status
The UART is busy receiving data.
The UART is not receiving data.
TheꢀdataꢀbyteꢀatꢀlocationꢀRX_WR_POINTERꢀinꢀtheꢀ
receiveꢀbufferꢀwasꢀoverwrittenꢀbecauseꢀtheꢀreceiveꢀ
bufferꢀwasꢀfull.ꢀClearedꢀwhenꢀtheꢀreceiveꢀbufferꢀisꢀnotꢀ
fullꢀ(whenꢀtheꢀbufferꢀisꢀread).
3
0
0
RX_Overflow_Status
RX_Full_Status
0x01
(Read)
(Noteꢀ1)
Theꢀnumberꢀofꢀemptyꢀbytesꢀinꢀtheꢀreceiveꢀbufferꢀisꢀ
less than the length of the message in the transmit
queue.
2
TheꢀUARTꢀhasꢀfinishedꢀreceivingꢀaꢀproperlyꢀframedꢀ
message (stop character) and it is ready to be read.
The UART clears this bit after all unread messages
have been read or if the UART detects a new
preamble character. The UART does not set this bit if
theꢀbufferꢀisꢀemptyꢀandꢀitꢀreceivesꢀaꢀstopꢀcharacter.
1
0
0
1
RX_STOP_Status
RX_Empty_Status
Theꢀreceiveꢀbufferꢀisꢀclearedꢀandꢀcontainsꢀnoꢀunreadꢀ
dataꢀ(RX_RD_Pointerꢀ=ꢀRX_WR_Pointerꢀ-ꢀ1).
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Register Table (continued)
TX_STATUS REGISTER
ADDRESS
BITS
DEFAULT
NAME
DESCRIPTION
Alwaysꢀreadsꢀlogicꢀzero.
7
6
5
4
0
0
0
1
Reserved
Reserved
Alwaysꢀreadsꢀlogicꢀzero.
TX_Busy_Status
TX_Idle_Status
The UART is busy transmitting data.
The UART is not transmitting data.
LD_Qꢀcouldꢀnotꢀbeꢀincrementedꢀbecauseꢀtheꢀnextꢀ
queue contained untransmitted data. Any writes in
this state overwrite the load queue.
3
0
TX_Overflow_Status
0x03
(Read)
(Noteꢀ1)
Allꢀqueuesꢀinꢀtheꢀtransmitꢀbufferꢀareꢀfullꢀexceptꢀtheꢀ
loadꢀqueueꢀ(LD_Qꢀ=ꢀTX_Qꢀ-ꢀ1).
2
1
0
0
1
1
TX_Full_Status
Oneꢀorꢀmoreꢀqueuesꢀinꢀtheꢀtransmitꢀbufferꢀareꢀ
availableꢀforꢀloadingꢀ(TX_Full_Statusꢀisꢀfalse).
TX_Available_Status
TX_Empty_Status
AllꢀtheꢀqueuesꢀinꢀtheꢀTransmitꢀBufferꢀareꢀclearedꢀandꢀ
availableꢀforꢀloadingꢀ(LD_Qꢀ=ꢀTX_Q).
RX_INTERRUPT_ENABLE REGISTER
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
RX_Error_INT_Enable
Reserved
InterruptꢀenableꢀforꢀRX_Error_Status
Alwaysꢀreadsꢀlogicꢀzero.
RX_Busy_INT_Enable
RX_Idle_INT_Enable
RX_Overflow_INT_Enable
RX_Full_INT_Enable
RX_Stop_INT_Enable
RX_Empty_INT_Enable
InterruptꢀenableꢀforꢀRX_Busy_Status
InterruptꢀenableꢀforꢀRX_Idle_Status
InterruptꢀenableꢀforꢀRX_Overflow_Status
InterruptꢀenableꢀforꢀRX_Full_Status
InterruptꢀenableꢀforꢀRX_Stop_Status
InterruptꢀenableꢀforꢀRX_Empty_Status
0x04 (Write)
0x05 (Read)
TX_INTERRUPT_ENABLE REGISTER
7:6
5
00
0
Reserved
Alwaysꢀreadsꢀlogicꢀzero.
TX_Busy_INT_Enable
TX_Idle_INT_Enable
TX_Overflow_INT_Enable
TX_Full_INT_Enable
TX_Available_INT_Enable
TX_Empty_INT_Enable
InterruptꢀenableꢀforꢀTX_Busy_Status
InterruptꢀenableꢀforꢀTX_Idle_Status
InterruptꢀenableꢀforꢀTX_Overflow_Status
InterruptꢀenableꢀforꢀTX_Full_Status
InterruptꢀenableꢀforꢀTX_Not_Full_Status
InterruptꢀenableꢀforꢀTX_Empty_Status
4
0
0x06 (Write)
0x07 (Read)
3
0
2
0
1
0
0
0
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Register Table (continued)
RX_INTERRUPT_FLAG REGISTER
ADDRESS
BITS
DEFAULT
NAME
DESCRIPTION
InterruptꢀflagꢀforꢀRX_Error_Status
Alwaysꢀreadsꢀlogicꢀzero.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
RX_Error_INT_Flag
Reserved
RX_Bus_ꢀINT_Flag
RX_Idle_INT_Flag
RX_Overflow_INT_Flag
RX_Full_INT_Flag
RX_Stop_INT_ꢀFlag
RX_Empty_INT_Flag
InterruptꢀflagꢀforꢀRX_Busy_Status
InterruptꢀflagꢀforꢀRX_Idle_Status
InterruptꢀflagꢀforꢀRX_Overflow_Status
InterruptꢀflagꢀforꢀRX_Full_Status
InterruptꢀflagꢀforꢀRX_Stop_Status
InterruptꢀflagꢀforꢀRX_Empty_Status
0x08 (Write)
0x09 (Read)
(Notesꢀ2,ꢀ3)
TX_INTERRUPT_FLAG REGISTER
Set by power-on-reset event and cleared only by
writingꢀtoꢀlogicꢀzero.ꢀHasꢀnoꢀeffectꢀonꢀstateꢀofꢀtheꢀINT
pin.
7
1
POR_Flag
6
5
4
3
2
1
0
0
0
0
0
0
0
0
Reserved
Alwaysꢀreadsꢀlogicꢀzero.
0x0A (Write)
0x0B (Read)
(Notesꢀ2,ꢀ3)
TX_Busy_INT_Flag
TX_Idle_INT_Flag
TX_Overflow_INT_Flag
TX_Full_INT_Flag
TX_Available_INT_Flag
TX_Empty_INT_Flag
InterruptꢀflagꢀforꢀTX_Busy_Status
InterruptꢀflagꢀforꢀTX_Idle_Status
InterruptꢀflagꢀforꢀTX_Overflow_Status
InterruptꢀflagꢀforꢀTX_Full_Status
InterruptꢀflagꢀforꢀTX_Available_Status
InterruptꢀflagꢀforꢀTX_Empty_Status
CONFIGURATION_1 REGISTER
EnablesꢀtheꢀUARTꢀtoꢀreceiveꢀaꢀsingle-endedꢀ
signalꢀbyꢀshiftingꢀtheꢀinputꢀthresholdꢀnegativeꢀ(zeroꢀ
differentialꢀvoltageꢀisꢀaꢀlogicꢀone).ꢀInꢀthisꢀmode,ꢀtheꢀ
RXP input should be connected to ground and the
RXNꢀinputꢀshouldꢀreceiveꢀtheꢀinvertedꢀsignal,ꢀsameꢀ
asꢀforꢀdifferentialꢀmode.ꢀInꢀthisꢀmode,ꢀtheꢀTxꢀportꢀ
operatesꢀtheꢀsameꢀasꢀinꢀdifferentialꢀmode.ꢀDefaultꢀisꢀ
differentialꢀmode.
7
0
Single_Ended_Mode
0x0C (Write)
0x0Dꢀ(Read)
ConfiguresꢀtheꢀUARTꢀbaudꢀrateꢀasꢀfollows:
00 = 500kbps
6:5
4:0
11
0
Baud_Rateꢀ[1:0]
01 = 500kbps
10 = 1Mbps
11 = 2Mbps (default)
NotꢀusedꢀbyꢀtheꢀASCI.ꢀCanꢀbeꢀusedꢀbyꢀtheꢀhostꢀtoꢀ
store the device count or for general-purpose use.
Device_Countꢀ[4:0]
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Register Table (continued)
CONFIGURATION_2 REGISTER
ADDRESS
BITS
DEFAULT
NAME
DESCRIPTION
ReceiveꢀRawꢀDataꢀMode:ꢀDisablesꢀManchesterꢀ
decoding of the received data. In this mode, there is
one data byte stored for every one character received
(instead of every two received).
7
0
RX_Raw_Data
TransmitꢀRawꢀDataꢀMode:ꢀDisablesꢀManchesterꢀ
encoding of transmitted data. In this mode, each data
byte is transmitted as one character (instead of two
characters).
6
5
0
0
TX_Raw_Data
TX_Preambles
Transmit Preambles Mode: Transmits preambles
continuously. This mode takes precedence over all
transmit modes except Transmit Pause mode.
TransmitꢀQueueꢀMode:ꢀEnablesꢀtransmissionꢀofꢀtheꢀ
messageꢀloadedꢀinꢀtheꢀTransmitꢀQueueꢀIFꢀ1)ꢀthereꢀisꢀ
sufficientꢀspaceꢀinꢀtheꢀReceiveꢀBufferꢀforꢀtheꢀmessageꢀ
(RX_Full_Statusꢀisꢀfalse)ꢀORꢀ2)ꢀtheꢀlimitationsꢀonꢀ
messageꢀlengthꢀareꢀremovedꢀ(TX_Unlimitedꢀisꢀset).ꢀ
4
1
0
TX_Queue
TransmitꢀOddꢀParityꢀMode:ꢀTransmitsꢀcharactersꢀwithꢀ
odd parity. Since the UART protocol uses even parity,
this mode can be used to test the system’s ability to
detectꢀparityꢀerrors.ꢀEvenꢀparityꢀisꢀdefault.
3
TX_Odd_Parity
0x0Eꢀ(Write)
0x0F (Read)
Transmit Pause Mode: Places the transmitter into
idleꢀstateꢀonceꢀtheꢀUARTꢀhasꢀfinishedꢀtransmittingꢀ
theꢀcurrentꢀbyte,ꢀhowever,ꢀtheꢀTX_Busy_Statusꢀandꢀ
TX_Idle_Statusꢀbitsꢀremainꢀunchanged.ꢀTransmissionꢀ
resumesꢀwhenꢀthisꢀbitꢀisꢀcleared.ꢀNote:ꢀThisꢀmodeꢀ
takes precedence over all other transmit modes
(TransmitꢀPreambles,ꢀTransmitꢀQueue,ꢀandꢀKeep-
Alive modes).
2
1
0
0
TX_Pause
TransmitꢀNoꢀStopꢀMode:ꢀTransmitsꢀmessagesꢀwithoutꢀ
a stop character. By sending subsequent messages
withꢀtheꢀTX_No_Preambleꢀbitꢀset,ꢀaꢀframedꢀmessageꢀ
ofꢀindefiniteꢀlengthꢀcanꢀbeꢀconstructed.ꢀTheꢀ
TX_Unlimitedꢀbitꢀmustꢀbeꢀsetꢀforꢀmessagesꢀgreaterꢀ
than 62 bytes.
TX_No_Stop
TransmitꢀNoꢀPreambleꢀMode:ꢀTransmitsꢀmessagesꢀ
withoutꢀaꢀpreamble.ꢀByꢀfirstꢀsendingꢀaꢀmessageꢀinꢀ
whichꢀtheꢀTX_No_Stopꢀbitꢀisꢀsetꢀandꢀthenꢀsendingꢀ
messages with this bit set, a framed message of
indefiniteꢀlengthꢀcanꢀbeꢀconstructed.ꢀHowever,ꢀifꢀ
the preceding message is terminated with a stop
character (end of frame), then the data sent in this
mode is unframed (no preamble) and is not stored in
theꢀreceiveꢀbuffer.ꢀ
0
0
TX_No_Preamble
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Register Table (continued)
CONFIGURATION_3 REGISTER
ADDRESS
BITS
DEFAULT
NAME
DESCRIPTION
Alwaysꢀreadsꢀlogicꢀzero.
7
6
0
0
Reserved
Reserved
Alwaysꢀreadsꢀlogicꢀzero.
In this mode, the transmit queue automatically limits
the message length to 255 bytes instead of the
default 62-byte limit, and the message transmission is
permitted even if the message length is greater than
theꢀavailableꢀwriteꢀspaceꢀinꢀtheꢀreceiveꢀbuffer.
5
4
0
0
TX_Unlimited
SPIꢀOutputꢀEnable:ꢀAssertsꢀDOUTꢀpin.ꢀDefaultꢀisꢀ
three-stated.
DOUT_Enableꢀ
Keep-AliveꢀMode:ꢀPeriodicallyꢀsendsꢀaꢀstopꢀcharacterꢀ
to prevent slave devices from shutting down during
periods of no communication (idle state). The idle
time in between the periodic stop characters is based
onꢀtheꢀ4-bitꢀvalueꢀbelow.ꢀTheꢀdefaultꢀsettingꢀisꢀinfiniteꢀ
(modeꢀdisabled).ꢀNote:ꢀtheꢀTransmitꢀPause,ꢀTransmitꢀ
Preambles,ꢀandꢀtheꢀTransmitꢀQueueꢀmodesꢀtakeꢀ
precedence over this mode.
0000 = 0µs
0x10 (Write)
0x11
(Read
0001 = 10µs
3:0
1111
Keep_Aliveꢀ[3:0]
0010 = 20µs
0011 = 40µs
0100 = 80µs
0101 = 160µs
0110ꢀ=ꢀ320µs
0111 = 640µs
1000 = 1.28ms
1001 = 2.56ms
1010 = 5.12ms
1011 = 10.24ms
1111ꢀ=ꢀInfiniteꢀdelay/disabledꢀ(default)
FMEA REGISTER
7:3
2
00000
Reserved
Always reads logic 0.
0
0
0
AGND_Alert
VDDL_Alertꢀ
GNDL_Alert
IndicatesꢀV
ꢀ-ꢀV
ꢀ>ꢀ0.2V
AGND
GNDL
0x13ꢀ(Read)
1
IndicatesꢀV ꢀ-ꢀV
ꢀ>ꢀ0.3V
AA
DDL
0
IndicatesꢀV
ꢀ-ꢀV
ꢀ>ꢀ0.2V
GNDL
AGND
MODEL REGISTER
0x15 (Read)
7:0
10000100
Modelꢀ[11:4]
FirstꢀtwoꢀdigitsꢀofꢀtheꢀModelꢀNumberꢀ(84h)
VERSION REGISTER
7:4
0x17 (Read)
3:0
0001
0010
Modelꢀ[3:0]
LastꢀdigitꢀofꢀtheꢀModelꢀNumberꢀ(1h)
Versionꢀ[3:0]
Mask revision (2)
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Register Table (continued)
RX_BYTE REGISTER
ADDRESS
BITS
DEFAULT
NAME
DESCRIPTION
Alwaysꢀreadsꢀlogicꢀzero.
7:3
00000
Reserved
TheꢀbyteꢀatꢀlocationꢀRX_RD_Pointerꢀisꢀtheꢀfirstꢀdataꢀ
byte in a message (the corresponding character was
preceded by preamble character).
2
0
First_Byte
TheꢀbyteꢀatꢀlocationꢀRX_RD_Pointerꢀmayꢀcontainꢀ
an error (the corresponding character contained a
Manchester and/or parity error). This bit drives the
RX_Errorꢀinterrupt.
0x19 (Read)
1
0
0
0
Byte_Error
Last_Byte
TheꢀbyteꢀatꢀlocationꢀRX_RD_Pointerꢀisꢀtheꢀlastꢀbyteꢀinꢀ
a message (the corresponding character was a stop
character and was stored as a null byte).
RX_SPACE REGISTER
0x1B (Read) 7:0
Numberꢀofꢀavailableꢀbytesꢀinꢀtheꢀreceiveꢀbuffer.ꢀ
Defaultꢀisꢀ62ꢀbytesꢀ(3Eh).
00111110
RX_Spaceꢀ[7:0]
TX_QUEUE_SELECTS REGISTER
7:4
0000
Reserved
Alwaysꢀreadsꢀlogicꢀzero.
TransmitꢀQueueꢀSelect:ꢀAddressesꢀoneꢀofꢀfourꢀ
queuesꢀinꢀtheꢀtransmitꢀbufferꢀthatꢀtheꢀUARTꢀhasꢀ
selected for message transmission (sending).
3:2
00
00
TX_Qꢀ[1:0]
0x95 (Read)
LoadꢀQueueꢀSelect:ꢀAddressesꢀoneꢀofꢀfourꢀqueuesꢀ
inꢀtheꢀtransmitꢀbufferꢀthatꢀtheꢀhostꢀhasꢀselectedꢀforꢀ
message loading (writing).
1:0
LD_Qꢀ[1:0]
RX_READ_POINTER REGISTER
0x97 (Read) 7:0
ReceiveꢀBufferꢀReadꢀPointer:ꢀTheꢀlocationꢀinꢀtheꢀ
receiveꢀbufferꢀthatꢀtheꢀhostꢀisꢀtoꢀread.ꢀTheꢀUARTꢀ
automatically increments this pointer.
00h
RX_RD_Pointerꢀ[7:0]
RX_WR_Pointerꢀ[7:0]
RX_WRITE_POINTER REGISTER
0x99 (Read) 7:0 01h
RX_NEXT_MESSAGE REGISTER
ReceiveꢀBufferꢀWriteꢀPointer:ꢀTheꢀlocationꢀinꢀtheꢀ
receiveꢀbufferꢀthatꢀisꢀwrittenꢀbyꢀtheꢀUARTꢀasꢀitꢀ
receives data.
ReceiveꢀBufferꢀNextꢀMessageꢀPointer:ꢀTheꢀstartꢀofꢀ
theꢀnextꢀunreadꢀmessageꢀinꢀtheꢀreceiveꢀbuffer.ꢀTheꢀ
RX_RD_Pointerꢀisꢀloadedꢀwithꢀthisꢀvalueꢀbyꢀtheꢀ
RD_NXT_MSGꢀSPIꢀtransaction.
RX_NXT_MSG_
Pointerꢀ[7:0]
0x9B (Read)
7:0
00h
Note 1: A status bit is set when its corresponding condition is true and is cleared when the condition is false.
Note 2:ꢀ Anꢀinterruptꢀflagꢀ(exceptꢀtheꢀPOR_Flag)ꢀisꢀsetꢀonlyꢀwhenꢀitsꢀinterruptꢀenableꢀbitꢀisꢀtrueꢀandꢀitsꢀcorrespondingꢀstatusꢀbitꢀgoesꢀ
fromꢀaꢀlogicꢀzeroꢀstateꢀtoꢀlogicꢀoneꢀstate.ꢀTheꢀflagꢀcanꢀonlyꢀbeꢀclearedꢀbyꢀwritingꢀitꢀtoꢀaꢀlogicꢀzero.ꢀꢀIfꢀtheꢀstatusꢀbitꢀisꢀtrueꢀ
when the flag enable is set or when the flag is cleared, the flag remains cleared until the status bit transitions from a logic
zeroꢀstateꢀtoꢀaꢀlogicꢀoneꢀstate.
Note 3:ꢀ Ifꢀanyꢀinterruptꢀflagꢀ(exceptꢀtheꢀPOR_Flag)ꢀisꢀset,ꢀthenꢀtheꢀINT pin is asserted (active low).
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Ordering Information
Package Information
For the latest package outline information and land patterns
PART
TEMP RANGE
-40°Cꢀtoꢀ+105°C
PIN-PACKAGE
(footprints), go to www.maximintegrated.com/packages.ꢀNoteꢀ
thatꢀaꢀ“+”,ꢀ“#”,ꢀorꢀ“-”ꢀinꢀtheꢀpackageꢀcodeꢀindicatesꢀRoHSꢀstatusꢀ
only. Package drawings may show a different suffix character, but
theꢀdrawingꢀpertainsꢀtoꢀtheꢀpackageꢀregardlessꢀofꢀRoHSꢀstatus.
MAX17841BGUE+
16ꢀTSSOP
16ꢀTSSOP
MAX17841BGUE/V+ -40°Cꢀtoꢀ+105°C
+Denotes a lead(Pb)-free/RoHS-compliant package.
/V denotes an automotive qualified part.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16ꢀTSSOP
U16+1
21-0066
90-0117
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MAX17841B
Automotive SPI Communication Interface (ASCI)
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
9/13
2/14
1/15
0
1
2
Initial release
—
Added MAX17842B to data sheet
1–33
1–33
DeletedꢀMAX17842Bꢀfromꢀdataꢀsheet
For information on other Maxim Integrated products, visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2015 Maxim Integrated Products, Inc.
│ 33
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