MAX5974AETE+G3U [MAXIM]
IC REG CTRLR FORWARD PWM 16-TQFN;
| 型号： | MAX5974AETE+G3U |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | IC REG CTRLR FORWARD PWM 16-TQFN 信息通信管理 开关 |
| 文件： | 总28页 (文件大小：1388K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
General Description
Features
The MAX5974_ provide control for wide-input-voltage,
active-clamped, current-mode PWM, forward converters
in Power-over-Ethernet (PoE) powered device (PD) appli-
cations. The MAX5974A/MAX5974C are well-suited for
universal or telecom input range, while the MAX5974B/
MAX5974D also accommodate low input voltage down
to 10.5V.
● Peak Current-Mode Control, Active-Clamped Forward
PWM Controller
● Regulation Without Optocoupler (MAX5974A/
MAX5974B)
● Internal 1% Error Amplifier
● 100kHz to 600kHz Programmable ±8% Switching
Frequency, Synchronization Up to 1.2MHz
The devices include several features to enhance supply
efficiency. The AUX driver recycles magnetizing cur-
rent instead of wasting it in a dissipative clamp circuit.
Programmable dead time between the AUX and main
driver allows for zero-voltage switching (ZVS). Under
light-load conditions, the devices reduce the switching fre-
quency (frequency foldback) to reduce switching losses.
● Programmable Frequency Dithering for Low-EMI,
Spread-Spectrum Operation
● Programmable Dead Time, PWM Soft-Start, Current
Slope Compensation
● Programmable Feed-Forward Maximum Duty-Cycle
Clamp, 80% Maximum Limit
The MAX5974A/MAX5974B feature unique circuitry to
achieve output regulation without using an optocoupler,
while the MAX5974C/MAX5974D utilize the traditional
optocoupler feedback method. An internal error amplifier
with a 1% reference is very useful in nonisolated design,
eliminating the need for an external shunt regulator.
● Frequency Foldback for High-Efficiency Light-Load
Operation
● Internal Bootstrap UVLO with Large Hysteresis
● 100μA (typ) Startup Supply Current
● Fast Cycle-by-Cycle Peak Current-Limit, 35ns Typical
The devices feature a unique feed-forward maximum
duty-cycle clamp that makes the maximum clamp volt-
age during transient conditions independent of the line
voltage, allowing the use of a power MOSFET with lower
breakdown voltage. The programmable frequency dither-
ing feature provides low-EMI, spread-spectrum operation.
Propagation Delay
● 115ns Current-Sense Internal Leading-Edge Blanking
● Output Short-Circuit Protection with Hiccup Mode
● Reverse Current Limit to Prevent Transformer
Saturation Due to Reverse Current
The MAX5974_ are available in 16-pin TQFN-EP pack-
ages and are rated for operation over the -40°C to +85°C
temperature range.
● Internal 18V Zener Clamp on Supply Input
● 3mm x 3mm, Lead-Free, 16-Pin TQFN-EP
Applications
®
● PoE IEEE 802.3af/at Powered Devices
● High-Power PD (Beyond the 802.3af/at Standard)
● Active-Clamped Forward DC-DC Converters
● IP Phones
IEEE is a registered service mark of the Institute of Electrical
and Electronics Engineers, Inc.
● Wireless Access Nodes
● Security Cameras
Ordering Information/Selector Guide appears at end of data
sheet.
19-5331; Rev 6; 7/17
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Absolute Maximum Ratings
IN to GND (V
= 0V)...........................................-0.3V to +26V
Maximum Input/Output Current (continuous)
EN
NDRV, AUXDRV to GND............................-0.3V to (V + 0.3V)
RT, DT, FFB, COMP, SS, DCLMP, DITHER/SYNC
EN.....................................................................................1mA
NDRV, AUXDRV (pulsed for less than 100ns) ..................±1A
IN
to GND.................................................................-0.3V to +6V
FB to GND (MAX5974A/MAX5974B only).................-6V to +6V
FB to GND (MAX5974C/MAX5974D only)..............-0.3V to +6V
CS, CSSC to GND ..................................................-0.8V to +6V
PGND to GND......................................................-0.3V to +0.3V
Continuous Power Dissipation (T = +70°C)
A
16-Pin TQFN (derate 20.8mW/°C above +70°C)......1666mW
Operating Temperature Range......................... -40°C to +105°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow).......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 16 TQFN
Package Code
T1633+4
21-0136
90-0031
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
)
48°C/W
7°C/W
JA
Junction to Case (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Maxim Integrated
│ 2
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Electrical Characteristics
IN
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V = V
= V
= V = V
= V
= V
,
IN
CS
CSSC
DITHER/SYNC
FB
FFB
DCLMP
GND
V
= +2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, C = 1µF, T = -40°C to +85°C (MAX5974B,
EN
RT DT IN A
MAX5974C, MAX5974D), T = -40°C to +105°C (MAX5974A), unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
UNDERVOLTAGE LOCKOUT/STARTUP (IN)
MAX5974A/C
15.4
8
16
16.5
8.85
-40°C to
+85°C
8.4
Bootstrap UVLO Wakeup Level
V
V
V
rising
falling
V
INUVR
IN
MAX5974B/D
-40°C to
+125°C
7.95
8.4
8.85
-40°C to +85°C
-40°C to +125°C
6.65
6.6
17
7
7
7.35
7.35
20
Bootstrap UVLO Shutdown
Level
V
V
V
INUVF
IN
IN Clamp Voltage
V
I
= 2mA (sinking)
18.5
IN_CLAMP
IN
V
= +15V (for
IN
-40°C to +85°C
-40°C to +125°C
100
100
150
250
MAX5974A/C);
IN Supply Current in
Undervoltage Lockout
I
V
= +7.5V (for
µA
START
IN
MAX5974B/D), when
in bootstrap UVLO
-40°C to +85°C
-40°C to +125°C
1.8
1.8
3
4
IN Supply Current After Startup
I
V
= +12V
mA
C
IN
ENABLE (EN)
-40°C to +85°C
-40°C to +125°C
-40°C to +85°C
-40°C to +125°C
1.17
1.17
1.215
1.2155
1.14
1.26
1.2655
1.19
1.19
1
V
V
V
rising
falling
ENR
EN
Enable Threshold
Input Current
V
1.09
1.085
V
ENF
EN
1.14
-40°C to +85°C
-40°C to +105°C
I
µA
EN
1.5
OSCILLATOR (RT)
RT Bias Voltage
V
1.23
V
RT
NDRV Switching Frequency
Range
f
100
-8
600
+8
kHz
SW
-40°C to +85°C
-40°C to +105°C
NDRV Switching Frequency
Accuracy
%
%
-11
+11
-40°C to +85°C
-40°C to +125°C
79
79
80
80
82
83
Maximum Duty Cycle
D
f
= 250kHz
SW
MAX
SYNCHRONIZATION (SYNC)
Synchronization Logic-High
Input
V
2.91
V
IH-SYNC
SYNCIN
Synchronization Pulse Width
50
ns
Synchronization Frequency
Range
1.1 x
2 x
f
SW
f
kHz
f
SW
Maxim Integrated
│ 3
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Electrical Characteristics (continued)
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V = V
= V
= V = V
= V
= V
,
IN
IN
CS
CSSC
DITHER/SYNC
FB
FFB
DCLMP
GND
V
= +2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, C = 1µF, T = -40°C to +85°C (MAX5974B,
EN
RT DT IN A
MAX5974C, MAX5974D), T = -40°C to +105°C (MAX5974A), unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Maximum Duty Cycle During
Synchronization
D
x f
/
MAX
SYNC
%
f
SW
DITHERING RAMP GENERATOR (DITHER)
-40°C to +85°C
45
44.5
43
50
50
50
50
2
55
55.5
57
Charging Current
V
V
= 0V
µA
µA
DITHER
-40°C to +125°C
-40°C to +85°C
-40°C to +125°C
Discharging Current
= 2.2V
DITHER
42
58
Ramp’s High Trip Point
V
V
Ramp’s Low Trip Point
0.4
SOFT-START AND RESTART (SS)
-40°C to +85°C
-40°C to +125°C
9.5
9
10
10
10.5
11
Charging Current
I
I
µA
SS-CH
I
V
= 2V, normal shutdown
0.65
1.34
2
mA
SS-D
SS
(V
< V
or V < V
),
EN
ENF
IN
INUVF
Discharging Current
V
= 2V, hiccup mode discharge for
1.6
2
2.4
µA
V
SS-DH
SS
t
(Note 2)
RSTRT
Discharge Threshold to Disable
Hiccup and Restart
V
0.15
SS-DTH
Minimum Restart Time During
Hiccup Mode
Clock
Cycles
t
1024
5
RSTRT-MIN
Normal Operating High Voltage
Duty-Cycle Control Range
DUTY-CYCLE CLAMP (DCLMP)
DCLMP Input Current
V
V
V
SS-HI
V
D
(typ) = (V /2.43V)
SS-DMAX
0
2
SS-DMAX
MAX
I
V
= 0 to 5V
-100
73
0
+100
77.5
58
nA
%
DCLMP
DCLMP
V
= 0.5V
= 1V
75.4
56
DCLMP
DCLMP
DCLMP
Duty-Cycle Control Range
V
V
V
54
D
(typ) =
DCLMP-R
MAX
1 - (V
/2.43V)
= 2V
14.7
16.5
18.3
DCLMP
NDRV DRIVER
-40°C to +85°C
-40°C to +125°C
1.9
1.9
4.7
1
3.4
3.5
8.3
I
(sinking) =
NDRV
Pulldown Impedance
R
Ω
NDRV-N
100mA
Pullup Impedance
Peak Sink Current
Peak Source Current
Fall Time
R
I
(sourcing) = 50mA
Ω
A
NDRV-P
NDRV
0.65
14
A
t
C
C
= 1nF
= 1nF
ns
ns
NDRV-F
NDRV
Rise Time
t
27
NDRV-R
NDRV
AUXDRV DRIVER
-40°C to +85°C
-40°C to +125°C
4.3
4.3
7.7
I
(sinking) =
AUXDRV
Pulldown Impedance
R
Ω
AUX-N
50mA
7.95
18.9
Pullup Impedance
Peak Sink Current
R
I
(sourcing) = 25mA
10.6
0.5
Ω
AUX-P
AUXDRV
A
Maxim Integrated
│ 4
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Electrical Characteristics (continued)
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V = V
= V
= V = V
= V
= V
,
IN
IN
CS
CSSC
DITHER/SYNC
FB
FFB
DCLMP
GND
V
= +2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, C = 1µF, T = -40°C to +85°C (MAX5974B,
EN
RT DT IN A
MAX5974C, MAX5974D), T = -40°C to +105°C (MAX5974A), unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
A
PARAMETER
Peak Source Current
Fall Time
SYMBOL
CONDITIONS
MIN
TYP
0.3
24
MAX
UNITS
A
t
C
C
= 1nF
ns
AUX-F
AUXDRV
Rise Time
t
= 1nF
45
ns
AUX-R
AUXDRV
DEAD-TIME PROGRAMMING (DT)
DT Bias Voltage
V
1.215
40
V
DT
R
R
R
R
= 10kΩ
= 100kΩ
= 10kΩ
= 100kΩ
From NDRV falling
to AUXDRV falling
DT
DT
DT
DT
ns
300
310
350
40
410
420
NDRV to AUXDRV Delay
(Dead Time)
t
DT
From AUXDRV rising
to NDRV rising
ns
360
CURRENT-LIMIT COMPARATOR (CS)
Cycle-by-Cycle Peak
V
375
393
410
-88
mV
CS-PEAK
Current-Limit Threshold
Turns AUXDRV off
for the remaining
cycle if reverse
current limit is
exceeded
-40°C to +85°C
-40°C to +105°C
-118
-100
Cycle-by-Cycle Reverse
V
mV
CS-REV
Current-Limit Threshold
-124
-100
-88
Current-Sense Blanking Time for
Reverse Current Limit
t
CS-BLANK-
REV
From AUXDRV falling edge
115
8
ns
Events
ns
Number of Consecutive Peak
Current-Limit Events to Hiccup
N
HICCUP
Current-Sense Leading-Edge
Blanking Time
t
From NDRV rising edge
115
CS-BLANK
From CS rising (10mV overdrive) to
NDRV falling (excluding leading-edge
blanking)
Propagation Delay from
Comparator Input to NDRV
t
35
ns
ns
PDCS
Minimum On-Time
t
100
150
200
ON-MIN
SLOPE COMPENSATION (CSSC)
-40°C to +85°C
-40°C to +125°C
47
52
52
58
Current ramp’s peak
added to CSSC
input per switching
cycle
Slope Compensation Current
Ramp Height
µA
46.5
59.5
PWM COMPARATOR
Comparator Offset Voltage
Current-Sense Gain
-40°C to +85°C
-40°C to +125°C
1.35
1.34
3.1
1.7
1.7
2
2
V
A
V
- V
CSSC
V
PWM-OS
COMP
ΔV
/ΔV
(Note 3)
3.33
3.6
V/V
ns
CS-PWM
COMP
CSSC
Current-Sense Leading-Edge
Blanking Time
t
From NDRV rising edge
115
150
CSSC-BLANK
Change in V = 10mV (including
internal leading-edge blanking)
CSSC
Comparator Propagation Delay
t
ns
PWM
Maxim Integrated
│ 5
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Electrical Characteristics (continued)
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V = V
= V
= V = V
= V
= V
,
IN
IN
CS
CSSC
DITHER/SYNC
FB
FFB
DCLMP
GND
V
= +2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, C = 1µF, T = -40°C to +85°C (MAX5974B,
EN
RT DT IN A
MAX5974C, MAX5974D), T = -40°C to +105°C (MAX5974A), unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ERROR AMPLIFIER
MAX5974A/B
1.5
1.52
1.54
V
0, V
when I
=
COMP
MAX5974C/D
1.202
1.215
1.227
FB
FB Reference Voltage
FB Input Bias Current
V
V
REF
= 2.5V
COMP
MAX5974DATE
(Note 4)
1.202
1.215
1.230
MAX5974A/B
MAX5974C/D
-250
-500
+250
+100
I
V
= 0 to 1.75V
nA
FB
FB
MAX5974DATE
(Note 4)
-1000
+100
Voltage Gain
A
80
dB
EAMP
MAX5974A/B
MAX5974C/D
1.8
1.8
2.55
2.66
3.2
3.5
Transconductance
g
mS
M
Open loop (typical
gain = 1) -3dB
frequency
MAX5974A/B
MAX5974C/D
2
Transconductance Bandwidth
BW
MHz
30
Source Current
V
V
= 1V, V
= 2.5V
300
300
375
375
455
455
µA
µA
FB
COMP
Sink Current
= 1.75V, V
= 1V
FB
COMP
FREQUENCY FOLDBACK (FFB)
V
Gain
-to-FFB Comparator
CSAVG
10
30
30
V/V
µA
-40°C to +85°C
-40°C to +125°C
26
26
33
V
V
= 0V,
= 0V (not in
FFB
FFB Bias Current
I
FFB
CS
33.5
FFB mode)
NDRV Switching Frequency
During Foldback
f
f
/2
SW
kHz
SW-FB
THERMAL SHUTDOWN
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
T
Temperature rising
Temperature falling
165
10
°C
°C
SD
Note 1: All devices are 100% production tested at T = +25°C. Limits over temperature are guaranteed by design.
A
Note 2: See the Output Short-Circuit Protection with Hiccup Mode section.
Note 3: The parameter is measured at the trip point of latch with V = 0V. Gain is defined as ∆V
/∆V
for 0.15V <
FB
COMP
CSSC
∆V
< 0.25V.
CSSC
Note 4: Operates over the -40°C to +125°C operating temperature range.
Maxim Integrated
│ 6
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Typical Operating Characteristics
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V
= V
= V
= V = V
= V
=
IN
IN
CS
CSSC
DITHER/SYNC
FB
FFB
DCLMP
V
, V
= 2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, unless otherwise noted.)
GND EN RT DT
IN UVLO WAKE-UP LEVEL
vs. TEMPERATURE
IN UVLO SHUTDOWN LEVEL
vs. TEMPERATURE
IN UVLO WAKE-UP LEVEL
vs. TEMPERATURE
16.3
8.6
8.5
8.4
8.3
8.2
8.1
8.0
7.3
7.2
7.1
7.0
6.9
6.8
MAX5974A/MAX5974C
MAX5974B/MAX5974D
16.2
16.1
16.0
15.9
15.8
15.7
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-40
-40
0
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
EN RISING THRESHOLD
vs. TEMPERATURE
EN FALLING THRESHOLD
vs. TEMEPRATURE
UVLO SHUTDOWN CURRENT
vs. TEMPERATURE
1.220
1.218
1.216
1.214
1.212
1.210
1.150
1.149
1.148
1.147
1.146
1.145
1.144
1.143
1.142
140
120
100
80
MAX5974A/MAX5974C
MAX5974B/MAX5974D
60
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
SUPPLY CURRENT
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(MAX5974A/MAX5974C)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(MAX5974B/MAX5974D)
vs. SWITCHING FREQUENCY
10,000
1000
100
10,000
1000
100
2.4
2.0
1.6
1.2
0.8
0.4
0
T
A
= +85°C
T = +85°C
A
T
A
= -40°C
T
= -40°C
A
10
10
0
2
4
6
8
10 12 14 16 18 20
0
2
4
6
8
10 12 14 16 18 20
100 200 300 400 500 600 700 800
SWITCHING FREQUENCY (kHz)
TEMPERATURE (°C)
TEMPERATURE (°C)
Maxim Integrated
│ 7
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Typical Operating Characteristics (continued)
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V
= V
= V
= V = V
= V
=
IN
IN
CS
CSSC
DITHER/SYNC
FB
FFB
DCLMP
V
, V
= 2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, unless otherwise noted.)
GND EN RT DT
SWITCHING FREQUENCY
SOFT-START CHARGING CURRENT
vs. TEMPERATURE
SWITCHING FREQUENCY
vs. TEMPERATURE
vs. R VALUE
RT
1000
100
10
10.06
10.05
10.04
10.03
10.02
10.01
10.00
9.99
252
251
250
249
248
247
246
245
244
9.98
9.97
10
100
-40
-15
10
35
60
85
-40
-40
0
-15
10
35
60
85
R
VALUE (kΩ)
TEMPERATURE (°C)
TEMPERATURE (°C)
RT
FREQUENCY DITHERING
MAXIMUM DUTY CYCLE
vs. SWITCHING FREQUENCY
MAXIMUM DUTY CYCLE
vs. TEMPERATURE
vs. R
DITHER
14
12
10
8
83
82
81
80
79
78
77
76
75
81.0
80.9
80.8
80.7
80.6
80.5
80.4
80.3
80.2
6
4
2
0
300 400 500 600 700 800 900 1000
(kΩ)
0
100 200 300 400 500 600 700 800
SWITCHING FREQUENCY (kHz)
-15
10
35
60
85
R
TEMPERATURE (°C)
DITHER
MAXIMUM DUTY CYCLE
vs. SYNC FREQUENCY
MAXIMUM DUTY CYCLE
MAXIMUM DUTY CYCLE
vs. V
vs. V
SS
DCLMP
45
40
35
30
25
20
15
10
5
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 0.5V
SS
0
250
300
350
400
450
500
0
0.5
1.0
1.5
(V)
2.0
2.5
0.5
1.0
1.5
2.0
2.5
SYNC FREQUENCY (kHz)
V
V
(V)
DCLMP
SS
Maxim Integrated
│
8
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Typical Operating Characteristics (continued)
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V
= V
= V
= V = V
= V
=
IN
IN
CS
CSSC
DITHER/SYNC
FB
FFB
DCLMP
V
, V
= 2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, unless otherwise noted.)
GND EN RT DT
PEAK CURRENT-LIMIT THRESHOLD
vs. TEMPERATURE
DEAD TIME vs. R VALUE
DEAD TIME vs. TEMPERATURE
DT
400
350
300
250
200
150
100
50
102
100
98
398
397
396
395
394
393
392
391
390
389
388
96
94
92
90
0
88
10 20 30 40 50 60 70 80 90 100
VALUE (kΩ)
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
R
TEMPERATURE (°C)
DT
TEMPERATURE (°C)
SLOPE COMPENSATION CURRENT
vs. TEMPERATURE
NDRV MINIMUM ON-TIME
vs. TEMPERATURE
REVERSE CURRENT-LIMIT THRESHOLD
vs. TEMPERATURE
-97
-98
54.0
53.5
53.0
52.5
52.0
51.5
51.0
50.5
50.0
170
165
160
155
150
145
140
-99
-100
-101
-102
-103
-104
-105
-106
-107
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
FEEDBACK VOLTAGE
vs. TEMPERATURE
CURRENT-SENSE GAIN
vs. TEMPERATURE
FEEDBACK VOLTAGE
vs. TEMPERATURE
3.40
3.39
3.38
3.37
3.36
3.35
3.34
3.33
3.32
3.31
3.30
1.220
1.219
1.218
1.217
1.216
1.215
1.214
1.213
1.212
1.211
1.210
1.522
1.521
1.520
1.519
1.518
1.517
1.516
MAX5974C/MAX5974D
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
Maxim Integrated
│
9
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Typical Operating Characteristics (continued)
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V
= V
= V
= V = V
= V
DCLMP
=
IN
IN
CS
CSSC
DITHER/SYNC
FB
FFB
V
, V
= 2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, unless otherwise noted.)
GND EN RT DT
TRANSCONDUCTANCE HISTOGRAM
(MAX5974A/MAX5974B)
TRANSCONDUCTANCE HISTOGRAM
(MAX5974C/MAX5974D)
TRANSCONDUCTANCE
vs. TEMPERATURE
3.0
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
25
20
15
10
5
25
20
15
10
5
MAX5974C/MAX5974D
MAX5974A/MAX5974B
2.0
-40
0
0
-15
10
35
60
85
2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 2.62 2.64
TRANSCONDUCTANCE (mS)
2.56 2.58 2.60 2.62 2.64 2.66 2.68 2.70 2.72 2.74 2.76
TRANSCONDUCTANCE (mS)
TEMPERATURE (°C)
ENABLE RESPONSE
SHUTDOWN RESPONSE
MAX5974A/B/C/D toc32
MAX5974A/B/C/D toc31
V
EN
V
EN
5V/div
5V/div
V
NDRV
V
NDRV
10V/div
10V/div
V
AUXDRV
V
AUXDRV
10V/div
10V/div
V
OUT
V
OUT
5V/div
5V/div
100µs/div
200µs/div
V
SS
RAMP RESPONSE
V
RAMP RESPONSE
DCLMP
MAX5974A/B/C/D toc33
MAX5974A/B/C/D toc34
V
SS
V
DCLMP
2V/div
2V/div
V
NDRV
V
NDRV
10V/div
10V/div
V
AUXDRV
V
AUXDRV
10V/div
10V/div
10µs/div
10µs/div
Maxim Integrated
│
10
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Typical Operating Characteristics (continued)
(V = 12V (for MAX5974A/MAX5974C, bring V up to 17V for startup), V
= V
= V
= V = V
= V
DCLMP
=
IN
IN
CS
CSSC
DITHER/SYNC
FB
FFB
V
, V
= 2V, NDRV = AUXDRV = SS = COMP = unconnected, R = 34.8kΩ, R = 25kΩ, unless otherwise noted.)
GND EN RT DT
NDRV 10% TO 90% RISE TIME
NDRV 90% TO 10% FALL TIME
AUXDRV 10% TO 90% RISE TIME
MAX5974A/B/C/D toc37
MAX5974A/B/C/D toc35
MAX5974A/B/C/D toc36
0ns
27.6ns
45.6ns
V
NDRV
V
NDRV
V
AUXDRV
2V/div
2V/div
2V/div
13.8ns
0ns
0ns
10ns/div
10ns/div
10ns/div
AUXDRV 90% TO 10% FALL TIME
PEAK NDRV CURRENT
MAX5974A/B/C/D toc39
MAX5974A/B/C/D toc38
PEAK SOURCE CURRENT
0ns
V
I
NDRV
AUXDRV
2V/div
0.5A/div
21ns
PEAK SINK CURRENT
10ns/div
200ns/div
SHORT-CURRENT BEHAVIOR
PEAK AUXDRV CURRENT
MAX5974A/B/C/D toc40
MAX5974A/B/C/D toc41
15V
5V
V
PEAK SOURCE
CURRENT
IN
5V/div
I
V
NDRV
AUXDRV
0.2A/div
10V/div
V
CS
500mV/div
PEAK SINK CURRENT
400ns/div
40ms/div
Maxim Integrated
│
11
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Pin Configuration
TOP VIEW
16
15
14
13
12
1
2
3
4
DT
AUXDRV
MAX5974A
MAX5974B
MAX5974C
MAX5974D
DITHER/
SYNC
11
NDRV
10
RT
PGND
EP
9
FFB
CS
5
6
7
8
ꢀꢁ ꢂꢃꢄꢅ
ꢆꢇmm ꢈ ꢇmmꢉ
Pin Description
PIN
NAME
FUNCTION
Dead-Time Programming Resistor Connection. Connect resistor R from DT to GND to set the
DT
1
DT
desired dead time between the NDRV and AUXDRV signals. See the Dead Time section to calculate
the resistor value for a particular dead time.
Frequency Dithering Programming or Synchronization Connection. For spread-spectrum frequency
operation, connect a capacitor from DITHER to GND and a resistor from DITHER to RT. To
synchronize the internal oscillator to the externally applied frequency, connect DITHER/SYNC to the
synchronization pulse.
DITHER/
SYNC
2
Switching Frequency Programming Resistor Connection. Connect resistor R from RT to GND to set
RT
3
4
5
RT
FFB
the PWM switching frequency. See the Oscillator/Switching Frequency section to calculate the resistor
value for the desired oscillator frequency.
Frequency Foldback Threshold Programming Input. Connect a resistor from FFB to GND to set the
output average current threshold below which the converter folds back the switching frequency to 1/2
of its original value. Connect to GND to disable frequency foldback.
Transconductance Amplifier Output and PWM Comparator Input. COMP is level shifted down and
connected to the inverting input of the PWM comparator. COMP is actively pulled low by the controller
after shutdown.
COMP
Maxim Integrated
│ 12
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Pin Description (continued)
PIN
6
NAME
FB
FUNCTION
Transconductance Amplifier Inverting Input
7
GND
Signal Ground
Current Sense with Slope Compensation Input. A resistor connected from CSSC to CS programs the
amount of slope compensation. See the Programmable Slope Compensation section.
8
9
CSSC
CS
Current-Sense Input. Current-sense connection for average current sense and cycle-by-cycle current
limit. Peak current-limit trip voltage is 400mV and reverse current-limit trip voltage is -100mV.
10
11
PGND
NDRV
Power Ground. PGND is the return path for gate-driver switching currents.
Main Switch Gate-Driver Output
pMOS Active Clamp Switch Gate-Driver Output. AUXDRV can also be used to drive a pulse
transformer for synchronous flyback application.
12
13
AUXDRV
IN
Converter Supply Input. IN has wide UVLO hysteresis, enabling the design of efficient power supplies.
See the Enable Input section to determine if an external zener diode is required at IN.
Enable Input. The gate drivers are disabled and the device is in a low-power UVLO mode when the
14
15
EN
voltage on EN is below V
enable conditions. See the Enable Input section for more information about interfacing to EN.
. When the voltage on EN is above V
, the device checks for other
ENF
ENR
Feed-Forward Maximum Duty-Cycle Clamp Programming Input. Connect a resistive divider between
the input supply voltage DCLMP and GND. The voltage at DCLMP sets the maximum duty cycle
DCLMP
(D
) of the converter inversely proportional to the input supply voltage, so that the MOSFET
MAX
remains protected during line transients.
Soft-Start Programming Capacitor Connection. Connect a capacitor from SS to GND to program the
soft-start period. This capacitor also determines hiccup mode current-limit restart time. A resistor from
16
—
SS
EP
SS to GND can also be used to set the D
below 75%.
MAX
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance. Not intended as an electrical connection point.
Maxim Integrated
│ 13
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Block Diagrams
Maxim Integrated
│ 14
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Block Diagrams (continued)
Maxim Integrated
│ 15
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
The devices include a cycle-by-cycle current limit that
turns off the main and AUX drivers whenever the internal-
ly set threshold of 400mV is exceeded. Eight consecutive
occurrences of current-limit events trigger hiccup mode,
which protects external components by halting switching
Detailed Description
The MAX5974A/MAX5974B/MAX5974C/MAX5974D are
optimized for controlling a 25W to 50W active-clamped,
self-driven synchronous rectification forward converter in
continuous-conduction mode. The main switch gate driver
(NDRV) and the active-clamped switch driver (AUXDRV)
are sized to optimize efficiency for 25W design. The
features-rich devices are ideal for PoE IEEE 802.3af/at-
powered devices.
for a period of time (t
) and allowing the overload
RSTRT
current to dissipate in the load and body diode of the syn-
chronous rectifier before soft-start is reattempted.
The reverse current-limit feature of the devices turns the
AUX driver off for the remaining off period when V
CS
The MAX5974A/MAX5974C offer a 16V bootstrap UVLO
wake-up level with a 9V wide hysteresis. The low startup
and operating currents allow the use of a smaller storage
capacitor at the input without compromising startup and
hold times. The MAX5974A/MAX5974C are well-suited
for universal input (rectified 85V AC to 265V AC) or tele-
com (-36V DC to -72V DC) power supplies.
exceeds the -100mV threshold. This protects the trans-
former core from saturation due to excess reverse current
under some extreme transient conditions.
Current-Mode Control Loop
The advantages of current-mode control over voltage-
mode control are twofold. First, there is the feed-forward
characteristic brought on by the controller’s ability to
adjust for variations in the input voltage on a cycle-by-
cycle basis. Second, the stability requirements of the cur-
rent-mode controller are reduced to that of a single-pole
system, unlike the double pole in voltage-mode control.
The MAX5974B/MAX5974D have a UVLO rising threshold
of 8.4V and can accommodate for low-input voltage (12V
DC to 24V DC) power sources such as wall adapters.
Power supplies designed with the MAX5974A/MAX5974C
use a high-value startup resistor, R , that charges a res-
IN
ervoir capacitor, C (see the Typical Application Circuits).
The devices use a current-mode control loop where the
scaled output of the error amplifier (COMP) is compared
to a slope-compensated current-sense signal at CSSC.
IN
During this initial period, while the voltage is less than
the internal bootstrap UVLO threshold, the device typi-
cally consumes only 100µA of quiescent current. This low
startup current and the large bootstrap UVLO hysteresis
Input Clamp
When the device is enabled, an internal 18V input clamp
is active. During an overvoltage condition, the clamp pre-
vents the voltage at the supply input IN from rising above
18.5V (typ).
help to minimize the power dissipation across R even at
the high end of the universal AC input voltage (265V AC).
IN
Feed-forward maximum duty-cycle clamping detects
changes in line conditions and adjusts the maximum duty
cycle accordingly to eliminate the clamp voltage’s (i.e.,
the main power FET’s drain voltage) dependence on the
input voltage.
When the device is disabled, the input clamp circuitry is
also disabled.
Enable Input
For EMI-sensitive applications, the programmable fre-
quency dithering feature allows up to ±10% variation in
the switching frequency. This spread-spectrum modula-
tion technique spreads the energy of switching harmonics
over a wider band while reducing their peaks, helping to
meet stringent EMI goals.
The enable input is used to enable or disable the device.
Driving EN low disables the device. Note that the inter-
nal 18V input clamp is also disabled when EN is low.
Therefore, an external 18V zener diode is needed for
certain operating conditions as described below.
Maxim Integrated
│ 16
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
The digital output connected to EN should be capable of
withstanding more than the maximum supply voltage.
UVLO on Power Source
The enable input has an accurate threshold of 1.26V
(max). For applications that require a UVLO on the
power source, connect a resistive divider from the power
source to EN to GND as shown in Figure 1. A zener diode
between IN and GND is required to prevent the NDRV
and AUXDRV gate-drive voltages from exceeding 20V,
the maximum allowed gate voltage of power FETs.
MCU Control of Enable Input
When using a microcontroller GPIO to control the enable
input, an 18V zener diode is required on IN as shown in
Figure 2.
High-Voltage Logic Control of Enable Input
In the case where EN is externally controlled by a high-
voltage open-drain/collector output (e.g., PGOOD indi-
cator of a powered device controller), connect IN to EN
The external zener diode should clamp in the following
range:
20V > V > V
through a resistor R
and connect EN to an open-drain
Z
UVLO(MAX)
EN
or open-collector output as shown in Figure 3. Select R
EN
where V is the zener voltage and V
maximum wakeup level (16.5V or 8.85V depending on the
device version). An 18V zener diode is the best choice.
is the
UVLO(MAX)
Z
such that the voltage at IN, when EN is low, is less than
20V (i.e., the maximum gate voltage of the main and AUX
FETs):
Design the resistive divider by first selecting the value of
R
R
to be on the order of 100kΩ. Then calculate R
EN
+ R
EN1
EN2
V
×
< 20V
S(MAX)
R
as follows:
EN
IN
V
where V
is the maximum supply voltage. Obeying
EN(MAX)
_
S(MAX)
V
= R
×
EN1
EN2
this relationship eliminates the need for an external zener
diode.
V
V
EN(MAX)
S(UVLO)
where V
age and is equal to 1.26V and V
UVLO threshold for the power source, below which the
device is disabled.
is the maximum enable threshold volt-
EN(MAX)
The digital output connected to EN should be capable of
withstanding more than 20V.
is the desired
S(UVLO)
V
S
V
S
R
IN
R
IN
IN
IN
18V
C
IN
C
IN
18V
MAX5974
MAX5974_
R
R
EN1
MCU
DIGITAL
CONTROL
I/O
EN
EN
N
EN2
Figure 2. MCU Control of the Enable Input
Figure 1. Programmable UVLO for the Power Source
Maxim Integrated
│ 17
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Because the MAX5974B/MAX5974D are designed for
use with low-voltage power sources such as wall adapters
outputting 12V to 24V, they have a lower UVLO wake-up
threshold of 8.4V.
V
S
R
IN
Startup Operation
The device starts up when the voltage at IN exceeds 16V
(MAX5974A/MAX5974C) or 8.4V (MAX5974B/MAX5974D)
and the enable input voltage is greater than 1.26V.
IN
C
IN
MAX5974
During normal operation, the voltage at IN is nor-
mally derived from a tertiary winding of the transformer
(MAX5974C/MAX5974D). However, at startup there is no
energy being delivered through the transformer; hence,
a special bootstrap sequence is required. In the Typical
R
EN
DIGITAL
CONTROL
EN
Application Circuits, C
charges through the startup
IN
N
resistor, R , to an intermediate voltage. Only 100µA of
IN
the current supplied through R is used by the ICs, the
IN
remaining input current charges C until V reaches the
IN
IN
bootstrap UVLO wake-up level. Once V exceeds this
IN
level, NDRV begins switching the n-channel MOSFET
and transfers energy to the secondary and tertiary out-
puts. If the voltage on the tertiary output builds to higher
than 7V (the bootstrap UVLO shutdown level), then start-
up has been accomplished and sustained operation com-
Figure 3. High-Voltage Logic Control of the Enable Input
V
S
mences. If V drops below 7V before startup is complete,
IN
the device goes back to low-current UVLO. In this case,
increase the value of C in order to store enough energy
to allow for the voltage at the tertiary winding to build up.
IN
R
IN
While the MAX5974A/MAX5974B derive their input volt-
age from the coupled inductor output during normal
operation, the startup behavior is similar to that of the
MAX5974C/MAX5974D.
IN
C
IN
MAX5974_
Soft-Start
EN
A capacitor from SS to GND, C , programs the soft-start
SS
time. V
controls the oscillator duty cycle during startup
SS
to provide a slow and smooth increase of the duty cycle
Figure 4. Always-On Operation
to its steady-state value. Calculate the value of C
follows:
as
SS
Always-On Operation
I
× t
SS
2V
For always-on operation, connect EN to IN as shown
in Figure 4. No external zener diode is needed for this
configuration.
SS-CH
C
=
SS
where I
(10µA typ) is the current charging C dur-
SS-CH
SS
Bootstrap Undervoltage Lockout
ing soft-start and t is the programmed soft-start time.
SS
The devices have an internal bootstrap UVLO that is very
useful when designing high-voltage power supplies (see
the Block Diagrams). This allows the device to bootstrap
itself during initial power-up. The MAX5974A/MAX5974C
A resistor can also be added from the SS pin to GND to
clamp V
cycle to be less than 80% (see the Duty-Cycle Clamping
section)
< 2V and, hence, program the maximum duty
SS
soft-start when V exceeds the bootstrap UVLO thresh-
IN
old of V
(16V typ).
INUVR
Maxim Integrated
│ 18
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
n-Channel MOSFET Gate Driver
Dead Time
The NDRV output drives an external n-channel MOSFET.
NDRV can source/sink in excess of 650mA/1000mA
peak current; therefore, select a MOSFET that yields
acceptable conduction and switching losses. The external
MOSFET used must be able to withstand the maximum
clamp voltage.
Dead time between the main and AUX output edges allow
ZVS to occur, minimizing conduction losses and improv-
ing efficiency. The dead time (t ) is applied to both lead-
DT
ing and trailing edges of the main and AUX outputs as
shown in Figure 5. Connect a resistor between DT and
GND to set t to any value between 40ns and 400ns:
DT
p-Channel MOSFET Gate Driver
The AUXDRV output drives an external p-channel
MOSFET with the aid of a level shifter. The level shifter
10kΩ
40ns
R
=
× t
DT
DT
consists of C
Application Circuits. When AUXDRV is high, C
recharged through D5. When AUXDRV is low, the gate of
the p-channel MOSFET is pulled below the source by the
voltage stored on C
, R
, and D5 as shown in the Typical
Oscillator/Switching Frequency
AUX AUX
is
AUX
The ICs’ switching frequency is programmable between
100kHz and 600kHz with a resistor R
connected
RT
between RT and GND. Use the following formula to deter-
mine the appropriate value of R needed to generate the
, turning on the pFET.
AUX
RT
Add a zener diode between gate to source of the external
n-channel and p-channel MOSFETs after the gate resis-
tors to protect V
mum rating during transient condition (see the Typical
Application Circuits).
desired output-switching frequency (f ):
SW
9
from rising above its absolute maxi-
8.7×10
GS
R
=
RT
f
SW
where f
is the desired switching frequency.
SW
BLANKING, t
BLK
NDRV
AUXDRV
DEAD TIME, t
DT
Figure 5. Dead Time Between AUXDRV and NDRV
Maxim Integrated
│ 19
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Peak Current Limit
Reverse Current Limit
The current-sense resistor (R
Circuits), connected between the source of the n-channel
in the Typical Application
The devices protect the transformer against saturation
due to reverse current by monitoring the voltage across
CS
MOSFET and PGND, sets the current limit. The current-
R
while the AUX output is low and the p-channel FET
CS
limit comparator has a voltage trip level (V
) of
is on.
CS-PEAK
400mV. Use the following equation to calculate the value
of R
Output Short-Circuit Protection
with Hiccup Mode
:
CS
When the device detects eight consecutive peak current-
limit events, both NDRV and AUXDRV driver outputs are
400mV
R
=
CS
I
PRI
turned off for a restart period, t . After t
RSTRT
, the
RSTRT
device undergoes soft-start. The duration of the restart
where I
is the peak current in the primary side of the
PRI
period depends on the value of the capacitor at SS (C ).
transformer, which also flows through the MOSFET. When
the voltage produced by this current (through the current-
sense resistor) exceeds the current-limit comparator
threshold, the MOSFET driver (NDRV) terminates the
current on-cycle, within 35ns (typ).
SS
During this period, C is discharged with a pulldown cur-
SS
rent of I
(2µA typ). Once its voltage reaches 0.15V,
SS-DH
the restart period ends and the device initiates a soft-start
sequence. An internal counter ensures that the minimum
restart period (t
) is 1024 clock cycles when the
RSTRT-MIN
The devices implement 115ns of leading-edge blanking
to ignore leading-edge current spikes. These spikes are
caused by reflected secondary currents, current-discharg-
ing capacitance at the FET’s drain, and gate-charging cur-
rent. Use a small RC network for additional filtering of the
leading-edge spike on the sense waveform when needed.
Set the corner frequency between 10MHz and 20MHz.
time required for C
to discharge to 0.15V is less than
SS
1024 clock cycles. Figure 6 shows the behavior of the
device prior and during hiccup mode.
Frequency Foldback for High-Efficiency
Light-Load Operation
The frequency foldback threshold can be programmed
from 0 to 20% of the full load current using a resistor from
FFB to GND.
After the leading-edge blanking time, the device monitors
V
for any breaches of the peak current limit of 400mV.
CS
The duty cycle is terminated immediately when V
exceeds 400mV.
CS
V
CS-PEAK
(400mV)
V
CSBL
(BLANKED CS
VOLTAGE)
HICCUP
DISCHARGE WITH I
SS-DH
V
SS-HI
SOFT-START
VOLTAGE,
V
SS-DTH
V
SS
t
t
RSTRT
SS
Figure 6. Hiccup Mode Timing Diagram
Maxim Integrated
│ 20
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
When V
falls below V
, the device folds back
FFB
Oscillator Synchronization
CSAVG
the switching frequency to 1/2 the original value to reduce
switching losses and increase the converter efficiency.
Calculate the value of R
The internal oscillator can be synchronized to an external
clock by applying the clock to DITHER/SYNC directly. The
external clock frequency can be set anywhere between
1.1x to 2x the internal clock frequency.
as follows:
FFB
10×I
×R
CS
LOAD(LIGHT)
R
=
Using an external clock increases the maximum duty
FFB
I
FFB
cycle by a factor equal to f
/f . This factor should
SYNC SW
be accounted for in setting the maximum duty cycle using
any of the methods described in the Duty-Cycle Clamping
section. The formula below shows how the maximum duty
cycle is affected by the external clock frequency:
where R
is the resistor between FFB and GND,
is the current at light-load conditions that
FFB
I
LOAD(LIGHT)
triggers frequency foldback, R is the value of the sense
resistor connected between CS and PGND, and I
CS
is
FFB
the current sourced from FFB to R
(30µA typ).
FFB
V
f
SYNC
f
SW
MIN
D
=
×
MAX
Duty-Cycle Clamping
2.43V
The maximum duty cycle is determined by the lowest
of three voltages: 2V, the voltage at SS (V ), and the
where V
is described in the Duty-Cycle Clamping sec-
is the switching frequency as set by the resistor
MIN
SS
tion, f
SW
voltage (2.43V - V
calculated as:
). The maximum duty cycle is
DCLMP
connected between RT and GND, and f
nal clock frequency.
is the exter-
SYNC
V
MIN
Frequency Dithering for Spread-
Spectrum Applications (Low EMI)
The switching frequency of the converter can be dith-
ered in a range of ±10% by connecting a capacitor from
DITHER/SYNC to GND, and a resistor from DITHER/
SYNC to RT as shown in the Typical Application Circuits.
This results in lower EMI.
D
=
MAX
2.43V
= minimum (2V, V , 2.43V - V ).
DCLMP
where V
MIN
SS
SS
By connecting a resistor between SS and ground, the
voltage at SS can be made to be lower than 2V. V
calculated as follows:
is
SS
A current source at DITHER/SYNC charges the capacitor
C
to 2V at 50µA. Upon reaching this trip point, it
DITHER
V
= R
×I
SS SS-CH
SS
discharges C
to 0.4V at 50µA. The charging and
DITHER
discharging of the capacitor generates a triangular wave-
form on DITHER/SYNC with peak levels at 0.4V and 2V
and a frequency that is equal to:
where R
GND, and I
(10µA typ).
is the resistor connected between SS and
SS
is the current sourced from SS to R
SS-CH
SS
50µA
DCLMP
f
=
TRI
C
× 3.2V
To set D
using supply voltage feed-forward, connect
MAX
DITHER
a resistive divider between the supply voltage, DCLMP,
and GND as shown in the Typical Application Circuits.
This feed-forward duty-cycle clamp ensures that the
external n-channel MOSFET is not stressed during supply
Typically, f
should be set close to 1kHz. The resistor
TRI
R
connected from DITHER/SYNC to RT deter-
DITHER
mines the amount of dither as follows:
transients. V
is calculated as follows:
DCLMP
4
3
R
RT
DITHER
%DITHER =
×
R
R
DCLMP2
V
=
× V
S
DCLMP
R
+ R
DCLMP2
DCLMP1
where %DITHER is the amount of dither expressed as a
percentage of the switching frequency. Setting R
to 10 x R generates ±10% dither.
RT
where R
and R
are the resistive divider
DITHER
DCLMP1
DCLMP2
values shown in the Typical Application Circuits and V is
S
the input supply voltage.
Maxim Integrated
│ 21
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Programmable Slope Compensation
Applications Information
The device generates a current ramp at CSSC such that
its peak is 50µA at 80% duty cycle of the oscillator. An
external resistor connected from CSSC to the CS then
converts this current ramp into programmable slope-
compensation amplitude, which is added to the current-
sense signal for stability of the peak current-mode control
loop. The ramp rate of the slope compensation signal is
given by:
Startup Time Considerations
The bypass capacitor at IN, C , supplies current imme-
IN
diately after the devices wake up (see the Typical
Application Circuits). Large values of C increase the
startup time, but also supply gate charge for more cycles
during initial startup. If the value of C is too small, V
drops below 7V because NDRV does not have enough
time to switch and build up sufficient voltage across the
tertiary output (MAX5974C/MAX5974D) or coupled induc-
tor output (MAX5974A/MAX5974B), which powers the
device. The device goes back into UVLO and does not
IN
IN
IN
R
× 50µA × f
CSSC
SW
m =
80%
start. Use a low-leakage capacitor for C .
IN
where m is the ramp rate of the slope-compensation sig-
nal, R is the value of the resistor connected between
Typically, offline power supplies keep startup times to less
than 500ms even in low-line conditions (85V AC input
for universal offline or 36V DC for telecom applications).
CSSC
CSSC and CS used to program the ramp rate, and f
the switching frequency.
is
SW
Size the startup resistor, R , to supply both the maxi-
mum startup bias of the device (150µA) and the charg-
IN
Error Amplifier
The MAX5974A/MAX5974B include an internal error
amplifier with a sample-and-hold input. The feedback
input of the MAX5974C/MAX5974D is continuously con-
nected. The noninverting input of the error amplifier is
connected to the internal reference and feedback is
provided at the inverting input. High open-loop gain and
unity-gain bandwidth allow good closed-loop bandwidth
and transient response. Calculate the power-supply out-
put voltage using the following equation:
ing current for C . C must be charged to 16V within
IN
IN
the desired 500ms time period. C must store enough
IN
charge to deliver current to the device for at least the
soft-start time (t ) set by C . To calculate the approxi-
SS
SS
mate amount of capacitance required, use the following
formula:
I
= Q
f
GTOT SW
G
(I + I )(t
)
IN
G
SS
C
=
IN
V
HYST
R
+ R
FB1
R
FB2
V
= V
×
OUT
REF
FB2
where I is the ICs’ internal supply current (1.8mA) after
IN
startup, Q
and p-channel FETs, f
is the total gate charge for the n-channel
GTOT
where V
= 1.52V for the MAX5974A/MAX5974B and
REF
is the ICs’ switching frequency,
SW
V
REF
= 1.215V for the MAX5974C/MAX5974D. The
V
is the bootstrap UVLO hysteresis (9V typ), and t
HYST
SS
amplifier’s noninverting input is internally connected to a
soft-start circuit that gradually increases the reference
voltage during startup. This forces the output voltage to
come up in an orderly and well-defined manner under all
load conditions.
is the soft-start time. R is then calculated as follows:
IN
V
− V
S(MIN)
INUVR
R
≅
IN
I
START
where V
is the minimum input supply voltage for the
S(MIN)
application (36V for telecom), V
UVLO wake-up level (16V), and I
current at startup (150µA max).
is the bootstrap
is the IN supply
INUVR
START
Maxim Integrated
│ 22
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Choose a higher value for R than the one calculated
IN
above if a longer startup time can be tolerated in order to
The AUX driver controls the p-channel FET through a
level shifter. The level shifter consists of an RC network
minimize power loss on this resistor.
(formed by C
and R
) and diode D5, as shown in
AUX
AUX
the Typical Application Circuits. Choose R
and C
AUX
AUX
Active Clamp Circuit
Traditional clamp circuits prevent transformer satura-
tion by channeling the magnetizing current (I ) of the
transformer onto a dissipative RC network. To improve
efficiency, the active clamp circuit recycles I between the
magnetizing inductance and clamp capacitor. V
given by:
so that the time constant exceeds 100/f . Diode D5 is
SW
a small-signal diode with a voltage rating exceeding 25V.
M
Additionally, C
should be chosen such that the
CLAMP
complex poles formed with magnetizing inductance
(L ) and C are 2x to 4x away from the loop
M
MAG
CLAMP
is
CLAMP
bandwidth:
1-D
× C
> 3× f
V
S
1− D
BW
V
=
2π L
CLAMP
MAG
CLAMP
Bias Circuit
where V is the voltage of the power source and D is
S
the duty cycle. To select n-channel and p-channel FETs
with adequate breakdown voltages, use the maximum
Optocoupler Feedback (MAX5974C/MAX5974D)
An in-phase tertiary winding is needed to power the bias
circuit when using optocoupler feedback. The voltage
value of V
. V
occurs when the input
CLAMP CLAMP(MAX)
voltage is at its minimum and the duty cycle is at its
maximum. V during normal opera-
across the tertiary V during the on-time is:
T
CLAMP(MAX-NORMAL)
tion is therefore:
N
N
T
S
V
= V
×
OUT
T
V
S(MIN)
V
=
CLAMP(MAX-NORMAL)
where V
is the output voltage and N /N is the turns
T S
ratio from the tertiary to the secondary winding. Select the
turns ratio so that V is above the UVLO shutdown level
(7.35V max) by a margin determined by the holdup time
needed to “ride through” a brownout.
OUT
N
× V
P
O
1− N × V
S
S(MIN)
T
where V
is the minimum voltage of the power
S(MIN)
source, N /N is the primary to secondary turns ratio, and
P
S
V
is the output voltage. The clamp capacitor, n-channel,
O
Coupled-Inductor Feedback (MAX5974A/MAX5974B)
and p-channel FETs must have breakdown voltages
exceeding this level.
When using coupled-inductor feedback, the power for
the devices can be taken from the coupled inductor dur-
ing the off-time. The voltage across the coupled inductor,
If feed-forward maximum duty-cycle clamp is used then:
V
, during the off-time is:
COUPLED
V
V
MIN
DCLMP
2.43
D
=
×
= 1−
MAX-FF
2.43
N
N
C
O
V
= V
×
OUT
COUPLED
V
S
2.43
R
DCLMP2
+ R
DCLMP1 DCLMP2
= 1−
R
where V
is the output voltage and N /N is the turns
C O
OUT
ratio from the coupled output to the main output winding.
Therefore, V
mum duty clamp is:
during feed-forward maxi-
CLAMP(MAX-FF)
Select the turns ratio so that V is above the
COUPLED
UVLO shutdown level (7.5V max) by a margin determined
V
by the holdup time needed to “ride through” a brownout.
S
V
=
CLAMP(MAX-FF)
1− D
This voltage appears at the input of the devices, less
MAX−FF
a diode drop. An RC network consisting of R
and
SNUB
2.43× R
+ R
(
)
DCLMP1
DCLMP2
=
C
is for damping the reverse recovery transients of
SNUB
R
DCLMP2
diode D6.
Maxim Integrated
│ 23
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
During on-time, the coupled output is:
Layout Recommendations
Typically, there are two sources of noise emission in a
switching power supply: high di/dt loops and high dV/dt
surfaces. For example, traces that carry the drain current
often form high di/dt loops. Similarly, the heatsink of the
main MOSFET presents a dV/dt source; therefore, mini-
mize the surface area of the MOSFET heatsink as much
as possible. Keep all PCB traces carrying switching cur-
rents as short as possible to minimize current loops. Use
a ground plane for best results.
N
N
N
N
S
P
C
O
V
= −(V
×
− V
)
OUT
COUPLED-ON
S
where V is the input supply voltage.
S
Care must be taken to ensure that the voltage at FB
(equal to V attenuated by the feedback
resistive divider) is not more than 5V:
COUPLED-ON
R
FB2
For universal AC input design, follow all applicable safety
regulations. Offline power supplies can require UL, VDE,
and other similar agency approvals.
V
= V
×
COUPLED-ON
< 5V
FB-ON
R
(
+ R
)
FB1
FB2
If this condition is not met, a signal diode should be
placed from GND (anode) to FB (cathode).
Refer to the MAX5974A and MAX5974C Evaluation Kit
data sheets for recommended layout and component
values.
Maxim Integrated
│ 24
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Typical Application Circuits
V
S
L1
3.3mH
36V TO 57V
D1
C
BULK
33µF
N
T
R
IN
100kΩ
D2
L2
C
IN
6.8µH
1µF
25V
5V, 5A
R
7.5kΩ
1%
FB1
D3
R
C
OUT5
0.1µF
GATE2
10Ω
C
C
C
C
OUT1 OUT2 OUT3 OUT4
T1
R
GATE1
10Ω
N
N
S
P
RDCLMP1
IN
N2
5i412DP
30.1kΩ
N
R
FB2
1%
R
EN
100kΩ
2.49kΩ
1%
D4
PGOOD
EN
RDCLMP2
750Ω 1%
N
DCLMP
N1
5i412DP
C
SS
0.1µF
MAX5974C
MAX5974D
SS
DT
IN
(OPTOCOUPLER
FEEDBACK)
R
DT
16.9kΩ 1%
N3
FDS3692
R
OPTO3
R
4.99kΩ
OPTO1
825Ω
1%
C
COMP1
2.2nF
C
CLAMP
47nF
R
1%
C
GATE3
10Ω
DITHER
10nF
R
COMP2
499Ω
1%
DITHER/
SYNC
U1
FOD817CSD
NDRV
N
R
GATE4
10Ω
R
RT
14.7kΩ 1%
C
COMP2
6.8pF
N4
IRF6217
P
AUXDRV
RT
R
BIAS
C
47nF
AUX
4.02kΩ
1%
R
FFB
R
F
C
INT
0.1µF
10.0kΩ 1%
499Ω 1%
FFB
FB
CS
C
F
R
COMP2
330pF
R
G1
R
G2
2.00kΩ
R
AUX
10kΩ
121kΩ 1% 200kΩ 1%
D5
CS
1%
COMP
CSSC
R
CSSC
4.02kΩ 1%
GND
PGND
U2
TLV4314AIDBVT-1.24V
R
OPTO2
R
1kΩ
1%
0.2Ω
Maxim Integrated
│ 25
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Typical Application Circuits (continued)
D6
R
FB1
54.9kΩ 1%
C
R
SNUB
SNUB
V
S
10pF 69.8Ω 1%
36V TO 57V
TO FB
R
FB2
C
33µF
63V
BULK
10kΩ 1%
R
IN
L
COUPLED
100kΩ
N
C
4 x 47µF
6.3V
C
1µF
25V
IN
5V, 5A
OUT5
N
O
R
R
D3
GATE2
10Ω
DCLMP1
T1
30.1kΩ
C
C
C
C
OUT1 OUT2 OUT3 OUT4
R
GATE1
10Ω
N
P
N
S
C
1%
0.1µF
N2
5i412DP
N
IN
R
EN
100kΩ
D4
PGOOD
EN
N
RDCLMP2
750Ω 1%
DCLMP
N1
5i412DP
C
SS
0.1µF
MAX5974A
MAX5974B
SS
(COUPLED INDUCTOR
FEEDBACK)
DT
R
DT
16.9kΩ 1%
N3
FDS3692
C
CLAMP
R
C
GATE3
DITHER
47nF
10Ω
10nF
DITHER/
SYNC
NDRV
N
R
GATE4
10Ω
R
RT
14.7kΩ 1%
N4
IRF6217
P
AUXDRV
RT
C
AUX
47nF
R
FFB
10kΩ 1%
R
F
FFB
FB
499Ω 1%
CS
C
330pF
F
C
COMP
4.7nF
R
Z
R
AUX
10kΩ
D5
CS
2kΩ 1%
COMP
CSSC
R
CSSC
4.02kΩ 1%
GND
PGND
C
INT
47nF
R
0.2Ω
Maxim Integrated
│ 26
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Typical Application Circuits (continued)
L1
D1
V
S
N
T
C
D2
BULK
R
IN
L2
C
IN
T1
D3
R
R
R
FB1
FB2
GATE2
C
C C C
OUT2 OUT3 OUT4
N
P
N
OUT1
S
R
GATE1
N
IN
N2
R
R
DCLMP1
R
EN
100kΩ
D4
PGOOD
N
EN
DCLMP2
N1
DCLMP
MAX5974C
MAX5974D
C
SS
SS
DT
R
DT
R
C
CLAMP
DITHER
R
GATE3
C
DITHER
NDRV
N
DITHER/
SYNC
N3
R
GATE4
R
RT
P
N4
AUXDRV
RT
C
AUX
R
FFB
FFB
CS
CSSC
FB
D5
CS
R
AUX
R
CSSC
COMP
R
z
GND
PGND
R
C
COMP
C
HF
Ordering Information/Selector Guide
UVLO
THRESHOLD (V)
PART
TOP MARK
PIN-PACKAGE
TEMP RANGE
FEEDBACK MODE
MAX5974AETE+
MAX5974BETE+
MAX5974CETE+
MAX5974DETE+
MAX5974DATE+
+AHY
+AHZ
+AIA
+AIB
+AIB
16 TQFN-EP*
16 TQFN-EP*
16 TQFN-EP*
16 TQFN-EP*
16 TQFN-EP*
-40°C to +105°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
16
8.4
16
Sample/Hold
Sample/Hold
Continuously Connected
Continuously Connected
Continuously Connected
8.4
8.4
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
Maxim Integrated
│ 27
www.maximintegrated.com
MAX5974A/MAX5974B/
MAX5974C/MAX5974D
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
6/10
Initial release
—
Introduced the MAX5974B/MAX5974D. Updated the Absolute Maximum
Ratings, Electrical Characteristics, Pin Description, the p-Channel MOSFET
Gate Driver, Frequency Foldback for High-Efficiency Light-Load Operation
sections, and Typical Application Circuits.
1, 2, 3, 12, 15, 17,
19, 21, 23, 24, 25
1
9/10
2
3
6/11
Added internal zener diode information
1–10, 12–17, 19–25
11, 16, 24–26
Updated COMP function in Pin Description, corrected pin name in UVLO
on Power Source section, corrected Figures 1 and 2, corrected Typical
Application Circuits
10/13
Added MAX5974DATE+ option to Ordering Information, Electrical
Characteristics, and updated Typical Application Circuits
4
5
6
10/14
7/15
7/17
1, 2–5, 25–27
Removed EN from 2nd line in Absolute Maximum Ratings and changed the
1st line under Maximum Input/Output Current (continuous) from IN, NDRV,
AUXDRV to EN
2
Updated Absolute Maximum Ratings section, Electrical Characteristics table,
and Ordering Information table,
2–6, 27
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2017 Maxim Integrated Products, Inc.
│ 28
相关型号：
MAX5974DETE+T
Switching Controller, Current-mode, 600kHz Switching Freq-Max, BICMOS, 3 X 3 MM, ROHS COMPLIANT, TQFN-16
MAXIM
©2020 ICPDF网 联系我们和版权申明