MAX9539EUI+T [MAXIM]
Consumer Circuit, Bipolar, PDSO28, 4.40 MM, LEAD FREE, MO-153AE, TSSOP-28;
| 型号： | MAX9539EUI+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Consumer Circuit, Bipolar, PDSO28, 4.40 MM, LEAD FREE, MO-153AE, TSSOP-28 光电二极管 商用集成电路 |
| 文件： | 总15页 (文件大小：267K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-0602; Rev 2; 1/07
Graphics Video Sync Adder/Extractor
3/MAX9540
General Description
Features
The MAX9539/MAX9540 chipset provides a 3-wire
(RGB) interface for 5-wire (RGBHV) video by adding
and extracting the H, V, and composite sync from the
graphics video signals. This chipset eliminates the
problem of sync-to-video timing (skew errors) in a 5-
wire interface, while reducing the number of channels
required to transport video signals.
o 3-Wire RGB to 5-Wire RGBHV Interface
o Supports VGA-to-UXGA Resolution
o Low Offset Voltage (±1mV)
o 180MHz Large-Signal Bandwidth
The MAX9539 mixes the H and V sync signals and
adds them to create a 3-wire interface from a 5-wire
(RGBHV) input. The MAX9540 recovers the H and V
sync signals to create a 5-wire (RGBHV) interface from
the 3-wire input. The MAX9540 also provides a com-
posite sync output.
Ordering Information
The chipset includes the MAX9539 sync adder and the
MAX9540 sync extractor with 180MHz large-signal
bandwidths to address display resolutions up to 1600 x
1200 at 85Hz for VGA-to-UXGA applications. Both
devices feature a DC restore function, which virtually
eliminates any changes in black level. The chipset uses
a proprietary H and V sync addition/extraction scheme
(true sync) to minimize skew errors.
PIN-
PACKAGE
PKG
CODE
PART
DESCRIPTION
MAX9539EUI+*
MAX9539EUI
MAX9540EUI+*
MAX9540EUI
28 TSSOP
U28-3
Sync Adder
Sync Adder
28 TSSOP
28 TSSOP
28 TSSOP
U28-3
U28-3
U28-3
Sync Extractor
Sync Extractor
Note: All devices are specified over the -40°C to +85°C oper-
ating temperature range.
The MAX9539/MAX9540 are available in 28-pin TSSOP
packages and are specified over the extended -40°C to
+85°C temperature range.
+Denotes lead-free package.
*Future product—contact factory for availability.
Applications
Pin Configurations appear at end of data sheet.
Enterprise Class (Blade) Servers
Laptop PCs
Web Appliances
Keyboard-Video-Mouse (KVM)
Chipset Diagram
H
V
H
V
R
G
B
R
G
B
R
G
B
C
R
G
B
MAX9539
MAX9540
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Graphics Video Sync Adder/Extractor
ABSOLUTE MAXIMUM RATINGS
V
V
to GND..............................................................-0.3V to +6V
to GND...............................................................-6V to +0.3V
Continuous Power Dissipation (T = +70°C)
A
28-Pin TSSOP (U28-3) Single-Layer Board
(derate 13mW/°C above +70°C)................................1039mW
28-Pin TSSOP (U28-3) Multilayer Board
CC
EE
IN_R, IN_G, IN_B, REST_R, REST_G,
REST_B….....................................(V - 0.3V) to (V
+ 0.3V)
EE
CC
OUT_R, OUT_G, OUT_B Short Circuit
to GND (Note 1) .....................................................Continuous
OUT_R, OUT_G, OUT_B Short Circuit to
(derate 14.3mW/°C above +70°C)...............................1143mW
Operating Temperature.......................................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
V
CC
.......................................................................................5s
MAX9539:
HSYNC, VSYNC, SP_H, SP_V ................ -0.3V to (V
MAX9540:
+ 0.3V)
CC
HSYNC, CSYNC, VSYNC Short Circuit to GND .....Continuous
HSYNC, CSYNC, VSYNC Short Circuit to V .................1min
CC
SP_C, SP_V, SP_H .................................-0.3V to (V
+ 0.3V)
CC
Note 1: Continuous power dissipation rating must also be observed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
3/MAX9540
MAX9539 DC ELECTRICAL CHARACTERISTICS
(V
= +5V, V = -5V, GND = 0V, R = 150Ω to GND, T = -40°C to +85°C, unless otherwise specified. Typical values are at T
=
CC
EE
L
A
A
+25°C.) (Notes 2 and 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
4.5
TYP
MAX
5.5
-4.5
90
UNITS
V
Guaranteed by PSRR test
Guaranteed by PSRR test
CC
Supply Voltage Range
V
V
-5.5
EE
I
R = ∞
61
55
CC
L
Quiescent Supply Current
Input Voltage Range
mA
V
I
EE
R = ∞
L
75
V
Inferred from voltage gain test
0
1
IN
Inferred from output DC-Restore
Rejection Ratio test
DC-Restore Input Voltage Range
ΔV
-0.30
+0.30
V
IN_RESTORE
DCRR
OS
IN_RESTORE
(ΔV
/
V
= -0.3V to +0.3V
DC-Restore Rejection Ratio
28
50
dB
IN_RESTORE
ΔV
)
Input Bias Current
Input Resistance
I
2
400
30
µA
kΩ
V
B
R
IN
Output Sync Amplitude
V
H or V sync is active
ΔV
(Note 4)
-2.65
-2.35
-2.05
8
SYNC
= 0V, T = +25oC
IN_RESTORE_
A
Output Offset Voltage
V
1
mV
OS
TCV
Temperature Coefficient of
Output Offset Voltage
OS
T
A
= -40oC to +85oC
-24
µV/°C
(ΔV / ΔT )
OS
A
Voltage Gain
Gain Matching
Gain Linearity
G
V
= 0 to +1V
+1.95
50
+2
1
+2.05
2
V/V
%
IN
ΔG
R to G to B
0.02
%
PSRR
ΔV
CC
/
EE
V
, V
=
4.5V to 5.5V
Power-Supply Rejection Ratio
70
dB
OS
- V
CC EE
Δ(V
)
2
_______________________________________________________________________________________
Graphics Video Sync Adder/Extractor
3/MAX9540
MAX9539 DC ELECTRICAL CHARACTERISTICS (continued)
(V
= +5V, V = -5V, GND = 0V, R = 150Ω to GND, T = -40°C to +85°C, unless otherwise specified. Typical values are at T =
CC
EE L A A
+25°C.) (Notes 2 and 3)
PARAMETER
HSYNC, VSYNC INPUTS
High Input Voltage
Low Input Voltage
High Input Current
Low Input Current
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
2
V
IH
V
0.8
60
V
IL
I
V = 5V
10
µA
µA
IH
I
I
V = 0V
I
2.5
IL
SP_H, SP_V INPUTS
High Input Voltage
Low Input Voltage
High Input Current
Low Input Current
V
2
V
IH
V
0.8
20
20
V
IL
I
V = 5V
0.1
1
µA
µA
IH
I
I
V = 0V
I
IL
REST_R, REST_B, REST_G INPUTS
Hold-Mode Droop Current
I
2
nA
DROOP
MAX9539 AC ELECTRICAL CHARACTERISTICS
(V
= +5V, V = -5V, GND = 0V, R = 150Ω to GND, T = -40°C to +85°C, unless otherwise specified. Typical values are at T
=
CC
EE
L
A
A
+25°C.)
PARAMETER
SYMBOL
LSBW
SR
CONDITIONS
MIN
TYP
180
900
-60
15
MAX
UNITS
MHz
V/µs
dB
Large-Signal Bandwidth
Slew Rate
V
V
V
V
= 2V
= 2V
= 2V
= 2V
OUT
OUT
OUT
OUT
P-P
P-P
P-P
P-P
Channel-to-Channel Crosstalk
Settling Time
X
at 10MHz
to 0.1%
TALK
t
ns
S
Input Voltage-Noise Density
Input Current-Noise Density
Sync Timing Delay
e
f = 100kHz
f = 100kHz
30
nV/√Hz
pA/√Hz
ns
n
i
n
12
t
H sync only (Note 5)
-20
D
Channel-to-Channel Sync Timing
Skew
Δ(t )
H sync only (Note 5)
1
ns
D
Sync Edge Jitter
Line Droop
Field Tilt
t
200
0.01
ps
P-P
JITTER
f = 50kHz
f = 60Hz
H sync
%
0.04
%
kHz
Hz
f
H
15 to 150
40 to 100
Sync Frequency Range
f
V
V sync
_______________________________________________________________________________________
3
Graphics Video Sync Adder/Extractor
MAX9540 DC ELECTRICAL CHARACTERISTICS
(V
= +5V, V = -5V, GND = 0V, R = 150Ω to GND, T = -40°C to +85°C, unless otherwise specified. Typical values are at T
=
CC
EE
L
A
A
+25°C.) (Notes 2 and 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
4.5
TYP
MAX
5.5
-4.5
90
UNITS
V
Guaranteed by PSRR test
Guaranteed by PSRR test
CC
Supply Voltage Range
V
V
-5.5
EE
I
R = ∞
61
54
CC
L
Quiescent Supply Current
Input Voltage Range
mA
V
I
EE
R = ∞
L
75
V
Inferred from voltage gain test
0
1
IN
Inferred from DC-Restore Rejection
Ratio test
DC-Restore Input Voltage Range
ΔV
-0.30
+0.30
V
IN_RESTORE
DCRR
OS
IN_RESTORE
(ΔV
/
V
= -0.3V to +0.3V
DC-Restore Rejection Ratio
28
50
dB
IN_RESTORE
ΔV
)
Input Bias Current
Input Resistance
Output Black Level
I
2
400
1
30
µA
kΩ
mV
B
3/MAX9540
R
IN
BLACK
V
H or V sync is active: V < -1V
16
8
IN
ΔV
= 0V, T = +25oC
IN_RESTORE_
A
Output Offset Voltage
V
1
mV
OS
(Note 4)
TCV
Temperature Coefficient of
Output Offset Voltage
OS
T
A
= -40oC to +85oC
−24
µV/°C
(ΔV /ΔT )
OS
A
Voltage Gain
Gain Matching
Gain Linearity
G
V
= 0 to +1V
+1.95
+2
1
+2.05
2
V/V
%
IN
ΔG
R to G to B
0.02
%
PSRR
OS
ΔV
/
EE
Power-Supply Rejection Ratio
V
, V
CC EE
=
4.5V to 5.5V
50
2
70
dB
Δ(V
- V
)
CC
SP_H, SP_V, SP_C INPUTS
High Input Voltage
V
V
IH
Low Input Voltage
V
0.8
20
20
V
IL
High Input Current
I
V = 5V
0.01
1
µA
µA
IH
I
Low Input Current
I
V = 0V
I
IL
REST_R, REST_G, REST_B INPUTS
Hold-Mode Droop Current
HSYNC, VSYNC, CSYNC OUTPUTS
High Voltage Level
I
2
nA
DROOP
V
I
I
(source) = +8mA
(sink) = -8mA
2.4
V
V
OH
OH
Low Voltage Level
V
0.5
OL
OL
4
_______________________________________________________________________________________
Graphics Video Sync Adder/Extractor
3/MAX9540
MAX9540 AC ELECTRICAL CHARACTERISTICS
(V
= +5V, V = -5V, GND = 0V, R = 150Ω to GND, T = -40°C to +85°C, unless otherwise specified. Typical values are at T
=
CC
EE
L
A
A
+25°C.)
PARAMETER
SYMBOL
LSBW
SR
CONDITIONS
MIN
TYP
180
MAX
UNITS
MHz
V/µs
dB
Large-Signal Bandwidth
Slew Rate
V
V
V
V
= 2V
= 2V
= 2V
= 2V
OUT
OUT
OUT
OUT
P-P
P-P
P-P
P-P
900
Channel-to-Channel Crosstalk
Settling Time
X
at 10MHz
to 0.1%
-60
TALK
t
15
ns
S
Input Voltage-Noise Density
Input Current-Noise Density
Sync Timing Delay
Sync Timing Skew
Sync Edge Jitter
e
f = 100kHz
f = 100kHz
30
nV/√Hz
pA/√Hz
ns
n
i
n
12
t
H sync only (Note 5)
H sync only (Note 5)
-10
D
Δ(t )
1
ns
D
t
200
ps
P-P
JITTER
Line Droop
f = 50kHz
f = 60Hz
H sync
0.01
0.04
15 to 150
40 to 100
%
Field Tilt
%
kHz
Hz
f
H
Sync Frequency Range
f
V sync
V
Note 2: All devices are 100% production tested at T = +25°C. Specifications over temperature limits are guaranteed by design.
A
Note 3: DC restore is not active. HSYNC and VSYNC are not applied. REST_R, REST_G, and REST_B are grounded.
Note 4: DC restore is active. REST_R, REST_G, and REST_B are bypassed with 1nF to ground.
Note 5: The sync timing error is measured as follows: The input signals are measured from the falling edge of H sync/V sync to the
start of active video, called t1. The output signal is then measured from the falling edge of H sync/V sync to the start of
active video, called t2. All measurements are at the 50% points as shown in Figure 1.
Typical Operating Characteristics
(T = +25°C, V
= +5V, V = -5V, GND = 0V, R = 150Ω to GND, unless otherwise noted.)
CC
EE
L
A
LARGE-SIGNAL GAIN FLATNESS
vs. FREQUENCY (MAX9539)
LARGE-SIGNAL FREQUENCY RESPONSE
(MAX9539)
LARGE-SIGNAL FREQUENCY RESPONSE
(MAX9540)
0.3
0.2
3
2
3
2
1
0
IN_ = 1V
P-P
IN_ = 1V
P-P
A
= +2V/V
A
= +2V/V
V
V
0.1
1
0
0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-1
-2
-3
-4
-5
-6
-7
-1
-2
-3
-4
-5
-6
-7
1
10
100
1000
1
10
100
1000
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
_______________________________________________________________________________________
5
Graphics Video Sync Adder/Extractor
Typical Operating Characteristics (continued)
(T = +25°C, V
= +5V, V = -5V, GND = 0V, R = 150Ω to GND, unless otherwise noted.)
EE L
CC
A
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (MAX9540)
LARGE-SIGNAL GAIN FLATNESS
vs. FREQUENCY (MAX9540)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (MAX9539)
0
0.3
0.2
0
IN_ = 1V
P-P
A
= +2V/ V
-10
V
-10
0.1
-20
-30
-40
-20
-30
-40
0
PSRR-
PSRR-
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
PSRR+
PSRR+
-50
-50
-60
-70
-60
-70
1000
0.1
1
10
100
1000
0.1
1
10
100
1
10
100
1000
3/MAX9540
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
SUPPLY CURRENT
vs. TEMPERATURE (MAX9539)
SUPPLY CURRENT
vs. TEMPERATURE (MAX9540)
64
64
62
60
58
56
54
I
62
60
58
56
54
CC
I
CC
I
EE
I
EE
52
50
52
50
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
OUTPUT vs. INPUT
(MAX9539)
OUTPUT vs. INPUT
(MAX9540)
MAX9539 toc09
MAX9539 toc10
IN_R
1V/div
IN_R
1V/div
OUT_R
1V/div
HSYNC
5V/div
OUT_R
2V/div
HSYNC
5V/div
2μs/div
2μs/div
6
_______________________________________________________________________________________
Graphics Video Sync Adder/Extractor
3/MAX9540
MAX9539 Pin Description
PIN
NAME
IN_R
FUNCTION
1
2, 7, 12
3
Red Video Input
GND
Ground
REST_R
Red DC Restore. Connect a 1nF capacitor from REST_R to GND.
4, 9, 10, 14,
15, 20, 21,
22, 25
N.C.
No Connection. Not internally connected.
5
I.C.
IN_G
Internally Connected. For best performance, connect this pin to GND.
Green Video Input
6
8
REST_G
IN_B
Green DC Restore. Connect a 1nF capacitor from REST_G to GND.
Blue Video Input
11
13
16
17
18
19
23
24
26
27
28
REST_B
VSYNC
SP_V
Blue DC Restore. Connect a 1nF capacitor from REST_B to GND.
Vertical Sync Input
Vertical Sync Polarity Input
OUT_B
Blue Output with Vertical Sync
V
Negative Power-Supply Input. Bypass with a 0.1µF capacitor to GND.
Green Output with Composite Sync.
EE
OUT_G
V
Positive Power-Supply Input. Bypass with a 0.1µF capacitor to GND.
Horizontal Sync Input
CC
HSYNC
SP_H
Horizontal Sync Polarity Input
OUT_R
Red Output with Horizontal Sync
_______________________________________________________________________________________
7
Graphics Video Sync Adder/Extractor
MAX9540 Pin Description
PIN
NAME
IN_R
FUNCTION
1
2, 7, 12
3
Red Video Input with Horizontal Sync
Ground
GND
REST_R
Red DC Restore. Connect a 1nF capacitor from REST_R to GND.
4, 9, 10, 14,
15, 20, 25
N.C.
No Connection. Not internally connected.
5
I.C.
IN_G
Internally Connected. For best performance, connect this pin to GND.
Green Video Input with Composite Sync
Green DC Restore. Connect a 1nF capacitor from REST_G to GND.
Blue Video Input with Vertical Sync
6
8
REST_G
IN_B
11
13
16
17
18
19
21
22
23
24
26
27
28
REST_B
VSYNC
SP_V
Blue DC Restore. Connect a 1nF capacitor from REST_B to GND.
Vertical Sync Output
Vertical Sync Polarity Input
OUT_B
Blue Video Output
3/MAX9540
V
Negative Power-Supply Input. Bypass with a 0.1µF capacitor to GND.
Composite Sync Output
EE
CSYNC
SP_C
Composite Sync Polarity Input
OUT_G
Green Video Output
V
Positive Power-Supply Input. Bypass with a 0.1µF capacitor to GND.
Horizontal Sync Output
CC
HSYNC
SP_H
Horizontal Sync Polarity Input
OUT_R
Red Video Output
MAX9539 Sync Adder
Detailed Description
The MAX9539 mixes the H and V sync signals and
adds them to create a 3-wire interface from a 5-wire
(RGBHV) input. Sync signals are added to the input
video signals. Horizontal sync is added to red video,
vertical sync is added to blue video, and composite
sync is added to green video. Composite sync is the
XOR function between H sync and V sync and is inter-
nally generated by the MAX9539. The sync level of the
video outputs is -2.4V. The DC-restore function
The MAX9539/MAX9540 chipset provides a 3-wire
(RGB) interface for 5-wire (RGBHV) video by adding
and extracting the H, V, and composite sync from the
graphics video signals. This chipset eliminates the
problem of sync-to-video timing (skew errors) in a 5-
wire interface, while reducing the number of channels
required when transporting video signals.
The MAX9539 mixes the H and V sync signals and
adds them to create a 3-wire interface from a 5-wire
(RGBHV) input. The MAX9540 recovers the H and V
sync signals to create a 5-wire (RGBHV) interface from
the 3-wire input. The MAX9540 also provides a com-
posite sync output.
removes any DC offset (ΔV
) in the RGB
IN_RESTORE
video inputs and sets the output black level to 0V at the
back porch of the H sync. Therefore, the output black
level is set to 0V at the beginning of every line.
Figure 2 illustrates the functionality of the MAX9539. In
this example, the sync signals are of positive polarity.
The chipset includes the MAX9539 sync adder and the
MAX9540 sync extractor with 180MHz large-signal
bandwidths to address display resolutions up to 1600 x
1200 at 85Hz for VGA-to-UXGA applications. Both
devices feature a DC-restore function, which virtually
eliminates any changes in black level. The chipset uses
a proprietary H and V sync addition/extraction scheme
(true sync) to minimize skew errors.
MAX9540 Sync Extractor
The MAX9540 recovers the H and V sync signals to cre-
ate a 5-wire (RGBHV) interface from the 3-wire input. The
output video signals are obtained by removing the sync
pulses of the input video. The sync outputs correspond
to the sync pulses of the input video: horizontal sync is
8
_______________________________________________________________________________________
Graphics Video Sync Adder/Extractor
3/MAX9540
obtained from the red input, vertical sync is obtained
SYNC TIMING DELAY (t ) = t1 - t2
D
from the blue input, and composite sync is obtained from
the green input. Like the MAX9539, the DC-restore func-
tion removes any DC offset in the RGB video inputs and
sets the output black levels to 0V. This happens at the
back porch (trailing edge) of the sync pulse.
t1
Figure 3 illustrates the functionality of the MAX9540. In
this example, the sync signals are of positive polarity.
DC Restore
The MAX9539/MAX9540 DC-restore function removes
the input signal DC level and restores 0V for the black
level of the output video signal. 1nF restore capacitors
are needed for the sample-and-hold circuitry at
REST_R, REST_G, and REST_B. A value less than
0.5nF can cause AC instability in the sample-and-hold
circuitry. A value higher than 2nF increases the settling
time of the sample-and-hold circuitry, shifting the out-
put black level from 0V.
VIDEO
SYNC
t2
VIDEO WITH SYNC
Sync Polarity
Sync polarity refers to the idle state and pulse ampli-
tude of the sync pulse. A sync pulse that idles low and
pulses high is referred to as a positive sync pulse. A
sync pulse that idles high and pulses low is referred to
as a negative sync pulse as seen in Figure 4. To
accommodate positive and negative sync input signals,
the MAX9539/MAX9540 have vertical and horizontal
sync polarity inputs (SP_V and SP_H). Drive SP_V or
SP_H high for positive sync polarity. Drive SP_V or
SP_H low for negative sync polarity. The MAX9540 also
has a composite polarity input (SP_C). Drive SP_C high
for positive sync polarity or drive SP_C low for negative
sync polarity (Table 1).
Figure 1. Sync Timing Delay (t ) = t1 - t2
D
Table 1. Sync Polarity Table
INPUT LOGIC
SP_C
(MAX9540)
SP_V
SP_H
VALUE
Layout and Power-Supply Bypassing
The MAX9539/MAX9540 have an extremely high band-
width and require careful board layout. For best perfor-
mance use constant-impedance microstrip or stripline
techniques.
Positive
sync
Positive
sync
Positive
sync
1
Negative
sync
Negative
sync
Negative
sync
0
To realize the full AC performance of these high-speed
amplifiers, pay careful attention to power-supply
bypassing and board layout. The PC board should
have at least two layers: a signal and power layer on
one side, and a large, low-impedance ground plane on
the other side. The ground plane should be as free of
voids as possible. With multilayer boards, locate the
ground plane on a layer that incorporates no signal or
power traces.
2) Do not use IC sockets; they increase parasitic
capacitance and inductance.
3) Keep lines as short and as straight as possible. Do
not make 90° turns; round all corners.
4) Observe high-frequency bypassing techniques to
maintain the amplifier’s accuracy and stability.
5) Use surface-mount components. They generally
have shorter bodies and lower parasitic reactance,
yielding better high-frequency performance than
through-hole components.
Observe the following guidelines when designing the
board regardless of whether or not a constant-imped-
ance board is used.
1) Do not use wire-wrap boards or breadboards.
_______________________________________________________________________________________
9
Graphics Video Sync Adder/Extractor
VIDEO INPUT
(IN_)
0.7V
0V
0V
0V
HOR. SYNC
(HSYNC)
5V
VER. SYNC
(VSYNC)
5V
RED OUTPUT
(OUT_R)
1.4V
1.4V
0V
0V
0V
-2.4V
BLUE OUTPUT
(OUT_B)
3/MAX9540
-2.4V
GREEN OUTPUT
(OUT_G)
1.4V
-2.4V
Figure 2. MAX9539 Input and Output Functionality
VIDEO WITH
SYNC
(IN_)
POSITIVE SYNC
0.7V
+5V
-2.4V
0V
VIDEO OUTPUT
(OUT_R/B/G)
1.4V
NEGATIVE SYNC
+5V
0V
0V
SYNC OUTPUT
(_SYNC)
5V
0V
Figure 3. MAX9540 Input and Output Functionality
Figure 4. Sync Pulse Polarity
The bypass capacitors should include a 0.1µF ceramic
surface-mount capacitor between each supply pin and
the ground plane, located as close to the package as
possible. Optionally, place a 10µF tantalum capacitor
at the power-supply pins’ points of entry to the PC
board to ensure the integrity of incoming supplies. The
power-supply trace should lead directly from the tanta-
lum capacitor to the V
and V
pins. To minimize
EE
CC
parasitic inductance, keep PC traces short and use
surface-mount components.
Use surface-mount resistors for input termination and
output back termination. Place the termination resistors
as close to the IC as possible.
10 ______________________________________________________________________________________
Graphics Video Sync Adder/Extractor
3/MAX9540
Functional Diagrams
+5V
* OPTIONAL BULK CAPACITANCE
10μF*
0.1μF
V
CC
24
MAX9539
1
IN_R
OUT_R
28
x 2
DC
RESTORE
3
6
REST_R
IN_G
1nF
23
OUT_G
x 2
DC
RESTORE
8
REST_G
IN_B
1nF
11
18
OUT_B
x 2
DC
RESTORE
13
REST_B
1nF
VSYNC
HSYNC
16
26
H/V SYNC
LOGIC
19
2, 5, 7, 12
GND
17
27
V
EE
SP_V SP_H
0.1μF
10μF*
-5V
______________________________________________________________________________________ 11
Graphics Video Sync Adder/Extractor
Functional Diagrams (continued)
* OPTIONAL BULK CAPACITANCE
+5V
24
10μF*
0.1μF
V
CC
MAX9540
IN_R
1
OUT_R
28
x 2
DC
RESTORE
REST_R
IN_G
3
6
3/MAX9540
1nF
OUT_G
23
x 2
DC
RESTORE
REST_G
IN_B
8
1nF
11
OUT_B
18
x 2
DC
RESTORE
13
17
REST_B
1nF
SP_V
SP_C
SP_H
VSYNC
16
21
26
H/V/C SYNC
LOGIC
22
27
CSYNC
HSYNC
2, 5, 7, 12
GND
19
V
EE
0.1μF
10μF*
-5V
12 ______________________________________________________________________________________
Graphics Video Sync Adder/Extractor
3/MAX9540
Typical Application Diagram
BLADE 1
BACKPLANE
H
V
75Ω
75Ω
R
R
MAX9539
G
B
G
B
75Ω
PRIOR BLADE
MAX4027
+700mV
0V
75Ω
75Ω
-1.2V
BLADE 2
MAX4027
75Ω
H
V
R
G
75Ω
MAX9540
75Ω
B
75Ω
MANAGEMENT
MODULE
______________________________________________________________________________________ 13
Graphics Video Sync Adder/Extractor
Pin Configurations
TOP VIEW
TOP VIEW
IN_R
GND
1
2
3
4
5
6
7
8
9
28 OUT_R
27 SP_H
26 HSYNC
25 N.C.
IN_R
GND
1
2
3
4
5
6
7
8
9
28 OUT_R
27 SP_H
REST_R
N.C.
REST_R
N.C.
26 HSYNC
25 N.C.
24 V
MAX9539
MAX9540
I.C.
24 V
I.C.
CC
CC
IN_G
23 OUT_G
22 N.C.
21 N.C.
20 N.C.
IN_G
23 OUT_G
22 SP_C
21 CSYNC
20 N.C.
GND
GND
REST_G
N.C.
REST_G
N.C.
N.C. 10
IN_B 11
19 V
N.C. 10
IN_B 11
19 V
EE
EE
18 OUT_B
17 SP_V
16 VSYNC
15 N.C.
18 OUT_B
17 SP_V
16 VSYNC
15 N.C.
3/MAX9540
GND 12
GND 12
REST_B 13
N.C. 14
REST_B 13
N.C. 14
TSSOP
TSSOP
Chip Information
PROCESS: Bipolar
14 ______________________________________________________________________________________
Graphics Video Sync Adder/Extractor
3/MAX9540
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, TSSOP 4.40mm BODY
1
21-0066
I
1
Revision History
Pages changed at Rev 2: 1, 2, 4, 15
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2007 Maxim Integrated Products
Boblet
is a registered trademark of Maxim Integrated Products, Inc.
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