PHY1090DS-WR [MAXIM]

0B10GbE Linear Transimpedance Amplifier;
PHY1090DS-WR
型号: PHY1090DS-WR
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

0B10GbE Linear Transimpedance Amplifier

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19-5686; Rev 1/11  
PHY1090  
A Maxim Integrated Brand  
10GbE Linear Transimpedance Amplifier  
Features  
1100nArms maximum input referred noise  
Linear up to 2mApp input level  
2ktypical transimpedance  
Incorporates automatic gain control  
3.3V power supply  
Integrated PIN filter capacitor & resistor  
OMA-based RSSI output current  
-40°C to +95°C operating range  
1.169mm X 0.929mm die size  
Description  
The PHY1090 is a high linearity transimpedance  
amplifier designed to be used in fiber optic  
modules for EDC enabled 10Gbps applications.  
The PHY1090 is optimised for applications  
requiring low distortion and low input referred  
noise, such as 10GBASE-LRM. When combined  
with the PHY2060 EDC IC, the PHY1090  
enables a complete EDC-enabled receive path,  
ideally suited to the 10GBASE-LRM IEEE  
standard.  
The PHY1090 integrates  
a
low noise  
transimpedance amplifier and an automatic gain  
control output stage to give a linear output over  
a wide dynamic range. It also integrates an RC  
filter in series with the photodiode cathode pads  
to reduce ROSA cost.  
Applications  
EDC enabled receivers  
OC192 Telecom systems  
IEEE 10GBASE-LRM receiver systems  
VCC  
RSSI  
FILT1 VCC1 VCC2 ATE1 DP VSS1  
1
4
2
3
5
6
ATE1  
FILT  
PDC  
Voltage  
Regulator  
ATE2  
ATE3  
VSS6 22  
PDC1 21  
RSSI  
200R  
20pF  
7
8
9
ATE2  
VSS2  
ATE3  
50  
50  
RF  
PHY1090  
DP  
DN  
AGC  
Amp  
PDA 20  
Amplifier  
PDA  
10 ATE4  
11 VSS3  
12 ATE5  
PDC2 19  
VSS5 18  
ATE4  
ATE5  
Signal Detect &  
DC Restore  
ATE6  
17  
16  
15  
14  
13  
VSS  
RSSI FILT2 ATE6  
DN VSS4  
Figure 2: Pad Layout  
Figure 1: Block diagram  
PHY1090-RD-1.3  
Released Datasheet  
Page 1  
1.  
2.  
Ordering Information  
Part Number  
Description  
PHY1090 bare die in waffle pack  
PHY1090 bare die on film  
PHY1090DS-WR  
PHY1090DS-FR  
Pad Descriptions  
Number  
Name  
FILT1  
VCC1  
VCC2  
ATE1  
DP  
Type  
Analog  
Description  
1
2
Series resistor to PDC, connected internally to FILT2  
Power supply connection  
PWR/GND  
PWR/GND  
Test pads  
Analog  
3
Power supply connection  
4
Probe test pad - Do not bond to these  
Serial data output+  
5
6
VSS1  
ATE2  
VSS2  
ATE3  
ATE4  
VSS3  
ATE5  
VSS4  
DN  
PWR/GND  
Test pads  
PWR/GND  
Test pads  
Test pads  
PWR/GND  
Test pads  
PWR/GND  
Analog  
Ground connection  
7
Probe test pad - Do not bond to these  
Ground connection  
8
9
Probe test pad - Do not bond to these  
Probe test pad - Do not bond to these  
Ground connection  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Probe test pad - Do not bond to these  
Ground connection  
Serial data output  
ATE6  
FILT2  
RSSI  
VSS5  
PDC1  
PDA  
Test pads  
Analog  
Probe test pad - Do not bond to these  
Series resistor to PDC, connected internally to FILT1  
Current proportional to OMA in dBm  
Ground connection  
Analog  
PWR/GND  
Analog  
Photodiode cathode connected internally to PDC2  
Photodiode anode  
Analog  
PDC2  
VSS6  
Analog  
Photodiode cathode connected internally to PDC1  
Ground connection  
PWR/GND  
PHY1090-RD-1.3  
Released Datasheet  
Page 2  
3. Device Specifications  
3.1  
Absolute Maximum Ratings  
Parameter  
Conditions  
Min  
-0.5  
-55  
Typ  
Max  
6
Unit  
V
Supply voltage  
Storage temperature  
PDA Input Current A.C.  
PDA Input Current D.C.  
Operating temperature  
Die attach temperature  
+150  
4.0  
°C  
ER = ∞  
mApp  
mA  
°C  
2.0  
Measured on die  
115  
400  
°C  
Please note that functional device operation at these ratings is not guaranteed, nor implied. Sustained stress at these  
ratings may affect device reliability.  
3.2  
ESD and Latch Up Ratings  
Parameter  
Conditions  
Min  
2
Typ  
Max  
Unit  
kV  
ESD – All pins except PDA  
ESD – PDA pin  
JEDEC JESD-A114 (HBM) Class 1c  
JEDEC JESD-A114 (HBM) Class 1c  
1
kV  
The device is not guaranteed to meet parametric specifications. Permanent damage may be incurred by operating  
beyond these limits.  
3.3  
Operating Conditions  
Parameter  
Conditions  
Min  
2.95  
-40  
Typ  
Max  
3.65  
+95  
Unit  
V
Supply voltage  
3.3  
Operating temperature  
Measured on back side of die  
°C  
3.4  
Parametric Performance  
Parametric performance is guaranteed over the specified Operating Conditions.  
DC Specifications  
Parameter  
Supply current  
Conditions  
Min  
Typ  
Max  
Unit  
Vcc = 3.3V  
45  
68  
mA  
(VDP - VDN) / ΔVcc at 2MHz; no Vcc  
decoupling  
6
dB  
Power supply  
rejection ratio  
(VDP - VDN) / ΔVcc at 5MHz; no Vcc  
decoupling  
14  
dB  
V
Input bias voltage  
Transimpedance  
PDA voltage; wrt Vss  
1
At 10MHz;  
Input current =40uApp  
1600  
2000  
2700  
Ω
Photodiode filter resistor  
Output resistance  
160  
80  
200  
100  
300  
120  
Ω
Ω
Differential  
PHY1090-RD-1.3  
Released Datasheet  
Page 3  
AC Specifications  
Parameter  
Condition  
Min  
Typ  
Max  
Unit  
GHz  
Over input current range:  
150uApp - 1mApp, 100Ω differential  
output load  
-3dB Bandwidth1  
5
6
Input current1  
2
mApp  
nArms  
Measured using 7.5GHz 4th order  
Bessel filter;  
Input referred noise1  
1100  
Input current ≤ 150µApp  
Input current ≥ 150µApp, 10.3Gbps data  
filtered by 2.25GHz, 4th order Bessel-  
Thomson filter  
Differential output swing1  
Differential output swing1  
240  
300  
200  
360  
15  
mVpp  
mVpp  
Input current ≥ 150µApp  
- 10.3Gbps back-to-back  
Low frequency cut-off  
23uApp  
< 5GHz  
< 5GHz  
kHz  
dB  
Output return loss, differential  
Output return loss, single ended  
8
8
20  
20  
dB  
0.1GHz sinusoidal input; ER = 6.5dB;  
current 100µA pp - 600µA pp  
Total Harmonic Distortion (THD)  
Total Harmonic Distortion (THD)  
Gain flatness1  
2
%
%
0.1GHz sinusoidal input; ER = 6.5dB;  
current = 0.75 - 2mApp  
6.5  
100MHz - 5GHz; flatness referred to  
100MHz; Input current ≤ 150µApp  
±1.5  
100  
dB  
27-1 PRBS; input current 2mApp, 5dB  
extinction ratio  
Deterministic jitter1  
50  
mUIpp  
AGC settling time  
RSSI Accuracy  
Within 10% of final value  
40  
30  
40  
μs  
%
AC input current 150μA to 500μA  
RSSI response time  
ms  
Notes:  
1
Using the circuit below for PD and bonding parameters (Figure 3) :  
CPD = 0.3pF  
LPD IN = 0.5nH  
LOUT DP/DN = 0.5nH  
LFILTER = 0.5nH  
LVCC = 0.3nH  
LVSS = 0.1nH  
RPD = 15Ω;  
RPD IN = 500mΩ;  
ROUT DP/DN = 250mΩ  
RFILTER = 250mΩ;  
RVCC = 300mΩ;  
RVSS = 100mΩ  
- PD parasitics  
_
_
_
_
- PDA bond wire parasitics  
- DP/DN bond wire parasitics  
- FILT bond wire parasitics  
- Combined Vcc bond wire parasitics  
- Combined Vss bond wire parasitics  
RFILTER  
LFILTER  
3.3V  
ROUT_DP  
LOUT_DP  
DOUT+  
LFILTER  
RFILTER  
1
4
2
3
5
6
FILT1 VCC1 VCC2 ATE1 DP VSS1  
22  
VSS6  
ATE2  
VSS2  
ATE3  
7
8
9
RPD_IN  
LPD_IN  
21 PDC1  
20 PDA  
RVSS  
LVSS  
GND  
PHY1090  
(all 6 VSS pads  
bonded)  
RPD  
LPD_IN  
RPD_IN  
ATE4 10  
VSS3 11  
CPD  
19 PDC2  
18 VSS5  
ATE5  
DN VSS4  
14 13  
12  
RSSI FILT2 ATE6  
17  
16  
15  
ROUT_DN  
LOUT_DN  
DOUT-  
Figure 3: Photodiode and bonding parameters  
PHY1090-RD-1.3  
Released Datasheet  
Page 4  
4. Device Description  
VCC  
RSSI  
ATE1  
FILT  
Voltage  
Regulator  
ATE2  
ATE3  
RSSI  
200R  
20pF  
PDC  
50  
50  
RF  
DP  
DN  
AGC  
Amp  
Amplifier  
PDA  
ATE4  
ATE5  
Signal Detect &  
DC Restore  
ATE6  
VSS  
Figure 4: PHY1090 TIA block diagram  
The PHY1090 is a Transimpedance Amplifier (TIA) designed for 10GBASE-LRM applications. It provides  
typical measured average power sensitivity for a ROSA featuring the PHY1090 of better than -18.5dBm at  
10.3125Gbps. This is based upon a back-to-back link and under the conditions specified in Notes 1 and 2  
of the Parametric Performance section. Since sensitivity is strongly dependant upon both the photo  
detector’s capacitance and responsivity and individual ROSA design and bonding, this typical measured  
sensitivity is for illustrative purposes only.  
4.1  
Photodiode Cathode Supply  
The photodiode (PD) cathode power supply is connected externally. A 20pF capacitor and 200resistor  
are integrated into the PHY1090 to reduce cost of the ROSA, though additional decoupling within the  
ROSA may still be used.  
The pad layout of the PHY1090 has been optimized for direct connection of the PD cathode (via the FILT  
pin) to Vcc. Alternatively, the pad layout also enables a PD cathode connection to a supply voltage  
external to the ROSA.  
4.2  
Transimpedance & AGC Stages  
The transimpedance (current to voltage) amplifier (TIA) stage is a very low noise amplifier with a  
feedback resistor to set the gain. An internal voltage regulator with integrated stability components is  
used to power the front-end TIA in order to improve the rejection of power supply noise.  
The AGC stage features automatic gain control, whereby the gain is adjusted to maintain a fixed output  
swing. This allows the output gain to remain linear over a wide range of input signal levels.  
The PHY1090 AGC gain control is a function of the peak input signal amplitude, not average input signal and has  
been optimized for dispersed input data.  
For the purposes of test evaluation, the effect of dispersion has been emulated in the electrical domain by filtering the  
input data to the PHY1090 using a 4th order Bessel-Thompson filter having a 2.25GHz bandwidth. This ensures  
sufficient eye closure to emulate the effects of dispersion, and hence ensure correct operation of the PHY1090 AGC.  
In this case, 300mVpp differential typical output swing will result. If a back-to-back test is performed without any  
filtering or dispersion, the measured output swing is typically 200mVppd.  
The TIA output features a differential supply referenced voltage amplifier, and has 50single ended  
output impedance. For optimum supply-noise rejection, the PHY1090 should be terminated differentially.  
PHY1090-RD-1.3  
Released Datasheet  
Page 5  
1000  
200  
100  
<150µApp  
2kΩ  
10  
10  
100  
1000  
TIA OMA Input Current (µApp)  
Figure 5: PHY1090 output voltage characteristic (filtered data)  
4.3  
DC Restore  
The direct-current cancellation uses low frequency feedback to remove the DC component of the input  
signal. This has the effect of minimizing pulse-width distortions for signals with a 50% mark density. The  
DC cancellation circuit is internally compensated, and does not require any additional external capacitors.  
4.4  
RSSI  
The PHY1090 RSSI output is designed to produce an OMA-based power indication proportional to input  
OMA. This can be used to generate a Loss of Signal indicator when used with a threshold detector as  
provided in the PHY2060 EDC enabled 10Gbps receiver.  
The RSSI detector has been designed to be most accurate from 150µApp to 500µA, to allow the  
detection of a valid 10GBASE-LRM signal. In this range the output RSSI current is equal to 3X the input  
current.  
The RSSI output is referenced to Vcc. When used in conjunction with Phyworks’ PHY2060EDC IC, it is  
recommended that the RSSI current is connected to a ground (Vss) referenced 1kΩ resistor to generate a  
voltage indication that increases with increasing input OMA.  
PHY1090-RD-1.3  
Released Datasheet  
Page 6  
5. Typical Application Information  
5.1  
Bonding and Layout  
In order to achieve optimal ROSA performance, it is necessary to minimise noise pickup and the effects  
of parasitic components related to the TIA bond-out. To this end, it is recommended that:  
All bond wire lengths should be kept to a minimum, especially supply and ground wires, to  
minimize inductive effects.  
Bond wires carrying high speed signals be kept orthogonal to supply and ground bond wires to  
minimize performance degradation through pick-up.  
The positive supply inside the ROSA should be decoupled with a good quality capacitor.  
If external PD bias is implemented, the PD bias pin should be decoupled inside the ROSA with a  
good quality capacitor.  
The PD capacitance should not exceed 0.3pF to minimize degradation of bandwidth and noise.  
Bond ball should be centred and within the bond pad opening and should not occupy more than  
75% of the bond pad area  
Bond pressure of 20-25g is recommended, with a maximum ultrasonic power of 70mW for 20ms  
Figures 6 and 7 depict suggested bond-outs.  
Note: Whilst the PHY1090 AC performance has been characterized for the bonding and PD parasitics  
stated in Note 2 of the Parametric Performance section, improvements in ROSA electrical bandwidth may  
be obtained by ‘tuning’ the bond wire length between the PD anode pad and TIA PDA pad. However, this  
may also adversely affect jitter and gain flatness performance.  
5.2  
MSA Compatibility  
Figure 8 shows the PHY1090’s compatibility with the XMD ROSA specification. Note that pin 6 of the  
ROSA flex can be the RSSI output from the PHY1090, or the photodiode bias voltage in the case of  
external bias configuration.  
Figure 6: Example 5-pin TO-46 bond-out – internal PD bias  
(Top-view: looking into the header)  
PHY1090-RD-1.3  
Released Datasheet  
Page 7  
Figure 7: Example 5-pin TO-46 bond-out – external PD bias  
(Top-view: looking into the header)  
Suggested Vcc decoupling capacitor value:  
Suggested Vpd decoupling capacitor value:  
470pF  
200pF  
Figure 8: Example Flex-based ROSA  
PHY1090-RD-1.3  
Released Datasheet  
Page 8  
6. Die image, Pad Positions and Sizes  
Die size: 1.169mm x 0.929mm  
Thickness: 290µm +/-10µm  
VCC  
VCC  
ATE1  
VSS  
FILT  
DP  
ATE2  
VSS  
PDC  
VSS
ATE3  
PDA  
ATE4  
VSS
PDC  
VSS  
ATE5  
RSSI  
ATE6  
VSS  
FILT  
DN  
Pin  
Pin Name  
X (µm)  
Y (µm)  
Number  
1
2
FILT1  
VCC1  
VCC2  
ATE1  
DP  
80µm x 80µm, octagonal  
80µm x 80µm, rectangular  
80µm x 80µm, rectangular  
80µm x 80µm, rectangular  
80µm x 80µm, octagonal  
80µm x 80µm, rectangular  
80µm x 80µm, rectangular  
80µm x 80µm, octagonal  
80µm x 80µm, octagonal  
80µm x 80µm, octagonal  
80µm x 80µm, rectangular  
80µm x 80µm, rectangular  
80µm x 80µm, rectangular  
80µm x 80µm, octagonal  
80µm x 80µm, rectangular  
80µm x 80µm, octagonal  
80µm x 80µm, octagonal  
-258.9  
-159.5  
-61.5  
122.5  
222  
339.5  
339.5  
339.5  
339.5  
339.5  
339.5  
250  
3
4
5
6
VSS1  
ATE2  
VSS2  
ATE3  
ATE4  
VSS3  
ATE5  
VSS4  
DN  
321.5  
439.5  
439.5  
439.5  
439.5  
439.5  
439.5  
321.5  
222  
7
8
150  
9
47.5  
10  
11  
12  
13  
14  
15  
16  
17  
-52.45  
-150  
-250  
-339.5  
-339.5  
-339.5  
-339.5  
-339.5  
ATE6  
FILT2  
RSSI  
121.6  
-215  
-315  
PHY1090-RD-1.3  
Released Datasheet  
Page 9  
18  
19  
20  
21  
22  
VSS5  
PDC1  
PDA  
80µm x 80µm, rectangular  
80µm x 80µm, octagonal  
80µm x 80µm, octagonal  
80µm x 80µm, octagonal  
80µm x 80µm, rectangular  
-439.5  
-439.5  
-439.5  
-439.5  
-439.5  
-221.5  
-110.5  
0
PDC2  
VSS6  
110.75  
221.5  
Contact Information  
For technical support, contact Maxim at www.maximintegrated.com/support.  
Disclaimer  
This datasheet contains preliminary information and is subject to change.  
This document does not transfer or license any intellectual property rights to the user. It does not imply  
any commitment to produce the device described and is intended as a proposal for a new device.  
Phyworks Ltd assumes no liability or warranty for infringement of patent, copyright or other intellectual  
property rights through the use of this product.  
Phyworks Ltd assumes no liability for fitness for particular use or claims arising from sale or use of its  
products.  
Phyworks Ltd products are not intended for use in life critical or sustaining applications.  
PHY1090-RD-1.3  
Released Datasheet  
Page 10  

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