SY100E143 [MICREL]

9-BIT HOLD REGISTER; 9位保持寄存器


型号：	SY100E143
厂家：	MICREL SEMICONDUCTOR
描述：	9-BIT HOLD REGISTER 9位保持寄存器
文件：	总4页 (文件大小：75K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

9-BIT HOLD

SY10E143

SY100E143

DESCRIPTION

FEATURES

The SY10/100E143 are high-speed 9-bit hold registers

designed for use in new, high-performance ECL systems.

The E143 can hold current data or load new data. The nine

inputs, D0-D8, accept parallel input data.

The SEL (Select) control pin serves to determine the

mode of operation; either HOLD or LOAD. The input data

has to meet the set-up time before being clocked into the

nine input registers on the rising edge of CLK1 or CLK2.

The MR (Master Reset) control signal asynchronously

resets all nine registers to a logic LOW when a logic HIGH

is applied to MR.

■ 700MHz min. operating frequency

■ Extended 100E VEE range of –4.2V to –5.5V

■ 9 bits wide for byte-parity applications

■ Asynchronous Master Reset

■ Dual clocks

■ Fully compatible with industry standard 10KH,

100K ECL levels

■ Internal 75kΩ input pulldown resistors

■ Fully compatible with Motorola MC10E/100E143

■ Available in 28-pin PLCC package

The E143 is designed for applications requiring high-

speed registers, pipeline registers, synchronous operation,

and is also suitable for byte-wide parity.

BLOCK DIAGRAM

PIN CONFIGURATION

MUX

25 24 23 22 21 20 19

CLK

VCC

PLCC

TOP VIEW

J28-1

VEE

MUX

VCCO

10 11

MUX

PIN NAMES

MUX

D0-D8

SEL

Function

Parallel Data Inputs

Mode Select Input

Clock Inputs

CLK1, CLK2

Master Reset

Q0-Q8

Data Outputs

SEL

CLK1

CLK2

No Connection

VCC to Output

VCCO

Rev.: D

Amendment: /0

Issue Date: August, 1998

SY10E143

SY100E143

Micrel

TRUTH TABLE

SEL

MODE

LOAD

HOLD

DC ELECTRICAL CHARACTERISTICS

VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND

TA = 0°C

TA = +25°C

TA = +85°C

Symbol

IIH

Parameter

Input HIGH Current

Power Supply Current

Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit

Condition

—

150

—

150

—

150

µA

—

IEE

10E

100E

—

120 145

—

120

145

—

120

138

145

165

AC ELECTRICAL CHARACTERISTICS

VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND

TA = 0°C

TA = +25°C

TA = +85°C

Symbol

Parameter

Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit

Condition

fMAX

Max. Toggle Frequency

700 900

—

700 900

—

700 900

—

MHz

—

tPLH

tPHL

Propagation Delay to Output

CLK

600 800 1000 600 800 1000 600 800 1000

Set-up Time

SEL

—

50 –100

300 150

—

50 –100

300 150

—

50 –100

300 150

—

Hold Time

SEL

300 100

75 –150

—

300 100

75 –150

—

300 100

75 –150

—

tRR

tPW

Reset Recovery Time

900 700

—

900 700

—

900 700

—

Minimum Pulse Width

CLK, MR

400

—

400

—

400

—

tskew

Within-Device Skew

—

Rise/Fall Time

20% to 80%

300 525 800 300 525

800 300 525

800

—

NOTE:

1. Within-device skew is defined as identical transitions on similar paths through a device.

PRODUCT ORDERING CODE

Ordering

Code

Package

Type

Operating

Range

SY10E143JC

J28-1

Commercial

SY10E143JCTR

SY100E143JC

SY100E143JCTR

SY10E143

SY100E143

Micrel

28 LEAD PLCC (J28-1)

Rev. 03

SY10E143

SY100E143

Micrel

MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA

TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com

This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or

other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.

SY100E143 [MICREL]

相关型号：

SY100E143JC

SY100E143JCTR

SY100E143JZ

SY100E143JZTR

SY100E150

SY100E150JC

SY100E150JCTR

SY100E150JCTR

SY100E150JZ

SY100E150JZ-TR

SY100E150JZTR

SY100E150JZTR