SY100S350_07 [MICREL]

HEX D-LATCH; HEX D- LATCH


型号：	SY100S350_07
厂家：	MICREL SEMICONDUCTOR
描述：	HEX D-LATCH HEX D- LATCH
文件：	总5页 (文件大小：86K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SY100S350

Micrel, Inc.

SY100S350

HEX D-LATCH

FEATURES

DESCRIPTION

The SY100S350 offers six high-speed D-Latches with

both true and complement outputs, and is performance

compatible for use with high-performance ECL systems.

When both enable signals (Ea and Eb) are at a logic LOW,

the latches are transparent and the input signals( D0–D5)

appear at the outputs (Q0–Q5) after a propagation delay. If

either or both of the enable signals are at a logic HIGH, then

the latches store the last valid data present on its inputs

before Ea or Eb went to a logic HIGH. The Master Reset

(MR) overrides all other input signals and takes the outputs

to a logic LOW state. All inputs have 75kΩ pull-down

resistors.

■ Max. transparent propagation delay of 900ps

■ Min. Master Reset and Enable pulse widths of 100ps

■ IEE min. of –98mA

■ Industry standard 100K ECL levels

■ Extended supply voltage option:

VEE = –4.2V to –5.5V

■ Voltage and temperature compensation for improved

noise immunity

■ Internal 75kΩ input pull-down resistors

■ More than 40% faster than Fairchild

■ Approximately 30% lower power than Fairchild

■ Function and pinout compatible with Fairchild F100K

■ Available in 28-pin PLCC package

BLOCK DIAGRAM

PIN NAMES

D0 — D5

Ea, Eb

Function

Data Inputs

Common Enable Inputs (Active LOW)

Asynchronous Master Reset Input

Data Outputs

Q0 — Q5

VEES

Complementary Data Outputs

VEE Substrate

VCCA

VCCO for ECL Outputs

Rev.: I

Amendment:/0

M9999-042307

hbwhelp@micrel.com or (408) 955-1690

Issue Date: April 2007

SY100S350

Micrel, Inc.

PACKAGE/ORDERING INFORMATION

Ordering Information

Package Operating

Package

Marking

Lead

Finish

11 10 9

8 7 6 5

Part Number

Type

J28-1

Range

SY100S350JC

SY100S350JCTR⁽¹⁾

SY100S350JZ⁽²⁾

Commercial

SY100S350JC

Sn-Pb

VEE

VEES

VCCA

VCC

Top View

PLCC

J28-1

SY100S350JZ with

Pb-Free bar-line indicator

Matte-Sn

SY100S350JZTR^{(1, 2)}

J28-1

Commercial

SY100S350JZ with

Matte-Sn

Pb-Free bar-line indicator

19 20 21 22 23 24 25

Notes:

1. Tape and Reel.

2. Pb-Free package is recommended for new designs.

28-Pin PLCC (J28-1)

TRUTH TABLE⁽¹⁾

Each Latch

Inputs

Outputs

Operating Mode

Latch

Latched⁽²⁾

Asynchronous

NOTES:

1. H = HIGH State

L = LOW State

X = Don't Care

2. Retains data that is present before E positive transition.

M9999-042307

hbwhelp@micrel.com or (408) 955-1690

SY100S350

Micrel, Inc.

DC ELECTRICAL CHARACTERISTICS

VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND

Symbol

Parameter

Input HIGH Current

Min.

Typ.

Max.

Unit

Condition

IIH

µA

VIN = VIH (Max.)

Ea, Eb

—

250

IEE

Power Supply Current

–98

–78

–49

Inputs Open

AC ELECTRICAL CHARACTERISTICS

VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND

TA = 0°C TA = +25°C

TA = +85°C

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Condition

tPLH

tPHL

Propagation Delay

Dn to Output

300

900

300

900

1000

1200

900

300

900

tPLH

tPHL

Propagation Delay

Ea, Eb to Output

1000

1200

900

300

1000

1200

900

tPLH

tPHL

Propagation Delay

MR to Output

tTLH

tTHL

Transition Time

20% to 80%, 80% to 20%

Set-up Time, Dn to En

Hold Time, Dn to En

Release Time, MR to En

Pulse Width, Ea, Eb

Pulse Width, MR

500

—

500

—

500

—

1000

tPW (L)

tPW (H)

M9999-042307

hbwhelp@micrel.com or (408) 955-1690

SY100S350

Micrel, Inc.

TIMING DIAGRAMS

0.7 ± 0.1 ns

–0.95V

DATA

ENABLE

OUTPUT

–1.69V

–0.95V

tW(L)

TRANSPARENT

LATCHES

TRANSPARENT

–1.69V

PHL, tPLH

80%

50%

20%

THL, tTLH

Enable Timing

Note:

VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND

DATA

TRANSPARENT

ENABLE

LATCHED

TRANSPARENT

tR RELEASE TIME

tPHL, tPLH

tW(L)

tPHL, tPLH

OUTPUT

Reset Timing

DATA

ENABLE

Data Set-up and Hold Times

Notes:

tS is the minimum time before the transition of the clock that information must be present at the data input.

tH is the minimum time after the transition of the clock that information must remain unchanged at the data input.

M9999-042307

hbwhelp@micrel.com or (408) 955-1690

SY100S350

Micrel, Inc.

28-PIN PLCC (J28-1)

Rev. A

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com

The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.

Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can

reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into

the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s

use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify

Micrel for any damages resulting from such use or sale.

M9999-042307

hbwhelp@micrel.com or (408) 955-1690

SY100S350_07 [MICREL]

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