MCP6411 [MICROCHIP]
1 MHz Operational Amplifier with EMI Filtering;
| 型号： | MCP6411 |
| 厂家： | 
MICROCHIP |
| 描述： | 1 MHz Operational Amplifier with EMI Filtering |
| 文件： | 总34页 (文件大小：1263K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCP6411
1 MHz Operational Amplifier with EMI Filtering
Features:
Description:
The Microchip Technology Inc. MCP6411 operational
amplifier operates with a single supply voltage as low
as 1.7V, while drawing low quiescent current (55 μA,
maximum). This op amp also has low-input offset
voltage (±1.0 mV, maximum) and rail-to-rail input and
output operation. In addition, the MCP6411 is unity gain
stable and has a gain bandwidth product of 1 MHz
(typical). This combination of features supports
battery-powered and portable applications. The
MCP6411 has enhanced EMI protection to minimize
any electromagnetic interference from external
sources. This feature makes it well suited for EMI
sensitive applications such as power lines, radio
stations and mobile communications.
• Low Quiescent Current: 47 μA (typical)
• Low Input Offset Voltage:
- ±1.0 mV (maximum)
• Enhanced EMI Protection:
- Electromagnetic Interference Rejection Ratio
(EMIRR) at 1.8 GHz: 90 dB
• Supply Voltage Range: 1.7V to 5.5V
• Gain Bandwidth Product: 1 MHz (typical)
• Rail-to-Rail Input/Output
• Slew Rate: 0.5 V/μs (typical)
• Unity Gain Stable
• No Phase Reversal
• Small Packages: SC70-5, SOT-23-5
• Extended Temperature Range:
- -40°C to +125°C
The MCP6411 is offered in small SC70-5 and
SOT-23-5 packages. All devices are designed using an
advanced CMOS process and fully specified in
extended temperature range from –40°C to +125°C.
Applications:
Typical Application
• Portable Medical Instruments
• Safety Monitoring
• Battery-Powered Systems
• Remote Sensing
• Supply Current Sensing
• Analog Active Filters
VDD
R
VDD
3
R+¨R
R-¨R
100k
MCP64ꢀ1
-
R
1
VDD
+
1k
VOUT
MCP64ꢀ1
V
b
-
V
a
+
VDD
R
2
Design Aids:
1k
R
5
-
• SPICE Macro Models
• FilterLab® Software
100k
+
R-¨R R+¨R
MCP64ꢀ1
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
100k
V OUT = V a – Vb ----------------
1k
Strain Gauge
Package Types
MCP6411
SC70-5, SOT-23-5
VOUT
VSS
1
2
3
5
VDD
4
VIN+
VIN–
2017 Microchip Technology Inc.
DS20005791B-page 1
MCP6411
NOTES:
DS20005791B-page 2
2017 Microchip Technology Inc.
MCP6411
1.0
1.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
VDD – VSS ..................................................................................................................................................................6.5V
Current at Analog Input Pins (VIN+, VIN-)................................................................................................................±2 mA
Analog Inputs (VIN+, VIN-)††.................................................................................................... VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ................................................................................................... VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ................................................................................................................................ |VDD – VSS
|
Output Short-Circuit Current ..........................................................................................................................Continuous
Current at Input Pins ...............................................................................................................................................±2 mA
Current at Output and Supply Pins ......................................................................................................................±30 mA
Storage Temperature .............................................................................................................................–65°C to +150°C
Maximum Junction Temperature (TJ)....................................................................................................................+150°C
ESD Protection on All Pins (HBM; MM) 4 kV; 400V
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
†† See Section 4.1.2 “Input Voltage Limits”.
1.2
Specifications
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND,
CM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 25 k to VL and CL = 30 pF (refer to Figure 1-1).
V
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Input Offset
Input Offset Voltage
VOS
–1.0
—
—
1.0
—
mV
VDD = 3.5V; VCM = VDD/4
Input Offset Drift with
Temperature
VOS/TA
±3.0
μV/°C TA= –40°C to +125°C,
CM = VSS
V
Power Supply Rejection Ratio
PSRR
75
90
—
dB
VCM = VDD/4
Input Bias Current and Impedance
Input Bias Current
IB
—
—
—
—
—
—
±1
20
—
—
—
—
—
—
pA
pA
TA = +85°C
800
pA
TA = +125°C
Input Offset Current
IOS
ZCM
±1
pA
Common Mode Input Impedance
Differential Input Impedance
Common Mode
1013||12
1013||12
||pF
|pF
ZDIFF
Common Mode Input Voltage
Range
VCMR
VSS – 0.3
—
90
85
VDD + 0.3
V
Common Mode Rejection Ratio
CMRR
75
65
—
—
dB
dB
VDD = 5.5V
V
CM = –0.3V to 5.8V
VDD = 1.72V
CM = –0.3V to 2.02V
V
2017 Microchip Technology Inc.
DS20005791B-page 3
MCP6411
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND,
VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 25 k to VL and CL = 30 pF (refer to Figure 1-1).
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
AOL
95
115
—
dB
0.2 < VOUT < (VDD –0.2V)
VCM= VDD/4
DD = 5.5V
V
Output
High-Level Output Voltage
VOH
VOL
ISC
VDD – 5.5 VDD – 2
—
—
mV
mV
mV
mV
mA
mA
VDD = 1.72V
VDD = 5.5V
VDD = 1.72V
VDD = 5.5V
VDD = 1.72V
VDD = 5.5V
VDD – 7
VDD – 3
Low-Level Output Voltage
Output Short-Circuit Current
—
—
—
—
VSS + 2 VSS + 5.5
VSS + 2.5 VSS + 6.5
±6
—
—
±22
Power Supply
Supply Voltage
Quiescent Current
VDD
IQ
1.72
35
—
5.5
55
V
47
μA
IO = 0, VCM = VDD/4
TABLE 1-2:
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND,
CM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 25 k to VL and CL = 30 pF (refer to Figure 1-1).
V
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
AC Response
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
1
—
—
—
MHz
°
68
0.5
G = +1 V/V
Slew Rate
SR
V/μs
Noise
Input Noise Voltage
Input Noise Voltage Density
Eni
eni
—
—
—
—
—
10
38
32
0.6
79
—
—
—
—
—
μVP-P
f = 0.1 Hz to 10 Hz
nV/Hz f = 1 kHz
nV/Hz f = 10 kHz
fA/Hz f = 1 kHz
Input Noise Current Density
ini
Electromagnetic Interference
Rejection Ratio
EMIRR
dB
VIN = 100 mVPK
,
,
,
,
400 MHz
—
—
—
85
90
94
—
—
—
VIN = 100 mVPK
900 MHz
VIN = 100 mVPK
1800 MHz
VIN = 100 mVPK
2400 MHz
DS20005791B-page 4
2017 Microchip Technology Inc.
MCP6411
TABLE 1-3:
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.72V to +5.5V and VSS = GND.
Parameters
Temperature Ranges
Sym.
Min.
Typ.
Max.
Units
Conditions
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 5L-SC70
Thermal Resistance, 5L-SOT-23
TA
TA
-40
-65
—
—
+125
+150
°C
°C
Note 1
JA
JA
—
—
331
221
—
—
°C/W
°C/W
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
1.3
Test Circuits
CF
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT (see Equation 1-1). Note that VCM is not the
circuit’s Common mode voltage ((VP + VM)/2), and that
VOST includes VOS plus the effects (on the input offset
error, VOST) of the temperature, CMRR, PSRR and
6.8 pF
RG
100 k
RF
100 k
VDD/2
VP
VDD
AOL
.
VIN+
CB1
100 nF
CB2
1 μF
EQUATION 1-1:
MCP6411
GDM = RF RG
VIN–
V CM = V P + V DD 2 2
V OST = V IN – – V IN +
VOUT
VM
RL
CL
RG
100 k
RF
V OUT = V DD 2 + V P – VM + V OST 1 + GDM
Where:
25 k
30 pF
100 k
GDM = Differential Mode Gain
(V/V)
(V)
CF
VL
6.8 pF
VCM = Op Amp’s Common Mode
Input Voltage
FIGURE 1-1:
AC and DC Test Circuit for
Most Specifications.
VOST = Op Amp’s Total Input Offset Voltage (mV)
2017 Microchip Technology Inc.
DS20005791B-page 5
MCP6411
NOTES:
DS20005791B-page 6
2017 Microchip Technology Inc.
MCP6411
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND, VCM = VDD/3, VOUT = VDD/2,
VL = VDD/2, RL = 25 k to VL and CL = 30 pF.
30
1000
800
600
400
200
0
-200
-400
-600
-800
-1000
25
20
15
10
5
1455 Samples
VDD = 3.5V
TA = -40°C
TA = +25°C
V
CM = VDD/4
TA = +85°C
VDD = 5.5V
TA = +125°C
0
Representative Part
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
Common Mode Input Voltage (V)
Input Offset Voltage (μV)
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage vs.
Common Mode Input Voltage.
18%
1000
800
600
400
200
0
-200
-400
-600
1000 Samples
A = -40°C to +125°C
16%
14%
12%
10%
8%
T
VDD = 5.5V
VDD = 1.72V
6%
4%
Representative
Part
2%
-800
-1000
0%
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Output Voltage (V)
Input Offset Voltage Drift (μV/°C)
FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5:
Input Offset Voltage vs.
Output Voltage.
600
400
1000
800
600
400
200
0
Representative Part
TA = +85°C
TA = +125°C
TA = -40°C
200
0
TA = +25°C
-200
-400
-600
-800
-1000
TA = -40°C
TA = +25°C
-200
-400
-600
TA = +85°C
VDD = 1.72V
TA = +125°C
Representative Part
-0.3
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
Common Mode Input Voltage (V)
Power Supply Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage.
Power Supply Voltage.
2017 Microchip Technology Inc.
DS20005791B-page 7
MCP6411
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND, VCM = VDD/3, VOUT = VDD/2,
VL = VDD/2, RL = 25 k to VL and CL = 30 pF.
60
50
40
30
20
10
0
140
130
120
110
100
90
80
70
60
50
PSSR
VDD = 1.72V
VDD = 5.5V
CMRR @ VDD = 5.5V
@ VDD = 1.72V
-50
-25
0
25
50
75
100
125
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Common Mode Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-7:
Input Noise Voltage Density
FIGURE 2-10:
CMRR, PSRR vs. Ambient
vs. Common Mode Input Voltage.
Temperature.
10
10μ
1,000.00p
VDD = 5.5V
100.00p
10.00p
1.00p
.10p
101μ
Input Bias Current
100n
10n
Input Offset Current
.01p
1n
25 35 45 55 65 75 85 95 105 115 125
Ambient Temperature (°C)
0.1
1
10
100
1k
10k 100k 1M
11 1.+0 1.1 12 13 14 16
Frequency (Hz)
FIGURE 2-8:
Input Noise Voltage Density
FIGURE 2-11:
Input Bias, Offset Current
vs. Frequency.
vs. Ambient Temperature.
120
1000
800
600
400
200
Representative Part
Representative Part
100
80
60
40
20
0
TA = +25°C
CMRR
0
PSRR-
-200
-400
-600
-800
-1000
TA = +85°C
TA = +125°C
PSRR+
10,000
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
10
100
1,000
100,000
Common Mode Input Voltage (V)
Frequency (Hz)
FIGURE 2-9:
CMRR, PSRR vs.
FIGURE 2-12:
Input Bias Current vs.
Frequency.
Common Mode Input Voltage.
DS20005791B-page 8
2017 Microchip Technology Inc.
MCP6411
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND, VCM = VDD/3, VOUT = VDD/2,
VL = VDD/2, RL = 25 k to VL and CL = 30 pF.
60
55
50
45
40
35
30
60
55
50
45
40
35
30
25
20
15
10
5
VDD = 1.72V
VDD = 5.5V
VDD = 5.5V
G = +1 V/V
0
-50
-25
0
25
50
75
100
125
5.5
2.5
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Ambient Temperature (°C)
Common Mode Input Voltage (V)
FIGURE 2-13:
Quiescent Current vs.
Ambient Temperature.
FIGURE 2-16:
Quiescent Current vs.
Common Mode Input Voltage.
120
45
60
50
40
VDD = 5.5V
VDD = 1.72V
100
80
60
40
20
0
0
-45
Phase
-90
TA = +125°C
30
20
10
0
-135
-180
-225
-270
-315
TA = +85°C
TA = +25°C
TA = -40°C
Gain
-20
-40
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0.1
1
10 100 1k 10k 100k 1M 10M
111.+01112131161
Power Supply Voltage (V)
Frequency (Hz)
FIGURE 2-14:
Quiescent Current vs.
Power Supply Voltage.
FIGURE 2-17:
Frequency.
Open-Loop Gain, Phase vs.
60
55
50
45
40
35
30
25
20
140
130
120
110
100
90
VDD = 5.5V
VDD = 1.72V
VDD = 1.72V
15
G = +1 V/V
10
5
80
0
-0.5
-50
-25
0
25
50
75
100
125
0.5
1.5
Common Mode Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs.
Common Mode Input Voltage.
Ambient Temperature.
2017 Microchip Technology Inc.
DS20005791B-page 9
MCP6411
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND, VCM = VDD/3, VOUT = VDD/2,
VL = VDD/2, RL = 25 k to VL and CL = 30 pF.
10
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
180
160
140
120
100
80
60
40
20
0
VDD = 5.5V
VDD = 1.72V
Gain Bandwidth Product
1
Phase Margin
VDD = 5.5V
0.1
10000
100000
10000000
1100k0
10k
100k
10100M000
10M
-50
-25
0
25
50
75
100 125
Ambient Temperature (°C)
Frequency (Hz)
FIGURE 2-22:
Frequency.
Output Voltage Swing vs.
FIGURE 2-19:
Phase Margin vs. Ambient Temperature.
Gain Bandwidth Product,
1000
1.4
1.2
1.0
180
160
140
120
100
80
60
40
20
0
VDD = 1.72V
100
10
VDD - VOH
0.8
0.6
0.4
0.2
0.0
Gain Bandwidth Product
VOL - VSS
1
Phase Margin
VDD = 1.72V
0.1
0.01
0.001
0.01
0.1
1
10
100
-50
-25
0
25
50
75
100 125
Output Current (mA)
Ambient Temperature (°C)
FIGURE 2-23:
vs. Output Current.
Output Voltage Headroom
FIGURE 2-20:
Phase Margin vs. Ambient Temperature.
Gain Bandwidth Product,
50
40
30
20
ISC+ @ TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
10
0
-10
-20
-30
-40
-50
ISC- @ TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Power Supply Voltage (V)
FIGURE 2-21:
Output Short Circuit Current
vs. Power Supply Voltage.
DS20005791B-page 10
2017 Microchip Technology Inc.
MCP6411
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND, VCM = VDD/3, VOUT = VDD/2,
VL = VDD/2, RL = 25 k to VL and CL = 30 pF.
1000
100
10
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
VDD = 5.5V
Falling Edge, VDD = 1.72V
Falling Edge, VDD = 5.5V
VDD - VOH
VOL - VSS
1
Rising Edge, VDD = 1.72V
Rising Edge, VDD = 5.5V
0.1
0.001
0.01
0.1
1
10
100
-50
-25
0
25
50
75
100
125
Output Current (mA)
Ambient Temperature (ஈC)
FIGURE 2-24:
Output Voltage Headroom
FIGURE 2-27:
Slew Rate vs. Ambient
vs. Output Current.
Temperature.
3.0
2.5
VDD - VOH
2.0
1.5
1.0
0.5
0.0
VOL - VSS
VDD = 5.5V
G = +1 V/V
VDD = 1.72V
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
Time (10 μs/div)
FIGURE 2-25:
Output Voltage Headroom
FIGURE 2-28:
Small Signal Noninverting
vs. Ambient Temperature.
Pulse Response.
5.0
4.5
4.0
3.5
VDD - VOH
3.0
2.5
2.0
1.5
1.0
VDD = 5.5V
G = -1 V/V
VOL - VSS
0.5
0.0
VDD = 5.5V
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
Time (10 μs/div)
FIGURE 2-26:
Output Voltage Headroom
FIGURE 2-29:
Small Signal Inverting Pulse
vs. Ambient Temperature.
Response.
2017 Microchip Technology Inc.
DS20005791B-page 11
MCP6411
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND, VCM = VDD/3, VOUT = VDD/2,
VL = VDD/2, RL = 25 k to VL and CL = 30 pF.
10000
6
VDD = 2.2V
5
1000
4
100
3
2
1
0
GN:
101 V/V
11 V/V
1 V/V
10
VDD = 5.5V
G = +1 V/V
1
1k
10k
100k
1M
10M
Time (0.1 ms/div)
Frequency (Hz)
FIGURE 2-30:
Large Signal Noninverting
FIGURE 2-33:
Closed Loop Output
Pulse Response.
Impedance vs. Frequency.
0.1
6
5
4
3
2
1
0
100m
0.01
10m
0.001
1m
0.0001
100μ
0.00001
10μ
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
0.000001
1μ
0.0000001
100n
VDD = 5.5V
G = +1 V/V
1E-08
10n
1n
1E-09
-1
-0.8
-0.6
-0.4
VIN (V)
-0.2
0
Time (0.1 ms/div)
FIGURE 2-31:
Large Signal Inverting Pulse
FIGURE 2-34:
Measured Input Current vs.
Response.
Input Voltage (below V ).
SS
120
110
100
90
80
70
60
50
40
30
20
10
0
6
5
4
3
2
VOUT
1
VDD = 5.5V
G = +2 V/V
VIN = 316 mVPK
VDD = 5.5V
0
VIN
-1
10
100
1000
Frequency (MHz)
10000
Time (0.1 ms/div)
FIGURE 2-32:
Shows No Phase Reversal.
The MCP6411 Device
FIGURE 2-35:
EMIRR vs. Frequency.
DS20005791B-page 12
2017 Microchip Technology Inc.
MCP6411
Note: Unless otherwise indicated, TA= +25°C, VDD = +1.72V to +5.5V, VSS= GND, VCM = VDD/3, VOUT = VDD/2,
VL = VDD/2, RL = 25 k to VL and CL = 30 pF.
120
110
100
90
80
70
EMIRR @ 2400 MHZ
60
EMIRR @ 1800 MHZ
50
EMIRR @ 900 MHZ
40
30
20
10
0
EMIRR @ 400 MHZ
0.01
0.1
RF Input Peak Voltage (VPK
1
)
FIGURE 2-36:
EMIRR vs. RF Input
Peak-to-Peak Voltage.
2017 Microchip Technology Inc.
DS20005791B-page 13
MCP6411
NOTES:
DS20005791B-page 14
2017 Microchip Technology Inc.
MCP6411
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Symbol
MCP6411
Description
SC70-5,
SOT-23-5
1
2
3
4
5
VOUT
VSS
Analog Output
Negative Power Supply
Noninverting Input
Inverting Input
VIN+
VIN–
VDD
Positive Power Supply
3.1
Analog Outputs
The output pin is a low-impedance voltage source.
3.2
Analog Inputs
The noninverting and inverting inputs are
high-impedance CMOS inputs with low bias currents.
3.3
Power Supply Pins (V , V
)
SS
DD
The positive power supply (VDD) is 1.72V to 5.5V
higher than the negative power supply (VSS). For
normal operation, the other pins are at voltages
between VSS and VDD
.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
2017 Microchip Technology Inc.
DS20005791B-page 15
MCP6411
NOTES:
DS20005791B-page 16
2017 Microchip Technology Inc.
MCP6411
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
4.0
APPLICATION INFORMATION
The MCP6411 op amp is manufactured using
Microchip’s state-of-the-art CMOS process. This op
amp is unity gain stable and suitable for a wide range
of general-purpose applications.
VDD
4.1
Rail-to-Rail Input
D1 D2
4.1.1
PHASE REVERSAL
V1
VOUT
The MCP6411 op amp is designed to prevent phase
reversal, when the input pins exceed the supply
voltages. Figure 2-32 shows the input voltage
exceeding the supply voltage with no phase reversal.
MCP6411
V2
4.1.2
INPUT VOLTAGE LIMITS
FIGURE 4-2:
Protecting the Analog
Inputs.
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the voltages at the
input pins (see Section 1.1, Absolute Maximum
Ratings †).
A significant amount of current can flow out of the
inputs when the Common mode voltage (VCM) is below
ground (VSS); see Figure 2-34.
The Electrostatic Discharge (ESD) protection on the
inputs can be depicted as shown in Figure 4-1. This
structure was chosen to protect the input transistors
against many, but not all, overvoltage conditions, and
to minimize the input bias current (IB).
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the currents into
the input pins (see Section 1.1, Absolute Maximum
Ratings †).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
currents in or out of the input pins (and the ESD diodes,
D1 and D2). The diode currents will go through either
Bond
VDD
Pad
VDD or VSS.
Bond
Pad
Bond
Pad
Input
Stage
VIN+
VIN–
VDD
Bond
Pad
D1 D2
R1
VSS
V1
V2
VOUT
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
MCP6411
R2
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
overvoltage (beyond VDD) events. Very fast ESD
events that meet the spec are limited so that damage
does not occur.
VSS – min(V1, V2)
2 mA
min(R1,R2) >
min(R1,R2) >
max(V1,V2) – VDD
2 mA
FIGURE 4-3:
Protecting the Analog
Inputs.
2017 Microchip Technology Inc.
DS20005791B-page 17
MCP6411
4.1.4
NORMAL OPERATION
100000
10000
1000
100
The input stage of the MCP6411 op amp uses two
differential input stages in parallel. One operates at a
low common mode input voltage (VCM), while the other
operates at a high VCM. With this topology, the device
operates with a VCM up to 300 mV above VDD and
300 mV below VSS. The input offset voltage is
measured at VCM = VSS – 0.3V and VDD + 0.3V to
ensure proper operation.
VDD = 5.5 V
RL = 100 kȍ
GN:
1 V/V
2 V/V
≥ 5 V/V
10
The transition between the input stages occurs when
1
VCM is near VDD – 0.6V (see Figures 2-3 and 2-4). For
10p
100p
1n
10n
0.1μ
Normalized Load Capacitance; CL/GN (F)
the best distortion performance and gain linearity, with
noninverting gains, avoid this region of operation.
FIGURE 4-5:
Recommended R
Values
ISO
for Capacitive Loads.
4.2
Rail-to-Rail Output
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable.
The output voltage range of the MCP6411 op amp is
0.0025V (typical) and 5.497V (typical) when
RL = 25 k is connected to VDD/2 and VDD = 5.5V.
Refer to Figures 2-24 and 2-26 for more information.
4.4
Supply Bypass
4.3
Capacitive Loads
The MCP6411 op amp’s power supply pin (VDD for
single-supply) should have a local bypass capacitor
(i.e., 0.01 μF to 0.1 μF) within 2 mm for good high
frequency performance. It can use a bulk capacitor
(i.e., 1 μF or larger) within 100 mm to provide large,
slow currents. This bulk capacitor can be shared with
other analog parts.
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases, and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to the capacitive loads, all gains show
the same general behavior.
4.5
PCB Surface Leakage
When driving large capacitive loads with the MCP6411
op amp (e.g., > 60 pF when G = +1 V/V), a small series
resistor at the output (RISO in Figure 4-5) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP6411’s bias current at +25°C (±1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-6.
–
RISO
VOUT
MCP6411
+
VIN
CL
Guard Ring
VIN– VIN+
VSS
FIGURE 4-4:
Output Resistor, R
ISO
Stabilizes Large Capacitive Loads.
Figure 4-5 gives the recommended RISO values for the
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For noninverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
FIGURE 4-6:
for Inverting Gain.
Example Guard Ring Layout
DS20005791B-page 18
2017 Microchip Technology Inc.
MCP6411
1. Noninverting Gain and Unity-Gain Buffer:
4.6
Electromagnetic Interference
a) Connect the noninverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
Rejection Ratio (EMIRR)
Definitions
The electromagnetic interference (EMI) is the
disturbance that affects an electrical circuit due to
either electromagnetic induction or electromagnetic
radiation emitted from an external source.
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
Common mode input voltage.
2. Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
The parameter which describes the EMI robustness of
an op amp is the Electromagnetic Interference
Rejection Ratio (EMIRR). It quantitatively describes the
effect that an RF interfering signal has on op amp
performance. Internal passive filters make EMIRR
better compared with older parts. This means that, with
good PCB layout techniques, your EMC performance
should be better.
a) Connect the guard ring to the noninverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
EMIRR is defined as:
EQUATION 4-1:
V RF
EMIRRdB= 20 log --------------
VOS
Where:
VRF = Peak Amplitude of
RF Interfering Signal (VPK
)
VOS = Input Offset Voltage Shift (V)
4.7
Application Circuits
4.7.1
CARBON MONOXIDE GAS SENSOR
A carbon monoxide (CO) gas detector is a device that
detects the presence of carbon monoxide gas. Usually
this is battery-powered and transmits audible and
visible warnings.
The sensor responds to CO gas by reducing its
resistance proportionaly to the amount of CO present in
the air exposed to the internal element. On the sensor
module, this variable is part of a voltage divider formed
by the internal element and potentiometer R1. The
output of this voltage divider is fed into the noninverting
inputs of the MCP6411 op amp. The device is
configured as a buffer with unity gain and is used to
provide a nonloaded test point for sensor sensitivity.
Because this sensor can be corrupted by parasitic elec-
tromagnetic signals, the MCP6411 op amp can be used
for conditioning this sensor.
2017 Microchip Technology Inc.
DS20005791B-page 19
MCP6411
In Figure 4-7, the variable resistor is used to calibrate
the sensor in different environments.
4.7.3
BATTERY CURRENT SENSING
The MCP6411 op amp’s Common Mode Input Range,
which goes 0.3V beyond both supply rails, supports its
use in high-side and low-side battery current sensing
applications. The low quiescent current helps prolong
battery life, and the rail-to-rail output supports detection
of low currents.
.
VDD
VREF
VDD
-
VOUT
MCP64ꢀ1
+
Figure 4-9 shows a high-side battery current sensor
circuit. The 10 resistor is sized to minimize power
losses. The battery current (IDD) through the 10
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the Common
mode input voltage of the op amp below VDD, which is
within its allowed range. The output of the op amp will
also be below VDD, within its Maximum Output Voltage
Swing specification.
R1
FIGURE 4-7:
CO Gas Sensor Circuit.
4.7.2
PRESSURE SENSOR AMPLIFIER
The MCP6411 is well-suited for conditioning sensor
signals in battery-powered applications. Many sensors
are configured as Wheatstone bridges. Strain gauges
and pressure sensors are two common examples.
VDD
VDD
VOUT
Figure 4-8 shows a strain gauge amplifier, using the
MCP6411 Enhanced EMI protection device. The
difference amplifier with EMI robustness op amp is
used to amplify the signal from the Wheatstone bridge.
The two op amps, configured as buffers and connected
at outputs of pressure sensors, prevents resistive
loading of the bridge by resistor R1 and R2. Resistors
R1,R2 and R3,R5 need to be chosen with very low
tolerance to match the CMRR.
10
IDD
MCP6411
VSS
1.8V
to
5.5V
100 k
1 M
OUT
V
– V
DD
I
= -----------------------------------------
DD
10 V/V 10
High-Side Battery Current Sensor
VDD
VDD
R3
FIGURE 4-9:
Battery Current Sensing.
R+∆R
R-∆R
10 kꢀ
MCP64ꢀ1
-
+
VDD
R1
100ꢀ
Vb
VOUT
MCP6ꢁꢀꢀ
-
Va
+
R2
VDD
100ꢀ
R5
-
+
10 kꢀ
R-∆R
R+∆R
MCP64ꢀ1
100k
V OUT = V a – Vb ----------------
1k
Strain Gauge
FIGURE 4-8:
Pressure Sensor Amplifier.
DS20005791B-page 20
2017 Microchip Technology Inc.
MCP6411
5.4
Application Notes
5.0
DESIGN AIDS
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes, and are
recommended as supplemental reference resources.
Microchip provides the basic design tools needed for
the MCP6411 op amp.
®
5.1
FilterLab Software
• ADN003 – “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
Microchip’s FilterLab software is an innovative software
tool that simplifies analog active filter design using op
amps. Available at no cost from the Microchip web site
at www.microchip.com/filterlab, the FilterLab design
tool provides full schematic diagrams of the filter circuit
with component values. It also outputs the filter circuit
in SPICE format, which can be used with the macro
model to simulate the actual filter performance.
• AN722 – “Operational Amplifier Topologies and
DC Specifications”, DS00722
• AN723 – “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884 – “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990 – “Analog Sensor Conditioning
Circuits – An Overview”, DS00990
5.2
Microchip Advanced Part Selector
(MAPS)
• AN1177 – “Op Amp Precision Design: DC Errors”,
DS01177
MAPS is a software tool that helps semiconductor
professionals efficiently identify the Microchip
devices that fit a particular design requirement.
Available at no cost from the Microchip website at
www.microchip.com/ maps, MAPS is an overall
selection tool for Microchip’s product portfolio that
includes Analog, Memory, MCUs and DSCs. Using this
tool, you can define a filter to sort features for a
parametric search of devices and export side-by-side
technical comparison reports. Helpful links are also
provided for data sheets, purchase and sampling of
Microchip parts.
• AN1228 – “Op Amp Precision Design: Random
Noise”, DS01228
• AN1297 – “Microchip’s Op Amp SPICE Macro
Models”, DS01297
• AN1332: “Current Sensing Circuit Concepts and
Fundamentals”’ DS01332
• AN1494: “Using MCP6491 Op Amps for Photode-
tection Applications”’ DS01494
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
5.3
Analog Demonstration and
Evaluation Boards
Microchip offers
a broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market.
For a complete listing of these boards and their
corresponding user’s guides and technical
information, visit the Microchip web site at
www.microchipdirect.com.
Some boards that are especially useful are:
• MCP6XXX Amplifier Evaluation Board 1
• MCP6XXX Amplifier Evaluation Board 2
• MCP6XXX Amplifier Evaluation Board 3
• MCP6XXX Amplifier Evaluation Board 4
• Active Filter Demo Board Kit
• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
2017 Microchip Technology Inc.
DS20005791B-page 21
MCP6411
NOTES:
DS20005791B-page 22
2017 Microchip Technology Inc.
MCP6411
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
Example:
5-Lead SC70
41125
5-Lead SOT-23
Example:
64117
22256
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
e
3
e
3
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
Note: In the event the full Microchip part number cannot be marked on one line, it
will be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
2017 Microchip Technology Inc.
DS20005791B-page 23
MCP6411
DS20005791B-page 24
2017 Microchip Technology Inc.
MCP6411
2017 Microchip Technology Inc.
DS20005791B-page 25
MCP6411
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
0.20 C 2X
D
e1
A
D
N
E/2
E1/2
E1
E
(DATUM D)
(DATUM A-B)
0.15 C D
2X
NOTE 1
1
2
e
B
NX b
0.20
C A-B D
TOP VIEW
A
A2
A1
A
0.20 C
SEATING PLANE
A
SEE SHEET 2
C
SIDE VIEW
Microchip Technology Drawing C04-028D [OT] Sheet 1 ofꢀꢁ
DS20005791B-page 26
2017 Microchip Technology Inc.
MCP6411
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
c
T
L
L1
VIEW A-A
SHEET 1
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
6
0.95 BSC
Outside lead pitch
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length
e1
A
A2
A1
E
E1
D
L
1.90 BSC
0.90
0.89
-
-
-
-
1.45
1.30
0.15
2.80 BSC
1.60 BSC
2.90 BSC
0.30
-
0.60
Footprint
Foot Angle
Lead Thickness
Lead Width
L1
0.60 REF
I
0°
0.08
0.20
-
-
-
10°
0.26
0.51
c
b
Notes:
1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.25mm per side.
2. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-091D [OT] Sheet 2 ofꢀꢁ
2017 Microchip Technology Inc.
DS20005791B-page 27
MCP6411
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X
SILK SCREEN
5
Y
Z
C
G
1
2
E
GX
RECOMMENDED LAND PATTERN
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Contact Pitch
E
C
X
0.95 BSC
2.80
Contact Pad Spacing
Contact Pad Width (X5)
Contact Pad Length (X5)
Distance Between Pads
Distance Between Pads
Overall Width
0.60
1.10
Y
G
GX
Z
1.70
0.35
3.90
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-2091A [OT]
DS20005791B-page 28
2017 Microchip Technology Inc.
MCP6411
APPENDIX A: REVISION HISTORY
Revision B (June 2017)
• Minor editorial correction.
Revision A (June 2017)
• Original Release of this Document.
2017 Microchip Technology Inc.
DS20005791B-page 29
MCP6411
NOTES:
DS20005791B-page 30
2017 Microchip Technology Inc.
MCP6411
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
(1)
Examples:
PART NO.
Device
[X]
-X
/XX
a)
b)
MCP6411T-E/LTY:
MCP6411T-E/OT:
Tape and Reel,
Tape and Reel Temperature Package
Option
Extended Temperature,
5LD SC-70 package
Tape and Reel,
Range
Extended Temperature,
5LD SOT-23 package
Device:
MCP6411T:
Single Op Amp (Tape and Reel)
(SC70, SOT-23)
Temperature
Range:
E
= -40°C to +125°C (Extended)
Note 1:
Tape and Reel identifier only appears in
the catalog part number description. This
identifier is used for ordering purposes
and is not printed on the device package.
Check with your Microchip Sales Office
for package availability with the Tape and
Reel option.
Package:
LTY* = Plastic Package (SC70), 5-lead
OT = Plastic Small Outline Transistor (SOT-23), 5-lead
* Y = Nickel palladium gold manufacturing designator. Only
available on the TDFN package.
2017 Microchip Technology Inc.
DS20005791B-page 31
MCP6411
NOTES:
DS20005791B-page 32
2017 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, WirelessDNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-1879-5
2017 Microchip Technology Inc.
DS20005791B-page 33
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
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DS20005791B-page 34
2017 Microchip Technology Inc.
11/07/16
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