MC13281B [MOTOROLA]

80/100 MHz Video Processor; 80/100 MHz的视频处理器
MC13281B
型号: MC13281B
厂家: MOTOROLA    MOTOROLA
描述:

80/100 MHz Video Processor
80/100 MHz的视频处理器

文件: 总12页 (文件大小:159K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Order this document by MC13280AY/D  
80/100 MHz VIDEO  
PROCESSOR  
TheMC13280AYandMC13281A/Barethreechannelwidebandamplifiers  
designed for use as a video pre–amplifier in high resolution RGB color  
monitors.  
Features:  
4.0 Vpp Output Swing  
3.5 ns Rise/Fall Time, 100 MHz Bandwidth (MC13281A/B)  
4.3 ns Rise/Fall Time, 80 MHz Bandwidth (MC13280AY)  
Subcontrast Controls for Each Channel  
Main Contrast Control  
24  
P SUFFIX  
PLASTIC PACKAGE  
CASE 724  
1
Blanking and Clamping Inputs  
Packages: NDIP–24 and NDIP–20  
A Single PC Board Pattern Can Accept the MC13281A and the  
20  
P SUFFIX  
PLASTIC PACKAGE  
CASE 738  
MC13282A (Video Amplifier with OSD)  
1
PIN CONNECTIONS  
ORDERING INFORMATION  
Operating  
Blank  
1
2
24  
R Subcontrast  
R Input  
Temperature Range  
Device  
MC13280AYP  
MC13281AP  
MC13281BP  
Package  
Plastic DIP  
Plastic DIP  
Plastic DIP  
23 Clamp  
G Subcontrast  
G Input  
3
22  
21  
20  
19  
18  
17  
R Emitter  
R Clamp  
4
T
A
= 0° to +70°C  
V5  
B Subcontrast  
B Input  
5
G Emitter  
G Clamp  
Video V  
6
Gnd  
7
8
N/C  
CC  
V
9
16 B Clamp  
CC  
B Emitter  
10  
11  
15  
14  
13  
N/C  
N/C  
ABSOLUTE MAXIMUM RATINGS  
Rating  
Fast Commutate  
Pin  
Value  
Unit  
N/C 12  
Contrast  
Power Supply Voltage  
V
CC  
–0.5, 10  
–0.5, 10  
Vdc  
(Top View)  
Video V  
CC  
Voltage at Video Amplifier Inputs  
2, 4, 6  
–0.5, +5.0  
120  
Vdc  
mA  
°C  
1
2
3
4
5
6
7
8
9
20  
R Subcontrast  
R Input  
Blank  
Collector–Emitter Current (Three Channels) Video V  
CC  
19 Clamp  
Storage Temperature  
Junction Temperature  
–65 to +150  
150  
G Subcontrast  
18 R Emitter  
17  
G Input  
B Subcontrast  
B Input  
R Clamp  
°C  
16 V5  
NOTES: 1. Devices should not be operated at these limits. Refer to “Recommended  
Operating Conditions” section for actual device operation.  
15 G Emitter  
14 G Clamp  
2. ESD data available upon request.  
Gnd  
13  
V
Video V  
CC  
CC  
Contrast  
12 B Clamp  
Fast Commutate 10  
11 B Emitter  
(Top View)  
This document contains information on a new product. Specifications and information herein  
Motorola, Inc. 1996  
Rev 0  
are subject to change without notice.  
MC13280AY MC13281A/B  
RECOMMENDED OPERATING CONDITIONS  
Characteristic  
Power Supply Voltage  
Pin  
Min  
Typ  
Max  
Unit  
V
,
7.6  
8.0  
8.4  
Vdc  
CC  
Video V  
CC  
Contrast Control  
Contrast  
1, 3, 5  
Blank  
0
0
0
0
5.0  
5.0  
5.0  
5.0  
1.0  
Vdc  
Vdc  
V
Subcontrast Control  
Blanking Input Signal Amplitude  
Clamping Input Signal Amplitude  
Clamp  
2, 4, 6  
V
Video Signal Amplitude  
0.7  
Vpp  
(with 75 Termination)  
Collector–Emitter Current (Total for Three  
Channels)  
Video V  
0
50  
mA  
CC  
Clamp Pulse Width  
Clamp  
500  
0
ns  
Operating Ambient Temperature  
70  
°C  
ELECTRICAL CHARACTERISTICS (Refer to Test Circuit Figure 1, T = 25°C, V  
= 8.0 Vdc.)  
A
CC  
Pin  
Characteristic  
Input Impedance  
Condition  
Min  
100  
Typ  
Max  
Unit  
kΩ  
2, 4, 6  
Internal DC Bias Voltage  
Output Signal Amplitude  
2.4  
4.0  
Vdc  
Vpp  
3.6  
V2, V4, V6 = 0.7 Vpp  
V1, V3, V5 = 5.0 V  
Contrast = 5.0 V  
R, G, B  
Emitters  
Voltage Gain  
5.6  
V/V  
dB  
Contrast Control  
Contrast = 5.0 to 0 V  
V1, V3, V5 = 5.0 V  
Contrast  
1, 3, 5  
–26  
Subcontrast Control  
V1, V3, V5 = 5.0 to 0 V  
Contrast = 5.0 V  
–26  
dB  
Emitter DC Level  
1.0  
1.2  
1.4  
Vdc  
V
Blanking Input Threshold  
Clamping Input Threshold  
Video Rise Time  
Blank  
Clamp  
1.25  
3.75  
V
V2, V4, V6 = 0.7 Vpp  
R, G, B  
ns  
MC13280AY  
MC13281A/B  
V
= 4.0 Vpp  
Emitters  
4.3  
3.5  
out  
> 300 , C < 5.0 pF  
R
R
L
L
Video Fall Time  
V2, V4, V6 = 0.7 Vpp  
= 4.0 Vpp  
R, G, B  
Emitters  
ns  
MHz  
mA  
MC13280AY  
MC13281A/B  
V
4.3  
3.5  
out  
> 300 , C < 5.0 pF  
L
L
Video Bandwidth  
Power Supply Current  
V2, V4, V6 = 0.7 Vpp  
V1, V3, V5, Contrast = 5.0 V  
R, G, B  
Emitters  
MC13280AY  
MC13281A/B  
80  
100  
R
> 300 , C < 5.0 pF  
L
L
V
CC  
, Video V  
= 8.0 V  
CC  
70  
NOTE: It is recommended to use a double sided PCB layout for high frequency measurement (e.g., rise/fall time, bandwidth).  
2
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
Figure 1. Internal Block Diagram  
R Clamp  
Fast Commutate  
V
V
ref2  
ref1  
Video V  
CC  
R Input  
R Emitter  
R Subcontrast  
Contrast  
R Channel  
Contrast and Subcontrast  
Control Processor  
G Clamp  
V
V
ref2  
ref1  
G Input  
G Emitter  
Blank  
Clamp Blank  
Decoder  
Clamp  
G Subcontrast  
Contrast and Subcontrast  
Control Processor  
G Channel  
B Clamp  
V
V
ref2  
ref1  
B Input  
B Emitter  
V
CC  
B Channel  
V5  
B Subcontrast  
Contrast and Subcontrast  
Control Processor  
Gnd  
This device contains 272 active transistors.  
3
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
PIN FUNCTION DESCRIPTION  
MC13280AY  
MC13281B  
Pin  
MC13281A  
Pin  
Name  
Equivalent Internal Circuit  
Description  
1
3
5
2
1
3
5
2
R
These pins provides a maximum of  
26 dB attenuation to vary the gain of  
each video amplifier separately.  
V
CC  
Subcontrast  
Control  
50 k  
Input voltage is from 0 to 5.0 V.  
Increasing the voltage will increase  
the contrast level.  
G
5.0 V  
Subcontrast  
Control  
B
Subcontrast  
Control  
R Input  
G Input  
B Input  
Ground  
The input coupling capacitor is used  
for input clamping storage. The  
maximum source impedance is 100 .  
V
ref  
5.0 V  
Clamp  
Input polarity of the video signal is  
positive.  
4
6
4
6
7
0.1  
Nominal 0.7 Vpp input signal is  
recommended (maximum 1.0 Vpp).  
75  
10 k  
1.0 k  
7
Ground pin. Connect to a clean, solid  
ground.  
N/A  
8
N/C  
N/C  
N/C  
N/C  
Connected to ground.  
10  
11  
12  
9
8
9
V
CC  
Connect to 8.0 Vdc supply, ±5%.  
Decoupling is required at this pin.  
13  
Contrast  
Overall Contrast Control for the three  
channels.  
5.0 V  
2.5 V  
42 k  
2.0 k  
The input range is 0 V to 5.0 V. An  
increase of voltage increases the  
contrast.  
10  
11  
14  
15  
Fast  
Commutate  
Must be connected to ground.  
B Emitter  
Output  
The video outputs are configured as  
emitter–followers with a driving  
capability of about 15 mA each.  
V
CC  
Video  
Signal  
The dc voltage at these three emitters  
is set to 1.2 V (black level).  
15  
18  
19  
22  
G Emitter  
Output  
The dc current through the output  
stage is determined by the emitter  
resistors (typically 330 ).  
Contrast  
R
= 330  
E
R Emitter  
Output  
Typical  
4
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
PIN FUNCTION DESCRIPTION (continued)  
MC13280AY  
MC13281B  
Pin  
MC13281A  
Pin  
Name  
Equivalent Internal Circuit  
Description  
12  
14  
17  
13  
16  
18  
21  
17  
B Clamp  
Capacitor  
A 100 nF capacitor is connected to  
each of these pins.  
1.2 V  
The capacitor is used for video output  
dc restoration.  
Video Out  
G Clamp  
Capacitor  
V
CC  
R Clamp  
Capacitor  
Video V  
Connect to 8.0 V dc supply, ±5%. The  
CC  
V
is for the video output stage. It is  
CC  
internally connected to the collectors  
of the output transistors.  
16  
20  
5.0 V (V5)  
ref  
5.0 V regulator. Minimum 10 µF  
V
CC  
capacitor is required for noise filtering  
and compensation. It can source up  
to 20 mA but not sink current. Output  
impedance is 10 . Recommended  
for use as a voltage reference only.  
Band Gap  
Regulator  
5.0 V  
10  
µF  
R
0.8 R  
19  
23  
Clamp  
This pin is used for video clamping.  
The threshold clamping level is 3.75 V.  
V
V
CC  
ref1  
30 k  
V
ref2  
10 k  
3.75 V  
20  
24  
Blank  
This pin is used for video blanking.  
The threshold blanking level is 1.25 V.  
V
V
CC  
ref1  
30 k  
V
ref2  
10 k  
1.25 V  
5
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
FUNCTIONAL DESCRIPTION  
The MC13280AY and MC13281A/B are composed of  
Contrast Control  
three video amplifiers, clamping and blanking circuitry with  
contrast and subcontrast controls. Each video amplifier is  
designed to have a –3.0 dB bandwidth of 100 MHz  
(MC13281, 80 MHz for the MC13280) with a gain of up to  
about 5.6 V/V, or 15 dB.  
The contrast control varies the gain of three video  
amplifiers from a minimum of 0.3 V/V to a maximum of  
5.6 V/V when all subcontrast levels are set to 5.0 V.  
Subcontrast Control  
Each subcontrast control provides a maximum of 26 dB  
attenuation on each video amplifier separately.  
Video Input  
The video input stages are high impedance and designed  
to accept a maximum signal of 1.0 Vpp with 75 termination  
(typically) provided externally. During the clamping period, a  
current is provided to the input capacitor by the clamping  
circuit which brings the input to a proper dc level (nominal  
2.0 V). The blanking and clamping signals are to be provided  
externally, with their thresholds at 1.25 V and 3.75 V,  
respectively.  
Clamp Pulse Input  
The clamping pulse is provided externally, and the pulse  
width must be no less than 500 ns.  
Blank Pulse Input  
The blanking pulse is used to blank the video signal during  
the horizontal sync period, or used as a control pin for video  
mute function.  
Video Output  
Fast Commutate  
The video output stages are configured as emitter–  
followers, with a driving capability of about 15 mA for each  
channel. The dc voltage at these three emitters is set to 1.2 V  
(black level). The dc current through each output stage is  
determined by the emitter resistor (typically 330 ).  
This pin should be connected to ground.  
Power Supplies  
V
and Video V  
supplies are to be 8.0 V ±5%.  
CC  
CC  
Figure 2. Test Circuit  
8.0 V  
Blank  
Input  
Clamp  
Input  
C15  
0.1  
C14  
47  
µF  
Blank  
Clamp  
Fast  
Commutate  
Video  
V
CC  
V
CC  
C1  
0.1  
R Output  
R Input  
G Input  
B Input  
R Emitter  
R Input  
G Input  
C2  
0.1  
G Output  
B Output  
G Emitter  
B Emitter  
C3  
0.1  
B Input  
R4  
330  
R5  
330  
R6  
330  
R1  
75  
R2  
75  
R3  
75  
MC13280AY  
MC13281A/B  
R Clamp  
G Clamp  
C13  
0.1  
C12  
0.1  
Gnd  
V5  
B Clamp  
C11  
0.1  
Clamp Capacitor  
Subcontrast Control  
G
R
B
Contrast  
C4  
0.1  
C5  
10 µF  
C7  
0.1  
C8  
0.1  
C10  
0.1  
C6  
0.1  
5.0 V  
5.0 V  
5.0 V  
5.0 V  
6
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
APPLICATION INFORMATION  
PCB Layout  
reduce the rise/fall time by increasing the driving current, but  
the output stage may be damaged due to increasing power  
dissipation at the same time. The frequency response is  
affected by the loading capacitance. The typical value is 3.0  
to 5.0 pF. Figure 3 shows a typical interface with a video  
output driver. For high resolution color monitor application, it  
is recommended to use coaxial cable or shielded cable for  
input signal connections.  
Care should be taken in the PCB layout to minimize the  
noise effects. The most sensitive pins are V , Video V  
,
CC  
CC  
V5 and Clamp. It is strongly recommended to make a ground  
plane and connect V /Video V and ground traces, to the  
CC  
power supply directly. Separate power supply traces should  
be used for V and Video V and decoupling capacitors  
CC  
CC CC  
should be connected as close as possible to the device.  
Multi–layer ceramic and tantalum capacitors are  
recommended. V5 is designed as a 5.0 V voltage reference  
for contrast, and RGB subcontrast controls, so the same  
Clamp and Blank Input  
The clamp input is normally (except for Sync–on–Green)  
connected to a positive horizontal sync pulse and has a  
threshold level of 3.75 V. It is used as a timing reference for  
the dc restoration process, so it cannot be an open circuit. If  
Sync–on–Green timing mode is used, the clamping pulse  
should be located at the horizontal back porch period instead  
of horizontal sync. Otherwise, the black level will be clamped  
at the wrong dc level.  
precautions for V  
should also be applied at this pin. The  
CC  
Clamp capacitors should be connected to ground close to  
IC’s ground pin, or power supply ground. The copper trace of  
video signal inputs and outputs should be as short as  
possible and separated by ground traces to avoid any RGB  
cross–interference. A double sided PCB should be used to  
optimize the device’s performance.  
The blank input is used as a video mute, or horizontal  
blanking control pin, and is normally connected to a blanking  
pulse generated from the flyback or MCU. The threshold level  
is 1.25 V. The blanking pulse width should be equal to the  
flyback retrace period to make sure that the video signal is  
blanked properly during retrace. It is necessary to limit the  
amplitude and avoid any negative undershoot if the flyback  
pulse is used. The blanking input pin cannot accept a  
negative voltage. This pin should be grounded if it is not used.  
RGB Input and Output  
The RGB output stages are designed as emitter–followers  
to drive the CRT driver circuitry directly. The emitter resistors  
used are 330 (typically) and the driving current is 15 mA  
maximum for each channel. The loading impedance  
connected to the output stages should be greater than 330 Ω  
and less than 5.0 pF for optimum performance (e.g., rise/fall  
time, bandwidth, etc.). Decreasing the resistive load will  
7
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
Figure 3. Interfacing with Video Output Drivers  
CRT Driver V  
CC  
Reference Voltage  
C
L
5.0 V  
C11  
8.0 V  
C12  
47  
R4  
10  
10  
µF  
µF  
VR1  
50 k  
VR2  
50 k  
VR3  
50 k  
C7  
47  
C3  
0.1  
C10  
0.1  
C9  
0.1  
µF  
R
G
B
V5  
Gnd  
V
Video  
CC  
Contrast Contrast Contrast  
V
CC  
R Emitter  
G Emitter  
C1 0.1  
C2 0.1  
C3 0.1  
R5  
330  
R Input  
G Input  
B Input  
R Input  
G Input  
RGB Output  
R6  
330  
MC13280AY  
MC13281A/B  
B Emitter  
R Clamp  
R7  
330  
B Input  
R1  
75  
R2  
75  
R3  
75  
Video Processor  
Clamp  
Blank  
G Clamp  
B Clamp  
Fast  
Commutate  
C4  
0.1  
C5  
0.1  
C6  
0.1  
Contrast  
5.0 V  
Clamp Blank  
Input Input  
VR5  
50 k  
8
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
Figure 4. RGB In/Out Linearity  
Figure 5. Contrast Control  
4.5  
4.0  
3.5  
4.5  
4.0  
3.5  
3.0  
2.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
2.0  
1.5  
1.0  
0.5  
0
0
0.2  
0.4  
0.6  
0.8  
0
2.0  
4.0  
6.0  
VIDEO INPUT (Vpp)  
CONTRAST CONTROL VOLTAGE (V)  
Figure 7. Crosstalk From Green to Red  
and Blue Channels  
Figure 6. Subcontrast Control  
4.5  
4.0  
0
–10  
–20  
–30  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
–40  
–50  
–60  
Blue Channel  
–70  
–80  
Red Channel  
0
2.0  
4.0  
6.0  
1.0  
10  
100  
1000  
SUBCONTRAST VOLTAGE (V)  
f, FREQUENCY (MHz)  
9
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
Figure 8. Rise Time for MC13281B  
Figure 9. Fall Time for MC13281B  
100 mV/DIV  
5.0 ns/DIV  
10x PROBE  
100 mV/DIV  
5.0 ns/DIV  
10x PROBE  
NOTE: Recommend to use a double sided PCB without any socket for rise/fall time measurements, using an input pulse with  
1.5 ns rise/fall time and an active probe with 1.7 pF capacitance loading.  
Figure 10. Single Sided PCB Layout  
(Component Side) for MC13280AY, MC13281B  
Blank  
Clamp  
R In  
R7  
R VR1 G VR2 B VR3  
R Out  
R1  
R2  
J1  
J3  
IC1  
G In  
B In  
C6  
C1  
C7  
C2  
C8  
C3  
R6  
C13  
C5  
G Out  
B Out  
C4  
R5  
J4  
C12  
C17  
C16  
J2  
C14  
C15  
C11  
R4  
R3  
C10  
V
Gnd  
CC  
8.0 V  
VR5  
Main  
Contrast  
NOTE: J = Jumper  
10  
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
OUTLINE DIMENSIONS  
P SUFFIX  
PLASTIC PACKAGE  
CASE 724–03  
ISSUE D  
–A–  
NOTES:  
1. CHAMFERED CONTOUR OPTIONAL.  
2. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
3. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
24  
1
13  
12  
–B–  
4. CONTROLLING DIMENSION: INCH.  
INCHES  
MILLIMETERS  
L
DIM  
A
B
C
D
E
MIN  
MAX  
1.265  
0.270  
0.175  
0.020  
MIN  
31.25  
6.35  
3.69  
0.38  
MAX  
32.13  
6.85  
4.44  
0.51  
C
1.230  
0.250  
0.145  
0.015  
NOTE 1  
–T–  
SEATING  
PLANE  
K
0.050 BSC  
1.27 BSC  
F
G
J
K
L
M
N
0.040  
0.100 BSC  
0.007  
0.110  
0.300 BSC  
0.060  
1.02  
2.54 BSC  
0.18  
2.80  
7.62 BSC  
1.52  
N
M
E
0.012  
0.140  
0.30  
3.55  
G
J 24 PL  
0.25 (0.010)  
F
M
M
T
B
D 24 PL  
0
15  
0.040  
0
0.51  
15  
1.01  
0.020  
M
M
0.25 (0.010)  
T A  
P SUFFIX  
PLASTIC PACKAGE  
CASE 738–03  
ISSUE E  
–A–  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEAD WHEN  
FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE MOLD  
FLASH.  
20  
1
11  
B
10  
L
C
INCHES  
MILLIMETERS  
DIM  
A
B
C
D
MIN  
MAX  
1.070  
0.260  
0.180  
0.022  
MIN  
25.66  
6.10  
3.81  
0.39  
MAX  
27.17  
6.60  
4.57  
0.55  
1.010  
0.240  
0.150  
0.015  
–T–  
SEATING  
PLANE  
K
E
0.050 BSC  
1.27 BSC  
M
0.050  
0.070  
1.27  
1.77  
F
G
J
K
L
N
E
0.100 BSC  
2.54 BSC  
0.008  
0.110  
0.015  
0.140  
0.21  
2.80  
0.38  
3.55  
G
F
J 20 PL  
0.300 BSC  
7.62 BSC  
D 20 PL  
0.25 (0.010)  
M
M
0.25 (0.010)  
T
B
M
N
0
15  
0
15  
0.020  
0.040  
0.51  
1.01  
M
M
T
A
11  
MOTOROLA ANALOG IC DEVICE DATA  
MC13280AY MC13281A/B  
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola  
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,includingTypicals”  
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of  
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other  
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury  
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
Motorola was negligent regarding the design or manufacture of the part. Motorola and  
Opportunity/Affirmative Action Employer.  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal  
How to reach us:  
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;  
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454  
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,  
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315  
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609  
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ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,  
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298  
MC13280AY/D  

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