MC14007UBD [MOTOROLA]
Dual Complementary Pair Plus Inverter; 双互补对加变频器
| 型号： | MC14007UBD |
| 厂家： | 
MOTOROLA |
| 描述： | Dual Complementary Pair Plus Inverter |
| 文件： | 总6页 (文件大小：246K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 632
The MC14007UB multi–purpose device consists of three N–channel and
three P–channel enhancement mode devices packaged to provide access to
each device. These versatile parts are useful in inverter circuits, pulse–
shapers, linear amplifiers, high input impedance amplifiers, threshold
detectors, transmission gating, and functional gating.
P SUFFIX
PLASTIC
CASE 646
•
•
•
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Pin–for–Pin Replacement for CD4007A or CD4007UB
This device has 2 outputs without ESD Protection. Anti–static
precautions must be taken.
D SUFFIX
SOIC
CASE 751A
•
•
ORDERING INFORMATION
MC14XXXUBCP
MC14XXXUBCL
MC14XXXUBD
Plastic
Ceramic
SOIC
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
T
A
= – 55° to 125°C for all packages.
V
DD
– 0.5 to + 18.0
V , V
in out
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
l , l
in out
Input or Output Current (DC or Transient),
per Pin
± 10
mA
PIN ASSIGNMENT
D–P
S–P
1
2
3
4
14
13
12
11
V
B
B
B
B
DD
D–P
P
Power Dissipation, per Package†
Storage Temperature
500
mW
C
D
A
T
stg
– 65 to + 150
260
GATE
S–N
OUT
C
T
Lead Temperature (8–Second Soldering)
C
L
S–P
C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
D–N
5
6
10
9
GATE
C
B
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
GATE
S–N
C
A
V
7
8
D–N
A
SS
A
A
D = DRAIN
S = SOURCE
12
1
9
B
B
C
2
4
C
SCHEMATIC
3
5
14 13
2
1
11
INPUT
V
DD
14
11
6
12
13
8
INPUT OUTPUT CONDITION
INPUT
6
10
1
0
A = C, B = OPEN
A = B, C = OPEN
7
8
3
4
5
10
9
7
V
SS
Substrates of P–channel devices internally
V
V
= PIN 14
= PIN 7
DD
SS
connected to V ; substrates of N–channel
DD
devices internally connected to V
.
SS
Figure 1. Typical Application: 2–Input Analog Multiplexer
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
Typ #
125 C
V
Vdc
DD
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage
(V = 4.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.0
2.0
2.5
—
—
—
2.25
4.50
6.75
1.0
2.0
2.5
—
—
—
1.0
2.0
2.5
O
(V = 9.0 Vdc)
O
(V = 13.5 Vdc)
O
(V = 0.5 Vdc)
O
“1” Level
Source
Sink
V
5.0
10
15
4.0
8.0
12.5
—
—
—
4.0
8.0
12.5
2.75
5.50
8.25
—
—
—
4.0
8.0
12.5
—
—
—
Vdc
IH
(V = 1.0 Vdc)
O
(V = 1.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
OH
(V
OH
(V
OH
(V
OH
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 5.0
– 1.0
– 2.5
– 10
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
1.0
2.5
10
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
± 0.1
—
—
±0.00001
± 0.1
—
—
± 1.0
µAdc
in
Input Capacitance
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
0.25
0.5
1.0
—
—
—
0.0005
0.0010
0.0015
0.25
0.5
1.0
—
—
—
7.5
15
30
µAdc
µAdc
DD
Total Supply Current**†
I
T
5.0
10
15
I
I
I
= (0.7 µA/kHz) f + I /6
DD
T
T
T
(Dynamic plus Quiescent,
Per Gate) (C = 50 pF)
= (1.4 µA/kHz) f + I /6
DD
= (2.2 µA/kHz) f + I /6
DD
L
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
†To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V
DD
– V ) in volts, f in kHz is input frequency, and k = 0.003.
SS
T
L
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However,
precautionsmust be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance
circuit. For proper operation, V and V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V
be left open.
should be constrained to the range V
≤ (V or V ) ≤ V
.
in out
SS
in
out
DD
or V ). Unused outputs must
SS
DD
MC14007UB
32
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS* (C = 50 pF, T = 25 C)
L
A
V
Vdc
DD
Characteristic
Symbol
Min
Typ #
Max
Unit
t
ns
Output Rise Time
TLH
—
—
—
t
t
t
= (1.2 ns/pF) C + 30 ns
5.0
10
15
90
45
35
180
90
TLH
TLH
TLH
L
= (0.5 ns/pF) C + 20 ns
L
= (0.4 ns/pF) C + 15 ns
70
L
t
ns
ns
ns
Output Fall Time
THL
—
—
—
t
t
t
= (1.2 ns/pF) C + 15 ns
5.0
10
15
75
40
30
150
80
THL
THL
THL
L
= (0.5 ns/pF) C + 15 ns
L
= (0.4 ns/pF) C + 10 ns
60
L
t
Turn–Off Delay Time
PLH
—
—
—
t
t
t
= (1.5 ns/pF) C + 35 ns
5.0
10
15
60
30
25
125
75
PLH
PLH
PLH
L
= (0.2 ns/pF) C + 20 ns
L
= (0.15 ns/pF) C + 17.5 ns
55
L
t
Turn–On Delay Time
PHL
—
—
—
t
t
t
= (1.0 ns/pF) C + 10 ns
5.0
10
15
60
30
25
125
75
PHL
PHL
PHL
L
= (0.3 ns/pF) C + 15 ns
L
= (0.2 ns/pF) C + 15 ns
55
L
* The formulas given are for the typical characteristics only. Switching specifications are for device connected as an inverter.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
V
= –V
GS
V
= V
GS
DD
DD
14
14
I
V
= V
– V
DD
OH
DS OH
I
V
= V
OL
DS OL
7
V
SS
7
V
SS
All unused inputs connected to ground.
All unused inputs connected to ground.
0
20
16
a
V
= 15 Vdc
GS
b
c
c
–4.0
a
V
= –5.0 Vdc
b
a
GS
10 Vdc
a
b
c
T = –55°C
A
= +25°C
= +125°C
–8.0
–12
–16
–20
12
8.0
4.0
0
T
b
A
c
T
A
a
b
c
T = –55°C
A
c
b
T
= +25°C
A
A
b
T
= +125°C
c
–15 Vdc
–10 Vdc
a
a
c
b
5.0 Vdc
6.0
a
–10
–8.0
–6.0
–4.0
–2.0
–0
0
2.0
4.0
8.0
10
V
, DRAIN VOLTAGE (Vdc)
V
, DRAIN VOLTAGE (Vdc)
DS
DS
Figure 2. Typical Output Source Characteristics
Figure 3. Typical Output Sink Characteristics
These typical curves are not guarantees, but are design aids.
Caution: The maximum current rating is 10 mA per pin.
MOTOROLA CMOS LOGIC DATA
MC14007UB
33
V
I
DD
20 ns
20 ns
V
V
V
V
DD
SS
OH
OL
0.01
CERAMIC
µF
90%
500 µF
V
50%
10%
D
in
14
t
t
PLH
PHL
V
PULSE
GENERATOR
in
90%
50%
10%
V
out
V
out
C
L
7
V
SS
t
t
TLH
THL
Figure 4. Switching Time and Power Dissipation Test Circuit and Waveforms
APPLICATIONS
V
The MC14007UB dual pair plus inverter, which has access
to all its elements offers a number of unique circuit applica-
tions. Figures 1, 5, and 6 are a few examples of the device
flexibility.
DD
14
OUT = A+B•C
13
+V
DD
11
2
1
2
DISABLE
3
10
12
B
OUTPUT
1
8
7
11
9
5
INPUT 10
12 OUTPUT
3
6
C
A
9
8
4
DISABLE
6
7
Substrates of P–channel devices internally connected to V
Substrates of N–channel devices internally connected to V
;
.
DD
SS
INPUT
DISABLE
OUTPUT
1
0
X
0
0
1
0
1
Figure 6. AOI Functions Using Tree Logic
OPEN
X = Don’t Care
Figure 5. 3–State Buffer
MC14007UB
34
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 632–08
ISSUE Y
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
1
9
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–B–
7
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.280
0.200
0.020
0.065
MIN
19.05
6.23
3.94
0.39
1.40
MAX
19.94
7.11
5.08
0.50
1.65
0.750
0.245
0.155
0.015
0.055
–T–
SEATING
PLANE
K
F
G
J
K
0.100 BSC
2.54 BSC
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
G
N
M
D 14 PL
0.25 (0.010)
J 14 PL
0.25 (0.010)
L
M
N
0.300 BSC
7.62 BSC
0
15
0
15
M
S
T
A
M
S
T
B
0.020
0.040
0.51
1.01
P SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
ISSUE L
14
8
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
B
1
7
4. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
C
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.095
0.015
0.135
1.32
0.20
2.92
2.41
0.38
3.43
J
N
0.300 BSC
7.62 BSC
SEATING
PLANE
K
0
10
0
10
0.015
0.039
0.39
1.01
H
G
D
M
MOTOROLA CMOS LOGIC DATA
MC14007UB
35
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
ISSUE F
Y14.5M, 1982.
–A–
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
14
1
8
7
–B–
P 7 PL
M
M
0.25 (0.010)
B
MILLIMETERS
INCHES
G
DIM
A
B
C
D
F
G
J
K
M
P
MIN
8.55
3.80
1.35
0.35
0.40
MAX
8.75
4.00
1.75
0.49
1.25
MIN
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
C
0.337
0.150
0.054
0.014
0.016
–T–
SEATING
PLANE
J
M
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
M
S
S
0.25 (0.010)
T
B
A
5.80
0.25
6.20
0.50
0.228
0.010
0.244
0.019
R
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
are registered
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MC14007UB/D
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