MC14572UBD [MOTOROLA]
Hex Gate; 六角门
| 型号： | MC14572UBD |
| 厂家： | 
MOTOROLA |
| 描述： | Hex Gate |
| 文件： | 总5页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 620
The MC14572UB hex functional gate is constructed with MOS P–channel
and N–channel enhancement mode devices in a single monolithic structure.
These complementary MOS logic gates find primary use where low power
dissipation and/or high noise immunity is desired. The chip contains four
inverters, one NOR gate and one NAND gate.
P SUFFIX
PLASTIC
CASE 648
•
•
•
•
•
•
•
•
Diode Protection on All Inputs
Single Supply Operation
Supply Voltage Range = 3.0 Vdc to 18 Vdc
NOR Input Pin Adjacent to V
SS
NAND Input Pin Adjacent to V
NOR Output Pin Adjacent to Inverter Input Pin For OR Application
NAND Output Pin Adjacent to Inverter Input Pin For AND Application
Capable of Driving Two Low–power TTL Loads or One Low–Power
Schottky TTL Load over the Rated Temperature Range
D SUFFIX
SOIC
CASE 751B
Pin to Simplify Use As An Inverter
Pin to Simplify Use As An Inverter
DD
ORDERING INFORMATION
MC14XXXUBCP
MC14XXXUBCL
MC14XXXUBD
Plastic
Ceramic
SOIC
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
T
A
= – 55° to 125°C for all packages.
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
V
DD
– 0.5 to + 18.0
LOGIC DIAGRAM
V , V
in out
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
I , I
in out
Input or Output Current (DC or Transient),
per Pin
± 10
mA
2
4
1
P
Power Dissipation, per Package†
Storage Temperature
500
mW
C
D
T
stg
– 65 to + 150
260
3
5
9
T
Lead Temperature (8–Second Soldering)
C
L
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
6
7
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
CIRCUIT SCHEMATIC
10
12
V
V
DD
DD
V
DD
11
13
7
6
14
15
2
1
13
V
V
= PIN 16
= PIN 8
SS
14
15
DD
5
V
SS
V
V
SS
SS
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
125 C
V
DD
Vdc
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Typ #
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
in
= 0 or V
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.0
2.0
2.5
—
—
—
2.25
4.50
6.75
1.0
2.0
2.5
—
—
—
1.0
2.0
2.5
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
“1” Level
V
IH
Vdc
(V = 0.5 or 4.5 Vdc)
5.0
10
15
4.0
8.0
12.5
—
—
—
4.0
8.0
12.5
2.75
5.50
8.25
—
—
—
4.0
8.0
12.5
—
—
—
O
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
5.0
5.0
10
– 1.2
– 0.25
– 0.62
– 1.8
—
—
—
—
– 1.0
– 0.2
– 0.5
– 1.5
– 1.7
– 0.36
– 0.9
– 3.5
—
—
—
—
– 0.7
– 0.14
– 0.35
– 1.1
—
—
—
—
OH
OH
OH
OH
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
±0.1
—
—
±0.00001
±0.1
—
—
±1.0
µAdc
in
Input Capacitance
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
0.25
0.5
1.0
—
—
—
0.0005
0.0010
0.0015
0.25
0.5
1.0
—
—
—
7.5
15
30
µAdc
µAdc
DD
Total Supply Current**†
I
T
5.0
10
15
I
I
I
= (1.89 µA/kHz) f + I
= (3.80 µA/kHz) f + I
= (5.68 µA/kHz) f + I
T
T
T
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
†To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V
DD
– V ) in volts, f in kHz is input frequency, and k = 0.006.
SS
T
L
PIN ASSIGNMENT
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
OUT
1
2
16
15
V
A
DD
IN 2
IN
OUT
IN
A
B
F
voltages to this high-impedance circuit. For proper operation, V and
in
V
should be constrained to the range V
SS
≤ (V or V ) ≤ V .
in out DD
3
4
5
6
7
8
14
13
12
11
10
9
IN 1
F
out
Unused inputs must always be tied to an appropriate logic voltage
OUT
B
F
E
D
level (e.g., either V
or V ). Unused outputs must be left open.
DD
SS
OUT
IN 1
IN 2
IN
E
C
OUT
IN
C
C
D
V
OUT
SS
MC14572UB
2
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS* (C = 50 pF, T = 25 C)
L
A
Characteristic
Symbol
V
DD
Min
Typ #
Max
Unit
Output Rise Time
t
ns
TLH
t
t
t
= (3.0 ns/pF) C + 30 ns
= (1.5 ns/pF) C + 15 ns
= (1.1 ns/pF) C + 10 ns
5.0
10
15
—
—
—
180
90
65
360
180
130
TLH
TLH
TLH
L
L
L
Output Fall Time
t
ns
ns
THL
t
t
t
= (1.5 ns/pF) C + 25 ns
= (0.75 ns/pF) C + 12.5 ns
= (0.55 ns/pF) C + 9.5 ns
5.0
10
15
—
—
—
100
50
40
200
100
80
THL
THL
THL
L
L
L
Propagation Delay Time
t
t
,
PLH
t
t
t
, t
= (1.7 ns/pF) C + 5 ns
= (0.66 ns/pF) C + 17 ns
= (0.5 ns/pF) C + 15 ns
L
5.0
10
15
—
—
—
90
50
40
180
100
80
PLH PHL
L
L
PHL
, t
PLH PHL
, t
PLH PHL
* The formulas given are for the typical characteristics only at 25 C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
V
V
DD
DD
INPUT
7
16
16
INPUT
2
PULSE
GENERATOR
PULSE
GENERATOR
6
OUTPUT
OUTPUT
1
5
C
8
V
8
V
C
L
SS
SS
L
V
DD
20 ns
20 ns
V
16
DD
90%
50%
10%
90%
50%
INPUT
14
INPUT
15
10%
V
SS
OUTPUT
PULSE
GENERATOR
t
t
PHL
13
PLH
V
V
8
V
C
L
OH
SS
90%
50%
10%
90%
50%
OUTPUT
10%
OL
t
t
r
f
Figure 1. Switching Time Test Circuits and Waveforms
MOTOROLA CMOS LOGIC DATA
MC14572UB
3
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
16
1
9
8
–B–
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
–––
MAX
19.93
7.49
5.08
0.50
0.750
0.240
–––
–T–
SEATING
PLANE
0.015
0.39
K
N
E
0.050 BSC
1.27 BSC
F
0.055
0.065
1.40
1.65
G
H
K
L
M
N
0.100 BSC
2.54 BSC
M
E
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
J
16 PL
0.25 (0.010)
G
0.300 BSC
7.62 BSC
M
S
T
B
0
15
0
15
D 16 PL
0.25 (0.010)
0.020
0.040
0.51
1.01
M
S
T
A
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
0.740
0.250
0.145
0.015
0.040
C
L
SEATING
–T–
G
H
J
K
L
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
PLANE
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
0.25 (0.010)
M
S
0.020
0.040
0.51
1.01
M
M
T
A
MC14572UB
4
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
16
1
9
8
–B–
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
M
S
0.25 (0.010)
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
9.80
3.80
1.35
0.35
0.40
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
F
0.386
0.150
0.054
0.014
0.016
R X 45
K
C
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
–T–
SEATING
PLANE
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
J
M
D
16 PL
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
M
S
S
0.25 (0.010)
T
B
A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
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MC14572UB/D
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