MC74ACT273DWC [MOTOROLA]

ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, PLASTIC, SOIC-20;
MC74ACT273DWC
型号: MC74ACT273DWC
厂家: MOTOROLA    MOTOROLA
描述:

ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, PLASTIC, SOIC-20

触发器 锁存器 逻辑集成电路 光电二极管
文件: 总7页 (文件大小:191K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
OCTAL D FLIP-FLOP  
The MC74AC273/74ACT273 has eight edge-triggered D-type flip-flops with  
individual D inputs and Q outputs. The common buffered Clock (CP) and Master  
Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.  
The register is fully edge-triggered. The state of each D input, one setup time  
before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-  
flop’s Q output.  
All outputs will be forced LOW independently of Clock or Data inputs by a LOW  
voltage level on the MR input. The device is useful for applications where the true  
output only is required and the Clock and Master Reset are common to all storage  
elements.  
Ideal Buffer for MOS Microprocessor or Memory  
Eight Edge-Triggered D Flip-Flops  
Buffered Common Clock  
Buffered, Asynchronous Master Reset  
See MC74AC377 for Clock Enable Version  
See MC74AC373 for Transparent Latch Version  
See MC74AC374 for 3-State Version  
Outputs Source/Sink 24 mA  
N SUFFIX  
CASE 738-03  
PLASTIC  
• ′ACT273 Has TTL Compatible Inputs  
DW SUFFIX  
CASE 751D-04  
PLASTIC  
V
Q
D
D
Q
Q
D
D
Q
4
CP  
11  
CC  
7
7
6
6
5
5
4
20  
19  
18  
17  
16  
15  
14  
12  
13  
LOGIC SYMBOL  
1
2
3
4
5
6
7
9
8
10  
D
CP  
D
Q
D
Q
D
Q
D
Q
D
D
Q
D
Q
0
1
2
3
4
5
6
7
MR  
Q
D
D
Q
Q
D
D
Q
3
GND  
0
0
1
1
2
2
3
MR  
Q
Q
5
0
1
2
3
4
6
7
PIN NAMES  
D –D  
0
Data Inputs  
Master Reset  
7
MR  
CP  
Q –Q  
0
Clock Pulse Input  
Data Outputs  
7
FACT DATA  
5-1  
MC74AC273 MC74ACT273  
LOGIC DIAGRAM  
D
D
D
D
D
D
D
D
7
0
1
2
3
4
5
6
CP  
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP  
CP  
CP  
CP  
CP  
CP  
CP  
CP  
R
R
R
R
R
R
R
R
D
D
D
D
D
D
D
D
MR  
O
O
O
O
O
O
O
O
7
0
1
2
3
4
5
6
Please note that this diagram is provided only for the understanding of logic  
operations and should not be used to estimate propagation delays.  
MODE SELECT-FUNCTION TABLE  
Inputs  
Outputs  
Operating Mode  
MR  
CP  
X
D
Q
n
n
Reset (Clear)  
L
H
H
X
L
Load 1′  
Load 0′  
H
L
H
L
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
= LOW-to-HIGH Clock Transition  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
–0.5 to +7.0  
Unit  
V
V
V
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
CC  
–0.5 to V  
+0.5  
+0.5  
V
in  
CC  
CC  
V
out  
–0.5 to V  
V
I
I
I
±20  
mA  
mA  
mA  
°C  
in  
DC Output Sink/Source Current, per Pin  
±50  
±50  
out  
CC  
DC V  
or GND Current per Output Pin  
Storage Temperature  
CC  
T
stg  
–65 to +150  
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended  
Operating Conditions.  
FACT DATA  
5-2  
MC74AC273 MC74ACT273  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
4.5  
0
Typ  
5.0  
5.0  
Max  
6.0  
Unit  
V
AC  
V
Supply Voltage  
CC  
ACT  
5.5  
V , V  
in out  
DC Input Voltage, Output Voltage (Ref. to GND)  
V
CC  
V
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
@ 3.0 V  
@ 4.5 V  
@ 5.5 V  
@ 4.5 V  
@ 5.5 V  
150  
40  
Input Rise and Fall Time (Note 1)  
AC Devices except Schmitt Inputs  
ns/V  
t , t  
r f  
25  
10  
Input Rise and Fall Time (Note 2)  
ACT Devices except Schmitt Inputs  
t , t  
r f  
ns/V  
8.0  
T
Junction Temperature (PDIP)  
Operating Ambient Temperature Range  
Output Current — High  
140  
85  
°C  
°C  
J
T
A
–40  
25  
I
–24  
24  
mA  
mA  
OH  
OL  
I
Output Current — Low  
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
in  
CC  
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
in  
DC CHARACTERISTICS  
74AC  
= +25°C  
74AC  
T
A
=
V
(V)  
CC  
Symbol  
Parameter  
Unit  
Conditions  
T
A
–40°C to +85°C  
Typ  
Guaranteed Limits  
V
V
V
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
2.1  
3.15  
3.85  
2.1  
3.15  
3.85  
V
or V  
= 0.1 V  
Minimum High Level  
Input Voltage  
IH  
OUT  
V
V
V
– 0.1 V  
CC  
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
0.9  
1.35  
1.65  
0.9  
1.35  
1.65  
V
OUT  
= 0.1 V  
Maximum Low Level  
Input Voltage  
IL  
or V  
– 0.1 V  
CC  
3.0  
4.5  
5.5  
2.99  
4.49  
5.49  
2.9  
4.4  
5.4  
2.9  
4.4  
5.4  
I
= –50 µA  
Minimum High Level  
Output Voltage  
OH  
OUT  
*V = V or V  
IN IL IH  
3.0  
4.5  
5.5  
2.56  
3.86  
4.86  
2.46  
3.76  
4.76  
–12 mA  
–24 mA  
–24 mA  
V
V
I
OH  
V
OL  
3.0  
4.5  
5.5  
0.002  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I = 50 µA  
OUT  
Maximum Low Level  
Output Voltage  
*V = V or V  
IN IL  
IH  
3.0  
4.5  
5.5  
0.36  
0.36  
0.36  
0.44  
0.44  
0.44  
12 mA  
V
I
24 mA  
24 mA  
OL  
I
IN  
Maximum Input  
Leakage Current  
5.5  
±0.1  
±1.0  
µA  
V = V , GND  
I
CC  
I
I
I
5.5  
5.5  
75  
mA  
mA  
V
V
= 1.65 V Max  
†Minimum Dynamic  
Output Current  
OLD  
OHD  
CC  
OLD  
–75  
= 3.85 V Min  
OHD  
Maximum Quiescent  
Supply Current  
5.5  
8.0  
80  
µA  
V
IN  
= V or GND  
CC  
* All outputs loaded; thresholds on input associated with output under test.  
Maximum test duration 2.0 ms, one output loaded at a time.  
Note: I and I  
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V  
.
IN CC  
CC  
FACT DATA  
5-3  
MC74AC273 MC74ACT273  
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)  
74AC  
74AC  
T
= –40°C  
A
T
C
= +25°C  
= 50 pF  
V
(V)  
*
Fig.  
No.  
A
L
CC  
Symbol  
Parameter  
to +85°C  
C
Unit  
= 50 pF  
L
Min  
Typ  
Max  
Min  
Max  
Maximum Clock  
Frequency  
3.3  
5.0  
90  
140  
125  
175  
75  
125  
f
t
t
t
Mhz  
ns  
3-3  
3-6  
3-6  
3-6  
max  
Propagation Delay  
Clock to Output  
3.3  
5.0  
4.0  
3.0  
7.0  
5.5  
12.5  
9.0  
3.0  
2.5  
14.0  
10.0  
PLH  
PHL  
PHL  
Propagation Delay  
Clock to Output  
3.3  
5.0  
4.0  
3.0  
7.0  
5.0  
13.0  
10.0  
3.5  
2.5  
14.5  
11.0  
ns  
Propagation Delay  
MR to Output  
3.3  
5.0  
4.0  
3.0  
7.0  
5.0  
13.0  
10.0  
3.5  
2.5  
14.0  
10.5  
ns  
* Voltage Range 3.3 V is 3.3 V ±0.3 V.  
Voltage Range 5.0 V is 5.0 V ±0.5 V.  
AC OPERATING REQUIREMENTS  
74AC  
74AC  
T
= –40°C  
A
T
C
= +25°C  
= 50 pF  
V
CC  
(V)  
*
Fig.  
No.  
A
L
Symbol  
Parameter  
to +85°C  
= 50 pF  
Unit  
C
L
Typ  
Guaranteed Minimum  
Setup Time, HIGH or LOW  
Data to CP  
3.3  
5.0  
3.5  
2.5  
5.5  
4.0  
6.0  
4.5  
t
t
t
t
t
ns  
ns  
ns  
ns  
ns  
3-9  
3-9  
3-6  
3-6  
3-9  
s
Hold Time, HIGH or LOW  
Data to CP  
3.3  
5.0  
–2.0  
–1.0  
0
1.0  
0
1.0  
h
Clock Pulse Width  
HIGH or LOW  
3.3  
5.0  
3.5  
2.5  
5.5  
4.0  
6.0  
4.5  
w
w
MR Pulse Width  
HIGH or LOW  
3.3  
5.0  
2.0  
1.5  
5.5  
4.0  
6.0  
4.5  
Recovery Time  
MR to CP  
3.3  
5.0  
1.5  
1.0  
3.5  
2.0  
4.5  
3.0  
rec  
* Voltage Range 3.3 V is 3.3 V ±0.3 V.  
Voltage Range 5.0 V is 5.0 V ±0.5 V.  
FACT DATA  
5-4  
MC74AC273 MC74ACT273  
DC CHARACTERISTICS  
Symbol  
74ACT  
= +25°C  
74ACT  
T
A
=
V
(V)  
CC  
Parameter  
Unit  
Conditions  
T
A
–40°C to +85°C  
Typ  
Guaranteed Limits  
V
V
V
4.5  
5.5  
1.5  
1.5  
2.0  
2.0  
2.0  
2.0  
V
= 0.1 V  
– 0.1 V  
Minimum High Level  
Input Voltage  
IH  
OUT  
V
V
V
or V  
CC  
= 0.1 V  
OUT  
4.5  
5.5  
1.5  
1.5  
0.8  
0.8  
0.8  
0.8  
V
Maximum Low Level  
Input Voltage  
IL  
or V  
– 0.1 V  
CC  
4.5  
5.5  
4.49  
5.49  
4.4  
5.4  
4.4  
5.4  
I
= –50 µA  
Minimum High Level  
Output Voltage  
OH  
OUT  
*V = V or V  
IN IL IH  
4.5  
5.5  
3.86  
4.86  
3.76  
4.76  
V
V
–24 mA  
–24 mA  
I
OH  
V
OL  
4.5  
5.5  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
I = 50 µA  
OUT  
Maximum Low Level  
Output Voltage  
*V = V or V  
IN IL  
IH  
4.5  
5.5  
0.36  
0.36  
0.44  
0.44  
V
24 mA  
I
OL  
24 mA  
I
IN  
Maximum Input  
Leakage Current  
5.5  
±0.1  
±1.0  
µA  
V = V , GND  
I
CC  
I  
Additional Max. I /Input  
CC  
5.5  
5.5  
5.5  
0.6  
1.5  
75  
mA  
mA  
mA  
V = V  
I
– 2.1 V  
CCT  
CC  
I
V
= 1.65 V Max  
= 3.85 V Min  
OHD  
†Minimum Dynamic  
Output Current  
OLD  
OLD  
I
–75  
V
V
OHD  
CC  
I
Maximum Quiescent  
Supply Current  
5.5  
8.0  
80  
µA  
= V  
CC  
or GND  
IN  
* All outputs loaded; thresholds on input associated with output under test.  
Maximum test duration 2.0 ms, one output loaded at a time.  
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)  
74ACT  
74ACT  
T
= –40°C  
A
T
C
= +25°C  
= 50 pF  
V
(V)  
*
Fig.  
No.  
A
L
CC  
Symbol  
Parameter  
to +85°C  
= 50 pF  
Unit  
C
L
Min  
Typ  
Max  
Min  
Max  
Maximum Clock  
Frequency  
f
t
t
t
5.0  
5.0  
5.0  
5.0  
125  
200  
125  
MHz  
ns  
3-3  
3-6  
3-6  
3-6  
max  
Propagation Delay  
Clock to Output  
3.0  
3.0  
3.0  
6.0  
6.5  
7.0  
10  
11  
11  
2.5  
2.5  
2.5  
11.0  
12.0  
11.5  
PHL  
PLH  
PHL  
Propagation Delay  
Clock to Output  
ns  
Propagation Delay  
MR to Output  
ns  
* Voltage Range 5.0 V is 5.0 V ±0.5 V.  
FACT DATA  
5-5  
MC74AC273 MC74ACT273  
AC OPERATING REQUIREMENTS  
74ACT  
74ACT  
= –40°C  
T
A
T
C
= +25°C  
= 50 pF  
V
(V)  
*
Fig.  
No.  
A
CC  
Symbol  
Parameter  
to +85°C  
= 50 pF  
Unit  
L
C
L
Typ  
Guaranteed Minimum  
Setup Time, HIGH or LOW  
Data to CP  
t
t
t
t
t
5.0  
5.0  
5.0  
5.0  
5.0  
3.0  
4.5  
2.0  
4.0  
4.0  
2.0  
5.0  
2.0  
4.5  
4.5  
3.0  
ns  
ns  
ns  
ns  
ns  
3-9  
3-9  
3-6  
3-6  
3-6  
s
Hold Time, HIGH or LOW  
Data to CP  
–2.5  
2.5  
h
Clock Pulse Width  
HIGH or LOW  
w
w
MR Pulse Width  
HIGH or LOW  
2.5  
Recovery Time  
MR to CP  
–1.0  
rec  
* Voltage Range 5.0 V is 5.0 V ±0.5 V.  
CAPACITANCE  
Symbol  
Value  
Typ  
Parameter  
Unit  
Test Conditions  
C
C
Input Capacitance  
Power Dissipation Capacitance  
4.5  
50  
pF  
pF  
V
V
= 5.0 V  
= 5.0 V  
IN  
CC  
PD  
CC  
FACT DATA  
5-6  
MC74AC273 MC74ACT273  
OUTLINE DIMENSIONS  
N SUFFIX  
PLASTIC DIP PACKAGE  
CASE 738–03  
ISSUE E  
–A–  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
20  
1
11  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEAD WHEN  
FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE MOLD  
FLASH.  
B
10  
L
C
INCHES  
MILLIMETERS  
DIM  
A
B
C
D
MIN  
MAX  
1.070  
0.260  
0.180  
0.022  
MIN  
25.66  
6.10  
3.81  
0.39  
MAX  
27.17  
6.60  
4.57  
0.55  
1.010  
0.240  
0.150  
0.015  
–T–  
SEATING  
PLANE  
K
E
0.050 BSC  
1.27 BSC  
M
0.050  
0.070  
1.27  
1.77  
F
G
J
K
L
N
E
0.100 BSC  
2.54 BSC  
0.008  
0.110  
0.015  
0.140  
0.21  
2.80  
0.38  
3.55  
G
F
J 20 PL  
0.300 BSC  
7.62 BSC  
D 20 PL  
0.25 (0.010)  
M
M
0.25 (0.010)  
T B  
M
N
0
15  
0
15  
0.020  
0.040  
0.51  
1.01  
M
M
T
A
DW SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751D–04  
ISSUE E  
NOTES:  
–A–  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
20  
11  
4. MAXIMUM MOLD PROTRUSION 0.150  
(0.006) PER SIDE.  
10X P  
–B–  
5. DIMENSION D DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.13  
(0.005) TOTAL IN EXCESS OF D  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
M
M
0.010 (0.25)  
B
1
10  
J
MILLIMETERS  
INCHES  
20X D  
DIM  
A
B
C
D
F
G
J
K
M
P
MIN  
12.65  
7.40  
2.35  
0.35  
0.50  
MAX  
12.95  
7.60  
2.65  
0.49  
0.90  
MIN  
MAX  
0.510  
0.299  
0.104  
0.019  
0.035  
0.499  
0.292  
0.093  
0.014  
0.020  
M
S
S
0.010 (0.25)  
T
A
B
F
R X 45  
1.27 BSC  
0.050 BSC  
0.25  
0.10  
0
10.05  
0.25  
0.32  
0.25  
7
10.55  
0.75  
0.010  
0.004  
0
0.395  
0.010  
0.012  
0.009  
7
0.415  
0.029  
C
SEATING  
PLANE  
–T–  
R
M
18X G  
K
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INTERNET: http://Design–NET.com  
HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,  
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298  
MC74AC273/D  

相关型号:

MC74ACT273DWCR2

ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, PLASTIC, SOIC-20
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MC74ACT273DWG

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MC74ACT273DWR2

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MC74ACT273DWR2G

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MC74ACT273M

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MC74ACT273MEL

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MC74ACT273MELG

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MC74ACT273MELG

ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, LEAD FREE, EIAJ, SO-20
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MC74ACT273MG

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MC74ACT273MG

ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, LEAD FREE, EIAJ, SO-20
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MC74ACT273ML1

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