MP3312GC [MPS]
2.7V-5.5V Input , 38V OVP, Dual-Channel White LED Driver;
| 型号： | MP3312GC |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | 2.7V-5.5V Input , 38V OVP, Dual-Channel White LED Driver 驱动 接口集成电路 |
| 文件： | 总15页 (文件大小：416K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP3312
2.7V-5.5V Input , 38V OVP,
Dual-Channel White LED Driver
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP3312 is a dual-channel step-up WLED
driver with integrated 40V MOSFET, and
supports 2.7V to 5.5V power supply input. It uses
peak current mode to regulate the LED current
which is set by external resistor.
•
•
•
•
•
•
•
•
•
•
•
•
2.7V~5.5V Input Voltage
1.2MHz Switching Frequency
Dual Channels Support up to 30mA/String
1% Current Matching Between LED Channels
+/-2% Current Accuracy
38V OVP Protection
The MP3312 employs 1.2MHz fixed switching
frequency. It features supporting both PWM input
analog dimming and digital analog dimming to
accurately regulate the dimming current.
PWM Input Analog Dimming Mode
5kHz to100kHz PWM Input Analog Dimming
1-Wire Interface for Digital Dimming
9-bit Dimming Resolution
Internal Soft Start to Reduce Inrush Current
Available in WLCSP1.35x1.35-9 Package
The MP3312 integrates current source to
balance LED current, which leads good ILED
matching and accuracy performance.
APPLICATIONS
In addition, the MP3312 has LED open and short
protection, cycle by cycle current limit protection,
and thermal shutdown protection. It is available in
tiny WLCSP1.35x1.35-9 package.
•
•
•
•
Feature Phone and Smart Phones
Tablets
GPS Receivers
<10 inch LCD video displays with one-cell Li-
ion battery
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For
MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
95
90
85
80
75
70
65
60
2.5
3
3.5
4
4.5
5
5.5
6
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
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© 2015 MPS. All Rights Reserved.
1
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP3312GC
WLCSP1.35x1.35-9
BU
* For Tape & Reel, add suffix –Z (e.g. MP3312GC–Z);
PACKAGE REFERENCE
Package Diagram
WLCSP1.35x1.35-9
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
WLCSP1.35x1.35-9…..……………120…..12..°C/W
θJA θJC
VIN.................................................. -0.3V to +6V
VSW…………………………………....-1V to +40V
Notes:
VLED1, VLED2 ………………………...-0.3V to +40V
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
All Other Pins................................ –0.3V to +6V
Junction Temperature..............................150°C
Lead Temperature ...................................260°C
(2)
Continuous Power Dissipation (TA = 25°C)
WLCSP1.35x1.35-9.................................1.04W
Recommended Operating Conditions (3)
Supply Voltage VIN ......................... 2.7V to 5.5V
Operating Junction Temp.........-40°C to +125°C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
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© 2015 MPS. All Rights Reserved.
2
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
ELECTRICAL CHARACTERISTICS
VIN =3.7V, VEN = VPWM= HIGH, Typical Values are at TA = 25°C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Unit
Power Supply
Operating Input Voltage
VIN
2.7
5.5
2
V
VIN=3.7V, VEN= VPWM= High,
no load with switching
Supply Current (Quiescent)
IQ
1
mA
Supply Current (Shutdown)
Input UVLO Threshold
Input UVLO Hysteresis
OSCILLATOR
IST
VEN=0V, VIN=3.7V
1
μA
V
VIN_UVLO Rising Edge
2.4
2.6
200
mV
Switching Frequency
Maximum Duty Cycle
Minimum On Time(5)
Power Switch
fSW
1
1.2
95
1.4
MHz
%
DMAX
93
TON_MIN
100
ns
RDSON_M
Main Switch On-Resistance
Error Amplifier
VIN=3.7V
0.2
Ω
Error Amplifier Transconductance
Max Sink/Source Current
Current Regulation
VLEDx Regulation Voltage
ISET Pin Voltage
gm
370
42
uS
μA
VREG
VISET
ILED1=ILED2=20mA
240
1.232
1020
mV
V
1.207
-2
1.247
Current Multiplier
KISET
IISET =20uA,
(|IMIN-IISET|/IISET,|IMAX-IISET|/
Current Accuracy
Current Matching
2
2
%
IISET
)
IISET =20uA,
(IMAX –IMIN) /IAVG
1
%
Current Sink Max Output Current
EN & PWM Logic
30
1.2
1.2
mA
PWM Input High Threshold
PWM Input Low Threshold
EN High Voltage
VPWM_HI
VPWM Falling
V
V
VPWM_LO VPWM Rising
VEN_HIGH VEN Rising
0.4
0.4
V
EN Low Voltage
VEN_LOW
RPD
VEN Falling
V
EN & PWM Pull Down Resistor
800
200
kΩ
EN Low Logic
TSD_EN
EN High to Low
2.5
20
ms
To Shutdown Time
PWM Low Logic
To Shutdown Time
TSD_PWM PWM High to Low
TPO_MIN
ms
ns
Minimum PWM On Time
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
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© 2015 MPS. All Rights Reserved.
3
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
ELECTRICAL CHARACTERISTICS (continued)
VIN =3.7V, VEN = VPWM= HIGH, Typical Values are at TA = 25°C, unless otherwise noted.
Parameters
Symbol
Condition
Min
Typ
Max
Unit
Protection
OVP Voltage
VOVP
ILIM
ILIM_START
TLIM_HALF
37
38
1.8
1
39.5
V
A
Cycle-Cycle Current Limit
Startup Current Limits(5)
Time Step for Half Current Limit(5)
LEDx Threshold when No Switching
LEDx Over Voltage Threshold
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
1-Wire Interface
Max Duty Cycle
Max Duty Cycle
1.2
A
6
ms
mV
V
560
5
VOVP_LED
TST
4.5
5.5
150
25
°C
°C
1-Wire Detection Delay Time
1-Wire Detection Time
tDELAY
tDETECTION
tWIN
100
260
1
μs
μs
ms
μs
μs
μs
1-Wire Detection Window
Start Time of Program Stream
End Time of Program Stream
High Time of Logic 0 Bit
tSTART
tEOS
2
2
360
180
tH_LB
5
Low Time of Logic 0 Bit
tL_LB
3* tH_LB
360
μs
High Time of Logic 1 Bit
Low Time of Logic 1 Bit
tH_HB
tL_HB
tACKval
tACK
3* tL_HB
360
180
2
μs
μs
μs
μs
5
Acknowledge Valid Time
Duration of Acknowledge Signal
512
Open
RPULLUP= 15 kΩ
drain,
Acknowledge Output Voltage Low(6)
VACKL
0.4
V
to VIN
Notes:
5) guarantee by design and characterization
6) ACK signal is active 0 (when ACK signal is true , data line is pulled down by chip),and this signal only reply when RFA bit is set to 1.If you
want use ACK signal, the master should have an open-drain output, and data line should be pulled high by master with a resistor load.
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
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© 2015 MPS. All Rights Reserved.
4
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.7V, 6*LEDs/string, ILED1=ILED2=20mA, L = 4.7µH, TA = 25°C, unless otherwise noted.
5
4
3
2
1
45
40
35
30
25
45
40
35
30
25
20
15
10
5
0
20
15
-1
-2
-3
10
5
0
-4
-5
0 0
20
40
60
80
100
0
20
40
60
80 100
2.5
3
3.5
4
4.5
5
5.5
6
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
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© 2015 MPS. All Rights Reserved.
5
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3.7V, 6*LEDs/string, ILED1=ILED2=20mA, L = 4.7µH, TA = 25°C, unless otherwise noted.
V
V
V
SW
SW
SW
10V/div.
10V/div.
10V/div.
V
IN
V
OUT
2V/div.
10V/div.
V
IN
2V/div.
I
I
L
L
I
L
200mA/div.
200mA/div.
200mA/div.
I
I
I
LED
50mA/div.
LED
50mA/div.
LED
50mA/div.
V
V
V
SW
SW
SW
10V/div.
10V/div.
10V/div.
V
PWM
V
V
EN
EN
5V/div.
5V/div.
5V/div.
V
I
I
OUT
L
L
20V/div.
200mA/div.
200mA/div.
I
I
I
LED
LED
LED
50mA/div.
50mA/div.
20mA/div.
V
SW
V
SW
20V/div.
V
SW
10V/div.
20V/div.
V
LED1
20V/div.
V
COMP
1V/div.
V
OUT
I
L
V
EN/1-WIRE
2V/div.
20V/div.
200mA/div.
I
L
200mA/div.
I
LED
I
I
LED
LED
50mA/div.
20mA/div.
20mA/div.
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
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© 2015 MPS. All Rights Reserved.
6
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
PIN FUNCTIONS
Pin #
Name
Description
Full scale LED current set pin. Connecting a resistor between this pin and GND sets the
full scale current.
A1
ISET
A2
A3
LED2
LED1
LED2 current sink pin.
LED1 current sink pin.
PWM signal input pin. 5kHz to 100kHz PWM Signal is recommended to this pin to do the
analog current dimming. Low logic for >20ms shuts down the IC.
B1
PWM
B2
B3
C1
COMP
GND
EN
Internal error amplifier output pin. Connect a capacitor to compensate the system.
GND pin.
Enable and 1wire input pin. High logic enables the IC and low logic >2.5ms shuts down the
IC.
C2
C3
VIN
SW
Power supply input pin. Connect a ceramic capacitor nearby this pin to bypass the IC.
Drain connection of the internal N-CH power MOSFET.
MP3312 Rev. 1.02
1/13/2015
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MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
FUNCTIONAL BLOCK DIAGRAM
L1
D1
VOUT
VIN
C1
C2
SW
VIN
OVP
Shutdown
OSC
PWM
Control
EN
EN
Detection
RAMP
PWM
Analog
Dimming
PWM
Comparator
VREF
EA
LED1
COMP
GND
Feedback
Control
Current Control
LED2
ISET
R2
C3
Min.
Max.
Short
Protection
EN
R1
Figure 1— Functional Block Diagram
MP3312 Rev. 1.02
1/13/2015
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MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
OPERATION
The MP3312 employs the fixed switching
frequency, peak current mode control
architecture and 2 regulated current sinks to
power the LED array. The operation of the
MP3312 can be understood by referring to the
below function block diagram.
power delivered to the output. This forms a
closed loop that regulates the output voltage.
Dimming Control
MP3312 supports analog dimming and 1-wire
digital set dimming mode to regulate the WLED
current.
System Startup
To do analog dimming, apply a PWM signal to
PWM pin by adjusting the LED current
amplitude. The internal filter is integrated and
the PWM signal with 5k~100kHz range is
supported. Internal dimming signal duty
detection circuit automatically changes the
internal reference lineally to regulate the current.
Either pulling EN or PWM to high enables the
IC operation while pulling EN to GND
for >2.5ms or pulling PWM to GND for >20ms
shuts down the IC.
When enabled, the MP3312 checks the
topology connection first. The MP3312 also
checks other safety limits, including UVLO and
over-temperature protection (OTP). If all the
protections pass, the chip then starts boosting
the step-up converter with an internal soft-start.
In addition, the EN pin supports 1-wire interface
to do current dimming control. The 1-wire
description and protocol details are as follow.
1-wire Interface
It is recommended that the enable signal occurs
after the establishment of the input voltage and
PWM dimming signal during the start-up
sequence to avoid large inrush current.
1-wire interface is based on master-slave
structure which is designed for digital dimming.
The EN pin is multipurpose as single port to
receive LED brightness data. The rate to detect
the bit can automatically range from
1.39kBit/sec to 50kBit/sec.
Switching Operation
At the start of each oscillator cycle the main low
side FET (M1) is turned on through the control
circuitry. To prevent sub-harmonic oscillation at
duty cycle greater than 50 percent, a stabilizing
ramp is added to the output of the current
sense amplifier and the result is fed into the
positive input of the PWM generation
comparator. When this voltage equals the
output voltage of the error amplifier the main
power FET is turned off. Then the inductor
current flows through the free-wheeling diode,
which forces the inductor current to decrease.
The output voltage of the internal error amplifier
is an amplified signal of the difference between
the reference voltage and the feedback voltage.
The converter automatically chooses the lowest
active LEDX pin voltage to provide a high-
enough bus voltage to power all the LED arrays.
The command sent to chip (slave) contains 24
bits, 9-bit dimming data, 8-bit device address
and RFA bit are included. Chip detects the bit in
series and it transmits the LSB first and MSB
finally.
The control bits description is as below and
Figure 2 shows the command bytes structure in
detail.
•
D0-D8 are the dimming data bits which
achieve 9-bit dimming resolution
•
•
Bit9 and bit11-bit15 is reserved. Set to 0
RFA bit indicates master needs Request of
Acknowledge or not.
•
Device address byte is DA0-DA7. The
device address byte is set to 0x8F.
If the feedback voltage drops below the
reference, the output of the error amplifier
increases. It results in more current flowing
through the MOSFET, thus increasing the
MP3312 Rev. 1.02
1/13/2015
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9
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
Figure 2—1-wire command structure
1-wire interface defines logic 0 and logic 1 by
The EN pin needs to distinguish EN signal and
digital dimming signal when set up boost driver.
Chip only receives 1-wire signal when EN pin
signal matches 1-wire protocol during 1ms 1-
wire detection window. 1-wire dimming
sequence is described as below, and shown in
Figure 4.
comparing the time of the signal low level and
high level, 1 cycle means 1 logic bit. The bit
detection starts with a falling edge on the EN
pin and ends with the next falling edge. Shown
as Figure 3
Low logic (logic 0): tLOW≥3* tHIGH
High logic (logic 1): tHIGH≥3* tLOW
1. Pulling VIN and PWM to high.
2. Pulling data line from low to high for tDELAY (1-
wire detection delay time, 100us) and this
rising edge is the start of 1-wire detection
window.
3. After 1-wire detection delay time, pulling data
line to low for more than tDETECTION (1-wire
detection time, 260us). Then pulling data
line to high.
4. The sum of 1-wire detection delay time and
1-wire detection time should be less than tWIN
(The time of 1-wire detection window,1ms).
.
Figure 3—1-Wire Bit Definition
Figure 4—1-Wire Dimming Sequence
MP3312 Rev. 1.02
1/13/2015
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MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
In addition, before chip starts to receive each
The ACK signal feedback to master or not is
dependent on RFA bit. If ACK is needed, the
master should have an open-drain output, and
data line should be pulled high by master with a
resistor load.
command with first falling edge, data line should
keep high level for tSTART (min. 2us) time. The
transmission of each command is completed with
low level for tEOS (min. 2us).Shown in Figure 5.
Figure 5— Data-line Timing when RFA=0
Figure 6—Data-line Timing when RFA=1
If RFA=0, No ACK signal feedback. After all 24
received 1-wire data successfully. Then the data
line is pulled to static high. Shown as Figure 6.
bits data is transferred, data line keeps low for
tEOS (min. 2us) delay, and then it is pulled to static
high. Shown as Figure 5.
MP3312 has a 9-bit DAC for digital dimming
control and the dimming resolution is 1/511. The
default code value of D0 (LSB)-D8(MSB) is
“111111111” when the device is first enabled.
The LED current is dependent on the internal
register value D0-D8 according to below formula:
If RFA=1, ACK signal feedback to master. After
all 24 bits data is transferred, the data line keeps
low for tACKval (max. 2us) time ,then data line
should be released to output high impedance and
master is ready to detect the ACK signal from
slave . After tACKval, if ACK “false” (1-wire data is
not received successfully), the data line will be
pulled to high directly. After tACKval, if ACK “ture”
(1-wire data is received successfully), data line
will be continuously pulled to low VACKL (max.
0.4V) by slave for tACK (max. 512us) time. The
master reads this low logic, it means chip
code
ILED = ILEDfull ×
511
ILEDfull is the full scale output current set by RISET
to ISET pin. Code is the DEC value of resolution
bit (D0-D8).
MP3312 Rev. 1.02
1/13/2015
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© 2015 MPS. All Rights Reserved.
11
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
Short String Protection
Cycle-by-Cycle Current Limit Protection
The MP3312 monitors the LEDX pin voltage to
judge if the short string occurs. If one string is
short, the respective LEDX pin will be pulled up
to the boost output and tolerate high voltage
stress. If the LEDX pin voltage is higher than 5 V
and LED current is larger than 8% full-scale
setting current, the short string condition is
detected and if such condition lasts longer than
8ms, the fault string current source is disabled till
VIN and EN is reset for enable again.
MP3312 provides cycle-by-cycle current limit
protection to avoid any damage due to too large
current rating. During startup, the current limit is
clamped to 1A for around 6ms to avoid output
overshoot and inrush current. After that, the
current limit returns back to normal 1.8A.
Open String Protection
Open string protection is achieved by detecting
the VOUT pin. If the LED string is open, the
feedback voltage is lower than the reference
voltage, thus the COMP rises up and keeps
charge the output capacitor until VOUT pin hits
the protection point VOVP. Then the IC stops
switching and shuts down till VIN and EN is reset
for enable again.
Thermal Shutdown Protection
To prevent the IC operate at exceedingly high
temperature, thermal shutdown is implemented in
this chip by detecting the silicon die temperature.
When the die temperature exceeds the upper
threshold 150℃, the IC shutdowns and recovers
to normal operation when die temperature drops
below lower threshold. Typically, the hysteresis
value is 25°C.
Unused LED Channel
In some cases, if one LED current channel is not
used, connect the corresponding LEDx to GND
to remove it from the control loop.
MP3312 Rev. 1.02
1/13/2015
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MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
APPLICATION INFORMATION
mode control. In order to avoid hitting the current
limit, the worst-case inductor peak current should
be less than 80% of the current-limit ILIM.
Generally, a 4.7uH~10uH inductor is ok to cover
most of the applications. Note that the system
efficiency is dependent on the DC resistance of
inductor, and larger DC resistance causes larger
power loss.
Setting the LED Current
The full scale LED current can be set through the
current setting resistor on the FB pin.
V
ISET(V)
ILED(mA) =
*1020
RISET(kΩ)
For VISET=1.232V, RISET=63.4kꢀ, the LED current
is set to 20mA. Please do not leave ISET pin
open.
Selecting the Output Capacitor
The output capacitor keeps the output voltage
ripple small and ensures feedback loop stability.
The output capacitor impedance must be low at
the switching frequency. Ceramic capacitors with
X7R dielectrics are recommended for their low
ESR characteristics. Care must be taken that
ceramic capacitance is also dependent on the
voltage rating; DC bias voltage and the value can
loss as much as 50% of its capacitance at its
rated voltage rating. Please leave enough
voltage rating margin when select the component.
In addition, too low capacitance will cause the
Selecting the Input Capacitor
The input capacitor reduces the surge current
drawn from the input supply and the switching
noise from the device. The input capacitor
impedance at the switching frequency should be
much less than the input source impedance to
prevent the high-frequency switching current
from passing through to the input. Use ceramic
capacitors with X5R or X7R dielectrics for their
low ESR and small temperature coefficients. For
most applications,
capacitor is ok.
a
1uF~4.7μF ceramic
loop instability. For most applications,
1μF~4.7μF ceramic capacitor is ok.
a
Selecting the Inductor
Selecting the External Schottky Diode
The MP3312 requires an inductor to supply a
higher output voltage while being driven by the
input voltage. A larger value inductor results in
less ripple current, resulting in lower peak
inductor current and reducing stress on the
internal N-channel MOSFET. However, the larger
value inductor has a larger physical size, higher
series resistance, and lower saturation current.
To optimize the efficiency, a high-speed and low
reverse recovery current schottky diode is
recommended. Make sure the diode’s average
and peak current rating exceeds the output
average LED current and the peak inductor
current. In addition, the diode’s break-down
voltage rating should be large than the maximum
voltage across the diode. Usually, unexpected
high frequency spike voltage can be seen across
the diode when the diode turns off. So, leaving
some voltage rating margin is always needed to
guarantee normal long term operation when
selecting a diode.
Choose an inductor that does not saturate under
the worst-case load conditions. Select the
minimum inductor value to ensure that the boost
converter works in continuous conduction mode
with high efficiency and good EMI performance.
Calculate the required inductance value using the
equation:
Layout Considerations
Careful attention must be paid to the PCB board
layout and components placement. Proper layout
of the high frequency switching path is critical to
prevent noise and electromagnetic interference
problems. The loop of MP3312’s internal low side
MOSFET, schottky diode, and output capacitor is
flowing with high frequency ripple current, it must
η× VOUT × D×(1− D)2
L ≥
2× fSW × ILOAD
V
IN
D = 1−
VOUT
Where VIN and VOUT are the input and output
voltages, fSW is the switching frequency, ILOAD is
the total LED load current, and η is the efficiency.
The switching current is used for the peak current
be minimized. So the input and output capacitor
should be placed to IC as close as possible.
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
13
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
TYPICAL APPLICATION CIRCUITS
Figure 7— Typical Application for dual string 6LEDs, 20mA/string
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
14
MP3312 － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER
PACKAGE INFORMATION
WLCSP1.35X1.35-9
PIN 1 ID
PIN 1 ID
MARKING
PIN 1 ID INDEX
AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
NOTE:
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP3312 Rev. 1.02
1/13/2015
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
15
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