MP38876DN-LF [MPS]
Switching Regulator, Current-mode, 18A, 600kHz Switching Freq-Max, 3 X 4 MM, ROHS COMPLIANT, MO-220VGED, QFN-20;
| 型号： | MP38876DN-LF |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Switching Regulator, Current-mode, 18A, 600kHz Switching Freq-Max, 3 X 4 MM, ROHS COMPLIANT, MO-220VGED, QFN-20 开关 输出元件 |
| 文件： | 总8页 (文件大小：223K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP38876
10A, 28V, High Frequency Step-Down
Converter with Synchronous Gate Driver
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP38876 is a monolithic step-down switch
mode converter with a built in internal power
MOSFET. It achieves 10A continuous output
current over a wide input supply range with
excellent load and line regulation.
•
•
•
•
Wide 4.5V to 28V Operating Input Range
10A Output Current
18mΩ Internal Power MOSFET Switch
Synchronous Gate Driver Delivers up to
95% Efficiency
•
•
Synch from 300HKz to > 1MHz External Clock
Synch Output to Drive Another Regulator in
Phase-Shift Operation
Default 600KHz / 1.2MHz Switching Frequency
Feedback Voltage Accuracy: 1.5%
Programmable Soft-Start
Current mode operation provides fast transient
response and eases loop stabilization.
Fault condition protection includes cycle-by-cycle
current limiting and thermal shutdown.
•
•
•
•
•
•
•
•
•
The MP38876 requires a minimum number of
readily available standard external components
and is available in a 20-pin 3mm x 4mm QFN
package.
Startup Tracking
EN and Power Good for Power Sequencing
Cycle-by-Cycle Over Current Protection
Thermal Shutdown
Output Adjustable from 0.8V to 15V
Stable with Low ESR Output Ceramic
Capacitors
The MP38876 is ideal for a wide range of
applications including distributed power systems,
pre-regulator for linear regulators, compact DC-
DC regulators for PCB space limited platforms.
•
Available in a 3mm x 4mm QFN Package
APPLICATIONS
•
•
•
Distributed Power Systems
Pre-Regulator for Linear Regulators
Compact DC-DC Regulator for PCB Space
Limited Platforms
“MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
V3P3
System
PG
V
IN
BST
IN
V
OUT
2.5V @ 10A
SW
BG
COMP
VCC
MP38876
SS/TRK
FB
EN
OFF ON
SYNCIN
SYNCOUT
GND
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
1
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
PACKAGE REFERENCE
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage VIN....................................... 30V
VSW....................................... –0.3V to VIN + 0.3V
VBS ....................................................... VSW + 6V
All Other Pins.................................–0.3V to +6V
Junction Temperature...............................150°C
Lead Temperature....................................260°C
Storage Temperature ..............–65°C to +150°C
Recommended Operating Conditions (2)
Supply Voltage VIN........................... 4.5V to 28V
Output Voltage VOUT ................... 0.8V to VIN -7V
Operating Temperature .............–40°C to +85°C
TOP VIEW
PIN 1 ID
GNDGATE VIN
20
19
18
17
VCC
1
2
3
4
5
6
7
16
SYNCOUT
SYNCIN
EN
15
VIN
14 SW
13
SS/TRK
FB
12
11
COMP
Thermal Resistance (3)
θJA
θJC
8
9
10
QFN (3mm x 4mm).................48...... 11... °C/W
PG BST VIN
Notes:
Part Number*
Package
Temperature
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3mm x 4mm
QFN
MP38876DN
–40°C to +85°C
3) Measured on approximately 1” square of 1 oz copper.
For Tape & Reel, add suffix –Z (eg. MP38876DN–Z)
For RoHS compliant packaging, add suffix –LF
(eg. MP38876DN–LF–Z)
*
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
V
Feedback Voltage
VFB
IFB
0.798 0.810 0.822
4.5V ≤ VIN ≤ 28V
Feedback Current
Switch On Resistance (4)
VFB = 0.8V
10
18
nA
mΩ
μA
A
RDS(ON)
Switch Leakage
Current Limit (4)
VEN = 0V, VSW = 0V
0
10
18
12
15
Oscillator Frequency
fSW
VFB = 0.6V, SYNCIN = 5V
VFB = 0V
600
150
90
KHz
KHz
%
Fold-back Frequency
Maximum Duty Cycle
VFB = 0.6V
Minimum On Time
tON
ISS
VFB = 1V
100
2.2
ns
Soft-Start Charging Current
COMP Threshold for Switching
Maximum COMP Level
Gain of Error Amplifier
Error Amplifier Sink Current
Error Amplifier Source Current
Gain of Internal Current Sense
Slope Compensation
VSS = 0V
μA
V
VCOMP_LOW
TBD
TBD
2.4
VCOMP_MAX VFB = 0.6V
V
GEA
VCOMP = 1.5V
VCOMP = 1.5V
VCOMP = 1.5V
mA/V
μA
μA
A/V
V
–200
+200
TBD
TBD
90
GCS
VSLOPE
Power Good Ramp Up Threshold
Power Good Ramp Down Threshold
%
85
%
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
2
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
μs
V
Power Good Delay
20
Power Good Sink Current Capability
Power Good Leakage Current
VCC Tolerance
VPG
Sink 4mA
0.4
10
IPG_LEAK VPG = 3.3V
nA
V
VCC
ICC = 0mA
4.5
0.3
1.2
5
5
5.5
VCC Regulation
ICC = 0~20mA
%
Sync Frequency
FSYNC
TBD
0.4
MHz
nA
V
SYNCIN Bias Current
SYNCIN Logic High Voltage
SYNCIN Logic Low Voltage
ISYNCIN
10
V
V
5mA
CC = 5V, Source
SYNCHOUT High Level
4.6
V
SYNCHOUT Low Level
VCC = 5V, Sink 5mA
0.4
4.0
880
V
V
Under Voltage Lockout Threshold Rising
Under Voltage Lockout Threshold Hysteresis
EN Input Low Voltage
3.75
1.2
4.25
0.4
mV
V
En Input High Voltage
V
VEN = 2V
2
0
0
EN Input Current
μA
VEN = 0V
Supply Current (Shutdown)
Supply Current (Quiescent)
Thermal Shutdown
VEN = 0V
μA
mA
°C
Ω
VEN = 2V, VFB = 1V
1.2
150
1
Gate Driver Sink Impedance
Gate Driver Source Impedance
Gate Drive Current Sense Trip Threshold
RSINK
RSOURCE
4
Ω
20
mV
From BG low to SW
high
Td1
Td2
10
10
ns
ns
Gate Drive Non-Overlap Time
(see Figure 1)
From SW low to BG
high
Note:
4) Guaranteed by design.
1V
1V
VBG
1V
1V
VSW
T
d1
T
d2
Figure 1—Gate Drive Non-Overlap Time Diagram
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
3
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
PIN FUNCTIONS
Pin #
Name
Description
1
VCC
BG Driver Bias Supply. Decouple with a 1µF ceramic capacitor.
Timing output to drive another MP38876 (or similar device) SYNCIN for phase-shift
operation.
2
3
SYNCOUT
External Frequency Synchronization / Frequency Select Input. Connect to VCC for
600KHz or connect to ground for 1.2MHz.
SYNCIN
EN
4
5
On/Off Control.
SS/TRK Soft-Start/Track Input. Connect a capacitor to ground.
Feedback. An external resistor divider from the output to GND, tapped to the FB pin,
sets the output voltage. To prevent current limit run away during a short circuit fault
condition the frequency foldback comparator lowers the oscillator frequency when the
FB voltage is below 400mV.
6
7
8
FB
COMP
PG
Compensation. Connect R/C network to ground.
Power Good Indicator. The output of this pin is an open drain if the output voltage is
within 10% of the nominal voltage, otherwise it is LOW. Optional: If PG is initially at
open drain, there is a 20µs delay to pull PG if the output voltage is less than 10%
regulation window.
Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply
voltage. It is connected between SW and BS pins to form a floating supply across the
power switch driver.
9
BST
VIN
10, 18,
Exposed Pad
Supply Voltage. The MP38876 operates from a +4.5V to +28V unregulated input. C1
is needed to prevent large voltage spikes from appearing at the input.
11-17
19
SW
GATE
GND
Switch Output. These pins are fused together.
Gate Driver Output. Connect this pin to the synchronous MOSFET.
Ground.
20
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
4
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
OPERATION
The MP38876 is a current mode buck regulator.
That is, the EA output voltage is proportional to
the peak inductor current.
If the sum of the Current Sense Amplifier and
the Slope Compensation signal does not
exceed the COMP voltage, then the falling edge
of the CLK resets the Flip-Flop.
At the beginning of a cycle, SW is off. The EA
output voltage is higher than the current sense
amplifier output, and the current comparator’s
output is low. The rising edge of the 600KHz
CLK signal sets the RS Flip-Flop. Its output
turns on SW thus connecting the SW pin and
inductor to the input supply.
The output of the Error Amplifier integrates the
voltage difference between the feedback and
the 0.8V bandgap reference. The polarity is
such that a FB pin voltage lower than 0.8V
increases the EA output voltage. Since the EA
output voltage is proportional to the peak
inductor current, an increase in its voltage
increases current delivered to the output.
The increasing inductor current is sensed and
amplified by the Current Sense Amplifier. Ramp
compensation is summed to Current Sense
Amplifier output and compared to the Error
Amplifier output by the Current Comparator.
When the sum of the Current Sense Amplifier
and the Slope Compensation signal exceeds
the EA output voltage, the RS Flip-Flop is reset
and the MP38876 reverts to its initial SW off
state.
An external synchronous MOSFET supplies the
inductor current when the switch is off.
SYNCIN
SYNCOUT
IN
CURRENT SENSE
D
AMPLIFIER
- -
+
V
CC
REGULATOR
BST
REGULATOR
EN
OSCILLATOR
600KHz / 1.2MHz
Q
Q
DRIVER
S
+
--
R
R
SW
CURRENT
LIMIT
V
ISS
CC
COMPARATOR
VCC
BG
SS/TRK
FB
REFERENCE
V
BC
DRIVER
V
FB
+
+
--
--
PWM
GND
PG
ERROR
AMPLIFIER
COMPARATOR
V
V
FB
Power
Good
BG
COMP
Figure 2—Functional Block Diagram
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
5
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
APPLICATION INFORMATION
Setting the Output Voltage
Synchronous MOSFET
The external resistor divider is used to set the
output voltage (see the Typical Application
Circuit on the front page). The feedback resistor
R1 also sets the feedback loop bandwidth with
the internal compensation capacitor (see Figure
1). Choose R1 to be around 40.2kꢀ for optimal
transient response. R2 is then given by:
The external synchronous MOSFET is used to
supply current to the inductor when the internal
high-side switch is off. It reduces the power loss
significantly when compared against a Schottky
rectifier.
Table 2 lists example synchronous MOSFETs
and manufacturers.
R1
R2 =
Table 2—Diode Selection Guide
VOUT
− 1
Manufacture
Siliconix
IR
Part No.
TBD
0.8V
Table 1—Resistor Selection for Common
Output Voltages
TBD
Selecting the Input Capacitor
VOUT (V)
1.8
R1 (kΩ)
40.2 (1%)
40.2 (1%)
40.2 (1%)
40.2 (1%)
R2 (kΩ)
32.4 (1%)
19.1 (1%)
13 (1%)
The input capacitor reduces the surge current
drawn from the input and also the switching
noise from the device. The input capacitor
impedance at the switching frequency should
be less than the input source impedance to
prevent high frequency switching current from
pass to the input. Ceramic capacitors with X5R
or X7R dielectrics are highly recommended
because of their low ESR and small
temperature coefficients. For most applications,
a 10µF capacitor is sufficient.
2.5
3.3
5
7.68 (1%)
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
of at least 25% percent higher than the
maximum load current is recommended for
most applications. For highest efficiency, the
inductor DC resistance should be less than
7mꢀ. For most designs, the inductance value
can be derived from the following equation.
Selecting the Output Capacitor
The output capacitor keeps output voltage small
and ensures regulation loop stability. The
output capacitor impedance should be low at
the switching frequency. Ceramic capacitors
with X5R or X7R dielectrics are recommended.
VOUT × (VIN − VOUT
VIN × ΔIL × fOSC
)
L =
Where ΔIL is the inductor ripple current.
PC Board Layout
The high current paths (GND, IN and SW)
should be placed very to the device with short,
direct and wide traces. The input capacitor
needs to be as close as possible to the IN and
GND pins. The external feedback resistors
should be placed next to the FB pin. Keep the
switching node SW short and away from the
feedback network.
Choose inductor current to be approximately
30% if the maximum load current, 10A. The
maximum inductor peak current is:
ΔIL
IL(MAX) = ILOAD
+
2
Under light load conditions below 200mA, larger
inductance is recommended for improved
efficiency.
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
6
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
External Bootstrap Diode
It is recommended that an external bootstrap
diode be added when the system has a 5V
fixed input or the power supply generates a 5V
output. This helps improve the efficiency of the
regulator. The bootstrap diode can be a low
cost one such as IN4148 or BAT54.
5V
BS
10nF
MP38876
SW
Figure 3—External Bootstrap Diode
This diode is also recommended for high duty
VOUT
cycle operation (when
>65%) and high
VIN
output voltage (VOUT>12V) applications.
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
7
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
PACKAGE INFORMATION
QFN20 (3mm X 4mm)
0.65
0.85
0.65
0.85
PIN 1 ID
SEE DETAIL A
2.90
3.10
0.25
REF
18
20
PIN 1 ID
MARKING
17
1
0.50
BSC
0.50
BSC
3.90
4.10
3.00
BSC
2.40
2.60
PIN 1 ID
INDEX AREA
0.18
0.30
0.18
0.30
7
11
0.30
0.50
8
10
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
0.20x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
0.70
1.10
0.75 0.50 0.55
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) JEDEC REFERENCE IS MO-220, VARIATION VGED.
5) DRAWING IS NOT TO SCALE.
0.75
0.25
0.25
0.50
3.90
2.50
0.50
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
8
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