MP4033GS [MPS]
TRIAC Dimmable, Primary Side Control Offline LED Controller with Active PFC;
| 型号： | MP4033GS |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | TRIAC Dimmable, Primary Side Control Offline LED Controller with Active PFC 三端双向交流开关 功率因数校正 |
| 文件： | 总25页 (文件大小：1379K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP4033
TRIAC Dimmable, Primary Side Control
Offline LED Controller with Active PFC
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP4033 is a TRIAC-dimmable primary-
side–control, offline LED lighting controller with
active PFC. It is also available for applications
that requires analog dimming with PWM input. It
outputs an accurate LED current for an isolated
lighting application with a single-stage converter.
The proprietary real-current–control method
accurately controls the LED current using
primary-side information.
•
•
•
Primary-Side-Control without Requiring a
Secondary-Side Feedback Circuit
Adaptive Dimmer Type Detection and
Phase-Cut-Based Dimming Control
Good Dimmer Compatibility and Deep
Dimming Range
Analog Dimming with PWM Input
Fast Start-Up without Perceptible Delay
Programmable Current Fold-back to
Prolong the LED lifetime (NTC)
Color Temperature and Brightness Control
for Warm Sunset Dimming application
Accurate Line & Load Regulation
High Power Factor
•
•
•
The
MP4033
implements
power-factor
•
correction and works in boundary-conduction
mode to reduce MOSFET switching losses.
•
•
•
•
•
•
•
•
•
•
The adaptive dimmer type detection and phase-
cut-based dimming control achieves good
dimmer compatibility and deep dimming range.
Operates in Boundary Conduction Mode
Cycle-by-Cycle Current Limit
The MP4033 has an integrated charging circuit
at the supply pin for fast start-up without a
perceptible delay.
Winding Short Circuit Protection
Output Over-Voltage Protection
Output Short-Circuit Protection
ZCD Pin Short-Circuit Protection
Over-Temperature Protection
With the unique control of the driver pin DIM,
the MP4033 supports color temperature and
brightness control for warm sunset dimming
application
Available in SOIC-8/MSOP-10/SOIC-14
Package
The MP4033 has multiple protections that
greatly enhance system reliability and safety,
including output over-voltage protection, output
short-circuit protection, winding short circuit
protection, programmable thermal fold-back
(MSOP10/SOIC14), ZCD pin short circuit
protection, supply-pin under-voltage lockout,
and over-temperature protection.
APPLICATIONS
•
•
•
Solid-State Lighting up to 50W
Industrial and Commercial Lighting
Residential Lighting
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
All fault protections feature auto-restart.
The MP4033 is available in SOIC-8 / MSOP-10
/ SOIC-14 package.
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
1
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
TYPICAL APPLICATION
SOIC8
Dimmer
Vac
D
DAMP
MULT
VCC
S
COMP
GND
NTC
ZCD
DIM
Opto-coupler
Circuit
SOIC14 and MSOP10
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
2
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
ORDERING INFORMATION
Part Number
MP4033GS*
Package
SOIC-8
Top Marking
MP4033GK**
MP4033GSE***
MSOP-10
SOIC-14
See Below
* For Tape & Reel, add suffix –Z (e.g. MP4033GS–Z)
** For Tape & Reel, add suffix –Z (e.g. MP4033GK–Z)
*** For Tape & Reel, add suffix –Z (e.g. MP4033GSE–Z)
TOP MARKING (SOIC-8)
MP4033: first six digits of the part number;
LLLLLLLL: lot number;
MPS : MPS prefix:
Y: year code;
WW: week code:
TOP MARKING (MSOP-10)
Y: year code;
W: week code:
LLL: lot number;
M4033: first five digits of the part number;
TOP MARKING (SOIC-14)
MPS : MPS prefix:
YY: year code;
WW: week code:
MP4033: first six digits of the part number;
LLLLLLLLL: lot number;
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
3
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
NC
MULT
ZCD
1
2
3
4
14
13 COMP
NC
TOP VIEW
1
2
3
4
COMP
GND
NTC
S
MULT
ZCD
10
9
1
2
3
4
COMP
GND
S
MULT
ZCD
8
7
6
5
12
11
GND
NTC
S
VCC
8
VCC
VCC
DAMP
DIM
10
9
7
5
6
7
DAMP
DIM
DAMP
D
6
5
D
D
NC
8
NC
MSOP10
SOIC8
SOIC14
ABSOLUTE MAXIMUM RATINGS (1)
Input Voltage VCC....................... -0.3V to +30V
Low-Side MOSFET Drain to Source Voltage
................................................... -0.7V to +30V
Damp Pin Voltage .................... -0.3V to +16.5V
Other Analog Inputs and Outputs.. -0.3V to 6.5V
ZCD Pin Current ......................... -5mA to +5mA
Thermal Resistance (4)
SOIC8 ................................... 96...... 45... °C/W
MSOP10 .............................. 150..... 65... °C/W
SOIC14 ................................. 86...... 38...°C/W
θJA θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
Continuous Power Dissipation
(TJ = +25°C)(2)
SOIC8........................................................1.3W
SOIC14....................................................1.45W
MSOP10..................................................0.83W
Junction Temperature..............................150°C
Lead Temperature ...................................260°C
Storage Temperature...............-65°C to +150°C
Recommended Operating Conditions (3)
Supply Voltage VCC........................ 11V to 27V
Operating Junction Temp (TJ)..-40°C to +125°C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
4
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS
Typical values are VCC =20V, TJ = 25°C, unless otherwise noted.
Minimum and maximum values are at VCC =20V, TJ = -40°C to +125°C, unless otherwise noted,
guaranteed by characterization.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Supply Voltage
Operating Range
VCC
After turn on
11
27
V
V
VCC Upper Level: Internal
Charging Circuit Stops and IC
Turns On
VCCH
9.5
10
10.5
VCC Lower Level: Internal
Charging Circuit Triggers
VCCL
8.55
6.55
9
7
9.45
7.45
V
V
Vcc Re-charge and IC turns off
Level in Fault Condition
VCCEN
Fault condition
Supply Current
ID charge
VCC Charging Current from D
VD=16V, VCC=5V
13
25
1.25
800
340
1
40
1.8
1300
620
2
mA
mA
µA
Pull Down Current at
VCC_UVLO
IVCC_PULL _DOWN VCC=9V, Rising
0.95
IQ
IQ_FAULT
ICC
Quiescent Current
No switching, VCC=15V
Fault condition, IC latch,
VCC=15V
Quiescent Current at Fault
220
µA
fs =70kHz, VCC=15V
Operating Current
Multiplier
mA
VMULT
VCOMP from 1.9V to 4.9V
Linear Operation Range
0
3
V
V
COMP=2V, VMULT=0.5V
0.90
0.90
0.90
1.28
1.25
1.24
1.60
1.60
1.60
1/V
1/V
1/V
Gain
K(5)
VCOMP=2V, VMULT=1.5V
VCOMP=2V, VMULT=3V
TRIAC Dimming Phase Off
Detection Threshold
VMULT_OFF
VMULT_ON
DOFF_LEB
0.08
0.26
28%
0.10
0.28
30%
0.12
0.30
33%
V
V
TRIAC Dimming Phase On
Detection Threshold
TRIAC Dimming Off Line-Cycle
Blanking Ratio
VMULT DP ON TL
VMULT DP ON LD
VMULT DP OFF TL
VMULT DP OFF LD
Trailing edge dimmer
Leading edge dimmer
Trailing edge dimmer
Leading edge dimmer
0.43
0.22
0.26
0.32
0.45
0.25
0.28
0.35
0.47
0.28
0.30
0.38
V
V
V
V
Dimming Pull-Down Turn on
Threshold
Dimming Pull-Down Turn off
Threshold
Leading Edge Dimming
Detection Low Threshold
VMULT_LD_LOW
VMULT_LD_HIGH
0.08
0.26
0.10
0.28
0.12
0.30
V
V
Leading Edge Dimming
Detection High Threshold
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
5
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS (continued)
Typical values are VCC =20V, TJ = 25°C, unless otherwise noted.
Minimum and maximum values are at VCC =20V, TJ = -40°C to +125°C, unless otherwise noted,
guaranteed by characterization.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Rising, VMULT_PK≥0.58V
Falling, VMULT PK≥0.50V
0.43
0.45
0.47
V
Rising,
0.58V>VMULT_PK≥0.53V
Falling,
0.50V>VMULT PK≥0.45V
0.38
0.4
0.35
0.3
0.42
V
V
V
V
Rising,
0.53V>VMULT_PK≥0.48V
Falling,
Trailing Edge Dimming Detection
High Threshold
VMULT_TL_HIGH
0.45V> VMULT PK≥0.40V(6)
Rising,
0.48V>VMULT_PK≥0.43V
Falling,
0.40V>VMULT PK≥0.35V(6)
Rising,
0.43V>VMULT_PK≥0.38V
Falling,
0.25
0.35V>VMULT PK≥0.30V(6)
Trailing Edge Dimming Detection
High Threshold Hysteresis
VMULT_TL_H_HYS
VMULT_TL_LOW
tLEADING
80
mV
V
Trailing Edge Dimming Detection
Low Threshold
0.08
86
0.10
100
450
0.12
134
602
Leading Edge dimmer detection
Time threshold
Rising
Falling
µs
µs
Trailing Edge dimmer detection
Time threshold
tTRAILING
388
Error Amplifier
VREF
GEA
Reference Voltage
Transconductance
0.400 0.414
130
0.428
V
µA/V
V
Guaranteed by design
Leading edge dimmer
Trailing edge dimmer
No dimmer
VCOMPL_LD
VCOMPL_TL
VCOMPL_N
1.83
1.53
1.53
1.44
1.88
1.58
1.58
1.49
57
1.94
1.64
1.64
1.55
V
COMP Lower Clamp Voltage
V
VCOMPL_NTC≤1.0V NTC≤1.0V
V
ICOMP+
Max. Source Current
µA
Max. Sink Current without
Dimmer
ICOMP-
200
µA
ISINK_DIM_LD
ISINK_DIM_TL
Leading Edge Dimmer
Trailing Edge Dimmer
85.50
155
µA
µA
Sink Current at TRIAC
Dimming Off
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
6
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS (continued)
Typical values are VCC =20V, TJ = 25°C, unless otherwise noted.
Minimum and maximum values are at VCC =20V, TJ = -40°C to +125°C, unless otherwise noted,
guaranteed by characterization.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Current Sense Comparator
Leading-Edge-Blanking Time
tLEB
350
260
500
350
750
550
ns
ns
Over-Current-Protection
Leading-Edge-Blanking Time
tLEB_OCP
Over-Current-Protection
Threshold
VOCP
2.56
1.97
0.01
2. 70
2.07
2.86
2.17
0.09
V
V
V
Current Sense Upper Clamp
Voltage
VS CLAMP H
VS CLAMP L
Current Sense Lower Clamp
Voltage
0.035
Zero-Current Detector
VZCD T
Zero-Current–Detect Threshold
Zero-Current–Detect Hysteresis
Falling Edge
0.27
550
0.30
590
0.33
625
V
VZCD HYS
mV
ZCD Pin Short Circuit
Threshold
VZCD_SC
78
100
33
122
mV
ms
µs
ZCD Pin Short Circuit Blanking
time
tZCD_SC_LEB
Starts at Gate Turn Off
when VMULT O ≥0.25V
1.90
2.30
3.36
tZCD_LEB
Zero-Current–Detect LEB
Over-Voltage Threshold
OVP Detect LEB
Starts at Gate Turn Off
when VMULT 0 <0.25V
0.95
4.90
1.90
1.18
5.30
2.30
1.68
5.70
3.36
µs
V
VZCD OVP
Starts at Gate Turn Off
when VMULT O≥0.25V
µs
tOVP_LEB
Starts at Gate Turn Off
when VMULT O <0.25V
0.95
4
1.18
1.68
8
µs
Normal
5.3
10
µs
µs
tOFF_MIN
Minimum Off Time
NTC≤1.0V
Weak/Strong DP Mode detector
current (for leading edge
dimmer)
IDP_DET_LD
140
1.13
150
180
1.18
215
220
1.23
320
µA
V
Strong DP Mode Enable
Threshold (for leading edge VEN_DP_STR_LD
dimmer)
Weak/Strong
DP
Mode
Detection Time (for leading
edge dimmer)
tDP_DET_LD
µs
Starter
tSTART
Start Timer Period
100
130
165
µs
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
7
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS (continued)
Typical values are VCC =20V, TJ = 25°C, unless otherwise noted.
Minimum and maximum values are at VCC =20V, TJ = -40°C to +125°C, unless otherwise noted,
guaranteed by characterization.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Internal Main MOSFET
Breakdown Voltage
BVDSS MAIN
RDS(ON)_MAIN
VGS=0
30
V
ID=100mA, TJ=25 °C,
250
250
mΩ
Drain-Source On-Resistor
ID=100mA, TJ=25 °C,
VCC= VCCEN +50mV
mΩ
Internal OVP Pull Up MOSFET
Breakdown Voltage
BVDSS D VCC
ID_D-VCC
30
10
V
Continue Drain Current
17
35
27
43
mA
Internal Dimming Pull Down Current Source
Strong Dimming Pull Down
Current for leading edge
dimmer
IDP_STRONG_LD
27
mA
Weak Dimming Pull Down
Current for leading edge
dimmer
IDP_WEAK_LD
8
10
12
mA
mA
Pull Down Current for Trailing
edge dimmer
IDP_TL
133
150
13%
167
Min Clamp Ratio of Pull Down
Current for Trailing edge
dimmer (I_Min/I_Normal)
NTC
High Threshold Voltage
Low Threshold Voltage
Shutdown Threshold
Shutdown Voltage Hysteresis
Pull Up Current Source
Leakage Current
VH_NTC
VL_NTC
1.14
0.70
0.32
80
1.2
0.80
0.38
100
52
1.36
0.90
0.44
120
62
V
V
VSD_NTC
V
VSD_NTC_HSY
IPULL_UP_NTC
ILEAKAGE_NTC
tPWM_LEB
mV
µA
µA
ms
42
1
PWM Dimming Blanking Time
DAMP
20
Turn Off Threshold
Turn On Threshold
Pull Down Current
Pull Up Current
VMULT DAMP OFF
VMULT DAMP ON
0.22
0.32
290
70
0.25
0.35
370
90
0.28
0.38
450
110
16.5
V
V
IDAMP PULL DOWN VDAMP=5V
IDAMP PULL UP VDAMP=0.3V
VDAMP CLAMP UP
µA
µA
V
Upper Clamp Voltage
Min Pull Up Voltage
13
15
VCC= VCCEN +50mV
VDAMP_MIN
5.7
V
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
8
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS (continued)
Typical values are VCC =20V, TJ = 25°C, unless otherwise noted.
Minimum and maximum values are at VCC =20V, TJ = -40°C to +125°C, unless otherwise noted,
guaranteed by characterization.
Parameter
DIM
Symbol
Condition
Min
Typ
Max
Units
Source Current
Sink Current
High Level
IDIM SOURCE
IDIM SINK
VDIM HIGH
VDIM_LOW
2
3
4
mA
mA
V
1.5
5.0
2.8
4
6.1
0.3
Low Level
V
Thermal Shutdown
Thermal Shutdown Threshold(6)
TSD
150
25
℃
℃
Thermal Shutdown Recovery
Hysteresis(6
THYS
Notes:
5) The multiplier output is given by: Vs=K•VMULT• (VCOMP-1.5)
6) Guaranteed by characterization.
7) Guaranteed by design.
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
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© 2014 MPS. All Rights Reserved.
9
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
TYPICAL CHARACTERISTICS
Reference Voltage vs.
Junction Temperature
0.4170
0.4165
0.4160
0.4155
0.4150
0.4145
-50
0
50
100
150
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
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© 2014 MPS. All Rights Reserved.
10
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
TYPICAL PERFORMANCE CHARACTERISTICS
Based on the EVB model: EV4033-K-00A, isolated flyback converter, 230VAC/50Hz input,
24V/420mA output, TA=25°C, unless otherwise noted.
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
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© 2014 MPS. All Rights Reserved.
11
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Based on the EVB model: EV4033-K-00A, isolated flyback converter, 230VAC/50Hz input,
24V/420mA output, TA=25°C, unless otherwise noted.
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
12
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Based on the EVB model: EV4033-K-00A, isolated flyback converter, 230VAC/50Hz input,
24V/420mA output, TA=25°C, unless otherwise noted.
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
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© 2014 MPS. All Rights Reserved.
13
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
PIN FUNCTIONS
Pin #
Name Description
SOIC-8 SOIC-14 MSOP-10
One of the Internal Multiplier’s Input. Connect to the tap of resistor divider
from the rectified voltage of the AC line. The half-wave sinusoid signal on
MULT this pin provides a reference signal for the internal current control loop.
The MULT pin is also used for dimmer type detection and dimming
phase detection.
1
2
2
3
1
2
Zero-Current Detection. A negative going edge triggers the internal
MOSFET’s turn-on signal. Connect to the tap of a resistor divider from
the auxiliary winding to GND. The over-voltage condition is detected in
ZCD pin. Over-voltage occurs if VZCD exceeds the over-voltage-
ZCD
VCC
protection (OVP) threshold after a blanking time when the internal
MOSFET turns off. The ZCD pin is also used to select the Strong/Weak
Dimming Pull Down Current in leading edge dimming. Besides, the ZCD
itself has short circuit protection to prevent the device damage when
output is open and ZCD pin is short.
Supply Voltage. Supply power for both the control signal and the internal
MOSFET’s gate driver. Connect this pin to an external bulk capacitor—
typically 22µF.
3
4
4
5
6
3
4
5
DAMP Gate Control pin of the external Damping MOSFET.
Gate driver. This is the DIM signal from internal control logic, it is used to
NA
DIM
D
control the color temperature and brightness for warm sunset dimming or
drive an external dummy Load to enlarge the dimming depth..
Internal Low-Side main MOSFET Drain. It is connected to the source of
the external high-side main MOSFET. This pin is also internally
connected to VCC thro a diode and a JFET to form an internal charging
circuit for VCC. There is a series-connected MOS and diode internally to
pull up the D to VCC at fault condition to turn off the main switch reliably.
There is an intelligent Dimming Pull Down Current Source on this pin.
5
9
6
Internal Low-Side main MOSFET Source. Connect a resistor from this
pin to GND to sense the internal MOSFET current. An internal
comparator compares the resulting voltage to the internal sinusoid
shaped current reference signal to determine when the MOSFET turns
off. If the voltage exceeds the upper current-clamp threshold after the
leading edge blanking time during the turn-on interval, the gate signal
turns off. Over-current occurs if Vs exceeds OCP Voltage during the
gate-on interval after the OCP lead edge blanking time.
6
10
7
8
S
LED temperature protection input. Connecting a NTC resistor from this
pin to GND reduces the output current in high ambient temperature to
protect the LED and driver. Analog dimming is accomplished with an
external PWM signal through a resistor. A 1kΩ resistor is recommended.
NA
11
12
NTC
7
8
9
GND Ground. Current return of the control signal and power signal.
Loop Compensation. Connect it to a compensation network to stabilize
COMP
13
10
the LED driver and accurately control the LED driver current.
1,7,8,14
NC
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
14
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
FUNCTION DIAGRAM
Figure 1: MP4033 Function Block Diagram
MP4033 Rev. 1.0
10/22/2014
www.MonolithicPower.com
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15
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
OPERATION
The MP4033 is a TRIAC-dimmable primary-side–
control, offline LED controller designed for high-
performance LED lighting. The MP4033
accurately controls the LED current using the
real-current–control method based on primary-
side information. The adaptive dimmer type
detection and phase-cut-based dimming control
bring good dimmer compatibility and deep
dimming range. It also achieves a high power
factor to eliminate noise pollution on the AC line.
The integrated VCC charging circuit achieves
fast start-up without any perceptible delay. The
programmable thermal current fold back function
prolongs the lifetime of the LED. With duty ratio
varies with dimming cycle, the DIM pin easily
supports color temperature and brightness
control for warm sunset dimming application. The
MP4033 is also available for analog dimming with
PWM input.
When the current decreases to zero, the voltage
drop on the main MOSFET drain-to-source falls
and oscillates. The oscillation frequency is
determined by the primary side inductor and the
combined parasitic capacitances. The resonance
is reflected on the auxiliary winding (see Figure
2).
The zero-current detector generates the external
MOSFET turn-on signal when the ZCD voltage
falls below VZCD_T after a blanking time tZCD_LEB
and ensures the MOSFET turns on at a relatively
low voltage (see Figure 3).
Boundary-Conduction Mode
During the external MOSFET on time (τON), the
rectified input voltage applied on the primary-side
inductor (Lm) makes the primary current thru Lm
increase linearly from zero to the peak value (Ipk),
then the external MOSFET turns off. The energy
stored in Lm forces the secondary side rectifier
diode to turn on, and the inductor current
decreases linearly from the peak value to zero.
Figure 3: Zero-Current Detector
As a result, there are relatively small primary
switching on losses and no secondary-diode
reverse-recovery losses. This ensures high
efficiency and low EMI noise.
VDS
Real-Current Control
VAC line + NVOUT
The proprietary real-current–control method
allows the MP4033 to control the secondary-side
LED current based on primary-side information.
The approximate output LED mean current can
be calculated as:
turn on
VAC line
N⋅ VREF
Io ≈
T
on
Is/N
Ip
Inductor
current
2⋅Rs
T
off
Where:
•
•
•
N is the turn ratio of the primary side to the
secondary side,
VZCD
VREF is the internal reference voltage
(typically 0.414), and
0
Rs is the sense resistor between the internal
MOSFET source and GND.
Figure 2: Boundary-Conduction Mode
MP4033 Rev. 1.0
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16
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
Power-Factor Correction
to send a turn-on signal after tSTART, the starter
will automatically send a turn-on signal to avoid
unnecessary shutdown.
The MULT pin is connected to the tap of a
resistor divider from the rectified instantaneous
line voltage, driving a sinusoidal multiplier output.
This signal provides the reference for the current
comparator, which shapes the primary-peak
current into a sinusoid and has the same phase
with the input line voltage. This guarantees a
high power factor.
Minimum OFF Time
The MP4033 operates with a variable switching
frequency; the frequency changes with the
instantaneous input line voltage. In order to limit
the maximum frequency and get a good EMI
performance, the MP4033 employs an internal
minimum off time.
Multiplier output
Inductor current
Figure 4: Power-Factor Correction
The multiplier’s maximum output voltage to the
current comparator is clamped to VS_CLAMP_H to
limit the cycle-by-cycle current. The multiplier’s
minimum output voltage is clamped to VS_CLAMP_L
to ensure a turn-on signal during the TRIAC
dimming OFF interval, which pulls down the
rectifier input voltage and accurately detects the
dimming phase.
Figure 5: VCC Timing Sequence
Leading-Edge Blanking
VCC Timing Sequence
The VCC timing sequence is shown in Figure5.
Initially, VCC charges through the internal
charging circuit from the AC line. When VCC
reaches VCCH, the internal charging circuit stops
charging, the control logic initializes and the
internal main MOSFET begins to switch. The
auxiliary winding takes over the power supply.
However, the initial auxiliary-winding positive
voltage may not be large enough to charge VCC,
causing VCC to drop. Instead, if the VCC voltage
drops below VCCL threshold, the internal charging
circuit triggers and charges VCC to VCCH again.
This cycle repeats until the auxiliary winding
voltage is high enough to power VCC.
In order to avoid premature switching-pulse
termination due to the parasitic capacitances
discharging when the MOSFET turns on, an
internal leading-edge-blanking (LEB) time is
introduced on S pin. The current comparator
blocks the input path from S pin during the
blanking time. Figure 6 shows the leading-edge
blanking.
VS
tLEB
If any fault occurs during this time, the switching
and the internal charging circuit stop, and VCC
drops. When VCC decreases below VCCEN, the
internal re-charge is enabled to auto-restart.
t
Figure 6: Leading-Edge Blanking
Auto Start
The MP4033 contains an auto starter that starts
timing when the MOSFET turns off. If ZCD fails
MP4033 Rev. 1.0
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17
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
Output Over-Voltage Protection (OVP)
Cycle by Cycle Current Limit
There is cycle by cycle current limit on the S pin,
when the voltage on S pin reaches VS_CLAMP_H
after a blanking time, the switching will be turn off
to limit the peak current value.
Output over-voltage protection (OVP) prevents
the components from over-voltage damage. The
auxiliary winding voltage’s positive plateau is
proportional to the output voltage, so the OVP
block monitors this auxiliary winding voltage to
apply an OVP function, as shown in Figure 7.
Once the ZCD pin voltage exceeds VZCD_OVP, the
OVP signal is triggered, the gate driver turns off,
the IC works in its quiescent current mode. When
the VCC voltage drops below the UVLO
threshold, the IC shuts down and the system
restarts. The output OVP set point is calculated
as:
Primary Over-Current Protection (OCP)
The
S
pin has an internally-integrated
comparator for primary side OCP. When the gate
is on, the comparator is enabled. Over-current
occurs when VS exceeds VOCP after a blanking
time. The IC shuts down and restarts after VCC
drops below UVLO. The OCP function block
diagram is shown in Figure 9.
Naux
RZCD2
Vout _ ovp
⋅
⋅
= VZCD_OVP
Nsec RZCD1 + RZCD2
Where:
Vout-ovp is the output OVP threshold,
Naux is the turns of auxiliary winding, and
Nsec is the turns of secondary winding
Figure 9: Over-Current Protection Circuit
LED Short Circuit Protection (SCP)
When the LED Short Circuit occurs, IC reduces
the switching frequency to 7kHz. The output
power at this condition is limited at a safe range.
ZCD Pin Short Circuit Protection
If ZCD pin voltage is less than VZCD_SC lasts
longer than tZCD_SC_LEB, it is recognized as ZCD
pin short circuit. The MP4033 stops the switching
until VCC drops below UVLO and restarts. This
prevents the components from over-voltage
damage if LED load opens while ZCD pin shorts
at the same time.
Figure 7: OVP Sampling Circuit
To avoid switch-off spikes mis-triggering OVP,
OVP sampling has a tOVP_LEB blanking period, as
shown in Figure 8.
Thermal Shutdown
To prevent IC from thermal damage, the MP4033
latches off the switching cycle when the junction
temperature is higher than 150°C. When the
VCC drops below UVLO, it restarts again .
Figure 8: ZCD Voltage and OVP Sampling
MP4033 Rev. 1.0
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18
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
Adaptive Dimmer Type Detection
The MP4033 detects the dimming turn-on cycle
through the MULT pin. Based on the turn-on
cycle, the control circuitry adjusts the internal
reference voltage. MULT voltage exceeding
VMULT_ON is recognized as a dimmer turn-on signal,
MULT voltage below VMULT_OFF is recognized as a
dimmer turn-off signal. The MP4033 has a 30%
line-cycle-detection blanking time at each line
cycle, the real phase detector output added this
blanking time to determine the reference voltage,
if it is higher than 100%, the reference voltage is
clamped to 100%. As shown in FigureError!
Reference source not found. 12. That means if
the turn-on cycle exceeds 70% of the line cycle,
the reference maintains the maximum value,
which makes the maximum output current with
different dimmers is almost the same with the
rated output current.
The MP4033 integrates adaptive dimmer type
detection to accurately detect which kind of
dimmer is connected at the system start-up,
leading edge dimmer, trailing edge dimmer or no
dimmer. The MP4033 works in different modes
depending on these dimmer types to achieve the
best
dimmer compatibility at the highest
performance.
Phase-Cut-Based Dimming Control
The MP4033 implements phase-cut-based
dimming control (both for leading edge and
trailing edge dimmers). For the leading edge
dimmer, most of them are TRIAC-based.. The
TRIAC dimmer usually consists of a bi-directional
SCR and an adjustable turn on phase. Figure 10
shows the leading-edge TRIAC dimmer
waveforms.
Input line
voltage before
TRIAC dimmer
Line voltage
after TRIAC
dimmer
Figure12: Dimming Turn-On Cycle Detector
When the turn-on cycle decreases to less than
70% of the line cycle, the internal reference
voltage decreases, lowering the output current.
As the dimming turn-on cycle decreases, the
COMP voltage also decreases. For leading edge
dimmer, once the COMP voltage reaches
VCOMPL_LD, it is clamped. The output current
decreases slowly to maintain the TRIAC holding
current and avoid random flicker. Figure Error!
Reference source not found.13 shows the
relationship between the leading edge dimming
turn-on phase and output current.
Rectified line
voltage
Dimmer
turn on
phase
Line cycle
Figure 10: Leading Edge Dimmer Waveforms
For the Trailing edge dimmer, the waveforms are
shown in Figure 11.
Figure 11: Trailing Edge Dimmer Waveforms
MP4033 Rev. 1.0
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MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
MULT decreases to VMULT_DP_ON_TL and turns off
until the MULT increases to VMULT_DP_OFF_TL.
The weak/strong dimming pull down current
source is selected through different resistance on
the ZCD pin. Figure 15 shows the selected logic:
If IDP_DET_LD *(R1+R2//R3)≥VEN_DP_STR_LD
Strong dimming pull-down current source is
selected; otherwise, weak dimming pull down
current source is selected.
In real application design, the weak/strong
dimming pull down current selection is related to
the detailed application SPEC.
Figure 13: Leading Edge Dimming Curve
For trailing edge dimmer, there is no holding
current, the COMP voltage is clamped at a lower
level VCOML_TL to get deeper dimming depth.
Figure 14 shows the relationship between the
trailing edge dimming turn-on phase and output
current.
Io
Figure 15: Weak/Strong Dimming Pull Down
Current Source Selection
VCOMP
Damping Circuit Control
If a leading edge dimmer or trailing edge dimmer
is detected, the damping circuit is enabled to limit
the inrush current at the moment dimmer turns
on. If no dimmer is detected, the damping circuit
is disabled by pulling up the damp pin voltage so
the damping resister is shorted by the damping
MOSFET. The damp pin voltage begins to be
pulled up if MULT voltage increases higher than
VMULT_DAMP_ON and begins to be pulled down when
40%
70%
100%
Dimming turn on cycle
Figure 14: Trailing Edge Dimming Curve
Dimming Pull-Down Current Source
There are three kinds of dimming pull down
current source in MP4033. The IDP_TL current
source is for trailing edge dimming, the other two
(weak/strong) current sources are for leading
edge dimming. The dimming pull down current is
used to pull down the rectified line voltage to zero
quickly to avoid any mis-detection on the MULT
pin.
MULT
voltage
decreases
lower
than
VMULT_DAMP_OFF. The maximum pull up current
source is 100μA while the max pulling down
current source is 400μA.
If the leading edge dimmer is detected, the
dimming pull-down current source turns on when
the MULT decreases to VMULT_DP_ON_LD and turns
off until the MULT increases to VMULT_DP_OFF_LD. If
trailing edge dimmer is detected, the dimming
pull-down current source turns on when the
MP4033 Rev. 1.0
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20
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
Color Temperature and Brightness Control
for Warm Sunset Dimming application
which to help distribute the output current. The
DIM pin working timing makes the smaller
dimming duty cycle is, the bigger dummy load
distribution current is, the dimming depth is
enlarged. The dimming depth enlargement circuit
is shown in figure 18.
The color temperature and brightness control
circuit is shown in Figure 16.
Figure 18: Dimming Depth Enlargement circuit
Programmable Thermal Fold-back (NTC)
The NTC pin is used as the LED programmable
thermal fold-back. A NTC resistor is connected to
this pin directly to monitor the LED temperature.
The LED current changes as the voltage drops
on NTC. Figure 19 shows the NTC curve.
Figure 16: Color Temperature and Brightness
Control Circuit
The DIM pin of MP4033 outputs a driving signal
for external MOSFET. The DIM control logic is
shown in Figure 17.
Figure 17: Dim Signal Logic
Figure 19: NTC Curve
DIM turn-on signal is the compliment signal of the
dimming turn-on signal. This means the longer
the dimming turn-on cycle, the smaller the DIM
turn-on cycle. When the dimming turn-on cycle is
greater than 70%, the DIM stays low, and the
output current flows only through the 1st LED
string. As the dimming turn-on cycle decreases,
the DIM turn-on duty cycle proportionally
increases the 2nd LED string current. The total
current through the 1st string and the 2nd string
stays constant. This current balance achieves
color temperature and brightness control. The
maximum current through 2nd string is adjusted
by changing the resistance of Ra.
If the voltage on the NTC pin is lower than the
VSD_NTC, the LED current drops to the minimum
value, the minimum output current is determined
by the minimum on time of the main MOSFET.
(Equals to LEB time)
Analog Dimming with PWM Input
The MP4033 enables direct control of analog
dimming. Applying a PWM signal (>200Hz) on
NTC pin achieves analog dimming. The output
current will linearly change with the PWM duty
cycle from maximum to minimum. This feature
dramatically reduces the BOM cost for the PWM
dimming system.
Dimming Depth Enlargement
Driving a MOSFET to pull down a resistor from
auxiliary winding to GND forms a dummy load,
MP4033 Rev. 1.0
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21
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
TYPICAL APPLICATION CIRCUITS
Figure 20: A19 Bulb Driver, 230VAC/50Hz Input, Isolated Flyback Converter, VO =24V, IO=420mA
EVB Model: EV4033-K-00A
Figure 21: A19 Bulb Driver, 120VAC/60Hz Input, Isolated Flyback Converter, VO =24V, IO=350mA
EVB Model: EV4033-K-00B
MP4033 Rev. 1.0
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22
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
PACKAGE INFORMATION
SOIC-8
0.189(4.80)
0.197(5.00)
0.050(1.27)
0.024(0.61)
0.063(1.60)
8
5
0.150(3.80)
0.157(4.00)
0.228(5.80)
0.244(6.20)
0.213(5.40)
PIN 1 ID
1
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.0075(0.19)
0.0098(0.25)
0.013(0.33)
0.020(0.51)
SEE DETAIL "A"
0.050(1.27)
BSC
SIDE VIEW
FRONT VIEW
0.010(0.25)
0.020(0.50)
x 45o
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
GAUGE PLANE
0.010(0.25) BSC
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
0.016(0.41)
0.050(1.27)
0o-8o
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
DETAIL "A"
MP4033 Rev. 1.0
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23
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
MSOP-10
0.114(2.90)
0.122(3.10)
6
10
0.187(4.75)
0.199(5.05)
0.114(2.90)
0.122(3.10)
PIN 1 ID
(NOTE 5)
5
1
0.007(0.18)
0.011(0.28)
0.0197(0.50)BSC
BOTTOM VIEW
TOP VIEW
GAUGE PLANE
0.010(0.25)
0.030(0.75)
0.037(0.95)
0.043(1.10)MAX
SEATING PLANE
0.002(0.05)
0.004(0.10)
0.008(0.20)
0.016(0.40)
0.026(0.65)
0o-6o
0.006(0.15)
FRONT VIEW
SIDE VIEW
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS
IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
0.181(4.60)
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) PIN 1 IDENTIFICATION HAS THE HALF OR FULL CIRCLE OPTION.
6) DRAWING MEETS JEDEC MO-817, VARIATION BA.
7) DRAWING IS NOT TO SCALE.
0.040(1.00)
0.012(0.30)
0.0197(0.50)BSC
RECOMMENDED LAND PATTERN
MP4033 Rev. 1.0
10/22/2014
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24
MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC
SOIC-14
0.338(8.55)
0.344(8.75)
0.024(0.61)
0.050(1.27)
8
14
0.063
(1.60)
0.150
(3.80)
0.157
(4.00)
0.228
(5.80)
0.244
(6.20)
0.213
(5.40)
PIN 1 ID
7
1
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.0075(0.19)
0.0098(0.25)
0.050(1.27)
BSC
0.013(0.33)
0.020(0.51)
0.004(0.10)
0.010(0.25)
SEE DETAIL "A"
SIDE VIEW
FRONT VIEW
NOTE:
0.010(0.25)
0.020(0.50)
x 45o
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
GAUGE PLANE
0.010(0.25) BSC
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AB.
6) DRAWING IS NOT TO SCALE.
0.016(0.41)
0.050(1.27)
0o-8o
DETAIL "A"
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP4033 Rev. 1.0
10/22/2014
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25
相关型号：
MP404W-BP
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MCC
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